Armv8.8-A defines a read-only system register called id_aa64isar2_el1.
The register was previously RES0 and should therefore be accepted
at all architecture levels.
[https://developer.arm.com/documentation/ddi0595/2021-09/AArch64-Registers/ID-AA64ISAR2-EL1--AArch64-Instruction-Set-Attribute-Register-2?lang=en]
opcodes/
* aarch64-opc.c (aarch64_sys_regs): Add id_aa64isar2_el1.
gas/
* testsuite/gas/aarch64/sysreg-diagnostic.s: Test writes to
id_aa64isar2_el1.
* testsuite/gas/aarch64/sysreg-diagnostic.d: Update accordingly.
* testsuite/gas/aarch64/sysreg-diagnostic.l: Likewise.
* testsuite/gas/aarch64/sysreg.s: Test reads from
id_aa64isar2_el1.
* testsuite/gas/aarch64/sysreg.d: Update accordingly.
This patch adds skeleton support for -march=armv8.8-a, testing only
that it correctly inherits from armv8.7-a.
include/
* opcode/aarch64.h (AARCH64_FEATURE_V8_8): New macro.
(AARCH64_ARCH_V8_8): Likewise.
gas/
* doc/c-aarch64.texi: Document armv8.8-a.
* config/tc-aarch64.c (aarch64_archs): Add armv8-8-a
* testsuite/gas/aarch64/v8-8-a.s,
* testsuite/gas/aarch64/v8-8-a.d: New test.
We warn about MOVPRFX instructions that have no following
instruction. This patch adds a line number to the message,
which is useful if the assembly code has multiple text sections.
The new code is unconditional since OBJ_ELF is always defined
for aarch64.
gas/
* config/tc-aarch64.h (aarch64_segment_info_type): Add last_file
and last_line.
* config/tc-aarch64.c (now_instr_sequence): Delete.
(force_automatic_sequence_close): Provide a line number when
reporting unclosed sequences.
(md_assemble): Record the location of the instruction in
tc_segment_info.
* testsuite/gas/aarch64/sve-movprfx_4.l: Add line number to error
message.
* testsuite/gas/aarch64/sve-movprfx_7.l: Likewise.
* testsuite/gas/aarch64/sve-movprfx_8.l: Likewise.
libopcodes has some code to check constraints across sequences
of consecutive instructions. It was added to support MOVPRFX
sequences but is going to be useful for the Armv8.8-A MOPS
feature as well.
Currently the structure has one field to record the instruction
that started a sequence and another to record the remaining
instructions in the sequence. It's more convenient for the
MOPS code if we put the instructions into a single array instead.
No functional change intended.
include/
* opcode/aarch64.h (aarch64_instr_sequence): Replace num_insns
and current_insns with num_added_insns and num_allocated_insns.
opcodes/
* aarch64-opc.c (add_insn_to_sequence): New function.
(init_insn_sequence): Update for new aarch64_instr_sequence layout.
Add the first instruction to the inst array.
(verify_constraints): Update for new aarch64_instr_sequence layout.
Don't add the last instruction to the array.
The immediate form of MSR has a 4-bit immediate field (in CRm).
However, many forms of MSR require a smaller immediate. These cases
are identified by value in operand_general_constraint_met_p,
but they're now the common case rather than the exception.
This patch therefore adds the maximum value to the sys_reg
description and gets the range from there. It also enforces
the minimum of 0, which avoids a situation in which:
msr dit, #2
would give the expected:
Error: immediate value out of range 0 to 1
whereas:
msr dit, #-1
would give:
Error: immediate value out of range 0 to 15
(from the later UIMM4 checking).
Also:
- we were reporting the first error above against the wrong operand
- TCO takes a single-bit immediate, but we previously allowed
all 16 values.
[https://developer.arm.com/documentation/ddi0596/2021-09/Base-Instructions/MSR--immediate---Move-immediate-value-to-Special-Register-?lang=en]
opcodes/
* aarch64-opc.h (F_REG_MAX_VALUE, F_GET_REG_MAX_VALUE): New macros.
* aarch64-opc.c (operand_general_constraint_met_p): Read the
maximum MSR immediate value from aarch64_pstatefields.
(aarch64_pstatefields): Add the maximum immediate value
for each register.
gas/
* testsuite/gas/aarch64/sysreg-4.s: Use an immediate value of 1
rather than 8 for the TCO test.
* testsuite/gas/aarch64/sysreg-4.d: Update accordingly.
* testsuite/gas/aarch64/armv8_2-a-illegal.l: Fix operand number
in MSR immediate error messages.
* testsuite/gas/aarch64/diagnostic.l: Likewise.
* testsuite/gas/aarch64/pan-illegal.l: Likewise.
* testsuite/gas/aarch64/ssbs-illegal1.l: Likewise.
* testsuite/gas/aarch64/illegal-sysreg-4b.s,
* testsuite/gas/aarch64/illegal-sysreg-4b.d,
* testsuite/gas/aarch64/illegal-sysreg-4b.l: New test.
When introducing this code, I forgot that we had some macros for this.
Replace some "manual" pragma diagnostic with some DIAGNOSTIC_* macros,
provided by include/diagnostics.h.
In diagnostics.h:
- Add DIAGNOSTIC_ERROR, to enable a diagnostic at error level.
- Add DIAGNOSTIC_ERROR_SWITCH, to enable -Wswitch at error level, for
both gcc and clang.
Additionally, using DIAGNOSTIC_PUSH, DIAGNOSTIC_ERROR_SWITCH and
DIAGNOSTIC_POP seems to misbehave with g++ 4.8, where we see these
errors:
CXX ada-tasks.o
/home/smarchi/src/binutils-gdb/gdb/ada-tasks.c: In function void read_known_tasks():
/home/smarchi/src/binutils-gdb/gdb/ada-tasks.c:998:10: error: enumeration value ADA_TASKS_UNKNOWN not handled in switch [-Werror=switch]
switch (data->known_tasks_kind)
^
Because of the POP, the diagnostic should go back to being disabled,
since it was disabled in the beginning, but that's not what we see
here. Versions of GCC >= 5 compile correctly.
Work around this by making DIAGNOSTIC_ERROR_SWITCH a no-op for GCC < 5.
Note that this code (already as it exists in master today) enables
-Wswitch at the error level even if --disable-werror is passed. It
shouldn't be a problem, as it's not like a new enumerator will appear
out of nowhere and cause a build error if building with future
compilers. Still, for correctness, we would ideally want to ask the
compiler to enable -Wswitch at its default level (as if the user had
passed -Wswitch on the command-line). There doesn't seem to be a way to
do this.
Change-Id: Id33ebec3de39bd449409ea0bab59831289ffe82d
When configuring gas, I get:
config.status: error: cannot find input file: `doc/Makefile.in'
This is because configure is out-of-date, re-generate it.
Change-Id: Iaa5980c282900d9fd23b90f0df25bf8ba3676498
When configuring libctf, I get:
config.status: error: cannot find input file: `doc/Makefile.in'
This is because configure is out-of-date, re-generate it.
Change-Id: Ie69acd33012211a4620661582c7d24ad6d2cd169
These have been around for decades but don't appear to be used, and
trying to build them (e.g. `make archive.p archive.ip`) doesn't work,
so just delete it all.
The "info source" command, with a DWARF-compile program, always show
that the debug info is "DWARF 2":
(gdb) info source
Current source file is test.c
Compilation directory is /home/smarchi/build/binutils-gdb/gdb
Located in /home/smarchi/build/binutils-gdb/gdb/test.c
Contains 2 lines.
Source language is c.
Producer is GNU C17 9.3.0 -mtune=generic -march=x86-64 -g3 -gdwarf-5 -O0 -fasynchronous-unwind-tables -fstack-protector-strong -fstack-clash-protection -fcf-protection.
Compiled with DWARF 2 debugging format.
Includes preprocessor macro info.
Change it to display the actual DWARF version:
(gdb) info source
Current source file is test.c
Compilation directory is /home/smarchi/build/binutils-gdb/gdb
Located in /home/smarchi/build/binutils-gdb/gdb/test.c
Contains 2 lines.
Source language is c.
Producer is GNU C17 9.3.0 -mtune=generic -march=x86-64 -g3 -gdwarf-5 -O0 -fasynchronous-unwind-tables -fstack-protector-strong -fstack-clash-protection -fcf-protection.
Compiled with DWARF 5 debugging format.
Includes preprocessor macro info.
The comp_unit_head::version field is guaranteed to be between 2 and 5,
thanks to the check in read_comp_unit_head. So we can still use static
strings to pass to record_debugformat, and keep it efficient.
In the future, when somebody will update GDB to support DWARF 6, they'll
hit this assert and have to update this code.
Change-Id: I3270b7ebf5e9a17b4215405bd2e365662a4d6172
1. Discard input .note.gnu.build-id sections.
2. Clear the build ID field before writing.
3. Use bfd_make_section_anyway_with_flags to create the output
.note.gnu.build-id section.
PR ld/28639
* ldelf.c (ldelf_after_open): Discard input .note.gnu.build-id
sections, excluding the first one.
(write_build_id): Clear the build ID field before writing.
(ldelf_setup_build_id): Use bfd_make_section_anyway_with_flags
to create the output .note.gnu.build-id section.
* testsuite/ld-elf/build-id.exp: New file.
* testsuite/ld-elf/pr28639a.rd: Likewise.
* testsuite/ld-elf/pr28639b.rd: Likewise.
* testsuite/ld-elf/pr28639c.rd: Likewise.
* testsuite/ld-elf/pr28639d.rd: Likewise.
As defined on: https://systemd.io/COREDUMP_PACKAGE_METADATA/
this note will be used starting from Fedora 36. Allow
readelf --notes to pretty print it:
Displaying notes found in: .note.package
Owner Data size Description
FDO 0x00000039 FDO_PACKAGING_METADATA
Packaging Metadata: {"type":"deb","name":"fsverity-utils","version":"1.3-1"}
Signed-off-by: Luca Boccassi <luca.boccassi@microsoft.com>
With gdb.multi/multi-arch-exec.exp I run into:
...
Running src/gdb/testsuite/gdb.multi/multi-arch-exec.exp ...
ERROR: tcl error sourcing src/gdb/testsuite/gdb.multi/multi-arch-exec.exp.
ERROR: wrong # args: extra words after "else" clause in "if" command
while executing
"if [istarget "powerpc64*-*-*"] {
set march "-m64"
} else if [istarget "s390*-*-*"] {
set march "-m31"
} else {
set march "-m32"
}"
...
Fix the else if -> elseif typo.
Tested on x86_64-linux.
When running test-case gdb.arch/i386-pkru.exp on a machine with "Memory
Protection Keys for Userspace" support, we run into:
...
(gdb) PASS: gdb.arch/i386-pkru.exp: probe PKRU support
print $pkru^M
$2 = 1431655764^M
(gdb) FAIL: gdb.arch/i386-pkru.exp: pkru register
...
The test-case expects the $pkru register to have the default value 0, matching
the "init state" of 0 defined by the XSAVE hardware.
Since linux kernel version v4.9 containing commit acd547b29880 ("x86/pkeys:
Default to a restrictive init PKRU"), the register is set to 0x55555554 by
default (which matches the printed decimal value above).
Fix the FAIL by accepting this value for linux.
Tested on x86_64-linux.
This commit makes use of a scoped_restore object to control the
remote_state::starting_up flag within the remote_target::start_remote
method.
Ideally I would have liked to create the scoped_restore inside
start_remote and just leave the restore in place until the end of the
scope, however, I'm worried that doing this would change the behaviour
of GDB. Specifically, in start_remote, the following code is executed
once the starting_up flag has been restored to its previous value:
if (breakpoints_should_be_inserted_now ())
insert_breakpoints ();
I think (but am not 100% sure) that calling install_breakpoints could
end up back inside remote_target::can_download_tracepoint, which does
check the value of remote_state::starting_up. And so, I'm concerned
that leaving the scoped_restore in place until the end of start_remote
will cause a possible change in behaviour.
To avoid this, and to leave things as close to the current behaviour
as possible, I've split remote_target::start_remote into two, there's
the main function body which moves into remote_target::start_remote_1,
this function uses the scoped_restore to change the ::starting_up
flag, then there's the old remote_target::start_remote, which now just
calls ::start_remote_1, and then does the insert_breakpoints call.
There should be no user visible changes after this commit, unless
there's a situation where the ::starting_up flag could previously have
been left set, if this was the case, then this situation should no
longer be possible.
When my system isn't properly configured to generate core files in the
local directory, I see these DUPLICATEs:
DUPLICATE: gdb.base/corefile-buildid.exp: could not generate core file
Fix that by having a single with_test_prefix around that message and
what follows.
Change-Id: I4ac245fcce1c666db56e3bad3582aa17f183dcba
The expect file has a procedure append_arch_options which sets march based
the istarget. The current if / else statement does not check for
powerpc64. The else statement is hit which sets march to -m32. This
results in compilation errors on 64-bit PowerPC.
This patch adds an if statement to check for powerpc64 and if true sets mach
to -m64.
The patch was tested on a Power 10 system. No compile errors were generated.
The test completes with 1 expected pass and no failures.
This patch adds support for various system registers, up to Armv8.7-A.
This includes all the registers that were mentioned in the PR and that
hadn't become supported since.
opcodes/
PR aarch64/27145
* aarch64-opc.c (SR_V8_4): Remove duplicate definition.
(SR_V8_6, SR_V8_7, SR_GIC, SR_AMU): New macros.
(aarch64_sys_regs): Add missing entries (up to Armv8.7-A).
gas/
PR aarch64/27145
* testsuite/gas/aarch64/sysreg-8.s,
* testsuite/gas/aarch64/sysreg-8.d,
* testsuite/gas/aarch64/illegal-sysreg-8.s,
* testsuite/gas/aarch64/illegal-sysreg-8.d,
* testsuite/gas/aarch64/illegal-sysreg-8.l,
* testsuite/gas/aarch64/illegal-sysreg-8b.s,
* testsuite/gas/aarch64/illegal-sysreg-8b.d,
* testsuite/gas/aarch64/illegal-sysreg-8b.l: New tests.
* testsuite/gas/aarch64/sysreg.s: Change system register numbers
to ones that are still unallocated.
* testsuite/gas/aarch64/sysreg.d: Update accordingly.
We have a +lor feature flag for the Limited Ordering Regions
extension, but the associated registers didn't use it.
opcodes/
* aarch64-opc.c (SR_LOR): New macro.
(aarch64_sys_regs): Use it for lorc_el1, lorea_el1, lorn_el1 and
lorsa_el1.
gas/
* testsuite/gas/aarch64/sysreg-7.s: Enable +lor.
* testsuite/gas/aarch64/illegal-sysreg-7.s: Test for LOR registers
without +lor.
* testsuite/gas/aarch64/illegal-sysreg-7.d: Update accordingly.
* testsuite/gas/aarch64/illegal-sysreg-7.l: Likewise.
ZIDR_EL1 was part of an early version of SVE, but didn't make
it to the final release.
opcodes/
* aarch64-opc.c (aarch64_sys_regs): Remove zidr_el1 entry.
gas/
* testsuite/gas/aarch64/sve-sysreg.s: Remove zidr_el1.
* testsuite/gas/aarch64/sve-sysreg.d: Update accordingly.
* testsuite/gas/aarch64/sve-sysreg-invalid.l: Likewise.
MFAR_EL3 is a read/write register, but was incorrectly marked as
read-only
[https://developer.arm.com/documentation/ddi0601/2021-09/AArch64-Registers/MFAR-EL3--PA-Fault-Address-Register?lang=en]
opcodes/
* aarch64-opc.c (aarch64_sys_regs): Mark mfar_el3 as read-write.
gas/
* testsuite/gas/aarch64/rme.s: Test writing to mfar_el3.
* testsuite/gas/aarch64/rme.d: Update accordingly.
* testsuite/gas/aarch64/rme-invalid.s: Delete.
* testsuite/gas/aarch64/rme-invalid.l: Likewise.
* testsuite/gas/aarch64/rme-invalid.d: Likewise.
We were incorrectly allowing writes to PMSIDR_EL1, which is
a read-only register.
[https://developer.arm.com/documentation/ddi0595/2021-09/AArch64-Registers/PMSIDR-EL1--Sampling-Profiling-ID-Register?lang=en]
opcodes/
* aarch64-opc.c (aarch64_sys_regs): Make pmsidr_el1 as F_REG_READ.
gas/
* testsuite/gas/aarch64/msr.s: Remove write to pmsidr_el1.
* testsuite/gas/aarch64/msr.d: Update accordingly.
* testsuite/gas/aarch64/illegal-sysreg-2.s,
* testsuite/gas/aarch64/illegal-sysreg-2.d,
* testsuite/gas/aarch64/illegal-sysreg-2.l: New test.
There is a lot of overlap between the ETM and ETE system registers,
so some registers were listed twice.
Already tested by etm.[sd] and ete.[sd].
opcodes/
* aarch64-opc.c (aarch64_sys_regs): Combine ETE and ETM blocks
and remove redundant entries.
gas/
* testsuite/gas/aarch64/etm.s: Remove duplicated test.
* testsuite/gas/aarch64/etm.d: Update accordingly.
Previously we would not accept:
A .req B
if A happened to be the name of an instruction. Adding new
instructions could therefore invalidate existing register aliases.
I noticed this with a test that used "zero" as a register alias
for "xzr", where "zero" is now also the name of an SME instruction.
I don't have any evidence that "real" code is doing this, but it
seems at least plausible.
This patch switches things so that we check for register aliases
first. It might slow down parsing slightly, but the difference
is unlikely to be noticeable.
Things like:
b .req + 0
still work, since create_register_alias checks for " .req ",
and with the input scrubber, we'll only keep whitespace after
.req if it's followed by another name. If there's some valid
expression that I haven't thought about that is scrubbed to
" .req ", users could avoid the ambiguity by wrapping .req
in parentheses.
The new test for invalid aliases already passed. I just wanted
something to exercise the !dot condition.
I can't find a way of exercising the (existing) p == base condition,
but I'm not brave enough to say that it can never happen. If it does
happen, get_mnemonic_name would return an empty string.
gas/
* config/tc-aarch64.c (opcode_lookup): Move mnemonic extraction
code to...
(md_assemble): ...here. Check for register aliases first.
* testsuite/gas/aarch64/register_aliases.d,
testsuite/gas/aarch64/register_aliases.s: Test for a register
alias called "zero".
* testsuite/gas/aarch64/register_aliases_invalid.d,
testsuite/gas/aarch64/register_aliases_invalid.l,
testsuite/gas/aarch64/register_aliases_invalid.s: New test.
When running the gdb.python/py-arch.exp tests on a GDB built
against Python 2 I ran into some errors. The problem is that this
test script exercises the gdb.Architecture.integer_type method, and
this method uses 'p' as an argument format specifier in a call to
gdb_PyArg_ParseTupleAndKeywords.
Unfortunately this specified was only added in Python 3.3, so will
cause an error for earlier versions of Python.
This commit switches to use the 'O' specifier to collect a PyObject,
and then uses PyObject_IsTrue to convert the object to a boolean.
An earlier version of this patch incorrectly switched from using 'p'
to use 'i', however, it was pointed out during review that this would
cause some changes in behaviour, for example both of these will work
with 'p', but not with 'i':
gdb.selected_inferior().architecture().integer_type(32, None)
gdb.selected_inferior().architecture().integer_type(32, "foo")
The new approach of using 'O' works fine with these cases. I've added
some new tests to cover both of the above.
There should be no user visible changes after this commit.
When running test-case gdb.base/style.exp with a gdb build using
stub-termcap.c, we run into:
...
(gdb) PASS: gdb.base/style.exp: all styles enabled: frame when width=20
^M<et width 30^M
(gdb) FAIL: gdb.base/style.exp: all styles enabled: set width 30
...
The problem is that we're trying to issue the command "set width 30" while
width is set to 20, which causes horizontal scrolling.
Fix this by resetting the width to 0 before issuing the "set width 30"
command.
Tested on x86_64-linux.
Bug: https://sourceware.org/bugzilla/show_bug.cgi?id=24582
* dwarf.c (find_debug_info_for_offset): Use dwarf_vma type for
offsets, sizes and ranges.
(display_loc_list): Likewise. Also use print_dwarf_vma to print
the offset.
(display_loclists_list): Likewise.
(display_loc_list_dwo): Likewise.
(display_debug_str): Likewise.
(display_debug_aranges): Likewise.
(display_debug_ranges_list): Likewise.
(display_debug_rnglists_list): Likewise.
(display_debug_ranges): Likewise.
The gdb.python/py-inferior-leak.exp test makes use of the tracemalloc
module. When running the Python tests with a GDB built against Python
2 I ran into a test failure due to the tracemalloc module not being
available.
This commit adds a new helper function to lib/gdb-python.exp that
checks if a named module is available. Using this we can then skip
the py-inferior-leak.exp test when the tracemalloc module is not
available.
After this commit:
commit 76b43c9b5c
Date: Tue Oct 5 15:10:12 2021 +0100
gdb: improve error reporting from the disassembler
We started seeing FAILs in the gdb.base/all-architectures*.exp tests,
when running on a 32-bit ARM target, though I suspect running on any
target that compiles such that bfd_vma is 32-bits would also trigger
the failures.
The problem is that the test is expected GDB's disassembler to print
an error like this:
Cannot access memory at address 0x0
However, after the above commit we see an error like:
unknown disassembler error (error = -1)
The reason for this is this code in opcodes/i386-dis.c (in the
print_insn function):
if (address_mode == mode_64bit && sizeof (bfd_vma) < 8)
{
(*info->fprintf_func) (info->stream,
_("64-bit address is disabled"));
return -1;
}
This code effectively disallows us from ever disassembling 64-bit x86
code if we compiled GDB with a 32-bit bfd_vma. Notice we return
-1 (indicating a failure to disassemble), but never call the
memory_error_func callback.
Prior to the above commit GDB, when it received the -1 return value
would assume that a memory error had occurred and just print whatever
value happened to be in the memory error address variable, the default
value of 0 just happened to be fine because the test had asked GDB to
do this 'disassemble 0x0,+4'.
If we instead change the test to do 'disassemble 0x100,+4' then GDB
would (previously) have still reported:
Cannot access memory at address 0x0
which makes far less sense.
In this commit I propose to fix this issue by changing the test to
accept either the "Cannot access memory ..." string, or the newer
"unknown disassembler error ..." string. With this change done the
test now passes.
However, there is one weakness with this strategy; if GDB broke such
that we _always_ reported "unknown disassembler error ..." we would
never notice. This clearly would be bad. To avoid this issue I have
adjusted the all-architectures*.exp tests so that, when we disassemble
for the default architecture (the one selected by "auto") we _only_
expect to get the "Cannot access memory ..." error string.
[ Note: In an ideal world we should be able to disassemble any
architecture at all times. There's no reason why the 64-bit x86
disassembler requires a 64-bit bfd_vma, other than the code happens
to be written that way. We could rewrite the disassemble to not
have this requirement, but, I don't plan to do that any time soon. ]
Further, I have changed the all-architectures*.exp test so that we now
disassemble at address 0x100, this should avoid us being able to pass
by printing a default address of 0x0. I did originally change the
address we disassembled at to 0x4, however, some architectures,
e.g. ia64, have a default instruction alignment that is greater than
4, so would still round down to 0x0. I could have just picked 0x8 as
an address, but I figured that 0x100 was likely to satisfy most
architectures alignment requirements.
This commits adds a new sub-class of gdb.TargetConnection,
gdb.RemoteTargetConnection. This sub-class is created for all
'remote' and 'extended-remote' targets.
This new sub-class has one additional method over its base class,
'send_packet'. This new method is equivalent to the 'maint
packet' CLI command, it allows a custom packet to be sent to a remote
target.
The outgoing packet can either be a bytes object, or a Unicode string,
so long as the Unicode string contains only ASCII characters.
The result of calling RemoteTargetConnection.send_packet is a bytes
object containing the reply that came from the remote.
In a later commit I will add a Python API to access the 'maint packet'
functionality, that is, sending a user specified packet to the target.
To make implementing this easier, this commit refactors how this
command is currently implemented so that the packet_command function
is now global.
The new global send_remote_packet function takes an object that is an
implementation of an abstract interface. Two functions within this
interface are then called, one just before a packet is sent to the
remote target, and one when the reply has been received from the
remote target. Using an interface object in this way allows (1) for
the error checking to be done before the first callback is made, this
means we only print out what packet it being sent once we know we are
going to actually send it, and (2) we don't need to make a copy of the
reply if all we want to do is print it.
One user visible changes after this commit are the error
messages, which I've changed to be less 'maint packet' command
focused, this will make them (I hope) better for when
send_remote_packet can be called from Python code.
So: "command can only be used with remote target"
Becomes: "packets can only be sent to a remote target"
And: "remote-packet command requires packet text as argument"
Becomes: "a remote packet must not be empty"
Additionally, in this commit, I've added support for packet replies
that contain binary data. Before this commit, the code that printed
the reply treated the reply as a C string, it assumed that the string
only contained printable characters, and had a null character only at
the end.
One way to show the problem with this is if we try to read the auxv
data from a remote target, the auxv data is binary, so, before this
commit:
(gdb) target remote :54321
...
(gdb) maint packet qXfer:auxv:read::0,1000
sending: "qXfer:auxv:read::0,1000"
received: "l!"
(gdb)
And after this commit:
(gdb) target remote :54321
...
(gdb) maint packet qXfer:auxv:read::0,1000
sending: "qXfer:auxv:read::0,1000"
received: "l!\x00\x00\x00\x00\x00\x00\x00\x00\xf0\xfc\xf7\xff\x7f\x00\x00\x10\x00\x00\x00\x00\x00\x00\x00\xff\xf>
(gdb)
The binary contents of the reply are now printed as escaped hex.
This commit adds a new object type gdb.TargetConnection. This new
type represents a connection within GDB (a connection as displayed by
'info connections').
There's three ways to find a gdb.TargetConnection, there's a new
'gdb.connections()' function, which returns a list of all currently
active connections.
Or you can read the new 'connection' property on the gdb.Inferior
object type, this contains the connection for that inferior (or None
if the inferior has no connection, for example, it is exited).
Finally, there's a new gdb.events.connection_removed event registry,
this emits a new gdb.ConnectionEvent whenever a connection is removed
from GDB (this can happen when all inferiors using a connection exit,
though this is not always the case, depending on the connection type).
The gdb.ConnectionEvent has a 'connection' property, which is the
gdb.TargetConnection being removed from GDB.
The gdb.TargetConnection has an 'is_valid()' method. A connection
object becomes invalid when the underlying connection is removed from
GDB (as discussed above, this might be when all inferiors using a
connection exit, or it might be when the user explicitly replaces a
connection in GDB by issuing another 'target' command).
The gdb.TargetConnection has the following read-only properties:
'num': The number for this connection,
'type': e.g. 'native', 'remote', 'sim', etc
'description': The longer description as seen in the 'info
connections' command output.
'details': A string or None. Extra details for the connection, for
example, a remote connection's details might be
'hostname:port'.
According the rvv spec,
https://github.com/riscv/riscv-v-spec/blob/master/vtype-format.adoc
The bits of vtype immediate from 8 to (xlen - 1) should be reserved.
Therefore, we should also dump the vtype immediate as numbers, when
they are set over 8-bits. I think this is a bug that we used to support
vediv extension and use the bit 8 and 9 of vtype, but forgot to update
the behavior when removing the vediv.
Consider the testcases,
vsetvli a0, a1, 0x700 # the reserved bit 10, 9 and 8 are used.
vsetvli a0, a1, 0x400 # the reserved bit 10 is used.
vsetvli a0, a1, 0x300 # the reserved bit 9 and 8 are used.
vsetvli a0, a1, 0x100 # the reserved bit 8 is used.
vsetivli a0, 0xb, 0x300 # the reserved bit 9 and 8 are used.
vsetivli a0, 0xb, 0x100 # the reserved bit 8 is used.
The original objdump shows the following result,
0000000000000000 <.text>:
0: 7005f557 vsetvli a0,a1,1792
4: 4005f557 vsetvli a0,a1,1024
8: 3005f557 vsetvli a0,a1,e8,m1,tu,mu
c: 1005f557 vsetvli a0,a1,e8,m1,tu,mu
10: f005f557 vsetivli a0,11,e8,m1,tu,mu
14: d005f557 vsetivli a0,11,e8,m1,tu,mu
But in fact the correct result should be,
0000000000000000 <.text>:
0: 7005f557 vsetvli a0,a1,1792
4: 4005f557 vsetvli a0,a1,1024
8: 3005f557 vsetvli a0,a1,768
c: 1005f557 vsetvli a0,a1,256
10: f005f557 vsetivli a0,11,768
14: d005f557 vsetivli a0,11,256
gas/
* testsuite/gas/riscv/vector-insns.d: Added testcases to
test the reserved bit 8 to (xlen-1) of vtype.
* testsuite/gas/riscv/vector-insns.s: Likewise.
include/
* opcode/riscv.h: Removed OP_MASK_VTYPE_RES and OP_SH_VTYPE_RES,
since they are different for operand Vc and Vb.
opcodes/
* riscv-dis.c (print_insn_args): Updated imm_vtype_res to
extract the reserved immediate of vtype correctly.
Consider the following case,
vsetvli a0, a1, 0x4 # unrecognized vlmul
vsetvli a0, a1, 0x20 # unrecognized vsew
vsetivli a0, 0xb, 0x4 # unrecognized vlmul
vsetivli a0, 0xb, 0x20 # unrecognized vsew
For the current dis-assembler, we get the result,
0000000000000000 <.text>:
0: 0045f557 vsetvli a0,a1,e8,(null),tu,mu
4: 0205f557 vsetvli a0,a1,e128,m1,tu,mu
8: c045f557 vsetivli a0,11,e8,(null),tu,mu
c: c205f557 vsetivli a0,11,e128,m1,tu,mu
The vsew e128 and vlmul (null) are preserved according to the spec,
so dump these fields looks wrong. Consider that we are used to dump
the unrecognized csr as csr numbers directly, we should also dump
the whole vset[i]vli immediates as numbers, once the vsew or vlmul
is reserved. Therefore, following is what I expected,
0000000000000000 <.text>:
0: 0045f557 vsetvli a0,a1,4
4: 0205f557 vsetvli a0,a1,32
8: c045f557 vsetivli a0,11,4
c: c205f557 vsetivli a0,11,32
gas/
* testsuite/gas/riscv/vector-insns.d: Rewrite the vset[i]vli
testcases since we should dump the immediate as numbers once
the vsew or vlmul is reserved.
* testsuite/gas/riscv/vector-insns.s: Likewise.
opcodes/
* riscv-dis.c (print_insn_args): The reserved vsew and vlmul
are NULL string in the riscv_vsew and riscv_vlmul, so dump the
whole imm as numbers once one of them is NULL.
* riscv-opc.c (riscv_vsew): Set the reserved vsew to NULL.
(riscv_vlmul): Set the reserved vlmul to NULL.
