Commit Graph

83976 Commits

Author SHA1 Message Date
Cary Coutant
cd3c333f43 Change default to discard temporary local symbols in merge sections.
Add --discard-none to keep all local symbols.

gold/
	PR gold/17498
	* object.cc (Sized_relobj_file::do_count_local_symbols): Discard
	temporary locals in merge sections.
	* options.cc (General_options::parse_discard_all): New method.
	(General_options::parse_discard_locals): New method.
	(General_options::parse_discard_none): New method.
	(General_options::General_options): Initialize discard_locals_.
	* options.h (--discard-all): Convert to special option.
	(--discard-locals): Likewise.
	(--discard-none): New option.
	(General_options::discard_all): New method.
	(General_options::discard_locals): New method.
	(General_options::discard_sec_merge): New method.
	(General_options::Discard_locals): New enum.
	(General_options::discard_locals_): New data member.
2015-06-04 20:58:08 -07:00
Peter Bergner
dc302c0061 Add hwsync extended mnemonic.
This commit adds a new extended menmonic for "sync 0" (same as "sync").
The ISA documentation doesn't explicitly mention hwsync as an extended
mnemonic (yet), but it does mention "heavyweight sync" and "hwsync" as
the operation that gets performed when the sync's L field is 0.
This is only enabled for POWER4 and later.

opcodes/
	* ppc-opc.c: (powerpc_opcodes) <hwsync>: New extended mnemonic.

gas/testsuite/
	* gas/ppc/a2.d: Fixup test case due to new extended mnemonic.
	* gas/ppc/power4.s <hwsync, lwsync, ptesync, sync>: Add tests.
	* gas/ppc/power4.d: Likewise.
2015-06-04 20:27:03 -05:00
GDB Administrator
0009668917 Automatic date update in version.in 2015-06-05 00:00:07 +00:00
Jan Kratochvil
d5eba19a65 compile-print.exp: xfail->kfail for '@' GDB array operator
Patch implementing '@' GDB array operator in GCC has been rejected:
	https://gcc.gnu.org/ml/gcc-patches/2015-06/msg00414.html
and so there is now a GDB tracker to implement it just in GDB:
	https://sourceware.org/bugzilla/show_bug.cgi?id=18489

gdb/testsuite/ChangeLog
2015-06-04  Jan Kratochvil  <jan.kratochvil@redhat.com>

	* gdb.compile/compile-print.exp (compile print *vararray@3)
	(compile print *vararrayp@3): Change xfail to kfail compile/18489.
2015-06-04 21:35:43 +02:00
Yao Qi
5b74bf7d63 Regenerate gdbarch.c to sync with gdbarch.sh
When I do something else, I find that gdbarch.c isn't sync'ed with
gdbarch.sh.  This patch just move some statements on
stack_frame_destroyed_p some lines below.

gdb:

2015-06-04  Yao Qi  <yao.qi@linaro.org>

	* gdbarch.c: Regenerate it.
2015-06-04 17:31:16 +01:00
Nick Clifton
13be46a23c Fixes the check for emulated MSP430 instrucrtions that take no operands.
PR 18474
	* msp430-dis.c (msp430_nooperands): Fix check for emulated insns.
2015-06-04 16:33:12 +01:00
Nick Clifton
239c0f4ceb Fix compile time warning for tc-h8300.c when using gcc 5+.
* config/tc-h8300.c (md_section_align): Fix compile time warning
	about left shifting a negative value.
2015-06-04 16:25:03 +01:00
Matthew Wahab
88f0ea342d [AArch64] Add support for ARMv8.1 command line option 2015-06-04 11:14:07 +01:00
Jiong Wang
b968d18a6d [ARM] Use frag's thumb_mode information when available
2015-06-04  Renlin Li  <renlin.li@arm.com>

	* config/tc-arm.c (arm_init_frag): Use frag's thumb_mode information
	when available.
2015-06-04 09:36:35 +01:00
Cary Coutant
8086551f52 Fix SIZEOF_HEADERS in gold.
Gold undercounts the number of program headers it's going to add when
initially evaluating the SIZEOF_HEADERS expression. As a result, scripts
that use it end up skipping a page unnecessarily when the starting address
is too low. The undercounting is because it doesn't count the PT_INTERP
segment.

Then, when finalizing symbols, gold overcounts the program headers: all
segments have already been created, but we still count the headers we
expected to add from the script.

This patch fixes both problems.

gold/
	* script-sections.cc (Script_sections::Script_sections): Initialize
	segments_created_.
	(Script_sections::create_note_and_tls_segments): Set flag when
	segments are created.
	(Script_sections::expected_segment_count): Count PT_INTERP.
	(Script_sections::attach_sections_using_phdrs_clause): Set flag when
	segments are created.
	* script-sections.h (Script_sections::segments_created_): New data
	member.
2015-06-03 20:30:11 -07:00
Cary Coutant
374082dfab Fix gold to group sections correctly via linker script.
In PR 15370, it is noted that gold does not distinguish between
"*(.foo .bar)" and "*(.foo) *(.bar)" in linker scripts. In both
cases, gold groups all .foo sections together, followed by all
.bar sections, whereas in the first case, it should collect all
.foo and .bar sections in the order seen.

If you add sort specs, the Gnu linker has some bizarre corner
cases that I do not try to replicate. In particular,
"*(SORT_BY_NAME(.foo) SORT_BY_NAME(.bar))" does the same thing
as "*(.foo) *(.bar)". But if you apply a sort spec
to just one of several patterns, say, "*(SORT_BY_NAME(.foo) .bar)",
the Gnu linker will collect any .bar section it sees before the
first .foo, then all .foo sections, then all remaining .bar
sections. With this patch, if any of the input patterns have a
sort spec, gold will group them all as it did before; e.g.,
all .foo sections followed by all .bar sections.

2015-06-03  Cary Coutant  <ccoutant@gmail.com>

gold/
	PR gold/15370
	* script-sections.cc
	(Output_section_element_input::set_section_addresses): When there
	are several patterns with no sort spec, put all sections in the same
	bin.
	* testsuite/Makefile.am (script_test_12): New testcase.
	(script_test_12i): New testcase.
	* testsuite/Makefile.in: Regenerate.
	* testsuite/script_test_12.t: New test linker script.
	* testsuite/script_test_12i.t: New test linker script.
	* testsuite/script_test_12a.c: New test source file.
	* testsuite/script_test_12b.c: New test source file.
2015-06-03 19:37:49 -07:00
GDB Administrator
a96a7cce18 Automatic date update in version.in 2015-06-04 00:00:08 +00:00
Jan Kratochvil
7f36105668 compile: Use also inferior munmap
Currently inferior memory is allocated by inferior mmap() but it is never
deallocated; despite the injected objfile incl. its symbols is freed.  This was
intentional so that one can do for example:
inferior:
	char *str = "foo";
GDB:
	(gdb) compile code str = "bar";

I believe later patches will be needed to introduce full control over keeping
vs. discarding the injected module as being discussed in:
	compile: objfiles lifetime UI
	https://sourceware.org/ml/gdb/2015-04/msg00051.html
	Message-ID: <20150429135735.GA16974@host1.jankratochvil.net>
	https://sourceware.org/ml/gdb/2015-05/msg00007.html

As decided by Phil it is better not to leak inferior pages as users can
workaround the issue above for example by:
	(gdb) compile code str = strdup ("bar");

I have checked that in fact gdb/doc/ (written by Phil) already expects the
injected code will be unmapped so that does not need to be changed:
	compile code int ff = 5; p = &ff;
	In this example, @code{p} would point to @code{ff} when the
	@code{compile} command is executing the source code provided to it.
	However, as variables in the (example) program persist with their
	assigned values, the variable @code{p} would point to an invalid
	location when the command exists.

gdb/ChangeLog
2015-04-28  Jan Kratochvil  <jan.kratochvil@redhat.com>

	* arch-utils.c (default_infcall_munmap): New.
	* arch-utils.h (default_infcall_munmap): New declaration.
	* compile/compile-object-load.c (struct munmap_list, munmap_list_add)
	(munmap_list_free, munmap_listp_free_cleanup): New.
	(struct setup_sections_data): Add field munmap_list_headp.
	(setup_sections): Call munmap_list_add.
	(compile_object_load): New variable munmap_list_head, initialize
	setup_sections_data.munmap_list_headp, return munmap_list_head.
	* compile/compile-object-load.h (struct munmap_list): New declaration.
	(struct compile_module): Add field munmap_list_head.
	(munmap_list_free): New declaration.
	* compile/compile-object-run.c (struct do_module_cleanup): Add field
	munmap_list_head.
	(do_module_cleanup): Call munmap_list_free.
	(compile_object_run): Pass munmap_list_head to do_module_cleanup.
	* gdbarch.c: Regenerate.
	* gdbarch.h: Regenerate.
	* gdbarch.sh (infcall_munmap): New.
	* linux-tdep.c (linux_infcall_munmap): New.
	(linux_init_abi): Install it.

gdb/testsuite/ChangeLog
2015-04-28  Jan Kratochvil  <jan.kratochvil@redhat.com>

	* gdb.compile/compile.exp (keep jit in memory): Rename to ...
	(do not keep jit in memory): ... this.
	(expect 5): Change it to ...
	(expect no 5): ... this.
2015-06-03 21:26:04 +02:00
Matthew Wahab
f277626b45 [ARM] Commit approaved testcases missed in previous commit
2015-06-03  Matthew Wahab  <matthew.wahab@arm.com>

	* gas/arm/armv8-a+rdma.d: New.
	* gas/arm/armv8-a+rdma.s: New.
2015-06-03 10:55:29 +01:00
Jiong Wang
fbf8de7c4d [AArch64] Revert local changes included in Matthew's commit
When commit the following code for Matthew, I wrongly included my local changes. Revert it. Sorry.

commit a5932920ef
Author: Matthew Wahab <matthew.wahab@arm.com>
Date:   Wed Jun 3 10:03:50 2015 +0100
2015-06-03 10:08:17 +01:00
Matthew Wahab
a5932920ef [ARM] Support for ARMv8.1 command line option
2015-06-03  Matthew Wahab  <matthew.wahab@arm.com>

gas/
	* config/tc-arm.c (arm_archs): Add "armv8.1-a".
	* doc/c-arm.texi (ARM Options, -march): Add "armv8.1-a".
	* NEWS: Mention ARMv8.1 support.

include/opcode/
	* arm.h (FPU_ARCH_CRYPTO_NEON_VFP_ARMV8_1): New.
	(ARM_ARCH_V8_1A): New.
	(ARM_ARCH_V8_1A_FP): New.
	(ARM_ARCH_V8_1A_SIMD): New.
	(ARM_ARCH_V8_1A_CRYPTOV1): New.
	(ARM_FEATURE_CORE): New.
2015-06-03 10:03:50 +01:00
GDB Administrator
0220bc5727 Automatic date update in version.in 2015-06-03 00:00:09 +00:00
Cary Coutant
775ed62ec5 Fix Sniff_file to get an aligned view.
gold/
	* nacl.h (Sniff_file): Switch parameters to get_view to get an
	aligned view.
2015-06-02 14:13:32 -07:00
Simon Marchi
3b462ec2be Fix =thread-exited not showing up when detaching (PR 15564)
I sent a patch in 2013 for this (incorrectly named =thread-created):

  https://cygwin.com/ml/gdb-patches/2013-06/msg00129.html

Tom Tromey was ok with the change, but suggested to add a test as well.
Then I forgot about this patch until today. So here it is again, with the
corresponding test.

The problem is that the =thread-exited event does not appear when detaching
from a local process. It does appear with remote though. It's not a really
big deal, but I'd like it to be consistent.

Tested with local and remote Linux on my Ubuntu 14.04.

gdb/ChangeLog:

	PR gdb/15564
	* inferior.c (detach_inferior): Call exit_inferior_1 with silent = 0.

gdb/testsuite/ChangeLog:

	PR gdb/15564
	* gdb.mi/mi-detach.exp: New file.
2015-06-02 15:32:57 -04:00
Cary Coutant
9c7fe3c5c2 PR 17819: Fix --build-id=tree when using --compress-debug-sections.
When --build-id=tree is selected, gold would schedule a set of
tasks to run to compute md5 hashes in parallel on chunks of the
file. The scheduling was done before the
Write_after_input_sections_task ran, so if we are compressing
debug sections, the output file will change size and be remapped
to a new address, sometimes causing the build id computation to
crash, but even when it doesn't crash, it wouldn't include the
debug information in the hash computation.

This patch delays the scheduling of the md5 tasks until after
Write_after_input_sections_task.

gold/
        PR gold/17819
        * gold.cc (queue_final_tasks): When --build-id=tree, queue a
        separate task to schedule the build id computation.
        * layout.cc (Hash_task::Hash_task): Remove build_id_blocker,
        add Output_file and offset.
        (Hash_task::run): Get and release the input views.
        (Hash_task::is_runnable): Always return NULL (always runnable).
        (Layout::queue_build_id_tasks): Remove.
        (Layout::write_build_id): Add array_of_hashes and size_of_hashes
        parameters; use them instead of class members.
        (Build_id_task_runner::run): New function.
        (Close_task_runner::run): Pass array_of_hashes and size_of_hashes
        to write_build_id.
        * layout.h (Layout::queue_build_id_tasks): Remove.
        (Layout::write_build_id): Add array_of_hashes and size_of_hashes
        parameters.
        (Layout::array_of_hashes_): Remove.
        (Layout::size_of_array_of_hashes_): Remove.
        (Layout::input_view_): Remove.
        (Build_id_task_runner): New class.
        (Close_task_runner::Close_task_runner): Add array_of_hashes and
        size_of_hashes parameters.
        (Close_task_runner::array_of_hashes_): New data member.
        (Close_task_runner::size_of_hashes_): New data member.
        * testsuite/Makefile.am
        (flagstest_compress_debug_sections_and_build_id_tree): New test.
        * testsuite/Makefile.in: Regenerate.
2015-06-02 09:46:10 -07:00
Jiong Wang
afa403d8d4 [AArch64] Fix typo in testcase
ld/testsuite/
  * ld-aarch64/emit-relocs-313.s: Use gotpage_lo15.
2015-06-02 14:01:29 +01:00
Matthew Wahab
d6b4b13ed2 [ARM] Support for ARMv8.1 Adv.SIMD extension 2015-06-02 12:37:33 +01:00
Matthew Wahab
ddfded2f7b [ARM] Add support for ARMv8.1 PAN extension 2015-06-02 12:30:38 +01:00
Matthew Wahab
1af1dd51db [ARM] Rework CPU feature selection in the disassembler
include/opcode/
	* arm.h (ARM_FEATURE_ALL): New.

opcodes/
	* arm-dis.c (select_arm_features): Rework to avoid used of
	redefined macros.
2015-06-02 12:24:24 +01:00
Matthew Wahab
9e1f0fa7f3 [AArch64] Support for ARMv8.1a Adv.SIMD instructions
2015-06-02  Matthew Wahab  <matthew.wahab@arm.com>

gas/
  * config/tc-aarch64.c (aarch64_features): Add "rdma".
  * doc/c-aarch64.texi (AArch64 Extensions): Add "rdma".

gas/testsuite/
  * rdma-directive.d: New.
  * rdma.d: New.
  * rdma.s: New.

include/opcode/
  * aarch64.h (AARCH64_FEATURE_RDMA): New.

opcode/
  * aarch64-tbl.h (aarch64_feature_rdma): New.
  (RDMA): New.
  (aarch64_opcode_table): Add "sqrmlah" and "sqrdmlsh" instructions.
  * aarch64-asm-2.c: Regenerate.
  * aarch64-dis-2.c: Regenerate.
  * aarch64-opc-2.c: Regenerate.
2015-06-02 12:20:00 +01:00
Matthew Wahab
290806fd94 [AArch64] Support for ARMv8.1a Limited Ordering Regions extension
2015-06-02  Matthew Wahab  <matthew.wahab@arm.com>
include/
  * aarch64.h (AARCH64_FEATURE_LOR): New.

opcodes/
  * aarch64-tbl.h (aarch64_feature_lor): New.
  (LOR): New.
  (aarch64_opdocde_table): Add "ldlar", "ldlarb", "ldlarh", "stllr",
  "stllrb", "stllrh".
  * aarch64-asm-2.c: Regenerate.
  * aarch64-dis-2.c: Regenerate.
  * aarch64-opc-2.c: Regenerate.

gas/
  * config/tc-aarch64.c (aarch64_features): Add "lor".
  * doc/c-aarch64.c (Aarch64 Extensions): Add "lor" to list of
  architecture extensions.

gas/testsuite/
  * lor-directive.d: New.
  * lor.d: New.
  * lor.s: New.
2015-06-02 11:30:12 +01:00
Yao Qi
8d683210f1 Include linux-nat.h in i386-linux-nat.c
This commit fixes a build failure on i386-linux.

gdb:

2015-06-02  Yao Qi  <yao.qi@linaro.org>

	* i386-linux-nat.c: Include linux-nat.h.
2015-06-02 10:28:03 +01:00
Rafael Ávila de Espíndola
400f89447b Use a std::vector instead of a std::map to hold Input_merge_map.
A std::map is hardly the best data structure for a small map from small
integers.
2015-06-01 22:47:20 -04:00
GDB Administrator
d78b645051 Automatic date update in version.in 2015-06-02 00:00:08 +00:00
Matthew Wahab
72ca8fad61 [AArch64][GAS] Add support for PAN architecture extension
2015-06-01  Matthew Wahab  <matthew.wahab@arm.com>
gas/
	* config/tc-aarch64.c (parse_sys_reg): New parameter.  Check
	target support.  Fix whitespace.
	(parse_operands): Update for parse_sys_reg changes.
	(aarch64_features): Add "pan".
	* doc/c-aarch64.texi (Aarch64 Extensions): Add "pan".

gas/testsuite/
	* pan-directive.d: New.
	* pan.d: New.
	* pan.s: New
2015-06-01 16:05:58 +01:00
Matthew Wahab
f21cce2cac [AArch64][libopcode] Add support for PAN architecture extension
The ARMv8.1 architecture introduced the Privileged Access Never extension. This
adds a processor state field PSTATE.PAN which can be accessed using the MRS/MSR
instructions.

This patch adds support for the PAN architecture feature and processor state
field to libopcode.

include/opcode
2015-06-01  Matthew Wahab  <matthew.wahab@arm.com>

	* aarch64.h (AARCH64_FEATURE_PAN): New.
	(aarch64_sys_reg_supported_p): Declare.
	(aarch64_pstatefield_supported_p): Declare.

opcodes/
2015-06-01  Matthew Wahab  <matthew.wahab@arm.com>
	* aarch64-opc.c (F_ARCHEXT): New.
	(aarch64_sys_regs): Add "pan".
	(aarch64_sys_reg_supported_p): New.
	(aarch64_pstatefields): Add "pan".
	(aarch64_pstatefield_supported_p): New.
2015-06-01 16:00:28 +01:00
Jiong Wang
7018c0308a [AArch64] BFD support BFD_RELOC_AARCH64_LD32_GOTPAGE_LO14
This patch add BFD_RELOC_AARCH64_LD32_GOTPAGE_LO14 relocation
supoprt in bfd linker.

2015-06-01  Jiong Wang  <jiong.wang@arm.com>

bfd/
  * elfnn-aarch64.c (aarch64_reloc_got_type): Support
  BFD_RELOC_AARCH64_LD32_GOTPAGE_LO14.
  (elfNN_aarch64_final_link_relocate): Ditto.
  (elfNN_aarch64_gc_swap_hook): Ditto.
  (elfNN_aarch64_check_relocs): Ditto.
  * elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Ditto.

ld/testsuite/
  * ld-aarch64/emit-relocs-28.s: New test file.
  * ld-aarch64/emit-relocs-28.d: Ditto.
  * ld-aarch64/aarch64-elf.exp: Run new test.
2015-06-01 15:45:25 +01:00
Jiong Wang
3d715ce420 [AArch64] GAS support BFD_RELOC_AARCH64_LD32_GOTPAGE_LO14
This patch add BFD_RELOC_AARCH64_LD32_GOTPAGE_LO14 support in Gas.

The relocation modifier
===
  :gotpage_lo14:symbol

2015-06-01 Jiong.Wang <jiong.wang@arm.com>

bfd/
  * reloc.c (BFD_RELOC_AARCH64_LD32_GOTPAGE_LO14): New entry.
  * bfd-in2.h: Regenerate.
  * libbfd.h: Regenerate.
  * elfnn-aarch64.c (elfNN_aarch64_howto_table): New entry for
  BFD_RELOC_AARCH64_LD32_GOTPAGE_LO14.

gas/
  * config/tc-aarch64.c (reloc_table): New relocation modifiers.
  (md_apply_fix): Support BFD_RELOC_AARCH64_LD32_GOTPAGE_LO14.
  (aarch64_force_relocation): Ditto.

gas/testsuite/
  * gas/aarch64/ilp32-basic.s: New testcase.
  * gas/aarch64/ilp32-basic.d: Ditto.
2015-06-01 15:41:54 +01:00
Jan Kratochvil
e0619de699 PR symtab/18392
Initially there is some chain (let's say the longest one
but that doe snot matter).  Consequently its elements from the middle are
being removed and there remains only some few unambiguous top and bottom ones.

The original idea why the comparison should be sharp ("<") was that if there
are multiple chains like (0xaddr show jmp instruction address):
        main(0x100) -> a(0x200) -> d(0x400)
        main(0x100) -> a(0x200) -> c(0x300) -> d(0x400)
then - such situation cannot exist - if two jmp instructions in "a" have the
same address they must also jump to the same address (*).

(*) jump to a computed address would be never considered for the DWARF
    tail-call records.

So there could be:
        main(0x100) -> a(0x200) -> d(0x400)
        main(0x100) -> a(0x270) -> c(0x300) -> d(0x400)
But then "a" frame itself is ambiguous and it must not be displayed.

I did not realize that there can be self-tail-call:
        main(0x100) -> a(0x200) -> d(0x400)
        main(0x100) -> a(0x280) -> a(0x200) -> d(0x400)
which intersects to:
        main(0x100) -> <???>? -> a(0x200) -> d(0x400)
And so if the first chain was chosen the
        main(0x100) -> a(0x200) -> d(0x400)
then the final intersection has callers+callees==length.

> for example, if CALLERS is 3 and
> CALLEES is 2, what does the chain look like?

main(0x100) -> x(0x150) -> y(0x200) -> <???>? -> a(0x200) -> d(0x400)

And if LENGTH is 7 then:
        call_site[0] = main(0x100)
        call_site[1] = x(0x150)
        call_site[2] = y(0x200)
        call_site[3] = garbage
        call_site[4] = garbage
        call_site[5] = a(0x200)
        call_site[6] = d(0x400)

gdb/ChangeLog
2015-06-01  Andreas Schwab  <schwab@linux-m68k.org>
	    Jan Kratochvil  <jan.kratochvil@redhat.com>

	PR symtab/18392
	* dwarf2-frame-tailcall.c (pretended_chain_levels): Correct
	assertion.
	* dwarf2loc.c (chain_candidate): Likewise.

gdb/testsuite/ChangeLog
2015-06-01  Jan Kratochvil  <jan.kratochvil@redhat.com>

	PR symtab/18392
	* gdb.arch/amd64-tailcall-self.S: New file.
	* gdb.arch/amd64-tailcall-self.c: New file.
	* gdb.arch/amd64-tailcall-self.exp: New file.
2015-06-01 14:02:34 +02:00
Yao Qi
bd16da5114 Fetch and store VFP registers by PTRACE_{G,S}ETREGSET
This patch is to use PTRACE_{G,S}ETREGSET to fetch and store VFP
registers if kernel supports.

gdb:

2015-06-01  Yao Qi  <yao.qi@linaro.org>

	* arm-linux-nat.c (fetch_vfp_regs): Use PTRACE_GETREGSET.
	(store_vfp_regs): Use PTRACE_SETREGSET.
2015-06-01 12:13:02 +01:00
Yao Qi
df9d7ec9e7 Fetch and store FP registers by PTRACE_{G,S}ETREGSET
If kernel supports PTRACE_GETREGSET, GDB uses PTRACE_{G,S}ETREGSET
to fetch and store FP registers.

gdb:

2015-06-01  Yao Qi  <yao.qi@linaro.org>

	* arm-linux-nat.c (fetch_fpregister): Use PTRACE_GETREGSET.
	(fetch_fpregs): Likewise.
	* arm-linux-nat.c (store_fpregister): Use PTRACE_SETREGSET.
	(store_fpregs): Likewise.
2015-06-01 12:13:02 +01:00
Yao Qi
10766686b0 Fetch and store GP registers by PTRACE_{G,S}ETREGSET
If kernel supports PTRACE_GETREGSET, GDB uses PTRACE_{G,S}ETREGSET
to fetch and store GP registers.

gdb:

2015-06-01  Yao Qi  <yao.qi@linaro.org>

	* arm-linux-nat.c (fetch_register): Use PTRACE_GETREGSET.
	(fetch_regs): Likewise.
	(store_regs): Use PTRACE_SETREGSET.
	(store_register): Likewise.
2015-06-01 12:13:02 +01:00
Yao Qi
7efe48d196 Check whether kernel supports PTRACE_GETREGSET
gdb:

2015-06-01  Yao Qi  <yao.qi@linaro.org>

	* arm-linux-nat.c (arm_linux_read_description): Check whether
	kernel supports PTRACE_GETREGSET.
2015-06-01 12:13:02 +01:00
Yao Qi
433bbbf857 Move have_ptrace_getregset to linux-nat.c
I'll let arm-linux-nat.c to use PTRACE_GETREGSET if kernel supports,
so this patch is to move have_ptrace_getregset from x86-linux-nat.c
to linux-nat.c.

gdb:

2015-06-01  Yao Qi  <yao.qi@linaro.org>

	* x86-linux-nat.c (have_ptrace_getregset): Move it to ...
	* linux-nat.c: ... here.
	* x86-linux-nat.h (have_ptrace_getregset): Move the declaration
	to ...
	* linux-nat.h: ... here.
2015-06-01 12:13:02 +01:00
Yao Qi
ca9b78ce90 Move PTRACE_GETREGSET and PTRACE_SETREGSET to nat/linux-ptrace.h
Macros PTRACE_GETREGSET and PTRACE_SETREGSET are defined locally in
some places in GDB and GDBserver.  This patch is to move them to
nat/linux-ptrace.h to avoid duplication.

gdb:

2015-06-01  Yao Qi  <yao.qi@linaro.org>

	* amd64-linux-nat.c: Include "nat/linux-ptrace.h".
	* i386-linux-nat.c: Likewise.
	* nat/linux-ptrace.h (PTRACE_GETREGSET, PTRACE_SETREGSET): Define.
	* s390-linux-nat.c: Include "nat/linux-ptrace.h".
	(PTRACE_GETREGSET, PTRACE_SETREGSET): Remove.
	* x86-linux-nat.c: Include "nat/linux-ptrace.h".
	* x86-linux-nat.h (PTRACE_GETREGSET, PTRACE_SETREGSET): Remove.

gdb/gdbserver:

2015-06-01  Yao Qi  <yao.qi@linaro.org>

	* linux-s390-low.c (PTRACE_GETREGSET, PTRACE_SETREGSET): Remove.
	* linux-x86-low.c: Likewise.
2015-06-01 12:13:02 +01:00
Jan Beulich
d194d186a7 x86/Intel: fix i386_optab[] for vcvt{,u}si2s{d,s}
opcodes/
2015-06-01  Jan Beulich  <jbeulich@suse.com>

	* i386-tbl.h: Regenerate.
2015-06-01 11:40:28 +02:00
Jiong Wang
36e6c1400b [AArch64] BFD_RELOC_AARCH64_TLSLE_ADD_LO12 should enable overflow check
BFD_RELOC_AARCH64_TLSLE_ADD_LO12 is used to generate simplest
one-instruction addressing for TLS LE model when tls size is smaller
4K. Linker need to make sure there is no TLS offset overflow.

2015-06-01  Jiong Wang  <jiong.wang@arm.com>

bfd/
  * elfnn-aarch64.c (elfNN_aarch64_howto_table): Set overflow type to
  complain_overflow_unsigned for BFD_RELOC_AARCH64_TLSLE_ADD_LO12.
  * elfxx-aarch64.c (_bfd_aarch64_elf_resolve_relocation): Don't use
  PGOFF for BFD_RELOC_AARCH64_TLSLE_ADD_LO12, that will mask off all
  potential high overflowed bits.

ld/testsuite/
  * ld-aarch64/tprel_add_lo12_overflow.s: New testcase.
  * ld-aarch64/tprel_add_lo12_overflow.d: Nex expectation file.
  * ld-aarch64/aarch64-elf.exp: Run new testcase.
2015-06-01 10:31:38 +01:00
Jiong Wang
99ad26cb0d [AArch64] BFD Support BFD_RELOC_AARCH64_LD64_GOTPAGE_LO15
2015-06-01  Jiong Wang  <jiong.wang@arm.com>
bfd/
	* elfnn-aarch64.c (aarch64_reloc_got_type): Support
	BFD_RELOC_AARCH64_LD64_GOTPAGE_LO15.
	(elfNN_aarch64_final_link_relocate): Ditto.
	(elfNN_aarch64_gc_swap_hook): Ditto.
	(elfNN_aarch64_check_relocs): Ditto.
	* elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Ditto.

ld/testsuite/
	* ld-aarch64/emit-relocs-313.s: New test file.
	* ld-aarch64/emit-relocs-313.d: Ditto.
	* ld-aarch64/aarch64-elf.exp: Run new test.
2015-06-01 10:26:00 +01:00
Jiong Wang
a921b5bd70 [AArch64] GAS Support BFD_RELOC_AARCH64_LD64_GOTPAGE_LO15
2015-06-01 Jiong.Wang <jiong.wang@arm.com>

bfd/
  * reloc.c (BFD_RELOC_AARCH64_LD64_GOTPAGE_LO15): New entry.
  * bfd-in2.h: Regenerate.
  * libbfd.h: Regenerate.
  * elfnn-aarch64.c (elfNN_aarch64_howto_table): New entry for
  BFD_RELOC_AARCH64_LD64_GOTPAGE_LO15.

gas/
  * config/tc-aarch64.c (reloc_table): New relocation modifiers.
  (md_apply_fix): Support BFD_RELOC_AARCH64_LD64_GOTPAGE_LO15.
  (aarch64_force_relocation): Ditto.

gas/testsuite/
  * gas/aarch64/reloc-insn.s: New testcase.
  * gas/aarch64/reloc-insn.d: Ditto.
2015-06-01 10:22:15 +01:00
Jan Beulich
3a8547d2fb x86/Intel: disassemble vcvt{,u}si2s{d,s} with correct operand order
As pointed out before, the documentation mandates the rounding mode to
follow the GPR, so disassembler should produce output accordingly.

gas/testsuite/
2015-06-01  Jan Beulich  <jbeulich@suse.com>

	* gas/i386/avx512f.s: Adjust operand order for Intel syntax
	vcvt{,u}si2ss.
	* gas/i386/x86-64-avx512f.s: Adjust operand order for Intel
	syntax vcvt{,u}si2s{d,s}.

opcodes/
2015-06-01  Jan Beulich  <jbeulich@suse.com>

	* i386-dis.c (print_insn): Swap rounding mode specifier and
	general purpose register in Intel mode.
2015-06-01 09:51:28 +02:00
Jan Beulich
015c54d5a6 x86/Intel: accept mandated operand order for vcvt{,u}si2s{d,s}
As pointed out before, the documentation mandates the rounding mode to
follow the GPR, so gas should accept such input. As the brojen code got
released already we sadly will need to continue to also accept the
badly ordered operands.

gas/testsuite/
2015-06-01  Jan Beulich  <jbeulich@suse.com>

	* gas/i386/avx512f-intel.d: Adjust expectations on operand order.
	* gas/i386/evex-lig256-intel.d: Likewise.
	* gas/i386/evex-lig512-intel.d: Likewise.
	* gas/i386/x86-64-avx512f-intel.d: Likewise.
	* gas/i386/x86-64-evex-lig256-intel.d: Likewise.
	* gas/i386/x86-64-evex-lig512-intel.d: Likewise.

opcodes/
2015-06-01  Jan Beulich  <jbeulich@suse.com>

	* i386-opc.tbl: New IntelSyntax entries for vcvt{,u}si2s{d,s}.
	* i386-tbl.h: Regenerate.
2015-06-01 09:50:00 +02:00
GDB Administrator
b2e38b610c Automatic date update in version.in 2015-06-01 00:00:08 +00:00
GDB Administrator
fd59d950ba Automatic date update in version.in 2015-05-31 00:00:07 +00:00
Eli Zaretskii
99cee7b71f Unbreak DJGPP build of GDB.
gdb/
	* go32-nat.c (go32_xfer_memory): Fix the return value to be
	compatible to what read_child and write_child return.  This
	unbreaks that DJGPP build of GDB which was broken since v7.7.
2015-05-30 13:05:53 +03:00
GDB Administrator
6809615b88 Automatic date update in version.in 2015-05-30 00:00:12 +00:00