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20 Commits

Author SHA1 Message Date
Alan Modra
df08b5881b score formatting 
* score-dis.c: Formatting.
	* score7-dis.c: Formatting.
 2020-01-13 12:12:41 +10:30
Alan Modra
b2c759ce68 ubsan: score: left shift of negative value 
* score-dis.c (print_insn_score48): Use unsigned variables for
	unsigned values.  Don't left shift negative values.
	(print_insn_score32): Likewise.
	* score7-dis.c (print_insn_score32, print_insn_score16): Likewise.
 2020-01-13 12:12:30 +10:30
Alan Modra
b3adc24a07 Update year range in copyright notice of binutils files 2020-01-01 18:42:54 +10:30
Alan Modra
7936714c0c ubsan: score: left shift of 2 by 31 places cannot be represented in type 'int' 
* score-dis.c (print_insn_score32): Avoid signed overflow.
	(print_insn_score48): Likewise.  Don't cast to int when printing
	hex values.
 2019-12-23 18:05:19 +10:30
Alan Modra
84e098cdea asan: score: global-buffer-overflow 
I'm flying blind here, not having an s+core s3 insn set reference,
but this seems reasonably obvious from what is done by the assembler.
s3_do16_rpop does some mixing of imm and reg values to place in the
rpop reg field, but I'm not going to try to fix the disassembly
there.

	* score-dis.c (print_insn_score16): Move rpush/rpop imm field
	value adjustment so that it doesn't affect reg field too.
 2019-12-16 17:34:29 +10:30
Alan Modra
827041555a Update year range in copyright notice of binutils files 2019-01-01 22:06:53 +10:30
Alan Modra
219d1afa89 Update year range in copyright notice of binutils files 2018-01-03 17:49:56 +10:30
Nick Clifton
0f6d864de2 Prevent address violation when attempting to disassemble a corrupt score binary. 
PR binutils/21614
	* score-dis.c (score_opcodes): Add sentinel.
 2017-06-19 14:15:57 +01:00
Yao Qi
88c1242dc0 Move print_insn_XXX to an opcodes internal header 
With the changes done in previous patches, print_insn_XXX functions
don't have to be external visible out of opcodes, because both gdb
and objdump select disassemblers through a single interface.

This patch moves these print_insn_XXX declarations from
include/dis-asm.h to opcodes/disassemble.h, which is a new header
added by this patch.

include:

2017-05-24  Yao Qi  <yao.qi@linaro.org>

	* dis-asm.h: Move some function declarations to
	opcodes/disassemble.h.

opcodes:

2017-05-24  Yao Qi  <yao.qi@linaro.org>

	* alpha-dis.c: Include disassemble.h, don't include
	dis-asm.h.
	* avr-dis.c, bfin-dis.c, cr16-dis.c: Likewise.
	* crx-dis.c, d10v-dis.c, d30v-dis.c: Likewise.
	* disassemble.c, dlx-dis.c, epiphany-dis.c: Likewise.
	* fr30-dis.c, ft32-dis.c, h8300-dis.c, h8500-dis.c: Likewise.
	* hppa-dis.c, i370-dis.c, i386-dis.c: Likewise.
	* i860-dis.c, i960-dis.c, ip2k-dis.c: Likewise.
	* iq2000-dis.c, lm32-dis.c, m10200-dis.c: Likewise.
	* m10300-dis.c, m32r-dis.c, m68hc11-dis.c: Likewise.
	* m68k-dis.c, m88k-dis.c, mcore-dis.c: Likewise.
	* metag-dis.c, microblaze-dis.c, mmix-dis.c: Likewise.
	* moxie-dis.c, msp430-dis.c, mt-dis.c:
	* nds32-dis.c, nios2-dis.c, ns32k-dis.c: Likewise.
	* or1k-dis.c, pdp11-dis.c, pj-dis.c: Likewise.
	* ppc-dis.c, pru-dis.c, riscv-dis.c: Likewise.
	* rl78-dis.c, s390-dis.c, score-dis.c: Likewise.
	* sh-dis.c, sh64-dis.c, tic30-dis.c: Likewise.
	* tic4x-dis.c, tic54x-dis.c, tic6x-dis.c: Likewise.
	* tic80-dis.c, tilegx-dis.c, tilepro-dis.c: Likewise.
	* v850-dis.c, vax-dis.c, visium-dis.c: Likewise.
	* w65-dis.c, wasm32-dis.c, xc16x-dis.c: Likewise.
	* xgate-dis.c, xstormy16-dis.c, xtensa-dis.c: Likewise.
	* z80-dis.c, z8k-dis.c: Likewise.
	* disassemble.h: New file.
 2017-05-24 17:23:52 +01:00
Alan Modra
2571583aed Update year range in copyright notice of all files. 2017-01-02 14:08:56 +10:30
Alan Modra
6f2750feaf Copyright update for binutils 2016-01-01 23:00:01 +10:30
H.J. Lu
43e65147c0 Remove trailing spaces in opcodes 2015-08-12 04:45:07 -07:00
Alan Modra
b90efa5b79 ChangeLog rotatation and copyright year update 2015-01-02 00:53:45 +10:30
Alan Modra
4b95cf5c0c Update copyright years 2014-03-05 22:16:15 +10:30
Alan Modra
b33bafa0d7 * score-dis.c (print_insn_score48, print_insn_score32): Move default 
case label to proper lexical block.
	* score7-dis.c (print_insn_score32): Likewise.
 2009-06-22 00:01:57 +00:00
Nick Clifton
02b1cb404a * Makefile.am (BFD32_BACKENDS): Remove elf32-score and 
elf32-score7 files.
        (BFD32_BACKEND_CFILES): Likewise.
        (BFD64_BACKENDS): Add elf32-score and elf32-score7 files.
        (BFD64_BACKENDS_CFILES): Likewise.
        * Makefile.in: Regenerate.
        * config.bfd: More Score targets into BFD64 list.
        * configure.in: Move score vectors to 64-bit list.
        * targets.c: Likewise.

        * score-dis.c: Only compile when 64-bit bfds are enabled.
 2009-03-18 16:58:33 +00:00
Nick Clifton
c3b7224ae4 Add support for Score7 architecture. 2009-03-02 10:33:08 +00:00
Nick Clifton
9b201bb5e5 Change source files over to GPLv3. 2007-07-05 09:49:03 +00:00
Nick Clifton
b138abaa40 * tc-score.c (data_op2): Check invalid operands. 
(my_get_expression): Const operand of some instructions can not be symbol in assembly.
  (get_insn_class_from_type): Handle instruction type Insn_internal.
  (do_macro_ldst_label): Modify inst.type.
  (Insn_PIC): Delete.
* score-inst.h (enum score_insn_type): Add Insn_internal.
* tc-score.c (data_op2): The immediate value in lw is 15 bit signed.
* score-dis.c (print_insn): Correct the error code to print correct PCE instruction disassembly.
 2006-10-31 09:54:41 +00:00
Nick Clifton
1c0d3aa6ae Add support for Score target. 2006-09-16 23:51:50 +00:00