Commit Graph

3835 Commits

Author SHA1 Message Date
Joseph Myers
97f87066f6 gas:
* config/tc-arm.c (parse_operands): Handle invalid register name
	for OP_RIWR_RIWC.

gas/testsuite:
	* gas/arm/iwmmxt-bad.s: Test invalid register names for wldrw and
	wstrw.
	* gas/arm/iwmmxt-bad.l: Update.
2006-08-03 15:59:00 +00:00
Joseph Myers
41adaa5cab gas:
* config/tc-arm.c (enum operand_parse_code): Add OP_RIWC_RIWG.
	(parse_operands): Handle it.
	(insns): Use it for tmcr and tmrc.

gas/testsuite:
	* gas/arm/iwmmxt.s: Test tmcr and tmrc with wcgr registers.
	* gas/arm/iwmmxt.d: Update.
2006-08-03 15:57:04 +00:00
Nick Clifton
9d7cbccda0 PR binutils/2983
* bfd/elf64-x86-64.c: Add FreeBSD support.
  (elf64_x86_64_fbsd_post_process_headers): New function.
* bfd/targets.c (_bfd_target_vector): Add bfd_elf64_x86_64_freebsd_vec.
* bfd/config.bfd (x64_64-*-freebsd*): Add bfd_elf64_x86_64_freebsd_vec to the targ_selvecs.
* bfd/configure.in: Add entry for bfd_elf64_x86_64_freebsd_vec.
* bfd/configure: Regenerate.
* gas/config/tc-i386.c (md_parse_option): Treat any target starting with elf64_x86_64 as a viable target for the -64 switch.
  (i386_target_format): For 64-bit ELF flavoured output use ELF_TARGET_FORMAT64.
* gas/config/tc-i386.h (ELF_TARGET_FORMAT64): Define.
* ld/emulparams/elf_x86_64_fbsd.sh (OUTPUT_FORMAT): Define as elf64-x86-64-freebsd.
2006-08-02 16:25:14 +00:00
Nick Clifton
c973bc5cd4 PR gas/2991
* acinclude.m4 (BFD_BINARY_FOPEN): Import this function from bfd/aclocal.m4.
* configure.in: Run BFD_BINARY_FOPEN.
* configure: Regenerate.
* as.h: Look at USE_BINARY_FOPEN to decide which fopen-*.h header file to include.
2006-08-02 14:26:07 +00:00
H.J. Lu
cfde7f7078 gas/
2006-08-01  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.c (md_assemble): Don't update
	cpu_arch_isa_flags.

gas/testsuite/

2006-08-01  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/nops-2-i386.d: Updated.
	* gas/i386/nops-2-merom.d: Likewise.
	* gas/i386/nops-2.d: Likewise.
2006-08-01 17:54:28 +00:00
Thiemo Seufer
b4c71f5629 * config/tc-mips.c (md_section_align): Check ELF-ness at runtime. 2006-08-01 07:58:22 +00:00
Thiemo Seufer
54f4ddb3c6 * config/tc-mips.c (macro_build_lui): Fix comment formatting.
(md_apply_fix): Likewise. Unify handling of BFD_RELOC_RVA,
	BFD_RELOC_32 and BFD_RELOC_16.
	(s_align, s_cpload, s_cplocal, s_cprestore, s_mips_stab,
	md_convert_frag, md_obj_end): Fix comment formatting.
2006-08-01 05:49:02 +00:00
Thiemo Seufer
d103cf6117 * config/tc-mips.c (md_apply_fix, tc_gen_reloc): Remove special
handling for BFD_RELOC_MIPS16_JMP.
2006-07-31 17:23:31 +00:00
Richard Sandiford
777b13b958 opcodes/
* m68k-opc.c (m68k_opcodes): Fix operand specificer in the Coldfire
	"fdaddl" entry.

gas/testsuite/
	* gas/m68k/mcf-fpu.s: Add tests for all addressing modes.
	* gas/m68k/mcf-fpu.d: Update accordingly.
2006-07-29 08:55:38 +00:00
Nick Clifton
601e61cdeb PR/2756
* read.c (read_a_source_file): Ignore unknown text after line comment
  character.  Fix misleading comment.
2006-07-24 16:30:55 +00:00
Nick Clifton
b45619c047 Fix spelling typos 2006-07-24 13:49:50 +00:00
Nick Clifton
784906c5f1 * config/tc-sh.c (md_longopts): Add -EL and -EB for use by the linker testsuite. 2006-07-21 09:46:15 +00:00
Michael Meissner
46e742443d Update amd family 10 instructions to add appropriate alignment for cygwin 2006-07-20 23:09:32 +00:00
Thiemo Seufer
d5f010e93b * config/tc-mips.c (md_parse_option): Don't infer optimisation
options from debug options.
2006-07-20 16:51:38 +00:00
Thiemo Seufer
35d3d567cc [ bfd/ChangeLog ]
* elf32-mips.c (mips16_jump_reloc): Remove function.
	(elf_mips16_howto_table_rel): Use _bfd_mips_elf_generic_reloc
	instead of mips16_jump_reloc.
	* elf64_mips.c, wlfn32-mips.c (mips16_jump_reloc): Remove function.
	(elf_mips16_howto_table_rel, elf_mips16_howto_table_rela): Use
	_bfd_mips_elf_generic_reloc instead of mips16_jump_reloc.

	[ gas/ChangeLog ]
	* config/tc-mips.c (mips_fix_adjustable): Handle BFD_RELOC_MIPS16_JMP.
	(tc_gen_reloc): Handle mips16 jumps to section symbol offsets.

	[ ld/testsuite/ChangeLog ]
	* ld-mips-elf/mips16-call-global-1.s,
	ld-mips-elf/mips16-call-global-2.s,
	ld-mips-elf/mips16-call-global-3.s, ld-mips-elf/mips16-call-global.d:
	Test linking of external mips16 jumps.
	* ld-mips-elf/mips-elf.exp: Run new test.
2006-07-20 16:46:30 +00:00
Paul Brook
401a54cf6e 2006-07-19 Paul Brook <paul@codesourcery.com>
gas/
	* config/tc-arm.c (insns): Fix rbit Arm opcode.
	gas/testsuite/
	* gas/arm/archv6t2.d: Adjust expected output for rbit.
	opcodes/
	* armd-dis.c (arm_opcodes): Fix rbit opcode.
2006-07-19 12:53:33 +00:00
H.J. Lu
2b516b7297 gas/testsuite/
2006-07-18  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/opcode.s: Add sldt, smsw and str.
	* gas/i386/x86-64-opcode.s: Likewise.

	* gas/i386/opcode.d: Updated.
	* gas/i386/x86-64-opcode.d: Likewise.

opcodes/

2006-07-18  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (grps): Change "sldtQ", "strQ" and "smswQ" to
	"sldt", "str" and "smsw".
2006-07-18 20:25:41 +00:00
Paul Brook
16805f35a3 2006-07-18 Paul Brook <paul@codesourcery.com>
bfd/
	* bfd-in2.h: Regenerate.
	* libbfd.h: Regenerate.
	* reloc.c: Add BFD_RELOC_ARM_T32_ADD_IMM.

	gas/
	* tc-arm.c (do_t_add_sub): Use addw/subw when source is PC.
	(md_convert_frag): Use correct reloc for add_pc.  Use
	BFD_RELOC_ARM_T32_ADD_IMM for normal add/sum.
	(md_apply_fix): Handle BFD_RELOC_ARM_T32_ADD_IMM.
	(arm_force_relocation): Handle BFD_RELOC_ARM_T32_ADD_IMM.

	gas/testsuite/
	* gas/arm/thumb2_add.d: New test.
	* gas/arm/thumb2_add.s: New test.
2006-07-18 16:44:47 +00:00
Thiemo Seufer
2f2760a39d * gas/mips/mips4.s, gas/mips/mips4.d: Enable the "pref" test. Change
arguments for "madd.s" so that the instruction is correct for mips1
	and still matches "bc3*".
2006-07-18 14:06:10 +00:00
Alan Modra
d9e05e4ed1 * symbols.c (report_op_error): Fix pasto. Don't use as_bad_where
when file and line unknown.
2006-07-17 12:49:50 +00:00
Thiemo Seufer
f43abd2b39 * read.c (s_struct): Use IS_ELF.
* config/tc-mips.c (md_begin, mips16_mark_labels, mips_ip,
	md_parse_option, s_change_sec, pic_need_relax, mips_fix_adjustable,
	tc_gen_reloc, mips_frob_file_after_relocs, s_mips_end, s_mips_frame,
	s_mips_mask): Likewise.
2006-07-17 10:40:11 +00:00
Thiemo Seufer
a2902af6f4 * read.c (s_struct): Handle ELF section changing.
* config/tc-mips.c (s_align): Leave enabling auto-align to the
	generic code.
	(s_change_sec): Try section changing only if we output ELF.
2006-07-16 10:19:19 +00:00
H.J. Lu
d32cad6576 2006-07-15 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (cpu_arch): Remove Cpu086, CpuAthlon and
	CpuAmdFam10.
	(smallest_imm_type): Remove Cpu086.
	(i386_target_format): Likewise.

	* config/tc-i386.h: Remove Cpu086, CpuAthlon and CpuAmdFam10.
	Update CpuXXX.
2006-07-15 16:32:48 +00:00
Michael Meissner
050dfa73de Add amdfam10 instructions 2006-07-13 22:25:48 +00:00
H.J. Lu
6b2de085ee 2006-07-13 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.h (Size64): Fix a typo in comment.
2006-07-13 18:13:36 +00:00
Nick Clifton
7cfe9437c6 Fix grammatical error in ChangeLog entry 2006-07-12 09:08:34 +00:00
Nick Clifton
01eaea5ad2 * config/tc-sh.c (md_apply_fix): Do not allow the generic code in
fixup_segment() to repeat a range check on a value that have already
  been checked here.
* gas/sh/basic.exp: Run "too_large" dump test.
* gas/sh/too_large.s: New test file.  Check that .byte directives do not
  generate a bogus overflow message.
* gas/sh/too_large.s: New test control file.
2006-07-12 09:02:00 +00:00
Jim Wilson
1e85aad828 Add Broadcom SB-1A support.
* config/tc-mips.c (mips_cpu_info_table): Add sb1a.
2006-07-07 23:17:55 +00:00
Nick Clifton
1370e33d0d PR binutils/2877
* doc/as.texi: Fix spelling typo: branchs => branches.
* doc/c-m68hc11.texi: Likewise.
* config/tc-m68hc11.c: Likewise.
  Support old spelling of command line switch for backwards compatibility.
2006-07-06 10:34:02 +00:00
Julian Brown
c5cfaa43af * gas/arm/vfp-neon-syntax.d: Tweak expected fmsrr syntax.
* gas/arm/vfp-neon-syntax_t2.d: Likewise.
    * gas/arm/vfp2.d: Likewise.
    * gas/arm/vfp2_t2.d: Likewise.
2006-07-05 17:08:09 +00:00
Thiemo Seufer
5f0fe04bc5 * config/tc-mips.c (s_is_linkonce): New function.
(mips16_mark_labels): Don't adjust mips16 symbol addresses for
	weak, external, and linkonce symbols.
	(pic_need_relax): Use s_is_linkonce.
2006-07-04 17:22:11 +00:00
Thiemo Seufer
cd9260d951 * gas/mips/e32-rel2.d, gas/mips/e32-rel4.d: Use -mabi=32 for as.
* gas/mips/mips.exp: Move mips16e testcase to ELF only tests.
	Run elf{el}-rel2 and elf-rel4 for all arches with gpr64. Run
	e32-rel2 and e32-rel4 also for 64 bit configurations.
2006-07-04 16:39:08 +00:00
H.J. Lu
85234291d9 2006-06-24 H.J. Lu <hongjiu.lu@intel.com>
* doc/as.texinfo (Org): Remove space.
	(P2align): Add "@var{abs-expr},".
2006-06-24 18:25:10 +00:00
H.J. Lu
ccc9c02779 gas/
2006-06-23  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.c (cpu_arch_tune_set): New.
	(cpu_arch_isa): Likewise.
	(i386_align_code): Use xchg %ax,%ax for 2 byte nop. Optimize
	nops with short or long nop sequences based on -march=/.arch
	and -mtune=.
	(set_cpu_arch): Set cpu_arch_isa.  If cpu_arch_tune_set is 0,
	set cpu_arch_tune and cpu_arch_tune_flags.
	(md_parse_option): For -march=, set cpu_arch_isa and set
	cpu_arch_tune and cpu_arch_tune_flags if cpu_arch_tune_set is
	0.  Set cpu_arch_tune_set to 1 for -mtune=.
	(i386_target_format): Don't set cpu_arch_tune.

gas/testsuite/

2006-06-23  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/i386.exp: Run nops-1, nops-1-i386, nops-1-i686,
	nops-1-merom, nops-2, nops-2-i386, nops-2-merom, x86-64-nops-1,
	x86-64-nops-1-k8, x86-64-nops-1-nocona and x86-64-nops-1-merom.

	* gas/i386/nops-1.s: New file.
	* gas/i386/nops-2.s: Likewise.
	* gas/i386/nops-1-i386.d: Likewise.
	* gas/i386/nops-1-i686.d: Likewise.
	* gas/i386/nops-1-merom.d: Likewise.
	* gas/i386/nops-1.d: Likewise.
	* gas/i386/nops-2-i386.d: Likewise.
	* gas/i386/nops-2-merom.d: Likewise.
	* gas/i386/nops-2.d: Likewise.
	* gas/i386/x86-64-nops-1.s: Likewise.
	* gas/i386/x86-64-nops-1-k8.d: Likewise.
	* gas/i386/x86-64-nops-1-merom.d: Likewise.
	* gas/i386/x86-64-nops-1-nocona.d: Likewise.
	* gas/i386/x86-64-nops-1.d: Likewise.

	* gas/i386/sse2.d: Updated to expect xchg %ax,%ax as 2 byte
	nop.
2006-06-23 21:47:36 +00:00
Thiemo Seufer
d4dc2f22f5 * config/tc-mips.c (nopic_need_relax): Handle -fdata-sections
generated .sbss.* and .gnu.linkonce.sb.*.
2006-06-23 18:31:17 +00:00
Thiemo Seufer
a8dbcb8573 * config/tc-mips.h (TC_SEGMENT_INFO_TYPE): Declare per-segment
label_list.
	* config/tc-mips.c (label_list): Define per-segment label_list.
	(mips_clear_insn_labels, mips_move_labels, mips16_mark_labels,
	append_insn, s_align, s_cons, s_float_cons, s_gpword, s_gpdword,
	mips_from_file_after_relocs, mips_define_label): Use per-segment
	label_list.
2006-06-23 16:26:13 +00:00
Thiemo Seufer
3994f87e99 * config/tc-mips.c (ISA_SUPPORTS_MIPS16E): New macro.
(append_insn): Use it.
	(md_apply_fix): Whitespace formatting.
	(md_begin, append_insn, macro, macro2, mips16_immed, mips_align,
	mips16_extended_frag): Remove register specifier.
	(md_convert_frag): Likewise. Use TRUE ans FALSE instead of numeric
	constants.
2006-06-22 14:09:40 +00:00
Mark Shinwell
8e77b565d5 Corrected typo in date. 2006-06-21 15:24:40 +00:00
Mark Shinwell
fa073d6911 gas/
* config/tc-arm.c (s_arm_unwind_save_vfp_armv6): New.  Parse
	a directive saving VFP registers for ARMv6 or later.
	(s_arm_unwind_save): Add parameter arch_v6 and call
	s_arm_unwind_save_vfp or s_arm_unwind_save_vfp_armv6 as
	appropriate.
	(md_pseudo_table): Add entry for new "vsave" directive.
	* doc/c-arm.texi: Correct error in example for "save"
	directive (fstmdf -> fstmdx).  Also document "vsave" directive.
2006-06-21 14:20:25 +00:00
Thiemo Seufer
21b956c605 * gas/mips/mips.exp: Explicitly specify o32 ABI.
* gas/mips/mips64-dsp.d: Dump o32 register names.
	* gas/mips/smartmips.d: Explicitly specify o32 ABI.
2006-06-20 17:09:29 +00:00
Denis Chertykov
026dcbd716 * config/tc-avr.c (mcu_types): Add support for atmega165p, atmega169p
and atmega644p devices. Rename atmega164/atmega324 devices to
	atmega164p/atmega324p.
	* doc/c-avr.texi: Document new mcu and arch options.
2006-06-19 16:58:29 +00:00
Nick Clifton
edaf0dec18 Skip for non-ELF targets. 2006-06-18 10:05:27 +00:00
Nick Clifton
8b1ad4545a (enum parse_operand_result): Move outside of #ifdef OBJ_ELF so that non-ELF
targeted ARM ports can build.
2006-06-17 16:05:41 +00:00
H.J. Lu
9103f4f44a 2006-06-16 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.h (processor_type): New.
	(arch_entry): Add type.

	* config/tc-i386.c (cpu_arch_tune): New.
	(cpu_arch_tune_flags): Likewise.
	(cpu_arch_isa_flags): Likewise.
	(cpu_arch): Updated.
	(set_cpu_arch): Also update cpu_arch_isa_flags.
	(md_assemble): Update cpu_arch_isa_flags.
	(OPTION_MARCH): New.
	(OPTION_MTUNE): Likewise.
	(md_longopts): Add -march= and -mtune=.
	(md_parse_option): Support -march= and -mtune=.
	(md_show_usage): Add -march=CPU/-mtune=CPU.
	(i386_target_format): Also update cpu_arch_isa_flags,
	cpu_arch_tune and cpu_arch_tune_flags.

	* doc/as.texinfo: Add -march=CPU/-mtune=CPU.

	* doc/c-i386.texi: Document -march=CPU/-mtune=CPU.
2006-06-16 15:46:11 +00:00
Mark Shinwell
4962c51a67 * include/elf/arm.h: Correct names of R_ARM_LDC_G{0,1,2}
to R_ARM_LDC_SB_G{0,1,2} respectively.

bfd/
	* bfd-in2.h: Regenerate.
	* elf32-arm.c (R_ARM_ALU_PC_G0_NC, R_ARM_ALU_PC_G0,
	R_ARM_ALU_PC_G1_NC, R_ARM_ALU_PC_G1, R_ARM_ALU_PC_G2,
	R_ARM_LDR_PC_G1, R_ARM_LDR_PC_G2, R_ARM_LDRS_PC_G0,
	R_ARM_LDRS_PC_G1, R_ARM_LDRS_PC_G2, R_ARM_LDC_PC_G0,
	R_ARM_LDC_PC_G1, R_ARM_LDC_PC_G2, R_ARM_ALU_SB_G0_NC,
	R_ARM_ALU_SB_G0, R_ARM_ALU_SB_G1_NC, R_ARM_ALU_SB_G1,
	R_ARM_ALU_SB_G2, R_ARM_LDR_SB_G0, R_ARM_LDR_SB_G1,
	R_ARM_LDR_SB_G2, R_ARM_LDRS_SB_G0, R_ARM_LDRS_SB_G1,
	R_ARM_LDRS_SB_G2, R_ARM_LDC_SB_G0, R_ARM_LDC_SB_G1,
	R_ARM_LDC_SB_G2): New relocation types.
	(R_ARM_PC13): Rename to AAELF name R_ARM_LDR_PC_G0 and
	adjust HOWTO entry to be consistent with R_ARM_LDR_PC_G1
	and friends.
	(elf32_arm_howto_table_3): Delete; contents merged into
	elf32_arm_howto_table_2.
	(elf32_arm_howto_from_type): Adjust correspondingly.
	(elf32_arm_reloc_map): Extend with the above relocations.
	(calculate_group_reloc_mask): New function.
	(identify_add_or_sub): New function.
	(elf32_arm_final_link_relocate): Support for the above
	relocations.
	* reloc.c: Add enumeration entries for BFD_RELOC_ARM_...
	codes to correspond to the above relocations.

gas/
	* config/tc-arm.c (enum parse_operand_result): New.
	(struct group_reloc_table_entry): New.
	(enum group_reloc_type): New.
	(group_reloc_table): New array.
	(find_group_reloc_table_entry): New function.
	(parse_shifter_operand_group_reloc): New function.
	(parse_address_main): New function, incorporating code
	from the old parse_address function.  To be used via...
	(parse_address): wrapper for parse_address_main; and
	(parse_address_group_reloc): new function, likewise.
	(enum operand_parse_code): New codes OP_SHG, OP_ADDRGLDR,
	OP_ADDRGLDRS, OP_ADDRGLDC.
	(parse_operands): Support for these new operand codes.
	New macro po_misc_or_fail_no_backtrack.
	(encode_arm_cp_address): Preserve group relocations.
	(insns): Modify to use the above operand codes where group
	relocations are permitted.
	(md_apply_fix): Handle the group relocations
	ALU_PC_G0_NC through LDC_SB_G2.
	(tc_gen_reloc): Likewise.
	(arm_force_relocation): Leave group relocations for the linker.
	(arm_fix_adjustable): Likewise.

gas/testsuite/
	* gas/arm/group-reloc-alu.d: New test.
	* gas/arm/group-reloc-alu-encoding-bad.d: New test.
	* gas/arm/group-reloc-alu-encoding-bad.l: New test.
	* gas/arm/group-reloc-alu-encoding-bad.s: New test.
	* gas/arm/group-reloc-alu-parsing-bad.d: New test.
	* gas/arm/group-reloc-alu-parsing-bad.l: New test.
	* gas/arm/group-reloc-alu-parsing-bad.s: New test.
	* gas/arm/group-reloc-alu.s: New test.
	* gas/arm/group-reloc-ldc.d: New test.
	* gas/arm/group-reloc-ldc-encoding-bad.d: New test.
	* gas/arm/group-reloc-ldc-encoding-bad.l: New test.
	* gas/arm/group-reloc-ldc-encoding-bad.s: New test.
	* gas/arm/group-reloc-ldc-parsing-bad.d: New test.
	* gas/arm/group-reloc-ldc-parsing-bad.l: New test.
	* gas/arm/group-reloc-ldc-parsing-bad.s: New test.
	* gas/arm/group-reloc-ldc.s: New test.
	* gas/arm/group-reloc-ldr.d: New test.
	* gas/arm/group-reloc-ldr-encoding-bad.d: New test.
	* gas/arm/group-reloc-ldr-encoding-bad.l: New test.
	* gas/arm/group-reloc-ldr-encoding-bad.s: New test.
	* gas/arm/group-reloc-ldr-parsing-bad.d: New test.
	* gas/arm/group-reloc-ldr-parsing-bad.l: New test.
	* gas/arm/group-reloc-ldr-parsing-bad.s: New test.
	* gas/arm/group-reloc-ldr.s: New test.
	* gas/arm/group-reloc-ldrs.d: New test.
	* gas/arm/group-reloc-ldrs-encoding-bad.d: New test.
	* gas/arm/group-reloc-ldrs-encoding-bad.l: New test.
	* gas/arm/group-reloc-ldrs-encoding-bad.s: New test.
	* gas/arm/group-reloc-ldrs-parsing-bad.d: New test.
	* gas/arm/group-reloc-ldrs-parsing-bad.l: New test.
	* gas/arm/group-reloc-ldrs-parsing-bad.s: New test.
	* gas/arm/group-reloc-ldrs.s: New test.

ld/testsuite/
	* ld-arm/group-relocs-alu-bad.d: New test.
	* ld-arm/group-relocs-alu-bad.s: New test.
	* ld-arm/group-relocs.d: New test.
	* ld-arm/group-relocs-ldc-bad.d: New test.
	* ld-arm/group-relocs-ldc-bad.s: New test.
	* ld-arm/group-relocs-ldr-bad.d: New test.
	* ld-arm/group-relocs-ldr-bad.s: New test.
	* ld-arm/group-relocs-ldrs-bad.d: New test.
	* ld-arm/group-relocs-ldrs-bad.s: New test.
	* ld-arm/group-relocs.s: New test.
	* ld-arm/arm-elf.exp: Wire in new tests.
2006-06-15 11:03:02 +00:00
Julian Brown
cd2f129fb4 * config/tc-arm.c (do_vfp_nsyn_ldr_str): Remove, fold into...
(do_neon_ldr_str): Always defer to VFP encoding routines, which handle
	relocs properly.
2006-06-15 10:51:28 +00:00
Thiemo Seufer
1dd3d6278b * gas/mips/elf-rel6.d, gas/mips/elf-rel6.s: Extend testcase.
* gas/mips/elf-rel6.d-n32.d, gas/mips/elf-rel6-n64.d: New files.
	* gas/mips/mips.exp: Run new testcases.
2006-06-14 18:04:44 +00:00
Thiemo Seufer
adad22db6d * gas/mips/mips16e-jrc.d, gas/mips/mips16e-save.d,
gas/mips/mips32-dsp.d, gas/mips/mips32-mt.d: Explicitly specify
	o32 ABI.
2006-06-14 08:29:42 +00:00
H.J. Lu
1596541188 gas/testsuite/
2006-06-12  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/i386.exp: Run nops and x86-64-nops.

	* gas/i386/nops.d: New file.
	* gas/i386/nops.s: Likewise.
	* gas/i386/x86-64-nops.d: Likewise.
	* gas/i386/x86-64-nops.s: Likewise.

include/opcode/

2006-06-12  H.J. Lu  <hongjiu.lu@intel.com>

	* i386.h (i386_optab): Add "nop" with memory reference.

opcodes/

2006-06-12  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (dis386_twobyte): Use "nopQ" for 0x1f.
	(twobyte_has_modrm): Set 1 for 0x1f.
2006-06-12 18:59:37 +00:00
H.J. Lu
46e883c5a9 gas/
2006-06-12  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.c (process_suffix): Don't add rex64 for
	"xchg %rax,%rax".

gas/testsuite/

2006-06-12  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/opcode.s: Add "xchg %ax,%ax".
	* gas/i386/opcode.d: Updated.

	* gas/i386/x86-64-opcode.s: Add xchg %ax,%ax, xchg %eax,%eax,
	xchg %rax,%rax, rex64 xchg %rax,%rax and xchg %rax,%r8.
	* gas/i386/x86-64-opcode.d: Updated.

include/opcode/

2006-06-12  H.J. Lu  <hongjiu.lu@intel.com>

	* i386.h (i386_optab): Update comment for 64bit NOP.

opcodes/

2006-06-12  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (NOP_Fixup): Removed.
	(NOP_Fixup1): New.
	(NOP_Fixup2): Likewise.
	(dis386): Use NOP_Fixup1 and NOP_Fixup2 on 0x90.
2006-06-12 18:55:44 +00:00