All other cgen ports keep their generated desc & opc files under
opcodes/, so move the cris files over too. The cris-opc.c file,
while not generated, is already here to complement.
The cleanup to use BFD_VMA_FMT also adjusted this line, but used the
incorrect format: while BFD_VMA_FMT needs an explicit "x", PRIx32 does
not, so the spurious "x" here confused the parser and broke execution.
I misread the code and thought data0/... were bu64 when they were
actually bu32. Fix the call to assemble the 2 64-bit values instead
of passing the 2 halves of the first 64-bit value.
The bfin_otp_write_page_val func wants a pointer to an bu64[2] array,
but this code passes it a pointer to a single bu64. It's in a struct
with a known compatible layout:
bu64 data0, data1, data2, data3;
But gcc doesn't allow these kinds of tricks anymore. Use the more
verbose form to make the compiler happy since this is not performance
sensitive code.
32-bit MIPS programs run on the 64-bit simulator model in 64-bit
sign-extended space. The mapping from 64-bit sign-extended addresses to
32-bit addresses was removed by commit
26f8bf63bf, breaking the 64-bit simulator
model. Add shadow mappings from 64-bit sign extended address space to
32-bit address spaces, in lieu of the AddressTranslation function.
2021-05-04 Faraz Shahbazker <fshahbazker@wavecomp.com>
sim/mips/ChangeLog:
* interp.c (sim_open): Add shadow mappings from 32-bit
address space to 64-bit sign-extended address space.
64-bit BFD for MIPS applies a standard sign extension on all addresses
assuming 64-bit target. These bits are required for 64-bit and can only
be safely truncated for 32-bit target models. This partially reverts commit
b36d953bce
The sign-extension logic modeled by BFD is an integral part of the
MIPS64 architecture spec. It appears in the virtual address map, where
sign extension allows for 32-bit compatibility segments [1] with 64-bit
addressing. Truncating these addresses prematurely (commit
models (-DWITH_TARGET_WORD_BITSIZE=64).
In the ISA itself, direct addressing (Load-Upper-Immediate) and indirect
addressing (Load-Word) both automatically sign-extend their results. These
instructions regenerate the sign-extended addresses even if we don't start
with one (see pr gdb/19447).
Moreover, some instructions like ADD*/SUB* have unpredictable behaviour when
an operand is not correctly sign extended [3]. This affects PC-relative
addressing in particular, so arithmetic on the link-address generated in the
return address register by a jump-and-link is no longer possible, neither is
the use of the PC-relative addressing instructions provided by MIPSR6.
[1] "MIPS64 Architecture for Programmers Volume III: The MIPS64
Privileged Resource Architecture", Document Number: MD00091,
Revision 6.02, December 10, 2015, Section 4.3 "Virtual Address
Spaces", pp. 29-31
https://s3-eu-west-1.amazonaws.com/downloads-mips/documents/MD00091-2B-MIPS64PRA-AFP-06.03.pdf
[2] "MIPS64 Architecture for Programmers Volume II-A: The MIPS64
Instruction Set Reference Manual", Document Number: MD00087,
Revision 6.06, December 15, 2016, Section 3.2 "Alphabetical
List of Instructions", pp. 321
https://s3-eu-west-1.amazonaws.com/downloads-mips/documents/MD00087-2B-MIPS64BIS-AFP-6.06.pdf
[3] "MIPS64 Architecture for Programmers Volume II-A: The MIPS64
Instruction Set Reference Manual", Document Number: MD00087,
Revision 6.06, December 15, 2016, Section 3.2 "Alphabetical
List of Instructions", pp. 56
https://s3-eu-west-1.amazonaws.com/downloads-mips/documents/MD00087-2B-MIPS64BIS-AFP-6.06.pdf
2021-04-23 Faraz Shahbazker <fshahbazker@wavecomp.com>
sim/mips/ChangeLog:
* interp.c (sim_create_inferior): Only truncate sign extension
bits for 32-bit target models
.
clang 11 fails to compile the static assertion as it cannot compute
the pointer value at a compile time:
gdb/sim/d10v/interp.c:1149:37: error: static_assert expression is not an integral constant expression
static_assert ((uintptr_t) &State == (uintptr_t) &State.regs,
~~~~~~~~~~~~~~~~~~~^~~~~~~~~~~~~~~~~~~~~~~~~~
1 error generated.
Instead, assert that the offset of State.regs is 0.
sim/d10v/ChangeLog:
* interp.c (sim_create_inferior): Use offsetof in static
assertion.
When compiling with --enable-werror and CFLAGS="-O0 -g -Wall", we run into:
...
src/sim/ppc/hw_memory.c: In function 'hw_memory_init_address':
src/sim/ppc/hw_memory.c:194:75: error: pointer targets in passing \
argument 4 of 'device_find_integer_array_property' differ in signedness \
[-Werror=pointer-sign]
int nr_cells
= device_find_integer_array_property(me, "available", 0, &dummy);
^
...
Fix this by changing the type of dummy.
When compiling with --enable-werror and CFLAGS="-O0 -g -Wall", we run into:
...
src/sim/ppc/hw_phb.c: In function 'hw_phb_attach_address':
src/sim/ppc/hw_phb.c:315:12: error: comparison between \
'attach_type {aka enum _attach_type}' and \
'enum <anonymous>' [-Werror=enum-compare]
if (type != hw_phb_normal_decode
^~
...
Fix this by casting type to hw_phb_decode.
When compiling with --enable-werror and CFLAGS="-O0 -g -Wall", we run into:
...
src/sim/ppc/emul_netbsd.c: In function 'do_gettimeofday':
src/sim/ppc/emul_netbsd.c:770:16: error: null argument where non-null \
required (argument 1) [-Werror=nonnull]
int status = gettimeofday((t_addr != 0 ? &t : NULL),
^~~~~~~~~~~~
...
Fix this by unconditionally passing &t as first argument.
When compiling with --enable-werror and CFLAGS="-O0 -g -Wall", we run into:
...
In file included from src/sim/ppc/cpu.h:26:0,
from src/sim/ppc/mon.c:25,
from src/sim/ppc/inline.c:64,
from idecode.c:26:
src/sim/ppc/device.h:788:8: error: 'device_event_queue_deschedule' \
declared 'static' but never defined [-Werror=unused-function]
(void) device_event_queue_deschedule
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~
...
This seems to be caused by the fact that the function is declared using
INLINE_EVENT instead of INLINE_DEVICE.
Fix this and a similar error in the same file.
When compiling with --enable-werror and CFLAGS="-O0 -g -Wall", we run into:
...
In file included from src/sim/ppc/cpu.h:251:0,
from src/sim/ppc/emul_generic.h:24,
from src/sim/ppc/emul_generic.c:24:
src/sim/ppc/cpu.c:76:1: error: 'cpu_create' defined but not used \
[-Werror=unused-function]
cpu_create(psim *system,
^~~~~~~~~~
...
The function is defined as:
...
INLINE_CPU\
(cpu *)
cpu_create(psim *system,
...
which expands to:
...
static cpu * __attribute__((__unused__))
cpu_create(psim *system,
...
The problem is that gcc does not associate the attribute to the function.
I've filed a PR about this ( PR gcc/100670 ), which may or may not be valid.
Work around/fix this by modifying the INLINE_* definitions in inline.h to move
UNUSED to the start such that we have:
...
__attribute__((__unused__)) static cpu *
cpu_create(psim *system,
...
Currently all ports have to declare sim_state themselves in their
sim-main.h and then embed the common sim_state_base & sim_cpu in it.
This dynamic makes it impossible to share common object code among
multiple ports because the core data structure is always different.
Let's invert this relationship: common code declares sim_state, and
if the port actually needs state on a per-instance basis, it can use
the new arch_data field for it. Most ports don't actually use it,
so they don't need to declare anything at all.
This is the first in a series of changes: it adds a define to select
between the old & new layouts, then converts all the ports that don't
need custom state over to the new layout.
The defs.h header will take care of including the various config.h
headers. For now, it's just config.h, but we'll add more when we
integrate gnulib in.
This header should be used instead of config.h, and should be the
first include in every .c file. We won't rely on the old behavior
where we expected files to include the port's sim-main.h which then
includes the common sim-basics.h which then includes config.h. We
have a ton of code that includes things before sim-main.h, and it
sometimes needs to be that way. Creating a dedicated header avoids
the ordering mess and implicit inclusion that shows up otherwise.
A random grab bag of minor fixes to enable -Werror for this port.
Cast address vars to long when the format was using %l.
Use %zu with sizeof operations.
Add const to a bunch of strings.
Trim unused variables.
Fix sizeof call to calculate target storage and not the pointer itself.
Rather than rely on off_t being the right size between the host &
target, have the interface always be 64-bit. We can figure out if
we need to truncate when actually outputting it to the right target.
PR sim/27705
Rather than rely on time_t being the right size between the host &
target, have the interface always be 64-bit. We can figure out if
we need to truncate when actually outputting it to the right target.
The gdb/callback.h & gdb/remote-sim.h headers have nothing to do with
gdb and are really definitions for the libsim API under the sim/ tree.
While gdb uses those headers as a client, it's not specific to it. So
create a new sim/ namespace and move the headers there.
While building all targets on Ubuntu 20.04/aarch64, I ran into the following
build error:
In file included from /usr/include/string.h:495,
from ../../bfd/bfd.h:48,
from ../../../../repos/binutils-gdb/sim/d10v/interp.c:4:
In function memset,
inlined from sim_create_inferior at ../../../../repos/binutils-gdb/sim/d10v/interp.c:1146:3:
/usr/include/aarch64-linux-gnu/bits/string_fortified.h:71:10: error: __builtin_memset offset [33, 616] from the object at State is out of the bounds of referenced subobject regs with type reg_t[16] {aka short unsigned int[16]} at offset 0 [-Werror=array-bounds]
71 | return __builtin___memset_chk (__dest, __ch, __len, __bos0 (__dest));
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
cc1: all warnings being treated as errors
make[3]: *** [Makefile:558: interp.o] Error 1
The following patch fixes this.
sim/ChangeLog:
2021-05-12 Luis Machado <luis.machado@linaro.org>
* d10v/interp.c (sim_create_inferior): Fix memset call.
A random grab bag of minor fixes to enable -Werror for this port.
Disable h8_set_macS for now as it's unused.
Initialize trace & intMask before using them.
Mark local set_h8300h function static.
