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946 Commits

Author SHA1 Message Date
Alan Modra
c85a332d60 * Makefile.am: Run "make dep-am". 
* Makefile.in: Regenerate.
	* po/POTFILES.in: Regenerate.
 2005-12-27 01:20:06 +00:00
Nick Clifton
54758c3e39 Fix PicoJava opcodes 2005-12-22 17:09:39 +00:00
Nathan Sidwell
d031aafbfe Second part of ms1 to mt renaming. 
* bfd/archures.c (bfd_arch_mt): Renamed.
	(bfd_mt_arch): Renamed.
	(bfd_archures_list): Adjusted.
	* bfd/bfd-in2.h: Rebuilt.
	* bfd/config.bfd (mt): Remove special case targ_archs.
	(mt-*-elf): Rename bfd_elf32_mt_vec.
	* bfd/configure: Rebuilt.
	* bfd/configure.in (bfd_elf32_mt_vec): Renamed.
	(selarchs) Remove mt special case.
	* bfd/cpu-mt.c (arch_info_struct): Adjust.
	(bfd_mt_arch): Renamed, adjust.
	* bfd/elf32-mt.c (mt_reloc_type_lookup, mt_info_to_howto_rela,
	mt_elf_relocate_hi16, mt_final_link_relocate, mt_relocate_section,
	mt_elf_howto_table): Renamed, adjusted.
	(mt_elf_gc_mark_hook, mt_elf_gc_sweep_hook, mt_elf_check_relocs,
	elf32_mt_machine, mt_elf_object_p, mt_elf_set_private_flags,
	mt_elf_copy_private_bfd_data, mt_elf_merge_private_bfd_data,
	mt_elf_print_private_bfd_data): Renamed, adjusted.
	(TARGET_BIG_SYM, TARGET_BIG_NAME, ELF_ARCH, ELF_MACHINE_CODE,
	ELF_MAXPAGESIZE, elf_info_to_howto, elf_backend_relocate_section,
	bfd_elf32_bfd_reloc_type_lookup, elf_backend_gc_mark_hook,
	elf_backend_gc_sweep_hook, elf_backend_check_relocs,
	eld_backend_object_p, bfd_elf32_bfd_set_private_flags,
	bfd_elf32_bfd_copy_private_bfd_data,
	bfd_elf32_bfd_merge_private_bfd_data,
	bfd_elf32_bfd_print_private_bfd_data): Adjusted.
	* bfd/libbfd.h: Regenerated.
	* bfd/reloc.c (BFD_RELOC_MT_PC16, BFD_RELOC_MT_HI16,
	BFD_RELOC_MT_LO16, BFD_RELOC_MT_GNU_VTINHERIT,
	BFD_RELOC_MT_GNU_VTENTRY, BFD_RELOC_MT_PCINSN8): Renamed.
	* bfd/targets.c (bfd_elf32_mt_vec): Renamed.
	(_bfd_target_vector): Adjusted.
	* binutils/readelf.c (guess_is_rela): Use EM_MT.
	(dump_relocations, get_machine_name): Adjust.

	* cpu/mt.cpu (define-arch, define-isa): Set name to mt.
	(define-mach): Adjust.
	* cpu/mt.opc (CGEN_ASM_HASH): Update.
	(mt_asm_hash, mt_cgen_insn_supported): Renamed.
	(parse_loopsize, parse_imm16): Adjust.

	* gas/configure: Rebuilt.
	* gas/configure.in (mt): Remove special case.
	* gas/config/tc-mt.c (opcodes/mt-desc.h, opcodes/mt-opc.h): Change
	#includes.
	(mt_insn, mt_mach, mt_mach_bitmask, mt_flags, mt_architectures):
	Rename, adjust.
	(md_parse_option, md_show_usage, md_begin, md_assemble,
	md_cgen_lookup_reloc, md_atof): Adjust.
	(mt_force_relocation, mt_apply_fix, mt_fix_adjustable): Rename, adjust.
	* gas/config/tc-mt.h (TC_MT): Rename.
	(LISTING_HEADER, TARGET_ARCH, TARGET_FORMAT): Adjust.
	(md_apply_fix): Adjust.
	(mt_apply_fix, mt_fix_adjustable, mt_force_relocation): Rename.
	(TC_FORCE_RELOCATION, tc_fix_adjustable): Adjust.

	* gdb/mt-tdep.c (mt_arch_constants, mt_gdb_regnums): Rename, adjust.
	(mt_register_name, mt_register_type, mt_register_reggroup_p,
	mt_return_value, mt_skip_prologue, mt_breapoint_from_pc,
	mt_pseudo_register_read, mt_pseudo_register_write, mt_frame_align,
	mt_registers_info, mt_push_dummy_call, mt_unwind_cache,
	mt_frame_unwind_cache, mt_unwind_pc, mt_unwind_dummy_id,
	mt_frame_this_id, mt_frame_prev_register, mt_frame_base_address,
	mt_frame_unwind, mt_frame_sniffer, mt_frame_base, mt_gdbarch_init,
	_initialize_mt_tdep): Rename & adjust.

	* include/dis-asm.h (print_insn_mt): Renamed.

	* include/elf/common.h (EM_MT): Renamed.
	* include/elf/mt.h: Rename relocs, cpu & other defines.

	* ld/emulparams/elf32mt.sh (ARCH, OUTPUT_FORMAT): Adjust.

	* opcodes/Makefile.am (HFILES, CFILES, ALL_MACHINES): Adjust.
	(stamp-mt): Adjust rule.
	(mt-asm.lo, mt-desc.lo, mt-dis.lo, mt-ibld.lo, mt-opc.lo): Rename &
	adjust.
	* opcodes/Makefile.in: Rebuilt.
	* opcodes/configure: Rebuilt.
	* opcodes/configure.in (bfd_mt_arch): Rename & adjust.
	* opcodes/disassemble.c (ARCH_mt): Renamed.
	(disassembler): Adjust.
	* opcodes/mt-asm.c: Renamed, rebuilt.
	* opcodes/mt-desc.c: Renamed, rebuilt.
	* opcodes/mt-desc.h: Renamed, rebuilt.
	* opcodes/mt-dis.c: Renamed, rebuilt.
	* opcodes/mt-ibld.c: Renamed, rebuilt.
	* opcodes/mt-opc.c: Renamed, rebuilt.
	* opcodes/mt-opc.h: Renamed, rebuilt.

	* sid/Makefile.in: Rebuilt.
	* sid/aclocal.m4: Rebuilt.
	* sid/configure: Rebuilt.
	* sid/sid.spec: Adjust.
	* sid/bsp/Makefile.am: Adjust.
	* sid/bsp/Makefile.in: Rebuilt.
	* sid/bsp/aclocal.m4: Rebuilt.
	* sid/bsp/configrun-sid.in: Adjust.
	* sid/bsp/pregen/Makefile.in: Rebuilt.
	* sid/bsp/pregen/mt-gdb.conf: Renamed & rebuilt.
	* sid/bsp/pregen/mt-gloss.conf: Renamed & rebuilt.
	* sid/bsp/pregen/pregen-configs.in: Adjust.
	* sid/component/aclocal.m4: Rebuilt.
	* sid/component/configure: Rebuilt.
	* sid/component/tconfig.in: Adjust.
	* sid/component/bochs/aclocal.m4: Rebuilt.
	* sid/component/cache/Makefile.in: Rebuilt.
	* sid/component/cgen-cpu/Makefile.in: Rebuilt.
	* sid/component/cgen-cpu/aclocal.m4: Rebuilt.
	* sid/component/cgen-cpu/compCGEN.cxx: Adjust.
	* sid/component/cgen-cpu/configure: Rebuilt.
	* sid/component/cgen-cpu/configure.in: Rebult.
	* sid/component/cgen-cpu/mt/Makefile.am: Adjust.
	* sid/component/cgen-cpu/mt/Makefile.in: Rebuilt.
	* sid/component/cgen-cpu/mt/hw-cpu-mt.txt: Adjust.
	* sid/component/cgen-cpu/mt/mt-cpu.h: Rebuilt.
	* sid/component/cgen-cpu/mt/mt-decode.cxx: Rebuilt.
	* sid/component/cgen-cpu/mt/mt-decode.h: Rebuilt.
	* sid/component/cgen-cpu/mt/mt-defs.h: Rebuilt.
	* sid/component/cgen-cpu/mt/mt-desc.h: Rebuilt.
	* sid/component/cgen-cpu/mt/mt-sem.cxx: Rebuilt.
	* sid/component/cgen-cpu/mt/mt-write.cxx: Rebuilt.
	* sid/component/cgen-cpu/mt/mt.cxx: Adjust.
	* sid/component/cgen-cpu/mt/mt.h: Adjust.
	* sid/component/consoles/Makefile.in: Rebuilt.
	* sid/component/families/aclocal.m4: Rebuilt.
	* sid/component/families/configure: Rebuilt.
	* sid/component/gdb/Makefile.in: Rebuilt.
	* sid/component/gloss/Makefile.in: Rebuilt.
	* sid/component/glue/Makefile.in: Rebuilt.
	* sid/component/ide/Makefile.in: Rebuilt.
	* sid/component/interrupt/Makefile.in: Rebuilt.
	* sid/component/lcd/Makefile.in: Rebuilt.
	* sid/component/lcd/testsuite/Makefile.in: Rebuilt.
	* sid/component/loader/Makefile.am: Rebuilt.
	* sid/component/loader/Makefile.in: Rebuilt.
	* sid/component/mapper/Makefile.in: Rebuilt.
	* sid/component/mapper/testsuite/Makefile.in: Rebuilt.
	* sid/component/memory/Makefile.in: Rebuilt.
	* sid/component/mmu/Makefile.in: Rebuilt.
	* sid/component/parport/Makefile.in: Rebuilt.
	* sid/component/profiling/Makefile.in: Rebuilt.
	* sid/component/rtc/Makefile.in: Rebuilt.
	* sid/component/sched/Makefile.in: Rebuilt.
	* sid/component/testsuite/Makefile.in: Rebuilt.
	* sid/component/timers/aclocal.m4: Rebuilt.
	* sid/component/timers/configure: Rebuilt.
	* sid/component/uart/Makefile.in: Rebuilt.
	* sid/component/uart/testsuite/Makefile.in: Rebuilt.
	* sid/config/config.sub: Adjust.
	* sid/config/info.tcl.in: Adjust.
	* sid/config/sidtargets.m4: Adjust.
	* sid/doc/Makefile.in: Rebuilt.
	* sid/main/dynamic/Makefile.am: Rebuilt.
	* sid/main/dynamic/Makefile.in: Rebuilt.
	* sid/main/dynamic/aclocal.m4: Rebuilt.
	* sid/main/dynamic/configure: Rebuilt.
 2005-12-16 10:23:12 +00:00
DJ Delorie
eda87aba05 * m32c.cpu (jsri): Fix order so register names aren't treated as 
symbols.
(indexb, indexbd, indexbs, indexl, indexld, indexls, indexw,
indexwd, indexws): Fix encodings.

* m32c-desc.c: Regenerate.
* m32c-opc.c: Regenerate.
* m32c-opc.h: Regenerate.
 2005-12-14 03:30:07 +00:00
Nathan Sidwell
4970f871a7 Rename ms1 to mt, part 1 
* config.sub: Replace ms1 arch with mt.  Allow ms1 as alias.
	* configure.in: Replace ms1 arch with mt.
	* configure: Rebuilt.

	* bfd/Makefile.am (ALL_MACHINES, ALL_MACHINES_CFILES,
	BFD32_BACKENDS, BFD32_BACKENDS_CFILES): Replace ms1 with mt.
	(cpu_mt.lo, elf32-mt.lo): Update target and dependency names.
	* bfd/Makefile.in: Rebuilt.
	* bfd/config.bfd: Replace ms1 arch with mt.
	* bfd/configure.in: Replace ms1 files with mt files.
	* bfd/configure: Rebuilt.
	* bfd/elf32-mt.c: Renamed from elf32-ms1.c.  Update include files.
	* bfd/cpu-mt.c: Renamed from cpu-ms1.c.

	* cpu/mt.cpu: Rename from ms1.cpu.
	* cpu/mt.opc: Rename from ms1.opc.

	* binutils/Makefile.am: Replace ms1 files with mt files.
	* binutils/Makefile.in: Rebuilt.
	* binutils/readelf.c (elf/mt.h): Adjust #include.

	* gas/configure.in: Replace ms1 arch with mt arch.
	* gas/configure: Rebuilt.
	* gas/configure.tgt: Replace ms1 arch with mt arch.
	* gas/config/tc-mt.c: Renamed from tc-ms1.c: Update include files.

	* gas/doc/Makefile.am (CPU_DOCS): Replace ms1 files with mt files.
	* gas/doc/Makefile.in: Rebuilt.

	* gas/testsuite/gas/mt: Renamed from ms1 dir.  Update file names as
	needed.
	* gas/testsuite/gas/mt/errors.exp: Replace ms1 arch with mt arch.
	* gas/testsuite/gas/mt/mt.exp: Replace ms1 arch with mt arch.
	* gas/testsuite/gas/mt/relocs.exp: Replace ms1 arch with mt arch.

	* gdb/configure.tgt: Replace ms1 arch with mt arch.
	* gdb/config/mt: Renamed from ms1 dir.  Update file names as needed.
	* gdb/config/mt/mt.mt (TDEPFILES): Replace ms1 file with mt file.

	* include/elf/mt.h: Renamed from ms1.h

	* ld/Makefile.am (ALL_EMULATIONS): Replace ms1 files with mt files.
	(eelf32mt.c): Update target name and dependencies.
	* ld/Makefile.in: Rebuilt.
	* ld/configure.tgt: Replace ms1 arch with mt arch.
	* ld/emulparams/elf32mt.sh: Renamed from elf32ms1.sh. Update
	comment.

	* libgloss/configure.in: Replace ms1 arch with mt arch.
	* libgloss/configure: Rebuilt.
	* libgloss/mt: Renamed from ms1 dir.

	* newlib/configure.host: Replace ms1 arch with mt arch.
	* newlib/libc/machine/mt: Renamed from ms1 dir.

	* opcodes/Makefile.am (CLEANFILES, CGEN_CPUS, MT_DEPS): Replace ms1
	with mt.
	* opcodes/Makefile.in: Rebuilt.
	* opcodes/configure.in: Replace ms1 files with mt files.
	* opcodes/configure: Rebuilt.

	* sid/component/cgen-cpu/mt: Renamed from ms1 dir.  Update file
	names as appropriate.
	* sid/component/cgen-cpu/mt/Makefile.am: Replace ms1 files with mt
	files.
	* sid/component/cgen-cpu/mt/Makefile.in: Rebuilt.
 2005-12-12 11:25:08 +00:00
Jan Beulich
272c92178a opcodes/ 
2005-12-08  Jan Beulich  <jbeulich@novell.com>

	* i386-dis.c (MAXLEN): Reduce to architectural limit.
	(fetch_data): Check for sufficient buffer size.
 2005-12-08 15:21:05 +00:00
Jan Beulich
422673a90b opcodes/ 
2005-12-08  Jan Beulich  <jbeulich@novell.com>

	* i386-dis.c (OP_ST): Remove prefix in Intel mode.
 2005-12-08 11:28:11 +00:00
Alan Modra
6e50d963b0 * i386-dis.c (dofloat): Handle %rip-relative floating point addressing. 2005-12-08 09:59:40 +00:00
Hans-Peter Nilsson
cf54500c3c * cris-opc.c (cris_opcodes) <"move" "s,P">: Define using 
MOVE_M_TO_PREG_OPCODE and MOVE_M_TO_PREG_ZBITS instead of constants.
 2005-12-07 12:56:13 +00:00
H.J. Lu
cb712a9ecd gas/ 
2005-12-06  H.J. Lu  <hongjiu.lu@intel.com>

	PR gas/1874
	* config/tc-i386.c (match_template): Handle monitor.
	(process_suffix): Likewise.

gas/testsuite/

2005-12-06  H.J. Lu  <hongjiu.lu@intel.com>

	PR gas/1874
	* gas/i386/i386.exp: Add x86-64-prescott for 64bit.

	* gas/i386/prescott.s: Test address size override for monitor.
	* gas/i386/prescott.d: Updated.

	* gas/i386/x86-64-prescott.d: New file.
	* gas/i386/x86-64-prescott.s: Likewise.

include/opcode/

2005-12-06  H.J. Lu  <hongjiu.lu@intel.com>

	PR gas/1874
	* i386.h (i386_optab): Add 64bit support for monitor and mwait.

opcodes/

2005-12-06  H.J. Lu  <hongjiu.lu@intel.com>

	PR gas/1874
	* i386-dis.c (address_mode): New enum type.
	(address_mode): New variable.
	(mode_64bit): Removed.
	(ckprefix): Updated to check address_mode instead of mode_64bit.
	(prefix_name): Likewise.
	(print_insn): Likewise.
	(putop): Likewise.
	(print_operand_value): Likewise.
	(intel_operand_size): Likewise.
	(OP_E): Likewise.
	(OP_G): Likewise.
	(set_op): Likewise.
	(OP_REG): Likewise.
	(OP_I): Likewise.
	(OP_I64): Likewise.
	(OP_OFF): Likewise.
	(OP_OFF64): Likewise.
	(ptr_reg): Likewise.
	(OP_C): Likewise.
	(SVME_Fixup): Likewise.
	(print_insn): Set address_mode.
	(PNI_Fixup): Add 64bit and address size override support for
	monitor and mwait.
 2005-12-06 12:40:57 +00:00
Hans-Peter Nilsson
cdedc9f07f * cris-dis.c (bytes_to_skip): Handle new parameter prefix_matchedp. 
(print_with_operands): Check for prefix when [PC+] is seen.
 2005-12-05 23:27:01 +00:00
Dave Brolley
3609e0feb6 2005-12-02 Dave Brolley <brolley@redhat.com> 
* configure.in (cgen_files): Add cgen-bitset.lo.
        (ta): Add cgen-bitset.lo when arch==bfd_cris_arch.
        * Makefile.am (CFILES): Add cgen-bitset.c.
        (ALL_MACHINES): Add cgen-bitset.lo.
        (cgen-bitset.lo): New target.
        * cgen-opc.c (cgen_bitset_create, cgen_bitset_init, cgen_bitset_clear)
        (cgen_bitset_add, cgen_bitset_set, cgen_bitset_contains)
        (cgen_bitset_compare, cgen_bitset_intersect_p, cgen_bitset_copy)
        (cgen_bitset_union): Moved from here ...
        * cgen-bitset.c: ... to here. New file.
        * Makefile.in: Regenerated.
        * configure: Regenerated.
 2005-12-02 20:09:42 +00:00
Jim Wilson
aa2273ba99 Fix 32-bit host/target --enable-targets=all build failure from Doug Evans. 
* ia64-gen.c (_opcode_int64_low, _opcode_int64_high,
opcode_fprintf_vma): New.
(print_main_table): New opcode_fprintf_vma instead of fprintf_vma.
 2005-11-23 04:58:37 +00:00
Alan Modra
ce7a772b48 * ppc-opc.c (powerpc_opcodes): Add frin,friz,frip,frim. Correct 
frsqrtes.
 2005-11-15 21:33:04 +00:00
Thiemo Seufer
0499d65b9b * mips.h: Assign 'm'/'M' codes to MIPS16e save/restore 
instructions.  Define MIPS16_ALL_ARGS and MIPS16_ALL_STATICS for
        save/restore encoding of the args field.

        * mips16-opc.c: Add MIPS16e save/restore opcodes.
        * mips-dis.c (print_mips16_insn_arg): Handle printing of 'm'/'M'
        codes for save/restore.

        * config/tc-mips.c (mips16_ip): Add handling of 'm' and 'M' codes
        for the MIPS16e save/restore instructions.

        * gas/mips/mips.exp: Run new save/restore tests.
        * gas/testsuite/gas/mips/mips16e-save.s: New test for generating
        different styles of save/restore instructions.
        * gas/testsuite/gas/mips/mips16e-save.d: New.
 2005-11-14 02:25:39 +00:00
Andreas Schwab
dc82c973b3 * m68k-dis.c (print_insn_m68k): Only match FPU insns with 
coprocessor ID 1.
 2005-11-10 14:32:28 +00:00
Nick Clifton
dbb33a874e * m32c-desc.c: Regenerated. 2005-11-08 16:16:47 +00:00
Nathan Sidwell
6f84a2a649 bfd: 
Add ms2.
	* archures.c (bfd_mach_ms2): Define.
	* cpu-ms1.c (arch_info_struct): Add ms2 stanza.
	* elf32-ms1.c (elf32_ms1_machine): Add ms2 case.
	(ms1_elf_merge_private_bfd_data): Remove unused variables.  Add
	correct merging logic, with workaround.
	(ms1_elf_print_private_bfd_data): Add ms2 case.
	* reloc.c (BFD_RELOC_MS1_PCINSN8): Add ms2 specific reloc.
	* libbfd.h: Regenerated.
	* bfd-in2.h: Regenerated.

cpu:
	Add ms2
	* ms1.cpu (ms2, ms2bf): New architecture variant, cpu, machine and
	model.
	(f-uu8, f-uu1, f-imm16l, f-loopo, f-cb1sel, f-cb2sel, f-cb1incr,
	f-cb2incr, f-rc3): New fields.
	(LOOP): New instruction.
	(JAL-HAZARD): New hazard.
	(imm16o, loopsize, imm16l, rc3, cb1sel, cb2sel, cb1incr, cb2incr):
	New operands.
	(mul, muli, dbnz, iflush): Enable for ms2
	(jal, reti): Has JAL-HAZARD.
	(ldctxt, ldfb, stfb): Only ms1.
	(fbcb): Only ms1,ms1-003.
	(wfbinc, mefbinc, wfbincr, mwfbincr, fbcbincs, mfbcbincs,
	fbcbincrs, mfbcbincrs): Enable for ms2.
	(loop, loopu, dfbc, dwfb, fbwfb, dfbr): New ms2 insns.
	* ms1.opc (parse_loopsize): New.
	(parse_imm16): hi16/lo16 relocs are applicable to IMM16L.
	(print_pcrel): New.

gas:
	Add ms2.
	* config/tc-ms1.c (ms1_mach_bitmask): Initialize to MS1.
	(ms1_architectures): Add ms2.
	(md_parse_option): Add ms2.
	(md_show_usage): Add ms2.
	(md_assemble): Add JAL_HAZARD detection logic.
	(md_cgen_lookup_reloc): Add MS1_OPERAND_LOOPSIZE case.
	* doc/c-ms1.texi: New.
	* doc/all.texi: Add MS1.
	* doc/Makefile.am (CPU_DOCS): Add c-ms1.texi.
	* doc/Makefile.in: Rebuilt.
	* doc/Makefile: Rebuilt.

gas/testsuite:
	Add ms2.
	* gas/ms1/allinsn.d: Adjust pcrel disassembly.
	* gas/ms1/errors.exp: Fix target triplet.
	* gas/ms1/ms1-16-003.d: Adjust pcrel disassembly.
	* gas/ms1/ms1-16-003.s: Tweak label.
	* gas/ms1/ms1.exp: Adjust target triplet.  Add ms2 test.
	* gas/ms1/ms2.d, gas/ms1/ms2.s: New.
	* gas/ms1/relocs.d: Adjust expected machine name and pcrel
	disassembly.
	* gas/ms1/relocs.exp: Adjust target triplet.

include:
	Add ms2.
	* elf/ms1.h (EF_MS1_CPU_MS2): New.


opcodes:
	Add ms2.
	* ms1-asm.c, ms1-desc.c, ms1-desc.h, ms1-dis.c, ms1-ibld.c,
	ms1-opc.c, ms1-opc.h: Regenerated.
 2005-11-08 11:15:13 +00:00
Steve Ellcey
a541e3cedd * configure: Regenerate after modifying bfd/warning.m4. 2005-11-07 22:21:48 +00:00
Alan Modra
3e7d61b225 * i386-dis.c (ckprefix): Handle rex on fwait. Don't print 
ignored rex prefixes here.
	(print_insn): Instead, handle them similarly to fwait followed
	by non-fp insns.
 2005-11-07 00:19:12 +00:00
H.J. Lu
a92e0d0a05 2005-11-02 H.J. Lu <hongjiu.lu@intel.com> 
* iq2000-desc.c: Regenerated.
	* iq2000-desc.h: Likewise.
	* iq2000-dis.c: Likewise.
	* iq2000-opc.c: Likewise.
 2005-11-02 16:58:31 +00:00
Paul Brook
36b0c57df5 2005-11-02 Paul Brook <paul@codesourcery.com> 
* arm-dis.c (print_insn_thumb32): Word align blx target address.
 2005-11-02 16:53:11 +00:00
Alan Modra
9a2ff3f50c * arm-dis.c (print_insn): Warning fix. 2005-10-31 06:10:33 +00:00
H.J. Lu
9e5169a8fa ld/ 
binutils/
opcodes/

2005-10-30  H.J. Lu  <hongjiu.lu@intel.com>

	* Makefile.am: Run "make dep-am".
	* Makefile.in: Regenerated.

	* dep-in.sed: Replace " ./" with " ".
 2005-10-30 17:40:28 +00:00
Dave Brolley
fb53f5a81a 2005-10-28 Dave Brolley <brolley@redhat.com> 
* All CGEN-generated sources: Regenerate.

        Contribute the following changes:
        2005-09-19  Dave Brolley  <brolley@redhat.com>

        * disassemble.c (disassemble_init_for_target): Add 'break' to case for
        bfd_arch_tic4x. Use cgen_bitset_create and cgen_bitset_set for
        bfd_arch_m32c case.

        2005-02-16  Dave Brolley  <brolley@redhat.com>

        * cgen-dis.in: Rename CGEN_ISA_MASK to CGEN_BITSET. Rename
        cgen_isa_mask_* to cgen_bitset_*.
        * cgen-opc.c: Likewise.

        2003-11-28  Richard Sandiford  <rsandifo@redhat.com>

        * cgen-dis.in (print_insn_@arch@): Fix comparison with cached isas.
        * *-dis.c: Regenerate.

        2003-06-05  DJ Delorie  <dj@redhat.com>

        * cgen-dis.in (print_insn_@arch@): Copy prev_isas, don't assign
        it, as it may point to a reused buffer. Set prev_isas when we
        change cpus.

        2002-12-13  Dave Brolley  <brolley@redhat.com>

        * cgen-opc.c (cgen_isa_mask_create): New support function for
        CGEN_ISA_MASK.
        (cgen_isa_mask_init): Ditto.
        (cgen_isa_mask_clear): Ditto.
        (cgen_isa_mask_add): Ditto.
        (cgen_isa_mask_set): Ditto.
        (cgen_isa_supported): Ditto.
        (cgen_isa_mask_compare): Ditto.
        (cgen_isa_mask_intersection): Ditto.
        (cgen_isa_mask_copy): Ditto.
        (cgen_isa_mask_combine): Ditto.
        * cgen-dis.in (libiberty.h): #include it.
        (isas): Renamed from 'isa' and now (CGEN_ISA_MASK *).
        (print_insn_@arch@): Use CGEN_ISA_MASK and support functions.
        * Makefile.am (CGENDEPS): Add utils-cgen.scm and attrs.scm.
        * Makefile.in: Regenerated.
 2005-10-28 19:49:22 +00:00
DJ Delorie
c6552317c1 * m32c.cpu (Imm-8-s4n, Imm-12-s4n): New. 
(arith-jnz16-imm4-dst-defn, arith-jnz32-imm4-dst-defn,
arith-jnz-imm4-dst-mach, arith-jnz-imm4-dst): Keep track of which
imm operand is needed.
(adjnz, sbjnz): Pass the right operands.
(unary-insn-defn, unary16-defn, unary32-defn, unary-insn-mach,
unary-insn): Add -g variants for opcodes that need to support :G.
(not.BW:G, push.BW:G): Call it.
(stzx16-imm8-imm8-dsp8sb, stzx16-imm8-imm8-dsp8fb,
stzx16-imm8-imm8-abs16): Fix operand typos.
* m32c.opc (m32c_asm_hash): Support bnCND.
(parse_signed4n, print_signed4n): New.

* m32c-asm.c: Regenerate.
* m32c-desc.c: Regenerate.
* m32c-desc.h: Regenerate.
* m32c-dis.c: Regenerate.
* m32c-ibld.c: Regenerate.
* m32c-opc.c: Regenerate.
* m32c-opc.h: Regenerate.
 2005-10-27 23:54:17 +00:00
DJ Delorie
f75eb1c004 * m32c.cpu (f-dsp-8-s24, Dsp-8-s24): New. 
(mov-dspsp-dst-defn, mov-src-dspsp-defn, mov16-dspsp-dst-defn,
mov16-src-dspsp-defn, mov32-dspsp-dst-defn, mov32-src-dspsp-defn):
dsp8[sp] is signed.
(mov.WL:S #imm,A0/A1): dsp24 is signed (i.e. -0x800000..0xffffff).
(mov.BW:S r0,r1): Fix typo r1l->r1.
(tst): Allow :G suffix.
* m32c.opc (parse_signed24): New, for -0x800000..0xffffff.

* m32c-asm.c: Regenerate.
* m32c-desc.c: Regenerate.
* m32c-desc.h: Regenerate.
* m32c-dis.c: Regenerate.
* m32c-ibld.c: Regenerate.
* m32c-opc.c: Regenerate.
* m32c-opc.h: Regenerate.
 2005-10-26 14:59:12 +00:00
Paul Brook
f1022c90ad 2005-10-26 Paul Brook <paul@codesourcery.com> 
gas/
	* config/tc-arm.c (insns): Correct "sel" entry.
gas/testsuite/
	* gas/arm/archv6.d: Adjust expected output.
opcodes/
	* arm-dis.c (arm_opcodes): Correct "sel" entry.
 2005-10-26 14:09:29 +00:00
Alan Modra
e277c00b2d * m32r.opc (parse_hi16): Do not assume a 32-bit host word size. 2005-10-26 07:49:05 +00:00
DJ Delorie
92e0a9414c * m32c.cpu (add16-bQ-sp,add16-wQ-sp): Fix to allow either width by 
making one a macro of the other.

* m32c-asm.c: Regenerate.
* m32c-desc.c: Regenerate.
* m32c-desc.h: Regenerate.
* m32c-dis.c: Regenerate.
* m32c-ibld.c: Regenerate.
* m32c-opc.c: Regenerate.
* m32c-opc.h: Regenerate.
 2005-10-25 18:52:02 +00:00
Nick Clifton
3c9b82baee Add support for the Z80 processor family 2005-10-25 17:40:19 +00:00
Alan Modra
3caac5b897 Regenerate 2005-10-25 02:20:17 +00:00
Jan Beulich
6a2375c6b2 include/opcode/ 
2005-10-24  Jan Beulich  <jbeulich@novell.com>

	* ia64.h (enum ia64_opnd): Move memory operand out of set of
	indirect operands.

bfd/
2005-10-24  Jan Beulich  <jbeulich@novell.com>

	* cpu-ia64-opc.c (elf64_ia64_operands): Move memory operand out of
	set of indirect operands.

gas/
2005-10-24  Jan Beulich  <jbeulich@novell.com>

	* config/tc-ia64.c (enum reg_symbol): Delete IND_MEM.
	(dot_rot): Change type of num_* variables. Check for positive count.
	(ia64_optimize_expr): Re-structure.
	(md_operand): Check for general register.

gas/testsuite/
2005-10-24  Jan Beulich  <jbeulich@novell.com>

	* gas/ia64/index.[sl]: New.
	* gas/ia64/rotX.[sl]: New.
	* gas/ia64/ia64.exp: Run new tests.

opcodes/
2005-10-24  Jan Beulich  <jbeulich@novell.com>

	* ia64-asmtab.c: Regenerate.
 2005-10-24 07:42:50 +00:00
DJ Delorie
a1a280bb84 [cpu] 
* m32c.cpu (lde, ste): Add dsp[a0] and [a1a] addressing.
(indexb, indexbd, indexbs, indexw, indexwd, indexws, indexl,
indexld, indexls): .w variants have `1' bit.
(rot32.b): QI, not SI.
(rot32.w): HI, not SI.
(xchg16): HI for .w variant.

[opcodes]
* m32c-asm.c: Regenerate.
* m32c-desc.c: Regenerate.
* m32c-desc.h: Regenerate.
* m32c-dis.c: Regenerate.
* m32c-ibld.c: Regenerate.
* m32c-opc.c: Regenerate.
* m32c-opc.h: Regenerate.
 2005-10-22 00:03:13 +00:00
Nick Clifton
b7d4853035 bfin-dis.c: Tidy up code, removing redundant constructs. 2005-10-21 16:28:18 +00:00
Martin Schwidefsky
8dd744b6c0 * s390-opc.txt: Add unnormalized hfp multiply and multiply-and-add 
instructions.
 2005-10-19 15:05:10 +00:00
Nick Clifton
e74eb924c2 * m32r.opc (parse_slo16): Fix bad application of previous patch. 2005-10-19 14:44:17 +00:00
Jie Zhang
471e4e36fc * bfin-dis.c (print_insn_bfin): Do proper endian transform when 
reading instruction from memory.
 2005-10-18 16:39:41 +00:00
Nick Clifton
5e03663f3d m32r.opc (parse_slo16): Better version of previous patch. 2005-10-18 07:53:17 +00:00
Nick Clifton
ab7c9a26e5 m32r.opc (parse_slo16): Do not assume a 32-bit host word size. 2005-10-14 08:33:27 +00:00
Richard Earnshaw
19590ef7f6 2005-10-08 James Lemke <jim@wasabisystems.com> 
* arm-dis.c (coprocessor_opcodes): Fix mask for various Maverick CDP
	operations.
 2005-10-08 14:52:07 +00:00
Daniel Jacobowitz
6edfbbad08 bfd/ 
* elf32-arm.c (elf32_arm_check_relocs): Avoid aliasing warnings from
	GCC.
	(elf32_arm_size_dynamic_sections): Likewise.
	* ecofflink.c (bfd_ecoff_debug_one_external): Likewise.
	* elf32-hppa.c (elf32_hppa_check_relocs): Likewise.
	* elf32-m32r.c (m32r_elf_check_relocs): Likewise.
	* elf32-m68k.c (elf_m68k_check_relocs): Likewise.
	* elf32-ppc.c (ppc_elf_check_relocs): Likewise.
	* elf32-s390.c (elf_s390_check_relocs): Likewise.
	(elf_s390_size_dynamic_sections): Likewise.
	* elf32-sh.c (sh_elf_check_relocs): Likewise.
	* elf64-ppc.c (ppc64_elf_check_relocs, dec_dynrel_count)
	(ppc64_elf_size_dynamic_sections): Likewise.
	* elf64-s390.c (elf_s390_check_relocs): Likewise.
	(elf_s390_size_dynamic_sections): Likewise.
	* elfxx-mips.c (_bfd_mips_elf_finish_dynamic_sections): Likewise.
	* elfxx-sparc.c (_bfd_sparc_elf_check_relocs): Likewise.
	(_bfd_sparc_elf_size_dynamic_sections): Likewise.
	* ieee.c (ieee_slurp_section_data): Likewise.
	* oasys.c (oasys_slurp_section_data): Likewise.
opcodes/
	* ppc-dis.c (struct dis_private): Remove.
	(powerpc_dialect): Avoid aliasing warnings.
	(print_insn_big_powerpc, print_insn_little_powerpc): Likewise.
 2005-10-06 19:21:14 +00:00
Nick Clifton
095f284399 oops - delayed commit for addtion of Irish translation for gprof and opcodes 2005-10-03 10:52:38 +00:00
H.J. Lu
fdd3b9b33b 2005-09-30 H.J. Lu <hongjiu.lu@intel.com> 
* Makefile.am: Run "make dep-am".
	* Makefile.in: Regenerated.
	* aclocal.m4: Likewise.
	* configure: Likewise.
 2005-09-30 18:05:59 +00:00
Catherine Moore
4b7f6baa0b * Makefile.am: Bfin support. 
* Makefile.in: Regenerated.
	* aclocal.m4: Regenerated.
	* bfin-dis.c: New file.
	* configure.in: Bfin support.
	* configure: Regenerated.
	* disassemble.c (ARCH_bfin): Define.
	(disassembler): Add case for bfd_arch_bfin.
 2005-09-30 15:28:52 +00:00
Jan Beulich
1a114b1284 gas/testsuite/ 
2005-09-28  Jan Beulich  <jbeulich@novell.com>

	* gas/i386/x86-64-stack.s, gas/i386/x86-64-stack.d,
	gas/i386/x86-64-stack-suffix.d, gas/i386/x86-64-stack-intel.d: New.
	* gas/i386/i386.exp: Run new tests.

ld/testsuite/
2005-09-28  Jan Beulich  <jbeulich@novell.com>

	* ld-x86-64/tlspic.dd: Adjust.

opcodes/
2005-09-28  Jan Beulich  <jbeulich@novell.com>

	* i386-dis.c (stack_v_mode): Renamed from branch_v_mode.
	(indirEv): Use it.
	(stackEv): New.
	(Ob64, Ov64): Rename to Ob, Ov. Delete unused original definitions.
	(dis386): Document and use new 'V' meta character. Use it for
	single-byte push/pop opcode forms. Use stackEv for mod-r/m push/pop
	opcode forms. Correct typo in 'pop ss'. Replace Ob64/Ov64 by Ob/Ov.
	(putop): 'q' suffix for 'T' and 'U' meta depends on DFLAG. Mark
	data prefix as used whenever DFLAG was examined. Handle 'V'.
	(intel_operand_size): Use stack_v_mode.
	(OP_E): Use stack_v_mode, but handle only the special case of
	64-bit mode without operand size override here; fall through to
	v_mode case otherwise.
	(OP_REG): Special case rAX_reg ... rDI_reg only when 64-bit mode
	and no operand size override is present.
	(OP_J): Use get32s for obtaining the displacement also when rex64
	is present.
 2005-09-28 15:34:53 +00:00
Paul Brook
3eb17e6bd2 2005-09-08 Paul Brook <paul@codesourcery.com> 
bfd/
	* reloc.c: Rename BFD_RELOC_ARM_SMI to BFD_RELOC_ARM_SMC.
	* bfd-in2.h: Regenerate.
	* libbfd.h: Regenerate.
opcodes/
	* arm-dis.c (arm_opcodes, thumb32_opcodes): Rename smi to smc.
gas/
	* config/tc-arm.c (do_smi, do_t_smi): Rename ...
	(do_smc, do_t_smc): ... to this.
	(insns): Remane smi to smc.
	(md_apply_fix, tc_gen_reloc): Rename BFD_RELOC_ARM_SMI to
	BFD_RELOC_ARM_SMC.
gas/testsuite/
	* gas/arm/arch6zk.d: Rename smi to smc.
	* gas/arm/arch6zk.s: Ditto.
	* gas/arm/thumb32.d: Ditto.
	* gas/arm/thumb32.s: Ditto.
 2005-09-08 12:49:27 +00:00
Chao-ying Fu
61cc026711 * mips-opc.c (MT32): New define. 
(mips_builtin_opcodes): Move "bc0f", "bc0fl", "bc0t", "bc0tl" to the
bottom to avoid opcode collision with "mftr" and "mttr".
Add MT instructions.
* mips-dis.c (mips_arch_choices): Enable INSN_MT for mips32r2.
(print_insn_args): Add supports for +t, +T, !, $, *, &, g operand
formats.
 2005-09-06 18:46:57 +00:00
Paul Brook
b13dd07a55 2005-09-02 Paul Brook <paul@codesourcery.com> 
* arm-dis.c (coprocessor_opcodes): Add null terminator.
 2005-09-02 14:54:27 +00:00
Paul Brook
8f06b2d82f 2005-09-02 Paul Brook <paul@codesourcery.com> 
bfd/
	* libbdf.h: Regenerate.
	* bfd-in2.h: Regenerate.
	* reloc.c: Add BFD_RELOC_ARM_T32_CP_OFF_IMM and
	BFD_RELOC_ARM_T32_CP_OFF_IMM_S2.
gas/
	* config/tc-arm.c (encode_arm_cp_address): Use
	BFD_RELOC_ARM_T32_CP_OFF_IMM in thumb mode.
	(do_iwmmxt_wldstbh): Use BFD_RELOC_ARM_T32_CP_OFF_IMM_S2 in thumb
	mode.
	(md_assemble): Only allow coprocessor instructions when Thumb-2 is
	available.
	(cCE, cC3): Define.
	(insns): Use them for coprocessor instructions.
	(md_pcrel_from_section): Handle BFD_RELOC_ARM_T32_CP_OFF_IMM.
	(get_thumb32_insn): New function.
	(put_thumb32_insn): New function.
	(md_apply_fix): Handle BFD_RELOC_ARM_T32_CP_OFF_IMM and
	BFD_RELOC_ARM_T32_CP_OFF_IMM_S2.
gas/testsuite/
	* gas/arm/vfp-bad_t2.d, gas/arm/vfp-bad_t2.l, arm/vfp-bad_t2.s,
	gas/arm/vfp1_t2.d, gas/arm/vfp1_t2.s, gas/arm/vfp1xD_t2.d,
	gas/arm/vfp1xD_t2.s, gas/arm/vfp2_t2.d, gas/arm/vfp2_t2.s): New files.
opcodes/
	* arm-dis.c (coprocessor_opcodes): New.
	(arm_opcodes, thumb32_opcodes): Remove coprocessor insns.
	(print_insn_coprocessor): New function.
	(print_insn_arm): Use print_insn_coprocessor.  Remove coprocessor
	format characters.
	(print_insn_thumb32): Use print_insn_coprocessor.
 2005-09-02 13:12:45 +00:00