Commit Graph

2706 Commits

Author SHA1 Message Date
H.J. Lu
5a767724d7 elf: Add GNU_PROPERTY_UINT32_AND_XXX/GNU_PROPERTY_UINT32_OR_XXX
Implement GNU_PROPERTY_UINT32_AND_XXX/GNU_PROPERTY_UINT32_OR_XXX:

https://sourceware.org/pipermail/gnu-gabi/2021q1/000467.html

1. GNU_PROPERTY_UINT32_AND_LO..GNU_PROPERTY_UINT32_AND_HI

 #define GNU_PROPERTY_UINT32_AND_LO 0xb0000000
 #define GNU_PROPERTY_UINT32_AND_HI 0xb0007fff

A bit in the output pr_data field is set only if it is set in all
relocatable input pr_data fields.  If all bits in the the output
pr_data field are zero, this property should be removed from output.

If the bit is 1, all input relocatables have the feature.  If the
bit is 0 or the property is missing, the info is unknown.

2. GNU_PROPERTY_UINT32_OR_LO..GNU_PROPERTY_UINT32_OR_HI

 #define GNU_PROPERTY_UINT32_OR_LO 0xb0008000
 #define GNU_PROPERTY_UINT32_OR_HI 0xb000ffff

A bit in the output pr_data field is set if it is set in any
relocatable input pr_data fields. If all bits in the the output
pr_data field are zero, this property should be removed from output.

If the bit is 1, some input relocatables have the feature.  If the
bit is 0 or the property is missing, the info is unknown.

bfd/

	* elf-properties.c (_bfd_elf_parse_gnu_properties): Handle
	GNU_PROPERTY_UINT32_AND_LO, GNU_PROPERTY_UINT32_AND_HI,
	GNU_PROPERTY_UINT32_OR_LO and GNU_PROPERTY_UINT32_OR_HI.
	(elf_merge_gnu_properties): Likewise.

binutils/

	* readelf.c (print_gnu_property_note): Handle
	GNU_PROPERTY_UINT32_AND_LO, GNU_PROPERTY_UINT32_AND_HI,
	GNU_PROPERTY_UINT32_OR_LO and GNU_PROPERTY_UINT32_OR_HI.

include/

	* elf/common.h (GNU_PROPERTY_UINT32_AND_LO): New.
	(GNU_PROPERTY_UINT32_AND_HI): Likewise.
	(GNU_PROPERTY_UINT32_OR_LO): Likewise.
	(GNU_PROPERTY_UINT32_OR_HI): Likewise.

ld/

	* testsuite/ld-elf/property-and-1.d: New file.
	* testsuite/ld-elf/property-and-1.s: Likewise.
	* testsuite/ld-elf/property-and-2.d: Likewise.
	* testsuite/ld-elf/property-and-2.s: Likewise.
	* testsuite/ld-elf/property-and-3.d: Likewise.
	* testsuite/ld-elf/property-and-3.s: Likewise.
	* testsuite/ld-elf/property-and-4.d: Likewise.
	* testsuite/ld-elf/property-and-empty.s: Likewise.
	* testsuite/ld-elf/property-or-1.d: Likewise.
	* testsuite/ld-elf/property-or-1.s: Likewise.
	* testsuite/ld-elf/property-or-2.d: Likewise.
	* testsuite/ld-elf/property-or-2.s: Likewise.
	* testsuite/ld-elf/property-or-3.d: Likewise.
	* testsuite/ld-elf/property-or-3.s: Likewise.
	* testsuite/ld-elf/property-or-4.d: Likewise.
	* testsuite/ld-elf/property-or-empty.s: Likewise.
2021-06-18 07:19:01 -07:00
Nick Clifton
c8795e1f2f Allow readelf to recognise GO buildid notes.
binutils * readelf.c (get_note_type): Add support for NT_GO_BUILDID.

include	 * elf/common.h (NT_GO_BUILDID): Define.
2021-06-15 11:43:43 +01:00
Shahab Vahedi
8f46711443 arc: Construct disassembler options dynamically
The idea of this change is simple: Populate a data structure, namely
"disasm_option_and_arg_t" from "include/dis-asm.h", to encompass the
disassembly options and their possible arguments.

This will make it easier to manage or extend those options by adapting
entries in a data structure, "arc_options".  There will be lesser need
to hard-code the options in the code itself.  Moreover, ARC GDB will
use this population function, "disassembler_options_arc ()", to enable
the "set disassembler-option" for ARC targets.  The gdb change will be
in a separate patch though.

The changes in this patch can be divided into:

1) Introduction of "disassembler_options_arc ()" that will return a
"disasm_option_and_arg_t" structure representing the disassembly
options and their likely arguments.

2) New data type "arc_options_arg_t" and new data "arc_options".
These are the internals for keeping track of options and arguments
entries that can easily be extended.

3) To print the options, the "print_arc_disassembler_options ()" has
been adjusted to use this dynamically built structure instead of having
them hard-coded inside.

To see this in effect, one can look into the output of:
$ ./binutils/objdump --help
  ...
  The following ARC specific disassembler options are...
  ...

include/ChangeLog:

	* dis-asm.h (disassembler_options_arc): New prototype.

opcodes/ChangeLog:

	* arc-dis.c (arc_option_arg_t): New enumeration.
	(arc_options): New variable.
	(disassembler_options_arc): New function.
	(print_arc_disassembler_options): Reimplement in terms of
	"disassembler_options_arc".
2021-06-02 15:32:58 +03:00
Maciej W. Rozycki
21629cf8bc MIPS/opcodes: Properly handle ISA exclusion
Remove the hack used for MIPSr6 ISA exclusion from `cpu_is_member' and
handle the exclusion for any ISA levels properly in `opcode_is_member'.
Flatten the structure of the `if' statements there.  No functional
change for the existing opcode tables.

	include/
	* opcode/mips.h (cpu_is_member): Remove code for MIPSr6 ISA
	exclusion.
	(opcode_is_member): Handle ISA level exclusion.
2021-05-29 03:26:32 +02:00
Maciej W. Rozycki
b1458c4569 MIPS/opcodes: Factor out ISA matching against flags
In preparation for the next change factor out code for ISA matching
against instruction flags used in MIPS opcode tables, similarly to how
CPU matching is already done.  No functional change, though for clarity
split the single `if' statement into multiple ones and use temporaries
rather than repeated expressions.

	include/
	* opcode/mips.h (isa_is_member): New inline function, factored
	out from...
	(opcode_is_member): ... here.
2021-05-29 03:26:32 +02:00
Maciej W. Rozycki
9204ccd4b1 MIPS/opcodes: Do not use CP0 register names for control registers
The CP0 control register set has never been defined, however encodings
for the CFC0 and CTC0 instructions remained available for implementers
up until the MIPS32 ISA declared them invalid and causing the Reserved
Instruction exception[1].  Therefore we handle them for both assembly
and disassembly, however in the latter case the names of CP0 registers
from the regular set are incorrectly printed if named registers are
requested.  This is because we do not define separate operand classes
for coprocessor regular and control registers respectively, which means
the disassembler has no way to tell the two cases apart.  Consequently
nonsensical disassembly is produced like:

	cfc0	v0,c0_random

Later the MIPSr5 ISA reused the encodings for XPA ASE MFHC0 and MTHC0
instructions[2] although it failed to document them in the relevant
opcode table until MIPSr6 only.

Correct the issue then by defining a new register class, OP_REG_CONTROL,
and corresponding operand codes, `g' and `y' for the two positions in
the machine instruction a control register operand can take.  Adjust the
test cases affected accordingly.

While at it swap the regular MIPS opcode table "cfc0" and "ctc0" entries
with each other so that they come in the alphabetical order.

References:

[1] "MIPS32 Architecture For Programmers, Volume II: The MIPS32
    Instruction Set", MIPS Technologies, Inc., Document Number: MD00086,
    Revision 1.00, August 29, 2002, Table A-9 "MIPS32 COP0 Encoding of
    rs Field", p. 242

[2] "MIPS Architecture For Programmers, Volume II-A: The MIPS32
    Instruction Set", MIPS Technologies, Inc., Document Number: MD00086,
    Revision 5.04, December 11, 2013, Section 3.2 "Alphabetical List of
    Instructions", pp. 195, 216

	include/
	* opcode/mips.h: Document `g' and `y' operand codes.
	(mips_reg_operand_type): Add OP_REG_CONTROL enumeration
	constant.

	gas/
	* tc-mips.c (convert_reg_type) <OP_REG_CONTROL>: New case.
	(macro) <M_TRUNCWS, M_TRUNCWD>: Use the `g' rather than `G'
	operand code.

	opcodes/
	* mips-dis.c (print_reg) <OP_REG_COPRO>: Move control register
	handling code over to...
	<OP_REG_CONTROL>: ... this new case.
	* mips-opc.c (decode_mips_operand) <'g', 'y'>: New cases.
	(mips_builtin_opcodes): Update "cfc1", "ctc1", "cttc1", "cttc2",
	"cfc0", "ctc0", "cfc2", "ctc2", "cfc3", and "ctc3" entries
	replacing the `G' operand code with `g'.  Update "cftc1" and
	"cftc2" entries replacing the `E' operand code with `y'.
	* micromips-opc.c (decode_micromips_operand) <'g'>: New case.
	(micromips_opcodes): Update "cfc1", "cfc2", "ctc1", and "ctc2"
	entries replacing the `G' operand code with `g'.

	binutils/
	* testsuite/binutils-all/mips/mips-xpa-virt-1.d: Correct CFC0
	operand disassembly.
	* testsuite/binutils-all/mips/mips-xpa-virt-3.d: Likewise.
2021-05-29 03:26:32 +02:00
Maciej W. Rozycki
cccc84faff MIPS/opcodes: Free up redundant `g' operand code
In the operand handling rewrite made for the MIPS disassembler with
commit ab90248154 ("Add structures to describe MIPS operands"),
<https://sourceware.org/ml/binutils/2013-07/msg00135.html>, the `g'
operand code has become redundant for the regular MIPS instruction set
by duplicating the OP_REG_COPRO semantics of the `G' operand code.

Later commit 351cdf24d2 ("Implement O32 FPXX, FP64 and FP64A ABI
extensions") converted the CTTC1 instruction from the `g' to the `G'
operand code, but still left a few instructions behind.

Convert the three remaining instructions still using the `g' code then,
namely: CTTC2, MTTC2 and MTTHC2, and remove all traces of the operand
code, freeing it up for other use.

	opcodes/
	* mips-opc.c (mips_builtin_opcodes): Switch "cttc2", "mttc2",
	and "mtthc2" to using the `G' rather than `g' operand code for
	the coprocessor control register referred.

	include/
	* opcode/mips.h: Complement change made to opcodes and remove
	references to the `g' regular MIPS ISA operand code.
2021-05-29 03:26:32 +02:00
H.J. Lu
1273b2f8ac x86: Restore PC16 relocation overflow check
The x86-64 psABI has

---
A program or object file using R_X86_64_8, R_X86_64_16, R_X86_64_PC16
or R_X86_64_PC8 relocations is not conformant to this ABI, these
relocations are only added for documentation purposes.
---

Since x86 PC16 relocations have been used for 16-bit programs in an ELF32
or ELF64 container, PC16 relocation should wrap-around in 16-bit address
space.  Revert

commit a7664973b2
Author: Jan Beulich <jbeulich@suse.com>
Date:   Mon Apr 26 10:41:35 2021 +0200

    x86: correct overflow checking for 16-bit PC-relative relocs

and xfail the related tests.  Also revert

commit 50c95a739c
Author: H.J. Lu <hjl.tools@gmail.com>
Date:   Wed May 26 12:13:13 2021 -0700

    x86: Propery check PC16 reloc overflow in 16-bit mode instructions

while keeping PR ld/27905 tests for PC16 relocation in 16-bit programs.

bfd/

	PR ld/27905
	* elf32-i386.c: Don't include "libiberty.h".
	(elf_howto_table): Revert commits a7664973b2 and 50c95a739c.
	(elf_i386_rtype_to_howto): Revert commit 50c95a739c.
	(elf_i386_info_to_howto_rel): Likewise.
	(elf_i386_tls_transition): Likewise.
	(elf_i386_relocate_section): Likewise.
	* elf64-x86-64.c (x86_64_elf_howto_table): Revert commits
	a7664973b2 and 50c95a739c.
	(elf_x86_64_rtype_to_howto): Revert commit 50c95a739c.
	* elfxx-x86.c (_bfd_x86_elf_parse_gnu_properties): Likewise.
	* elfxx-x86.h (elf_x86_obj_tdata): Likewise.
	(elf_x86_has_code16): Likewise.

binutils/

	PR ld/27905
	* readelf.c (decode_x86_feature_2): Revert commit 50c95a739c.

gas/

	PR ld/27905
	* config/tc-i386.c (set_code_flag): Revert commit 50c95a739c.
	(set_16bit_gcc_code_flag): Likewise.
	(x86_cleanup): Likewise.
	* testsuite/gas/i386/code16-2.d: Updated.
	* testsuite/gas/i386/x86-64-code16-2.d: Likewise.

include/

	PR ld/27905
	* elf/common.h (GNU_PROPERTY_X86_FEATURE_2_CODE16): Removed.

ld/

	PR ld/27905
	* testsuite/ld-i386/pcrel16-2.d: xfail.
	* testsuite/ld-x86-64/pcrel16-2.d: Likewise.
2021-05-28 09:34:28 -07:00
H.J. Lu
50c95a739c x86: Propery check PC16 reloc overflow in 16-bit mode instructions
commit a7664973b2
Author: Jan Beulich <jbeulich@suse.com>
Date:   Mon Apr 26 10:41:35 2021 +0200

    x86: correct overflow checking for 16-bit PC-relative relocs

caused linker failure when building 16-bit program in a 32-bit ELF
container.  Update GNU_PROPERTY_X86_FEATURE_2_USED with

 #define GNU_PROPERTY_X86_FEATURE_2_CODE16 (1U << 12)

to indicate that 16-bit mode instructions are used in the input object:

https://groups.google.com/g/x86-64-abi/c/UvvXWeHIGMA

to indicate that 16-bit mode instructions are used in the object to
allow linker to properly perform relocation overflow check for 16-bit
PC-relative relocations in 16-bit mode instructions.

1. Update x86 assembler to always generate the GNU property note with
GNU_PROPERTY_X86_FEATURE_2_CODE16 for .code16 in ELF object.
2. Update i386 and x86-64 linkers to use 16-bit PC16 relocations if
input object is marked with GNU_PROPERTY_X86_FEATURE_2_CODE16.

bfd/

	PR ld/27905
	* elf32-i386.c: Include "libiberty.h".
	(elf_howto_table): Add 16-bit R_386_PC16 entry.
	(elf_i386_rtype_to_howto): Add a BFD argument.  Use 16-bit
	R_386_PC16 if input has 16-bit mode instructions.
	(elf_i386_info_to_howto_rel): Update elf_i386_rtype_to_howto
	call.
	(elf_i386_tls_transition): Likewise.
	(elf_i386_relocate_section): Likewise.
	* elf64-x86-64.c (x86_64_elf_howto_table): Add 16-bit
	R_X86_64_PC16 entry.
	(elf_x86_64_rtype_to_howto): Use 16-bit R_X86_64_PC16 if input
	has 16-bit mode instructions.
	* elfxx-x86.c (_bfd_x86_elf_parse_gnu_properties): Set
	elf_x86_has_code16 if relocatable input is marked with
	GNU_PROPERTY_X86_FEATURE_2_CODE16.
	* elfxx-x86.h (elf_x86_obj_tdata): Add has_code16.
	(elf_x86_has_code16): New.

binutils/

	PR ld/27905
	* readelf.c (decode_x86_feature_2): Support
	GNU_PROPERTY_X86_FEATURE_2_CODE16.

gas/

	PR ld/27905
	* config/tc-i386.c (set_code_flag): Update x86_feature_2_used
	with GNU_PROPERTY_X86_FEATURE_2_CODE16 for .code16 in ELF
	object.
	(set_16bit_gcc_code_flag): Likewise.
	(x86_cleanup): Always generate the GNU property note if
	x86_feature_2_used isn't 0.
	* testsuite/gas/i386/code16-2.d: New file.
	* testsuite/gas/i386/code16-2.s: Likewise.
	* testsuite/gas/i386/x86-64-code16-2.d: Likewise.
	* testsuite/gas/i386/i386.exp: Run code16-2 and x86-64-code16-2.

include/

	PR ld/27905
	* elf/common.h (GNU_PROPERTY_X86_FEATURE_2_CODE16): New.

ld/

	PR ld/27905
	* testsuite/ld-i386/code16.d: New file.
	* testsuite/ld-i386/code16.t: Likewise.
	* testsuite/ld-x86-64/code16.d: Likewise.
	* testsuite/ld-x86-64/code16.t: Likewise.
	* testsuite/ld-i386/i386.exp: Run code16.
	* testsuite/ld-x86-64/x86-64.exp: Likewise.
2021-05-26 12:13:24 -07:00
Chenghua Xu
01a8c731aa elf: Use official name LoongArch for EM_LOONGARCH.
The official name for Loongson Architecture is LoongArch, it is better
to use LoongArch instead of Loongson Loongarch for EM_LOONGARCH to avoid
confusion and keep consistent with the various of software in the future.

The official documentation in Chinese:
http://www.loongson.cn/uploadfile/cpu/LoongArch.pdf

The translated version in English:
https://loongson.github.io/LoongArch-Documentation/

    binutils/
        * readelf.c (get_machine_name): Change Loongson Loongarch to
	LoongArch.

    include/
        * elf/common.h (EM_LOONGARCH): Change Loongson Loongarch to
	LoongArch.
2021-05-23 10:35:48 +08:00
Luis Machado
894982bfcc [AArch64] MTE corefile support
bfd	* elf.c (elfcore_make_memtag_note_section): New function.
	(elfcore_grok_note): Handle NT_MEMTAG note types.

binutils* readelf.c (get_note_type): Handle NT_MEMTAG note types.

include	* elf/common.h (NT_MEMTAG): New constant.
	(NT_MEMTAG_TYPE_AARCH_MTE): New constant.
2021-05-21 10:40:32 +01:00
Mike Frysinger
2fbe9507bf sim: callback: convert FS interfaces to 64-bit
Rather than rely on off_t being the right size between the host &
target, have the interface always be 64-bit.  We can figure out if
we need to truncate when actually outputting it to the right target.
2021-05-14 21:16:40 -04:00
Mike Frysinger
00330cd18a sim: callback: convert time interface to 64-bit
PR sim/27705
Rather than rely on time_t being the right size between the host &
target, have the interface always be 64-bit.  We can figure out if
we need to truncate when actually outputting it to the right target.
2021-05-14 21:05:36 -04:00
Mike Frysinger
64654371d6 sim: callback: inline PTR define
We require C11 now, so no need for these pre-ANSI C hacks.
PTR is simply void*, so use that directly.
2021-05-14 01:23:06 -04:00
Mike Frysinger
7fb6dc36bb sim: callback: use ATTRIBUTE_NORETURN
This define is handled by ansidecl.h, so no need to duplicate effort.
2021-05-14 01:06:53 -04:00
Mike Frysinger
2e4885ee8f sim: callback: always include necessary headers
We use types from these headers, so always include them.
2021-05-14 00:53:56 -04:00
Mike Frysinger
df68e12b3b sim: create header namespace
The gdb/callback.h & gdb/remote-sim.h headers have nothing to do with
gdb and are really definitions for the libsim API under the sim/ tree.
While gdb uses those headers as a client, it's not specific to it.  So
create a new sim/ namespace and move the headers there.
2021-05-14 00:41:05 -04:00
Cl?ment Chigot
97834047e1 Fix .dwsect generation for XCOFF. Handle .function generated with DWARF on XCOFF.
gas	* config/tc-ppc.c (ppc_function): Update comment for
	fifth argument.
	(ppc_frob_symbol): Remove ppc_last_function check.
	Make sure coff_last_function is reset.
	Correctly set fsize when not provided in .function.
	* testsuite/gas/ppc/aix.exp: New tests.
	* testsuite/gas/ppc/xcoff-function-1-32.d: New test.
	* testsuite/gas/ppc/xcoff-function-1-64.d: New test.
	* testsuite/gas/ppc/xcoff-function-1.s: New test.

bfd	* coff-rs6000.c (xcoff_dwsect_names): Add new DWARF
	sections.
	* coffgen.c (coff_pointerize_aux): Handle C_DWARF.
	(coff_print_symbol): Likewise.
	* libxcoff.h (XCOFF_DWSECT_NBR_NAMES): Update.

gas	* config/obj-coff.c (coff_frob_symbol): Don't skip C_DWARF.
	(coff_adjust_section_syms): Use corrext auxent for C_DWARF.
	(coff_frob_section): Likewise.
	* config/obj-coff.h (SA_GET_SECT_SCNLEN,
	SA_GET_SECT_NRELOC, SA_SET_SECT_SCNLEN,
	SA_SET_SECT_NRELOC) New defines.
	(SET_SECTION_RELOCS): Adjust for C_DWARF.
	* config/tc-ppc.c (ppc_frob_symbol): Don't skip C_DWARF.
	(ppc_adjust_symtab): Reorder C_DWARF symbols.
	* testsuite/gas/ppc/aix.exp: New tests.
	* testsuite/gas/ppc/xcoff-dwsect-2-32.d: New test.
	* testsuite/gas/ppc/xcoff-dwsect-2-64.d: New test.
	* testsuite/gas/ppc/xcoff-dwsect-2.s: New test.

include	* coff/internal.h (C_DWARF): New define.
	* coff/xcoff.h (SSUBTYP_DWLOC, SSUBTYP_DWFRAME,
	SSUBTYP_DWMAC): New defines.
2021-05-07 15:29:49 +01:00
Tom Tromey
c759c777c9 libiberty: add htab_eq_string
The libiberty hash table includes a helper function for strings, but
no equality function.  Consequently, this equality function has been
reimplemented a number of times in both the gcc and binutils-gdb
source trees.  This patch adds the function to the libiberty hash
table, as a step toward the goal of removing all the copies.

One change to gcc is included here.  Normally I would have put this in
the next patch, but gensupport.c used the most natural name for its
reimplementation of this function, and this can't coexist with the
extern function in libiberty.

include

	* hashtab.h (htab_eq_string): Declare.

libiberty

	* hashtab.c (htab_eq_string): New function.
2021-05-07 11:17:11 +01:00
Stafford Horne
0b3e14c902 or1k: Implement relocation R_OR1K_GOT_AHI16 for gotha()
The gotha() relocation mnemonic will be outputted by OpenRISC GCC when
using the -mcmodel=large option.  This relocation is used along with
got() to generate 32-bit GOT offsets.  This increases the previous GOT
offset limit from the previous 16-bit (64K) limit.

This is needed on large binaries where the GOT grows larger than 64k.

bfd/ChangeLog:

	PR 21464
	* bfd-in2.h: Add BFD_RELOC_OR1K_GOT_AHI16 relocation.
	* elf32-or1k.c (or1k_elf_howto_table, or1k_reloc_map): Likewise.
	(or1k_final_link_relocate, or1k_elf_relocate_section,
	or1k_elf_check_relocs): Likewise.
	* libbfd.h (bfd_reloc_code_real_names): Likewise.
	* reloc.c: Likewise.

cpu/ChangeLog:

	PR 21464
	* or1k.opc (or1k_imm16_relocs, parse_reloc): Define parse logic
	for gotha() relocation.

include/ChangeLog:

	PR 21464
	* elf/or1k.h (elf_or1k_reloc_type): Define R_OR1K_GOT_AHI16 number.

opcodes/ChangeLog:

	PR 21464
	* or1k-asm.c: Regenerate.

gas/ChangeLog:

	PR 21464
	* testsuite/gas/or1k/reloc-1.s: Add test for new relocation.
	* testsuite/gas/or1k/reloc-1.d: Add test result for new
	relocation.

Cc: Giulio Benetti <giulio.benetti@benettiengineering.com>

fixup reloc, add tests
2021-05-06 20:51:24 +09:00
Nick Alcock
49da556c65 libctf, include: support an alternative encoding for nonrepresentable types
Before now, types that could not be encoded in CTF were represented as
references to type ID 0, which does not itself appear in the
dictionary. This choice is annoying in several ways, principally that it
forces generators and consumers of CTF to grow special cases for types
that are referenced in valid dicts but don't appear.

Allow an alternative representation (which will become the only
representation in format v4) whereby nonrepresentable types are encoded
as actual types with kind CTF_K_UNKNOWN (an already-existing kind
theoretically but not in practice used for padding, with value 0).
This is backward-compatible, because CTF_K_UNKNOWN was not used anywhere
before now: it was used in old-format function symtypetabs, but these
were never emitted by any compiler and the code to handle them in libctf
likely never worked and was removed last year, in favour of new-format
symtypetabs that contain only type IDs, not type kinds.

In order to link this type, we need an API addition to let us add types
of unknown kind to the dict: we let them optionally have names so that
GCC can emit many different unknown types and those types with identical
names will be deduplicated together.  There are also small tweaks to the
deduplicator to actually dedup such types, to let opening of dicts with
unknown types with names work, to return the ECTF_NONREPRESENTABLE error
on resolution of such types (like ID 0), and to print their names as
something useful but not a valid C identifier, mostly for the sake of
the dumper.

Tests added in the next commit.

include/ChangeLog
2021-05-06  Nick Alcock  <nick.alcock@oracle.com>

	* ctf.h (CTF_K_UNKNOWN): Document that it can be used for
	nonrepresentable types, not just padding.
	* ctf-api.h (ctf_add_unknown): New.

libctf/ChangeLog
2021-05-06  Nick Alcock  <nick.alcock@oracle.com>

	* ctf-open.c (init_types): Unknown types may have names.
	* ctf-types.c (ctf_type_resolve): CTF_K_UNKNOWN is as
	non-representable as type ID 0.
	(ctf_type_aname): Print unknown types.
	* ctf-dedup.c (ctf_dedup_hash_type): Do not early-exit for
	CTF_K_UNKNOWN types: they have real hash values now.
	(ctf_dedup_rwalk_one_output_mapping): Treat CTF_K_UNKNOWN types
	like other types with no referents: call the callback and do not
	skip them.
	(ctf_dedup_emit_type): Emit via...
	* ctf-create.c (ctf_add_unknown): ... this new function.
	* libctf.ver (LIBCTF_1.2): Add it.
2021-05-06 09:30:59 +01:00
Cl?ment Chigot
b11b2969a9 Harmonize and improve auxiliary entries support for XCOFF
bfd/ChangeLog:
	* coff-rs6000.c (_bfd_xcoff_swap_aux_in): Add errors for
	unsupported storage class or auxialiry entries.
	Improve and adapt to new aux structures.
	Add C_DWARF support.
	(_bfd_xcoff_swap_aux_out): Likewise.
	* coff64-rs6000.c (_bfd_xcoff64_swap_aux_in): Likewise.
	(_bfd_xcoff64_swap_aux_out): Likewise.

binutils/ChangeLog:
	* od-xcoff.c (dump_xcoff32_symbols): Adapt to new
	aux structures.

include/ChangeLog:
	* coff/internal.h (union internal_auxent):
	 Add x_sect structure.
	* coff/rs6000.h (union external_auxent): Rework to
	match official documentation.
	* coff/rs6k64.h (union external_auxent): Likewise.
	(_AUX_SECT): New define.
2021-04-22 12:28:50 +01:00
Eli Zaretskii
18e9a809e8 Extend the description of PE header flags.
PR 27760
include	* coff/pe.h (IMAGE_DLLCHARACTERISTICS_APPCONTAINER): Define.
	(IMAGE_DLLCHARACTERISTICS_GUARD_CF): Define.

bfd	* peXXigen.c (_bfd_XX_print_private_bfd_data_common): Add display
	of IMAGE_FILE_REMOVABLE_RUN_FROM_SWAP,
	IMAGE_FILE_NET_RUN_FROM_SWAP and IMAGE_FILE_UP_SYSTEM_ONLY flags.
	Decode the contents of the DllCharacteristics field.
2021-04-21 17:38:52 +01:00
Alan Modra
6f8f6017a0 PR27567, Linking PE files adds alignment section flags to executables
So don't set those flags for an executable.  In the patch I also test
DYNAMIC even though the PE bfd code doesn't appear to set it for dlls.
I figure it doesn't hurt to include that flag too.

	PR 27567
bfd/
	* coffcode.h (styp_to_sec_flags): Use an unsigned long styp_flags.
	(coff_write_object_contents): Pass bfd to COFF_ENCODE_ALIGNMENT,
	ignore alignment checks when return is false.  Formatting.
include/
	* coff/internal.h (struct internal_scnhdr): Make s_flags unsigned long.
	* coff/pe.h (COFF_ENCODE_ALIGNMENT): Don't set align flags for an
	executable and return false.  Do so for a relocatable object and
	evaluate to true.
	* coff/ti.h (COFF_ENCODE_ALIGNMENT): Add bfd arg and evaluate to true.
	(COFF_DECODE_ALIGNMENT): Formatting.
	* coff/z80.h (COFF_ENCODE_ALIGNMENT): Similarly.
	(COFF_DECODE_ALIGNMENT): Similarly.
2021-04-16 23:21:44 +09:30
Alan Modra
c3f72de4f5 PowerPC disassembly of pcrel references
This adds some annotation to Power10 pcrel instructions, displaying
the target address (ie. pc + D34 field) plus a symbol if there is one
at exactly that target address.  pld from the .got or .plt will also
look up the entry and display it, symbolically if there is a dynamic
relocation on the entry.

include/
	* dis-asm.h (struct disassemble_info): Add dynrelbuf and dynrelcount.
binutils/
	* objdump.c (struct objdump_disasm_info): Delete dynrelbuf and
	dynrelcount.
	(find_symbol_for_address): Adjust for dynrelbuf and dynrelcount move.
	(disassemble_section, disassemble_data): Likewise.
opcodes/
	* ppc-dis.c (struct dis_private): Add "special".
	(POWERPC_DIALECT): Delete.  Replace uses with..
	(private_data): ..this.  New inline function.
	(disassemble_init_powerpc): Init "special" names.
	(skip_optional_operands): Add is_pcrel arg, set when detecting R
	field of prefix instructions.
	(bsearch_reloc, print_got_plt): New functions.
	(print_insn_powerpc): For pcrel instructions, print target address
	and symbol if known, and decode plt and got loads too.
gas/
	* testsuite/gas/ppc/prefix-pcrel.d: Update expected output.
	* testsuite/gas/ppc/prefix-reloc.d: Likewise.
	* gas/testsuite/gas/ppc/vsx_32byte.d: Likewise.
ld/
	* testsuite/ld-powerpc/inlinepcrel-1.d: Update expected output.
	* testsuite/ld-powerpc/inlinepcrel-2.d: Likewise.
	* testsuite/ld-powerpc/notoc2.d: Likewise.
	* testsuite/ld-powerpc/notoc3.d: Likewise.
	* testsuite/ld-powerpc/pcrelopt.d: Likewise.
	* testsuite/ld-powerpc/startstop.d: Likewise.
	* testsuite/ld-powerpc/tlsget.d: Likewise.
	* testsuite/ld-powerpc/tlsget2.d: Likewise.
	* testsuite/ld-powerpc/tlsld.d: Likewise.
	* testsuite/ld-powerpc/weak1.d: Likewise.
	* testsuite/ld-powerpc/weak1so.d: Likewise.
2021-04-09 16:56:43 +09:30
Alan Modra
a2e6677373 Return symbol from symbol_at_address_func
include/
	* dis-asm.h (struct disassemble_info <symbol_at_address_func>):
	Return asymbol*.
binutils/
	* objdump.c (objdump_symbol_at_address): Return asymbol*.
opcodes/
	* dis-buf.c (generic_symbol_at_address): Return symbol* NULL.
	* s12z-dis.c (decode_possible_symbol): Use symbol returned from
	symbol_at_address_func.
2021-04-06 23:25:09 +09:30
Martin Liska
e9b095a538 Remove strneq macro and use startswith.
bfd/ChangeLog:

	* ecoff.c (strneq): Remove strneq and use startswith.
	(_bfd_ecoff_slurp_armap): Likewise.

binutils/ChangeLog:

	* elfcomm.h (strneq): Remove strneq and use startswith.
	* readelf.c (ia64_process_unwind): Likewise.
	(process_note): Likewise.

gas/ChangeLog:

	* config/obj-coff.c (strneq): Remove strneq and use startswith.
	(weak_is_altname): Likewise.
	(obj_coff_section): Likewise.
	* config/tc-cr16.c (process_label_constant): Likewise.
	* config/tc-crx.c (strneq): Likewise.

include/ChangeLog:

	* opcode/cr16.h (strneq): Remove strneq and use startswith.

ld/ChangeLog:

	* ldbuildid.c (strneq): Remove strneq and use startswith.
	(validate_build_id_style): Likewise.
	(compute_build_id_size): Likewise.

opcodes/ChangeLog:

	* arm-dis.c (strneq): Remove strneq and use startswith.
	* cr16-dis.c (print_insn_cr16): Likewise.
	* score-dis.c (streq): Likewise.
	(strneq): Likewise.
	* score7-dis.c (strneq): Likewise.
2021-04-01 15:00:56 +02:00
Alan Modra
9193bc4285 Use bool in include
* bfdlink.h: Replace bfd_boolean with bool throughout.
	* coff/ecoff.h: Likewise.
	* coff/xcoff.h: Likewise.
	* dis-asm.h: Likewise.
	* elf/mmix.h: Likewise.
	* elf/xtensa.h: Likewise.
	* opcode/aarch64.h: Likewise, and FALSE with false, TRUE with true.
	* opcode/arc.h: Likewise.
	* opcode/mips.h: Likewise.
	* opcode/tic6x-opcode-table.h: Likewise.
	* opcode/tic6x.h: Likewise.
2021-03-31 10:49:23 +10:30
Alan Modra
3dfb1b6d34 Remove bfd_stdint.h
If we require C99 for binutils then stdint.h is available.

bfd/
	* .gitignore: Delete bfd_stdint.h entry.
	* Makefile.am (bfdinclude_HEADERS): Delete bfd_stdint.h.
	(BUILD_HFILES, LOCAL_H_DEPS): Likewise.
	* bfd-in.h: Include stdint.h in place of bfd_stdint.h.
	* configure.ac: Don't invoke GCC_HEADER_STDINT.
	* configure.com: Don't create bfd_stdint.h.
	* Makefile.in: Regenerate.
	* aclocal.m4: Regenerate.
	* bfd-in2.h: Regenerate.
	* config.in: Regenerate.
	* configure: Regenerate.
	* doc/Makefile.in: Regenerate.
	* po/BLD-POTFILES.in: Regenerate.
binutils/
	* coffdump.c: Include stdint.h in place of bfd_stdint.h.
	* dwarf.c: Likewise.
gas/
	* config/tc-aarch64.c: Include stdint.h in place of bfd_stdint.h.
	* config/tc-crx.c: Likewise.
	* config/tc-nds32.h: Likewise.
include/
	* cgen/basic-modes.h: Include stdint.h in place of bfd_stdint.h.
	* elf/nfp.h: Likewise.
	* opcode/aarch64.h: Likewise.
	* opcode/cgen.h: Likewise.
	* opcode/nfp.h: Likewise.
	* opcode/ppc.h: Likewise.
ld/
	* elf-hints-local.h: Include stdint.h in place of bfd_stdint.h.
	* emultempl/nds32elf.em: Likewise.
	* testsuite/ld-elf/mbind2b.c: Likewise.
	* testsuite/ld-elf/pr18718.c: Likewise.
	* testsuite/ld-elf/pr18720a.c: Likewise.
	* testsuite/ld-elf/pr25749-1.c: Likewise.
	* testsuite/ld-elf/pr25749-1a.c: Likewise.
	* testsuite/ld-elf/pr25749-1b.c: Likewise.
	* testsuite/ld-elf/pr25749-1c.c: Likewise.
	* testsuite/ld-elf/pr25749-1d.c: Likewise.
	* testsuite/ld-elf/pr25749-2.c: Likewise.
	* testsuite/ld-elf/pr25754-1a.c: Likewise.
	* testsuite/ld-elf/pr25754-2a.c: Likewise.
	* testsuite/ld-elf/pr25754-3a.c: Likewise.
	* testsuite/ld-elf/pr25754-4a.c: Likewise.
	* testsuite/ld-elf/pr25754-5a.c: Likewise.
	* testsuite/ld-elf/pr25754-6a.c: Likewise.
opcodes/
	* aarch64-dis.c: Include stdint.h in place of bfd_stdint.h.
	* aarch64-dis.h: Likewise.
	* aarch64-opc.c: Likewise.
	* avr-dis.c: Likewise.
	* csky-dis.c: Likewise.
	* nds32-asm.c: Likewise.
	* nds32-dis.c: Likewise.
	* nfp-dis.c: Likewise.
	* riscv-dis.c: Likewise.
	* s12z-dis.c: Likewise.
	* wasm32-dis.c: Likewise.
2021-03-31 10:49:23 +10:30
Alan Modra
63b4cc53dc TRUE/FALSE simplification
There is really no need to write code like "foo != 0 ? TRUE : FALSE"
unless we had stupidly defined FALSE as something other than 0 or TRUE
as something other than 1.  The simpler "foo != 0" does just as well.
Similarly "(condition == TRUE)" or "(condition == FALSE) can be
simplified to "(condition)" and "(!condition)" respectively.

I'll note that there is reason to use "integer_expression != 0" when
assigning a bfd_boolean rather than the simpler "integer_expression",
if you expect the variable to have 0 or 1 value.  It's probably even a
good idea to not rely on implicit conversion if bfd_boolean were _Bool.

bfd/
	* aoutx.h (aout_link_write_symbols): Don't cast boolean expression
	to bfd_boolean.
	* elf32-or1k.c (or1k_set_got_and_rela_sizes): Dont compare booleans
	against FALSE.
	* elf32-arc.c (name_for_global_symbol): Don't compare boolean to TRUE.
	(is_reloc_PC_relative): Don't use "boolean_condition ? TRUE : FALSE".
	(is_reloc_SDA_relative, is_reloc_for_GOT): Likewise.
	(is_reloc_for_PLT, is_reloc_for_TLS): Likewise.
	* elf32-arm.c (stm32l4xx_need_create_replacing_stub): Likewise.
	* elf32-nds32.c (insert_nds32_elf_blank): Likewise.
	* elf32-rx.c (rx_set_section_contents): Likewise.
	* elfnn-aarch64.c (elfNN_aarch64_final_link_relocate): Likewise.
	* elfxx-mips.c (_bfd_mips_elf_ignore_undef_symbol): Likewise.
	* mach-o.c (bfd_mach_o_read_command): Likewise.
	* targets.c (bfd_get_target_info): Likewise.
binutils/
	* dlltool.c (main): Don't use "boolean_condition ? TRUE : FALSE".
	* dwarf.c (read_and_display_attr_value): Likewise.
	(display_debug_str_offsets): Likewise.
	* objdump.c (dump_bfd): Likewise.
	* readelf.c (dump_section_as_strings): Likewise.
	(dump_section_as_bytes): Likewise.
gas/
	* atof-generic.c (FALSE, TRUE): Don't define.
	* config/obj-elf.h (FALSE, TRUE): Don't define.
	* config/obj-som.h (FALSE, TRUE): Don't define.
	* config/tc-hppa.h (FALSE, TRUE): Don't define.
	* config/tc-pdp11.c (FALSE, TRUE): Don't define.
	* config/tc-iq2000.h (obj_fix_adjustable): Delete.
	* config/tc-m32r.h (TC_FIX_ADJUSTABLE): Delete.
	* config/tc-mt.h (obj_fix_adjustable): Delete.
	* config/tc-nds32.h (TC_FIX_ADJUSTABLE): Delete.
	* config/tc-arc.c (parse_opcode_flags): Simplify boolean expression.
	(relaxable_flag, relaxable_operand, assemble_insn): Likewise.
	(tokenize_extregister): Likewise.
	* config/tc-csky.c (parse_opcode, get_operand_value): Likewise.
	(parse_operands_op, parse_operands, md_assemble): Likewise.
	* config/tc-d10v.c (build_insn): Likewise.
	* config/tc-score.c (s3_gen_insn_frag): Likewise.
	* config/tc-score7.c (s7_gen_insn_frag, s7_relax_frag): Likewise.
	* config/tc-tic6x.c (tic6x_update_features, md_assemble): Likewise.
	* config/tc-z80.c (emit_byte): Likewise.
include/
	* opcode/aarch64.h (alias_opcode_p): Simplify boolean expression.
	(opcode_has_alias, pseudo_opcode_p, optional_operand_p): Likewise.
	(opcode_has_special_coder): Likewise.
ld/
	* emultempl/aix.em (gld${EMULATION_NAME}_before_allocation): Simplify
	boolean expression.
	* lexsup.c (parse_args): Likewise.
	* pe-dll.c (pe_dll_id_target): Likewise.
opcodes/
	* aarch64-opc.c (vector_qualifier_p): Simplify boolean expression.
	(fp_qualifier_p, get_data_pattern): Likewise.
	(aarch64_get_operand_modifier_from_value): Likewise.
	(aarch64_extend_operator_p, aarch64_shift_operator_p): Likewise.
	(operand_variant_qualifier_p): Likewise.
	(qualifier_value_in_range_constraint_p): Likewise.
	(aarch64_get_qualifier_esize): Likewise.
	(aarch64_get_qualifier_nelem): Likewise.
	(aarch64_get_qualifier_standard_value): Likewise.
	(get_lower_bound, get_upper_bound): Likewise.
	(aarch64_find_best_match, match_operands_qualifier): Likewise.
	(aarch64_print_operand): Likewise.
	* aarch64-opc.h (operand_has_inserter, operand_has_extractor): Likewise.
	(operand_need_sign_extension, operand_need_shift_by_two): Likewise.
	(operand_need_shift_by_four, operand_maybe_stack_pointer): Likewise.
	* arm-dis.c (print_insn_mve, print_insn_thumb32): Likewise.
	* tic6x-dis.c (tic6x_check_fetch_packet_header): Likewise.
	(print_insn_tic6x): Likewise.
2021-03-29 11:22:22 +10:30
Alan Modra
3d7d6c1b50 opcodes int vs bfd_boolean fixes
cpu/
	* frv.opc (frv_is_branch_major, frv_is_float_major),
	(frv_is_media_major, frv_is_branch_insn, frv_is_float_insn),
	(frv_is_media_insn, spr_valid): Correct prototypes.
include/
	* opcode/aarch64.h (aarch64_opcode_encode): Correct prototype.
opcodes/
	* arc-dis.c (extract_operand_value): Correct NULL cast.
	* frv-opc.h: Regenerate.
2021-03-29 11:22:21 +10:30
Nick Alcock
24c877f9b1 include: always do unsigned left-shift in CTF_SET_STID
This turns into a signed left shift by 31 bits, otherwise.  This is an
offset and is always treated as unsigned in any case, so add an
appropriate cast.

include/ChangeLog
2021-03-25  Nick Alcock  <nick.alcock@oracle.com>

	PR libctf/27628
	* ctf-api.h: Fix some indentation.
	(CTF_SET_STID): Always do an unsigned shift, even if STID is
	signed.
2021-03-25 16:32:47 +00:00
Luis Machado
5e984dbf35 AArch64: Add MTE register set support for GDB and gdbserver
AArch64 MTE support in the Linux kernel exposes a new register
through ptrace.  This patch adds the required code to support it.

include/ChangeLog:

2021-03-24  Luis Machado  <luis.machado@linaro.org>

	* elf/common.h (NT_ARM_TAGGED_ADDR_CTRL): Define.

gdb/ChangeLog:

2021-03-24  Luis Machado  <luis.machado@linaro.org>

	* aarch64-linux-nat.c (fetch_mteregs_from_thread): New function.
	(store_mteregs_to_thread): New function.
	(aarch64_linux_nat_target::fetch_registers): Update to call
	fetch_mteregs_from_thread.
	(aarch64_linux_nat_target::store_registers): Update to call
	store_mteregs_to_thread.
	* aarch64-tdep.c (aarch64_mte_register_names): New struct.
	(aarch64_cannot_store_register): Handle MTE registers.
	(aarch64_gdbarch_init): Initialize and setup MTE registers.
	* aarch64-tdep.h (gdbarch_tdep) <mte_reg_base>: New field.
	<has_mte>: New method.
	* arch/aarch64-linux.h (AARCH64_LINUX_SIZEOF_MTE): Define.

gdbserver/ChangeLog:

2021-03-24  Luis Machado  <luis.machado@linaro.org>

	* linux-aarch64-low.cc (aarch64_fill_mteregset): New function.
	(aarch64_store_mteregset): New function.
	(aarch64_regsets): Add MTE register set entry.
	(aarch64_sve_regsets): Add MTE register set entry.
2021-03-24 14:52:57 -03:00
H.J. Lu
7b9f985957 elf: Rename EM_INTEL205 to EM_INTELGT
Rename EM_INTEL205 to EM_INTELGT for Intel Graphics Technology.

binutils/

	* readelf.c (get_machine_name): Add EM_INTELGT.

include/

	* elf/common.h (EM_INTEL205): Renamed to ...
	(EM_INTELGT): This.
2021-03-19 05:58:46 -07:00
Nick Clifton
012d442686 Fix a potential buffer overrun qwhen writing out PE aux entries.
* peXXigen.c (_bfd_XXi_swap_aux_out): Avoid potential buffer
	overrun by using sizeof of the destination x_fname field as the
	limit for a memcpy.

	* coff/internal.h (struct internal_auxent): Fix a couple of typos
	in comment describing the x_fname field.
2021-03-16 12:44:50 +00:00
Kuan-Lin Chen
80d49d6a1b RISC-V : Support bitmanip-0.93 ZBA/ZBB/ZBC instructions
bfd/
	* elfxx-riscv.c (riscv_std_z_ext_strtab): Add zba, zbb and zbc.

gas/
	* config/tc-riscv.c (ext_version_table): Add b, zba, zbb and zbc.
	(riscv_multi_subset_supports): Add INSN_CLASS_ZB*.
	* testsuite/gas/riscv/b-ext-64.s: Bitmanip test case.
	* testsuite/gas/riscv/b-ext-64.d: Likewise.
	* testsuite/gas/riscv/b-ext.s: Likewise.
	* testsuite/gas/riscv/b-ext.d: Likewise.

include/
	* opcode/riscv-opc.h: Support zba, zbb and zbc extensions.
	* opcode/riscv.h (riscv_insn_class): Add INSN_CLASS_ZB*.

opcodes/
	* riscv-opc.c (riscv_opcodes): Add zba, zbb and zbc instructions.
2021-03-16 14:38:19 +08:00
Frederic Cambus
be3b926d8d Add values for NetBSD .note.netbsd.ident notes (PaX).
* elf/common.h (NT_NETBSD_PAX, NT_NETBSD_PAX_MPROTECT)
 (NT_NETBSD_PAX_NOMPROTECT, NT_NETBSD_PAX_GUARD, NT_NETBSD_PAX_NOGUARD)
 (NT_NETBSD_PAX_ASLR, NT_NETBSD_PAX_NOASLR): Define.
2021-03-12 14:37:51 +00:00
Clément Chigot
1b2cb8e2ee aix: implement TLS relocation for gas and ld
Add support for TLS in XCOFF. Amongst the things done by this commit:
 - Update XCOFF auxialiary header to match new version and allow TLS
   sections.
 - Add TLS sections (.tdata and .tbss) support in gas and ld.
 - Add support for the TLS relocations in gas and ld.
   Two different types BFD_RELOC are created for PPC and PPC64 as
   the size is a pointer, thus distinct in 32 or 64bit.

The addresses given by ld to .tdata and .tbss is a bit special. In
XCOFF, these addresses are actually offsets from the TLS pointer
computed at runtime. AIX assembly and linker does the same. In
top of that, the .tdata must be before .data (this is mandatory for AIX
loader). Thus, the aix ld script is recomputing "." before .data to restore
its original value. There might be a simpler way, but this one is working.

Optimisation linked to TLS relocations aren't yet implemented.

bfd/
	* reloc.c (BFD_RELOC_PPC_TLS_LE, BFD_RELOC_PPC_TLS_IE,
	BFD_RELOC_PPC_TLS_M, BFD_RELOC_PPC_TLS_ML, BFD_RELOC_PPC64_TLS_GD,
	BFD_RELOC_PPC64_TLS_LD, BFD_RELOC_PPC64_TLS_LE,
	BFD_RELOC_PPC64_TLS_IE, BFD_RELOC_PPC64_TLS_M,
	BFD_RELOC_PPC64_TLS_ML): New relocations.
	* bfd-in2.h: Regenerate.
	* libbfd.h: Regenerate.
	* coff-rs6000.c (xcoff_calculate_relocation): Call
	xcoff_reloc_type_tls for TLS relocations.
	(xcoff_howto_table): Implement TLS relocations.
	(_bfd_xcoff_reloc_type_lookup): Add cases TLS relocations.
	(xcoff_reloc_type_tls): New function.
	* coff64-rs6000.c (xcoff_calculate_relocation): Likewise.
	(xcoff_howto_table): Likewise.
	(_bfd_xcoff_reloc_type_lookup): Likewise.
	* coffcode.h (sec_to_styp_flags): Handle TLS sections.
	(styp_to_sec_flags): Likewise.
	(coff_compute_section_file_positions): Avoid file offset
	optimisation for .data when the previous section is .tdata.
	(coff_write_object_contents): Handle TLS sections.
	* coffswap.h (coff_swap_aouthdr_out): Add support for
	new fields in aouthdr.
	* libxcoff.h (xcoff_reloc_type_tls): Add prototype.
	* xcofflink.c (xcoff_link_add_symbols): Handle XMC_UL.
	(xcoff_need_ldrel_p): Add cases for TLS relocations.
	(xcoff_create_ldrel): Add l_symndx for TLS sections.
gas/
	* config/tc-ppc.c (ppc_xcoff_text_section, ppc_xcoff_data_section,
	(ppc_xcoff_bss_section, ppc_xcoff_tdata_section,
	(ppc_xcoff_tbss_section): New variables.
	(ppc_text_subsegment, ppc_text_csects, ppc_data_subgments,
	(ppc_data_csects): Removed.
	(ppc_xcoff_section_is_initialized, ppc_init_xcoff_section,
	ppc_xcoff_parse_cons): New functions.
	(md_being): Initialize XCOFF sections.
	(ppc_xcoff_suffix): Add support for TLS relocations
	(fixup_size, md_apply_fix): Add support for new BFD_RELOC.
	(ppc_change_csect): Handle XMC_TL, XMC_UL.  Correctly, add XMC_BS
	to .bss section.  Handle new XCOFF section variables.
	(ppc_comm): Likewise.
	(ppc_toc): Likewise.
	(ppc_symbol_new_hook): Likewise.
	(ppc_frob_symbol): Likewise.
	(ppc_fix_adjustable): Add tbss support.
	* config/tc-ppc.h (TC_PARSE_CONS_EXPRESSION): New define.
	(ppc_xcoff_parse_cons): Add prototype.
	(struct ppc_xcoff_section): New structure.
ld/
	* emultempl/aix.em: Ensure .tdata section is removed
	if empty, even with -r flag.
	* scripttempl/aix.sc: Handle TLS sections.
	* testsuite/ld-powerpc/aix52.exp: Add new tests.
	* testsuite/ld-powerpc/aix-tls-reloc-32.d: New test.
	* testsuite/ld-powerpc/aix-tls-reloc-64.d: New test.
	* testsuite/ld-powerpc/aix-tls-reloc.ex: New test.
	* testsuite/ld-powerpc/aix-tls-reloc.s: New test.
	* testsuite/ld-powerpc/aix-tls-section-32.d: New test.
	* testsuite/ld-powerpc/aix-tls-section-64.d: New test.
	* testsuite/ld-powerpc/aix-tls-section.ex: New test.
	* testsuite/ld-powerpc/aix-tls-section.s: New test.
include/
	* coff/internal.h (struct internal_aouthdr): Add new fields.
	* coff/rs6000.h (AOUTHDRÃ): Add new fields.
	* coff/rs6k64.h (struct external_filehdr): Likewise.
	* coff/xcoff.h (_TDATA), _TBSS): New defines
	(RS6K_AOUTHDR_TLS_LE, RS6K_AOUTHDR_RAS, RS6K_AOUTHDR_ALGNTDATA,
	RS6K_AOUTHDR_SHR_SYMTAB, RS6K_AOUTHDR_FORK_POLICY,
	RS6K_AOUTHDR_FORK_COR): New defines.
	(XMC_TU): Removed.
	(XMC_UL): New define.
2021-03-12 22:47:33 +10:30
Clément Chigot
2c1bef53de aix: correct HOWTO table and add missing relocations
Since the last time AIX HOWTO table was modified, IBM has now
released an official documentation about XCOFF relocations.
This commit corrects the wrong ones and add some missing.
For now, the "custom" relocations made for xcoff_rtype2howto have
been kept.
The new relocations are still set as EMPTY_HOWTO because they will
be implemented in later commits.

In xcoff[64]_ppc_relocate_section, instead of recreating howto
from scratch, it's better to use the existing howto from the
table and fixing it according to r_size field.

bfd/
	* coff-rs6000.c (xcoff_calculate_relocation): Correct and
	add new relocations.
	(xcoff_howto_table): Likewise.
	(xcoff_rtype2howto): Increase r_type maximum value.
	(xcoff_ppc_relocate_section): Reuse predefined HOWTOs instead
	of create a new one from scratch.  Enable only some relocations
	to have a changing r_size.
	* coff64-rs6000.c (xcoff64_calculate_relocation): Likewise.
	(xcoff64_howto_table): Likewise.
	(xcoff64_rtype2howto): Likewise.
	(xcoff64_ppc_relocate_section): Likewise.
	* libxcoff.h (XCOFF_MAX_CALCULATE_RELOCATION): Fix value.
binutils/
	* od-xcoff.c: Replace RTB by TRL entry.
include/
	* coff/xcoff.h (R_RTB): Remove.
	(R_TRL): Fix value.
2021-03-12 22:08:20 +10:30
Andrew Burgess
db6092f3ae bfd/binutils: add support for RISC-V CSRs in core files
Adds support for including RISC-V control and status registers into
core files.

The value for the define NT_RISCV_CSR is set to 0x900, this
corresponds to a patch I have proposed for the Linux kernel here:

  http://lists.infradead.org/pipermail/linux-riscv/2020-December/003910.html

As I have not yet heard if the above patch will be accepted into the
kernel or not I have set the note name string to "GDB", and the note
type to NT_RISCV_CSR.

This means that if the above patch is rejected from the kernel, and
the note type number 0x900 is assigned to some other note type, we
will still be able to distinguish between the GDB produced
NT_RISCV_CSR, and the kernel produced notes, where the name would be
set to "CORE".

bfd/ChangeLog:

	* elf-bfd.h (elfcore_write_riscv_csr): Declare.
	* elf.c (elfcore_grok_riscv_csr): New function.
	(elfcore_grok_note): Handle NT_RISCV_CSR.
	(elfcore_write_riscv_csr): New function.
	(elfcore_write_register_note): Handle '.reg-riscv-csr'.

binutils/ChangeLog:

	* readelf.c (get_note_type): Handle NT_RISCV_CSR.

include/ChangeLog:

	* elf/common.h (NT_RISCV_CSR): Define.
2021-03-05 17:21:41 +00:00
Andrew Burgess
b63a5e38ef bfd/binutils: support for gdb target descriptions in the core file
This commit lays the ground work for allowing GDB to write its target
description into a generated core file.

The goal of this work is to allow a user to connect to a remote
target, capture a core file from within GDB, then pass the executable
and core file to another user and have the user be able to examine the
state of the machine without needing to connect to a running target.

Different remote targets can have different register sets and this
information is communicated from the target to GDB in the target
description.

It is possible for a user to extract the target description from GDB
and pass this along with the core file so that when the core file is
used the target description can be fed back into GDB, however this is
not a great user experience.

It would be nicer, I think, if GDB could write the target description
directly into the core file, and then make use of this description
when loading a core file.

This commit performs the binutils/bfd side of this task, adding the
boiler plate functions to access the target description from within a
core file note, and reserving a new number for a note containing the
target description.  Later commits will extend GDB to make use of
this.

The new note is given the name 'GDB' and a type NT_GDB_TDESC.  This
should hopefully protect us if there's ever a reuse of the number
assigned to NT_GDB_TDESC by some other core file producer.  It should
also, hopefully, make it clearer to users that this note carries GDB
specific information.

bfd/ChangeLog:

	* elf-bfd.h (elfcore_write_gdb_tdesc): Declare new function.
	* elf.c (elfcore_grok_gdb_tdesc): New function.
	(elfcore_grok_note): Handle NT_GDB_TDESC.
	(elfcore_write_gdb_tdesc): New function.
	(elfcore_write_register_note): Handle NT_GDB_TDESC.

binutils/ChangeLog:

	* readelf.c (get_note_type): Handle NT_GDB_TDESC.

include/ChangeLog:

	* elf/common.h (NT_GDB_TDESC): Define.
2021-03-05 17:21:40 +00:00
Alan Modra
dc83f2d20e Split relocation defines out of coff/internal.h
include/
	* coff/internal.h: Delete obsolete relocation defines.  Move used
	relocation defines..
	* coff/i386.h: ..to here..
	* coff/ti.h: ..and here..
	* coff/x86_64.h: ..and here..
	* coff/z80.h: ..and here..
	* coff/z8k.h: ..and here.
bfd/
	* reloc.c: Include x86_64.h rather than internal.h.
2021-03-03 17:46:24 +10:30
Nick Alcock
8915c559d4 libctf, include: remove the nondeduplicating CTF linker
The nondeduplicating CTF linker was kept around when the deduplicating
one was added so that people had something to fall back to in case the
deduplicating linker turned out to be buggy.  It's now much more stable
than the nondeduplicating linker, in addition to much faster, using much
less memory and producing much better output.  In addition, while
libctf has a linker flag to invoke the nondeduplicating linker, ld does
not expose it: the only way to turn it on within ld is an intentionally-
undocumented environment variable.  So we can remove it without any ABI
or user-visibility concerns (the only thing we leave around is the
CTF_LINK_NONDEDUP flag, which can easily be interpreted as "deduplicate
less", though right now it does nothing).

This lets us remove a lot of complexity associated with tracking
filenames and CU names separately (something the deduplcating linker
never bothered with, since the cunames are always reliable and ld never
hands us useful filenames anyway)

The biggest lacuna left behind is the ctf_type_mapping machinery, which
slows down deduplicating links quite a lot.  We can't just ditch it
because ctf_add_type uses it: removing the slowdown from the
deduplicating linker is a job for another commit.

include/ChangeLog
2021-03-02  Nick Alcock  <nick.alcock@oracle.com>

	* ctf-api.h (CTF_LINK_SHARE_DUPLICATED): Note that this might
	merely change how much deduplication is done.

libctf/ChangeLog
2021-03-02  Nick Alcock  <nick.alcock@oracle.com>

	* ctf-link.c (ctf_create_per_cu): Drop FILENAME now that it is
	always identical to CUNAME.
	(ctf_link_deduplicating_one_symtypetab): Adjust.
	(ctf_link_one_type): Remove.
	(ctf_link_one_input_archive_member): Likewise.
	(ctf_link_close_one_input_archive): Likewise.
	(ctf_link_one_input_archive): Likewise.
	(ctf_link): No longer call it.  Drop CTF_LINK_NONDEDUP path.
	Improve header comment a bit (dicts, not files).  Adjust
	ctf_create_per_cu call.
	(ctf_link_deduplicating_variables): Simplify.
	(ctf_link_in_member_cb_arg_t) <cu_name>: Remove.
	<in_input_cu_file>: Likewise.
	<in_fp_parent>: Likewise.
	<done_parent>: Likewise.
	(ctf_link_one_variable): Turn uses of in_file_name to in_cuname.
2021-03-02 15:10:05 +00:00
Alan Modra
8ee10e8609 PR27451, -z start_stop_gc
When --gc-sections is in effect, a reference from a retained section
to __start_SECNAME or __stop_SECNAME causes all input sections named
SECNAME to also be retained, if SECNAME is representable as a C
identifier and either __start_SECNAME or __stop_SECNAME is synthesized
by the linker.  Add an option to disable that feature, effectively
ignoring any relocation that references a synthesized linker defined
__start_ or __stop_ symbol.

	PR 27451
include/
	* bfdlink.h (struct bfd_link_info): Add start_stop_gc.
bfd/
	* elflink.c (_bfd_elf_gc_mark_rsec): Ignore synthesized linker
	defined start/stop symbols when start_stop_gc.
	(bfd_elf_gc_mark_dynamic_ref_symbol): Likewise.
	(bfd_elf_define_start_stop): Don't modify ldscript_def syms.
	* linker.c (bfd_generic_define_start_stop): Likewise.
ld/
	* emultempl/elf.em: Handle -z start-stop-gc and -z nostart-stop-gc.
	* lexsup.c (elf_static_list_options): Display help for them.  Move
	help for -z stack-size to here from elf_shlib_list_options. Add
	help for -z start-stop-visibility and -z undefs.
	* ld.texi: Document -z start-stop-gc and -z nostart-stop-gc.
	* NEWS: Mention -z start-stop-gc.
	* testsuite/ld-gc/start2.s,
	* testsuite/ld-gc/start2.d: New test.
	* testsuite/ld-gc/gc.exp: Run it.
2021-03-01 17:28:03 +10:30
Alan Modra
89753bbf81 Warn when a script redefines a symbol
Note that we don't even warn if scripts adjust a symbol as in
ld-elf/var1 and ld-scripts/pr14962.

include/
	* bfdlink.h (struct bfd_link_info): Add warn_multiple_definition.
ld/
	* ldexp.c (exp_fold_tree_1): Warn on script defining a symbol
	defined in an object file.
	* ldmain.c (multiple_definition): Heed info->warn_multiple_definition.
	* testsuite/ld-scripts/defined5.d: Expect a warning.
2021-02-21 14:28:16 +10:30
Nick Alcock
f4f60336da libctf, include: find types of symbols by name
The existing ctf_lookup_by_symbol and ctf_arc_lookup_symbol functions
suffice to look up the types of symbols if the caller already has a
symbol number.  But the caller often doesn't have one of those and only
knows the name of the symbol: also, in object files, the caller might
not have a useful symbol number in any sense (and neither does libctf:
the 'symbol number' we use in that case literally starts at 0 for the
lexicographically first-sorted symbol in the symtypetab and counts those
symbols, so it corresponds to nothing useful).

This means that even though object files have a symtypetab (generated by
the compiler or by ld -r), the only way we can look up anything in it is
to iterate over all symbols in turn with ctf_symbol_next until we find
the one we want.

This is unhelpful and pointlessly inefficient.

So add a pair of functions to look up symbols by name in a dict and in a
whole archive: ctf_lookup_by_symbol_name and ctf_arc_lookup_symbol_name.
These are identical to the existing functions except that they take
symbol names rather than symbol numbers.

To avoid insane repetition, we do some refactoring in the process, so
that both ctf_lookup_by_symbol and ctf_arc_lookup_symbol turn into thin
wrappers around internal functions that do both lookup by symbol index
and lookup by name.  This massively reduces code duplication because
even the existing lookup-by-index stuff wants to use a name sometimes
(when looking up in indexed sections), and the new lookup-by-name stuff
has to turn it into an index sometimes (when looking up in non-indexed
sections): doing it this way lets us share most of that.

The actual name->index lookup is done by ctf_lookup_symbol_idx.  We do
not anticipate this lookup to be as heavily used as ld.so symbol lookup
by many orders of magnitude, so using the ELF symbol hashes would
probably take more time to read them than is saved by using the hashes,
and it adds a lot of complexity.  Instead, do a linear search for the
symbol name, caching all the name -> index mappings as we go, so that
future searches are likely to hit in the cache.  To avoid having to
repeat this search over and over in a CTF archive when
ctf_arc_lookup_symbol_name is used, have cached archive lookups (the
sort done by ctf_arc_lookup_symbol* and the ctf_archive_next iterator)
pick out the first dict they cache in a given archive and store it in a
new ctf_archive field, ctfi_crossdict_cache.  This can be used to store
cross-dictionary cached state that depends on things like the ELF symbol
table rather than the contents of any one dict.  ctf_lookup_symbol_idx
then caches its name->index mappings in the dictionary named in the
crossdict cache, if any, so that ctf_lookup_symbol_idx in other dicts
in the same archive benefit from the previous linear search, and the
symtab only needs to be scanned at most once.

(Note that if you call ctf_lookup_by_symbol_name in one specific dict,
and then follow it with a ctf_arc_lookup_symbol_name, the former will
not use the crossdict cache because it's only populated by the dict
opens in ctf_arc_lookup_symbol_name. This is harmless except for a small
one-off waste of memory and time: it's only a cache, after all.  We can
fix this later by using the archive caching machinery more
aggressively.)

In ctf-archive, we do similar things, turning ctf_arc_lookup_symbol into
a wrapper around a new function that does both index -> ID and name ->
ID lookups across all dicts in an archive.  We add a new
ctfi_symnamedicts cache that maps symbol names to the ctf_dict_t * that
it was found in (so that linear searches for symbols don't need to be
repeated): but we also *remove* a cache, the ctfi_syms cache that was
memoizing the actual ctf_id_t returned from every call to
ctf_arc_lookup_symbol.  This is pointless: all it saves is one call to
ctf_lookup_by_symbol, and that's basically an array lookup and nothing
more so isn't worth caching.  (Equally, given that symbol -> index
mappings are cached by ctf_lookup_by_symbol_name, those calls are nearly
free after the first call, so there's no point caching the ctf_id_t in
that case either.)

We fix up one test that was doing manual symbol lookup to use
ctf_arc_lookup_symbol instead, and enhance it to check that the caching
layer is not totally broken: we also add a new test to do lookups in a
.o file, and another to do lookups in an archive with conflicted types
and make sure that sort of multi-dict lookup is actually working.

include/ChangeLog
2021-02-17  Nick Alcock  <nick.alcock@oracle.com>

	* ctf-api.h (ctf_arc_lookup_symbol_name): New.
	(ctf_lookup_by_symbol_name): Likewise.

libctf/ChangeLog
2021-02-17  Nick Alcock  <nick.alcock@oracle.com>

	* ctf-impl.h (ctf_dict_t) <ctf_symhash>: New.
	<ctf_symhash_latest>: Likewise.
	(struct ctf_archive_internal) <ctfi_crossdict_cache>: New.
	<ctfi_symnamedicts>: New.
	<ctfi_syms>: Remove.
	(ctf_lookup_symbol_name): Remove.
	* ctf-lookup.c (ctf_lookup_symbol_name): Propagate errors from
	parent properly.  Make static.
	(ctf_lookup_symbol_idx): New, linear search for the symbol name,
	cached in the crossdict cache's ctf_symhash (if available), or
	this dict's (otherwise).
	(ctf_try_lookup_indexed): Allow the symname to be passed in.
	(ctf_lookup_by_symbol): Turn into a wrapper around...
	(ctf_lookup_by_sym_or_name): ... this, supporting name lookup too,
	using ctf_lookup_symbol_idx in non-writable dicts.  Special-case
	name lookup in dynamic dicts without reported symbols, which have
	no symtab or dynsymidx but where name lookup should still work.
	(ctf_lookup_by_symbol_name): New, another wrapper.
	* ctf-archive.c (enosym): Note that this is present in
	ctfi_symnamedicts too.
	(ctf_arc_close): Adjust for removal of ctfi_syms.  Free the
	ctfi_symnamedicts.
	(ctf_arc_flush_caches): Likewise.
	(ctf_dict_open_cached): Memoize the first cached dict in the
	crossdict cache.
	(ctf_arc_lookup_symbol): Turn into a wrapper around...
	(ctf_arc_lookup_sym_or_name): ... this.  No longer cache
	ctf_id_t lookups: just call ctf_lookup_by_symbol as needed (but
	still cache the dicts those lookups succeed in).  Add
	lookup-by-name support, with dicts of successful lookups cached in
	ctfi_symnamedicts.  Refactor the caching code a bit.
	(ctf_arc_lookup_symbol_name): New, another wrapper.
	* ctf-open.c (ctf_dict_close): Free the ctf_symhash.
	* libctf.ver (LIBCTF_1.2): New version.  Add
	ctf_lookup_by_symbol_name, ctf_arc_lookup_symbol_name.
	* testsuite/libctf-lookup/enum-symbol.c (main): Use
	ctf_arc_lookup_symbol rather than looking up the name ourselves.
	Fish it out repeatedly, to make sure that symbol caching isn't
	broken.
	(symidx_64): Remove.
	(symidx_32): Remove.
	* testsuite/libctf-lookup/enum-symbol-obj.lk: Test symbol lookup
	in an unlinked object file (indexed symtypetab sections only).
	* testsuite/libctf-writable/symtypetab-nonlinker-writeout.c
	(try_maybe_reporting): Check symbol types via
	ctf_lookup_by_symbol_name as well as ctf_symbol_next.
	* testsuite/libctf-lookup/conflicting-type-syms.*: New test of
	lookups in a multi-dict archive.
2021-02-20 16:37:08 +00:00
Nelson Chu
5a9f5403c7 RISC-V: PR27158, fixed UJ/SB types and added CSS/CL/CS types for .insn.
* Renamed obsolete UJ/SB types and RVC types, also added CSS/CL(CS) types,

[VALID/EXTRACT/ENCODE macros]
BTYPE_IMM:            Renamed from SBTYPE_IMM.
JTYPE_IMM:            Renamed from UJTYPE_IMM.
CITYPE_IMM:           Renamed from RVC_IMM.
CITYPE_LUI_IMM:       Renamed from RVC_LUI_IMM.
CITYPE_ADDI16SP_IMM:  Renamed from RVC_ADDI16SP_IMM.
CITYPE_LWSP_IMM:      Renamed from RVC_LWSP_IMM.
CITYPE_LDSP_IMM:      Renamed from RVC_LDSP_IMM.
CIWTYPE_IMM:          Renamed from RVC_UIMM8.
CIWTYPE_ADDI4SPN_IMM: Renamed from RVC_ADDI4SPN_IMM.
CSSTYPE_IMM:          Added for .insn without special encoding.
CSSTYPE_SWSP_IMM:     Renamed from RVC_SWSP_IMM.
CSSTYPE_SDSP_IMM:     Renamed from RVC_SDSP_IMM.
CLTYPE_IMM:           Added for .insn without special encoding.
CLTYPE_LW_IMM:        Renamed from RVC_LW_IMM.
CLTYPE_LD_IMM:        Renamed from RVC_LD_IMM.
RVC_SIMM3:            Unused and removed.
CBTYPE_IMM:           Renamed from RVC_B_IMM.
CJTYPE_IMM:           Renamed from RVC_J_IMM.

* Added new operands and removed the unused ones,

C5: Unsigned CL(CS) immediate, added for .insn directive.
C6: Unsigned CSS immediate, added for .insn directive.
Ci: Unused and removed.
C<: Unused and removed.

bfd/
    PR 27158
    * elfnn-riscv.c (perform_relocation): Updated encoding macros.
    (_bfd_riscv_relax_call): Likewise.
    (_bfd_riscv_relax_lui): Likewise.
    * elfxx-riscv.c (howto_table): Likewise.
gas/
    PR 27158
    * config/tc-riscv.c (riscv_ip): Updated encoding macros.
    (md_apply_fix): Likewise.
    (md_convert_frag_branch): Likewise.
    (validate_riscv_insn): Likewise.  Also arranged operands, including
    added C5 and C6 operands, and removed unused Ci and C< operands.
    * doc/c-riscv.texi: Updated and added CSS/CL/CS types.
    * testsuite/gas/riscv/insn.d: Added CSS/CL/CS instructions.
    * testsuite/gas/riscv/insn.s: Likewise.
gdb/
    PR 27158
    * riscv-tdep.c (decode_ci_type_insn): Updated encoding macros.
    (decode_j_type_insn): Likewise.
    (decode_cj_type_insn): Likewise.
    (decode_b_type_insn): Likewise.
    (decode): Likewise.
include/
    PR 27158
    * opcode/riscv.h: Updated encoding macros.
opcodes/
    PR 27158
    * riscv-dis.c (print_insn_args): Updated encoding macros.
    * riscv-opc.c (MASK_RVC_IMM): defined to ENCODE_CITYPE_IMM.
    (match_c_addi16sp): Updated encoding macros.
    (match_c_lui): Likewise.
    (match_c_lui_with_hint): Likewise.
    (match_c_addi4spn): Likewise.
    (match_c_slli): Likewise.
    (match_slli_as_c_slli): Likewise.
    (match_c_slli64): Likewise.
    (match_srxi_as_c_srxi): Likewise.
    (riscv_insn_types): Added .insn css/cl/cs.
sim/
    PR 27158
    * riscv/sim-main.c (execute_i): Updated encoding macros.
2021-02-19 11:44:49 +08:00
Nelson Chu
3d73d29e4e RISC-V: Add bfd/cpu-riscv.h to support all spec versions controlling.
Make the opcode/riscv-opc.c and include/opcode/riscv.h tidy, move the
spec versions stuff to bfd/cpu-riscv.h.  Also move the csr stuff and
ext_version_table to gas/config/tc-riscv.c for internal use.  To avoid
too many repeated code, define general RISCV_GET_SPEC_NAME/SPEC_CLASS
macros.  Therefore, assembler/dis-assembler/linker/gdb can get all spec
versions related stuff from cpu-riscv.h and cpu-riscv.c, since the stuff
are defined there uniformly.

bfd/
    * Makefile.am: Added cpu-riscv.h.
    * Makefile.in: Regenerated.
    * po/SRC-POTFILES.in: Regenerated.
    * cpu-riscv.h: Added to support spec versions controlling.
    Also added extern arrays and functions for cpu-riscv.c.
    (enum riscv_spec_class): Define all spec classes here uniformly.
    (struct riscv_spec): Added for all specs.
    (RISCV_GET_SPEC_CLASS): Added to reduce repeated code.
    (RISCV_GET_SPEC_NAME): Likewise.
    (RISCV_GET_ISA_SPEC_CLASS): Added to get ISA spec class.
    (RISCV_GET_PRIV_SPEC_CLASS): Added to get privileged spec class.
    (RISCV_GET_PRIV_SPEC_NAME): Added to get privileged spec name.
    * cpu-riscv.c (struct priv_spec_t): Replaced with struct riscv_spec.
    (riscv_get_priv_spec_class): Replaced with RISCV_GET_PRIV_SPEC_CLASS.
    (riscv_get_priv_spec_name): Replaced with RISCV_GET_PRIV_SPEC_NAME.
    (riscv_priv_specs): Moved below.
    (riscv_get_priv_spec_class_from_numbers): Likewise, updated.
    (riscv_isa_specs): Moved from include/opcode/riscv.h.
    * elfnn-riscv.c: Included cpu-riscv.h.
    (riscv_merge_attributes): Initialize in_priv_spec and out_priv_spec.
    * elfxx-riscv.c: Included cpu-riscv.h and opcode/riscv.h.
    (RISCV_UNKNOWN_VERSION): Moved from include/opcode/riscv.h.
    * elfxx-riscv.h: Removed extern functions to cpu-riscv.h.
gas/
    * config/tc-riscv.c: Included cpu-riscv.h.
    (enum riscv_csr_clas): Moved from include/opcode/riscv.h.
    (struct riscv_csr_extra): Likewise.
    (struct riscv_ext_version): Likewise.
    (ext_version_table): Moved from opcodes/riscv-opc.c.
    (default_isa_spec): Updated type to riscv_spec_class.
    (default_priv_spec): Likewise.
    (riscv_set_default_isa_spec): Updated.
    (init_ext_version_hash): Likewise.
    (riscv_init_csr_hash): Likewise, also fixed indent.
include/
    * opcode/riscv.h: Moved stuff and make the file tidy.
opcodes/
    * riscv-dis.c: Included cpu-riscv.h, and removed elfxx-riscv.h.
    (default_priv_spec): Updated type to riscv_spec_class.
    (parse_riscv_dis_option): Updated.
    * riscv-opc.c: Moved stuff and make the file tidy.
2021-02-18 15:09:16 +08:00
Andreas Krebbel
ba2b480f10 IBM Z: Implement instruction set extensions
opcodes/

        * s390-mkopc.c (main): Accept arch14 as cpu string.
        * s390-opc.txt: Add new arch14 instructions.

include/

        * opcode/s390.h (enum s390_opcode_cpu_val): Add
        S390_OPCODE_ARCH14.

gas/

        * config/tc-s390.c (s390_parse_cpu): New entry for arch14.
        * doc/c-s390.texi: Document arch14 march option.
        * testsuite/gas/s390/s390.exp: Run the arch14 related tests.
        * testsuite/gas/s390/zarch-arch14.d: New test.
        * testsuite/gas/s390/zarch-arch14.s: New test.
2021-02-15 14:32:17 +01:00
Mike Frysinger
bfd428bc12 opcodes: tic54x: namespace exported variables
The tic54x exports some fairly generic variable names that can
conflict with programs that use them, so put proper tic54x_
prefixes on all of them.
2021-02-08 18:26:08 -05:00