Commit Graph

5578 Commits

Author SHA1 Message Date
Alan Modra
7a5dd76f3c PR26468 UBSAN: tc-mep.c:1684 left shift of negative value
PR 26468
	* config/tc-mep.c (md_convert_frag): Use uint32_t for addend and
	other variables.
2020-08-31 20:28:11 +09:30
Alan Modra
169ec51259 PR26493 UBSAN: tc-riscv.c left shift negative and not representable
PR 26493
	* config/tc-riscv.c (riscv_ip): Cast X_add_number passed to
	VALID_* macros to unsigned.
2020-08-31 20:28:11 +09:30
Alan Modra
880fc278ca crx: ubsan: cannot be represented
* config/tc-crx.c: Formatting.
	(CRX_PRINT): Wrap params in parentheses.  Remove parens from uses
	throughout file.
	(reset_vars, get_register, get_copregister, get_optype, get_opbits),
	(get_opflags, get_number_of_operands, parse_operand, gettrap),
	(handle_LoadStor, getconstant, check_range, getreg_image),
	(parse_operands, parse_insn, print_operand, print_constant),
	(exponent2scale, mask_reg, process_label_constant, set_operand),
	(assemble_insn, print_insn): Delete unnecessary forward declaration.
	(print_insn): Make static.
	(print_constant): Make "constant" unsigned.
	(assemble_insn): Tidy REVERSE_MATCH index calc.
	* expr.c (generic_bignum_to_int32): Cast elements to valueT.
2020-08-31 20:28:09 +09:30
Alan Modra
26e3de8e0a PR26509 UBSAN: tc-z80.c:3656 shift exponent is too large
PR 26509
	* config/tc-z80.c (is_overflow): Use 1UL in mask shift expression.
2020-08-31 20:28:09 +09:30
Alan Modra
737d219034 tic4x-coff: ubsan: various shift UB
* config/tc-tic4x.c (tic4x_gen_to_words): Rewrite mantissa
	overflow test without UB.  Avoid other UB shifts by making them
	unsigned.
2020-08-31 20:28:08 +09:30
Cooper Qu
e2e82b115c CSKY: Refine operand format error reporting.
Rename SET_ERROR_NUMBER to SET_ERROR_STRING, and add SET_ERROR_INTEGER
to report error message which pass an integer argument.

gas/
	* config/tc-csky.c (csky_error_state): New member 'arg_int'.
	(SET_ERROR_NUMBER): Rename to SET_ERROR_STRING.
	(SET_ERROR_INTEGER): New.
	(err_formats): Add error format for ERROR_FREG_OVER_RANGE and
	ERROR_VREG_OVER_RANGE.
	(csky_show_error): Pass an integer argument for some error
	numbers.
	(parse_exp): Call SET_ERROR_STRING instead of SET_ERROR_NUMBER.
	(parse_rt): Likewise.
	(parse_type_ctrlreg): Likewise.
	(csky_get_reg_val): Likewise.
	(is_reglist_legal): Likewise.
	(is_freglist_legal): Likewise.
	(is_reglist_dash_comma_legal): Likewise.
	(is_reg_lshift_illegal): Likewise.
	(is_psr_bit): Likewise.
	(parse_type_cpreg): Likewise.
	(parse_type_cpcreg): Likewise.
	(parse_type_areg): Likewise.
	(parse_type_freg): Likewise.
	(parse_ldst_imm): Likewise and call SET_ERROR_INTEGER.
	(get_operand_value): Likewise.
	(parse_operands_op): Likewise and call is_imm_within_range,
	is_imm_within_range_ext and is_oimm_within_range.
	(md_assemble): Likewise.
	(is_imm_within_range): New.
	(is_imm_within_range_ext): Rename from is_imm_over_range.
	(is_oimm_within_range): Rename from is_oimm_over_range.
	(v2_work_add_sub): Call SET_ERROR_INTEGER.
	(csky_rolc): call is_imm_within_range instead of
	is_imm_over_range.

opcodes/
	* csky-dis.c (csky_output_operand): Assign dis_info.value for
	OPRND_TYPE_VREG.
2020-08-31 11:32:18 +08:00
Cooper Qu
dd221981c4 CSKY: Add warning when -mdsp and -mcpu=ck803ern are both added.
gas/
	* config/tc-csky.c (md_begin): Add warning when -mdsp and
 	-mcpu=ck803ern are both added.
 	(parse_ldst_imm): Fix error message.
2020-08-31 11:16:21 +08:00
Alan Modra
c930281005 PR26437, PR26438 UBSAN: tc-cr16.c left shifts and overflows
Always use unsigned constants in expressions generating masks.  The
following trys mightily to avoid UB (but hits it anyway with bits=32
and 0x7fffffff << 1), and worse, for 32-bit int, 64-bit long, bits=32
doesn't generate 0xffffffff.
    max = ((((1 << (bits - 1)) - 1) << 1) | 1);
results in -1, or max = 0xffffffffffffffff.

This patch fixes that problem, a possible shift exponent of -1U,
removes some dead code, and makes general tidies.

	PR26437
	PR26438
	* config/tc-cr16.c: Include limits.h, formatting.
	(CR16_PRINT): Wrap params in parentheses.  Remove parens from uses
	throughout file.
	(getconstant): Handle zero nbits.
	(print_operand): Simplify handling of index regs.
	(check_range): Use int32_t variables.  Correct range checks.
2020-08-30 20:49:18 +09:30
Alan Modra
8a267ea847 PR26481 UBSAN: tc-pj.c:281 index out of bounds
PR 26481
	* config/tc-pj.c (md_assemble): Don't loop past end of
	opcode->arg array.
2020-08-29 13:17:13 +09:30
Alan Modra
ed2ed4dcf4 PR26460 UBSAN: tc-ia64.c:6107 index out of bounds
PR 26460
	* config/tc-ia64.c (parse_operands): Don't access past end of
	idesc->operands.
2020-08-28 23:15:21 +09:30
Cooper Qu
0861f561eb CSKY: Support attribute section.
bfd
        * elf32-csky.c (csky_archs): Fix arch names.
        (csky_find_arch_with_name): New.
        (elf32_csky_merge_attributes): New.
        (csky_elf_merge_private_bfd_data): Add process of merge
        attribute section.
        (elf32_csky_obj_attrs_arg_type): New.
        (elf32_csky_obj_attrs_handle_unknown): New.
        (elf_backend_obj_attrs_vendor): Define.
        (elf_backend_obj_attrs_section): Define.
        (elf_backend_obj_attrs_arg_type): Define.
        (elf_backend_obj_attrs_section_type): Define.

binutils/
        * readelf.c (get_csky_section_type_name): New.
        (get_section_type_name): Add handler for CSKY.
        (display_csky_attribute): New.
        (process_arch_specific): Add handler for CSKY.
        * testsuite/binutils-all/strip-3.d: Remove .csky.attributes
        section.

elfcpp/
        * elfcpp.h (enum SHT): New enum SHT_CSKY_ATTRIBUTES.

gas/
        * gas/config/tc-csky.c (md_begin): Set attributes.
        (isa_flag): Change type to unsigned 64 bits.
        (struct csky_cpu_info): Likewise.
        (struct csky_macro_info): Likewise.
        (set_csky_attribute): New.
        * testsuite/gas/csky/802j.d: Ignore .csky.attributes section.
        * testsuite/gas/csky/all.d: Likewise.
        * testsuite/gas/csky/bsr1.d: Likewise.
        * testsuite/gas/csky/csky_vdsp.d: Likewise.
        * testsuite/gas/csky/cskyv2_all.d: Likewise.
        * testsuite/gas/csky/cskyv2_ck803r2.d: Likewise.
        * testsuite/gas/csky/cskyv2_ck860.d: Likewise.
        * testsuite/gas/csky/cskyv2_dsp.d: Likewise.
        * testsuite/gas/csky/cskyv2_elrw.d: Likewise.
        * testsuite/gas/csky/cskyv2_float.d: Likewise.
        * testsuite/gas/csky/enhance_dsp.d: Likewise.
        * testsuite/gas/csky/java.d: Likewise.
        * testsuite/gas/csky/v1_float.d: Likewise.
        * testsuite/gas/csky/v2_float_part1.d: Likewise.
        * testsuite/gas/csky/v2_float_part2.d: Likewise.
        * testsuite/gas/csky/v2_tls_gd.d: Likewise.
        * testsuite/gas/csky/v2_tls_ie.d: Likewise.
        * testsuite/gas/csky/v2_tls_ld.d: Likewise.
        * testsuite/gas/csky/v2_tls_le.d: Likewise.
        * testsuite/gas/elf/elf.exp: Add handler for CSKY.
        * testsuite/gas/elf/section2.e-csky: New.

include/
        * elf/csky.h (SHT_CSKY_ATTRIBUTES): Define.
        (Tag_CSKY_ARCH_NAME): New enum constant.
        (Tag_CSKY_CPU_NAME): Likewise.
        (Tag_CSKY_ISA_FLAGS): Likewise.
        (Tag_CSKY_DSP_VERSION): Likewise.
        (Tag_CSKY_VDSP_VERSION): Likewise.
        (Tag_CSKY_FPU_VERSION): Likewise.
        (Tag_CSKY_FPU_ABI): Likewise.
        (Tag_CSKY_FPU_ROUNDING): Likewise.
        (Tag_CSKY_FPU_DENORMAL): Likewise.
        (Tag_CSKY_FPU_Exception): Likewise.
        (Tag_CSKY_FPU_NUMBER_MODULE): Likewise.
        (Tag_CSKY_FPU_HARDFP): Likewise.
        (Tag_CSKY_MAX): Likewise.
        (VAL_CSKY_DSP_VERSION_EXTENSION): Likewise.
        (VAL_CSKY_DSP_VERSION_2): Likewise.
        (VAL_CSKY_VDSP_VERSION_1): Likewise.
        (VAL_CSKY_VDSP_VERSION_2): Likewise.
        (VAL_CSKY_FPU_ABI_SOFT): Likewise.
        (VAL_CSKY_FPU_ABI_SOFTFP): Likewise.
        (VAL_CSKY_FPU_ABI_HARD): Likewise.
        (VAL_CSKY_FPU_HARDFP_HALF): Likewise.
        (VAL_CSKY_FPU_HARDFP_SINGLE): Likewise.
        (VAL_CSKY_FPU_HARDFP_DOUBLE): Likewise.
        * opcode/csky.h (CSKY_ISA_VDSP_V2): Define.
        CSKYV1_ISA_E1: Change to long constant type.
        CSKYV2_ISA_E1: Likewise.
        CSKYV2_ISA_1E2: Likewise.
        CSKYV2_ISA_2E3: Likewise.
        CSKYV2_ISA_3E7: Likewise.
        CSKYV2_ISA_7E10: Likewise.
        CSKYV2_ISA_3E3R1: Likewise.
        CSKYV2_ISA_3E3R2: Likewise.
        CSKYV2_ISA_10E60: Likewise.
        CSKY_ISA_TRUST: Likewise.
        CSKY_ISA_CACHE: Likewise.
        CSKY_ISA_NVIC: Likewise.
        CSKY_ISA_CP: Likewise.
        CSKY_ISA_MP: Likewise.
        CSKY_ISA_MP_1E2: Likewise.
        CSKY_ISA_JAVA: Likewise.
        CSKY_ISA_MAC: Likewise.
        CSKY_ISA_MAC_DSP: Likewise.
        CSKY_ISA_DSP: Likewise.
        CSKY_ISA_DSP_1E2: Likewise.
        CSKY_ISA_DSP_ENHANCE: Likewise.
        CSKY_ISA_FLOAT_E1: Likewise.
        CSKY_ISA_FLOAT_1E2: Likewise.
        CSKY_ISA_FLOAT_1E3: Likewise.
        CSKY_ISA_FLOAT_3E4: Likewise.
        CSKY_ISA_VDSP: Likewise.

ld/
        * emulparams/cskyelf.sh: Support attribute section.
        * testsuite/ld-csky/tls-le-v1.d: Match .csky.attributes section.
        * ld/testsuite/ld-csky/tls-le.d: Likewise.
        * testsuite/ld-elf/non-contiguous.ld: Ignore .csky.attributes
        section.

opcodes/
        * csky-dis.c (CSKY_DEFAULT_ISA): Define.
        (csky_dis_info): Add member isa.
        (csky_find_inst_info): Skip instructions that do not belong to
        current CPU.
        (csky_get_disassembler): Get infomation from attribute section.
        (print_insn_csky): Set defualt ISA flag.
        * csky.h (CSKY_ISA_VDSP_2): Rename from CSKY_ISA_VDSP_V2.
        * csky-opc.h (struct csky_opcode): Change isa_flag16 and
        isa_flag32'type to unsigned 64 bits.
2020-08-28 17:23:24 +08:00
Alan Modra
e637b7ba2f PR26508 UBSAN: tc-xtensa.c:7764 null pointer bsearch
PR 26508
	* config/tc-xtensa.c (xg_get_trampoline_chain): Return early
	when n_entries is zero.
2020-08-26 23:23:45 +09:30
David Faust
4449c81a85 bpf: add xBPF ISA
This patch adds support for xBPF, another ISA targetting the BPF
virtual architecture. For now, the primary difference between eBPF
and xBPF is that xBPF supports indirect calls through the
'call %reg' form of the call instruction.

bfd/
	* archures.c (bfd_mach_xbpf): Define.
	* bfd-in2.h: Regenerate.
	* cpu-bpf.c (bfd_xbpf_arch) New.
	(bfd_bpf_arch) Update next in list field to point to xbpf arch.

cpu/
	* bpf.cpu (arch bpf): Add xbpf mach and isas.
	(define-xbpf-isa) New pmacro.
	(all-isas) Add xbpfle,xbpfbe.
	(endian-isas): New pmacro.
	(mach xbpf): New.
	(model xbpf-def): Likewise.
	(h-gpr): Add xbpf mach.
	(f-dstle, f-srcle, dstle, srcle): Add xbpfle isa.
	(f-dstbe, f-srcbe, dstbe, srcbe): Add xbpfbe isa.
	(define-alu-insn-un): Use new endian-isas pmacro.
	(define-alu-insn-bin, define-alu-insn-mov): Likewise.
	(define-endian-insn, define-lddw): Likewise.
	(dlind, dxli, dxsi, dsti): Likewise.
	(define-cond-jump-insn, define-call-insn): Likewise.
	(define-atomic-insns): Likewise.

gas/
	* config/tc-bpf.c: Add option -mxbpf to select xbpf isa.
	* testsuite/gas/bpf/indcall-1.d: New file.
	* testsuite/gas/bpf/indcall-1.s: Likewise.
	* testsuite/gas/bpf/indcall-bad-1.l: Likewise.
	* testsuite/gas/bpf/indcall-bad-1.s: Likewise.
	* testsuite/gas/bpf/bpf.exp: Run new tests.

opcodes/
	* bpf-desc.c: Regenerate.
	* bpf-desc.h: Likewise.
	* bpf-opc.c: Likewise.
	* bpf-opc.h: Likewise.
	* disassemble.c (disassemble_init_for_target): Set bits for xBPF
	ISA when appropriate.
2020-08-26 15:39:00 +02:00
Alan Modra
69ff2100fd PR26501, ASAN: tic54x_undefined_symbol tc-tic54x.c:5015
PR26501
	* gas/config/tc-tic54x.c (tic54x_undefined_symbol): Properly treat
	misc_symbol_hash entries without values.
2020-08-25 23:07:10 +09:30
Alan Modra
1de153a168 PR26500, ASAN: tic4x_inst_make tc-tic4x.c:1247
PR 26500
	* tc-tic4x.c (tic4x_inst_make): Don't die on terminating insn
	with name = "".
2020-08-25 23:07:10 +09:30
Alan Modra
d3e0baddb2 PR26441, ASAN: get_b_cc tc-cr16.c:1521
PR 26441
	* config/tc-cr16.c (get_b_cc): Return NULL early if op isn't
	two or three chars, and don't bother copying.
2020-08-25 23:07:10 +09:30
Alan Modra
250dd99fc9 PR26426, ASAN: neon_quad tc-arm.c:15175
PR 26426
	* config/tc-arm.c (do_neon_mvn, do_neon_swp): Bail out on
	NS_NULL shape.
2020-08-25 23:07:10 +09:30
Alan Modra
ca159256b4 gas warning fixes
Some versions of gcc with -Werror=format-overflow complain about using
a perfectly good 7 char buffer for "r%dr%d" when the int is between 0
and 64, apparently not seeing the value range.

note: __builtin___sprintf_chk output between 5 and 24 bytes into a destination of size 7

	* config/tc-arc.c (declare_register_set): Avoid false positive
	format-overflow warning.
	* config/tc-epiphany.c (md_assemble): Likewise.
	* config/tc-mips.c (md_begin): Likewise.
	* config/tc-mmix.c (mmix_md_begin): Likewise.
	* config/tc-nds32.c (nds32_elf_append_relax_relocs): Avoid false
	positive "may be used uninitialized" warning.
2020-08-25 23:06:50 +09:30
Cooper Qu
531c73a37b CSKY: Add new arch CK860.
bfd/
        * bfd-in2.h (bfd_mach_ck860): New.
        * cpu-csky.c (arch_info_struct): Add item for CK860.

gas/
        * config/tc-csky.c (csky_archs): Add item for CK860,
        change ck810 and ck807's arch_flag.
        (csky_cpus): Add item for CK860.
        (md_begin): Enable DSP for CK810 and CK807 by default.
        (md_apply_fix): Fix CKCORE_TLS_IE32 relocation failure.
        * gas/testsuite/gas/csky/cskyv2_all.d: Change 'sync 0'
        to 'sync'.
        * gas/testsuite/gas/csky/cskyv2_all.s: Likewise.
        * gas/testsuite/gas/csky/cskyv2_ck860.d: New.
        * gas/testsuite/gas/csky/cskyv2_ck860.s: New.
        * gas/testsuite/gas/csky/enhance_dsp.d: Change plsli.u16
        to plsli.16.
        * gas/testsuite/gas/csky/enhance_dsp.s: Likewise.

include/
        * opcode/csky.h (CSKYV2_ISA_10E60): New.
        (CSKY_ARCH_860): New.

opcode/
        * csky-dis.c (csky_find_inst_info): Skip CK860's instructions
        in other CPUs to speed up disassembling.
        * csky-opc.h (csky_v2_opcodes): Add CK860's instructions,
        Change plsli.u16 to plsli.16, change sync's operand format.

Change-Id: I80ec1a9c0cc600d668082a9b91ae6d45b33ec0fc
2020-08-24 20:27:07 +08:00
Alan Modra
12c4b9aad5 tic54x fixes
A number of the tic54x tests were failing, and I thought it worth
investigating since the target makes use of a lot of hash tables, and
we've just changed gas hash tables.  It turns out none of the gas
failures were due to hashing.

	* config/tc-tic54x.c (stag_add_field_symbols): Don't free "name"
	in case where it isn't copied.
	* config/tc-tic54x.h (LOCAL_LABELS_FB): Undef.
	* testsuite/gas/tic54x/field.d: Dump section contents and symbols
	rather than disassembling.
	* testsuite/gas/tic54x/set.d: Adjust for newer disassembly.
2020-08-24 21:48:08 +09:30
Alan Modra
f16c3d4f13 Remove "memory exhausted" messages
Since we use xcalloc to set up hash table memory, htab_create won't
ever return a failure.

	* config/tc-aarch64.c (md_begin): Don't bother checking for
	out of memory failure from str_htab_create.
	* config/tc-arc.c (arc_insert_opcode, md_begin): Likewise.
	(arc_extcorereg, arc_stralloc): Likewise.
	* config/tc-arm.c (md_begin): Likewise.
	* config/tc-cr16.c (initialise_reg_hash_table, md_begin): Likewise.
	* config/tc-cris.c (md_begin): Likewise.
	* config/tc-crx.c (md_begin): Likewise.
	* config/tc-pdp11.c (md_begin): Likewise.
	* config/tc-score.c (s3_build_reg_hsh, s3_begin): Likewise.
	* config/tc-score7.c (s7_build_reg_hsh, s7_begin): Likewise.
2020-08-24 13:29:33 +09:30
Alan Modra
f3da8a96ee gcc-4 -Og false positive "may be used uninitialised"
binutils/
	* readelf.c (dump_section_as_strings) Avoid false positive
	"may be used uninitialised".
gas/
	* config/tc-arm.c (move_or_literal_pool): Avoid false positive
	"may be used uninitialised".
	(opcode_lookup): Likewise.
2020-08-24 13:29:22 +09:30
Cooper Qu
d04aee0f41 CSKY: Add ck803r2 series cpu.
gas/
        * config/tc-csky.c (CSKY_ISA_803R2): New.
        (csky_archs): Add ck803r2 series.
        (md_begin): Fix warning about -medsp.
        (csky_get_freg_val): Support lowercase of fpu register name.
        * testsuite/gas/csky/cskyv2_ck803r2.s: New file.
        * testsuite/gas/csky/cskyv2_ck803r2.d: New file.

include/
        * csky.h (CSKYV2_ISA_3E3R2): New.

opcodes/
        * csky-opc.h (csky_v2_opcodes): Add instruction bnezad.
2020-08-24 10:25:03 +08:00
Alan Modra
fe0e921f00 PR26513, 629310abec breaks assembling PowerPC Linux kernels
Inserting with replacement is wrong for some gas hash table uses.
This patch implements an htab_insert that conditionally replaces, and
similarly for str_hash_insert.  str_hash_insert with replace=0 is
roughly equivalent to the older hash_insert, and str_hash_insert with
replace=1 to the older hash_jam, but return values are different.  I
found it useful to know whether the slot was occupied prior to
inserting/replacing.  I've also reinstated the fatal errors on messing
up opcode tables with duplicates.

	PR 26513
	* hash.h (htab_insert): Update prototype and comment.
	(struct string_tuple): Make "value" a const void*.
	(string_tuple_alloc): Likewise.
	(str_hash_find, str_hash_find_n): Cast returned value.
	(str_hash_insert): Add "replace" parameter, and return slot pointer.
	Free alloc'd element when not inserted.
	* hash.c (htab_insert): Likewise.  Return slot when element exists,
	otherwise return NULL.
	* read.c (pop_insert): Insert into hash table without first searching.
	* config/tc-avr.c (md_begin): Likewise.
	* config/tc-msp430.c (md_begin): Likewise.
	* config/tc-nds32.c (nds32_init_nds32_pseudo_opcodes): Likewise.
	* config/tc-v850.c (md_begin): Likewise.
	* macro.c (do_formals, define_macro, macro_expand_body): Likewise.
	(delete_macro): Delete from hash table.
	* config/tc-tic54x.c (subsym_create_or_replace): Correct logic.

	* symbols.c (local_symbol_make, symbol_table_insert): Allow
	replacement of hash table entries.
	* config/obj-coff-seh.c (seh_hash_insert): Likewise.
	* config/obj-coff.c (tag_insert): Likewise.
	* config/tc-iq2000.c (iq2000_add_macro): Likewise.
	* config/tc-m68k.c (md_begin): Likewise for aliases.
	* config/tc-tic4x.c (tic4x_asg): Likewise.
	* config/tc-tic6x.c (md_begin): Likewise.

	* dw2gencfi.c (dwcfi_hash_find_or_make): Disallow replacement of
	hash table entries.
	* ecoff.c (add_string, get_tag): Likewise.
	* macro.c (expand_irp): Likewise.
	* config/obj-elf.c (build_additional_section_info): Likewise.
	* config/tc-aarch64.c (insert_reg_alias): Likewise.
	(checked_hash_insert): Likewise.
	* config/tc-alpha.c (get_alpha_reloc_tag, md_begin): Likewise.
	* config/tc-arc.c (arc_insert_opcode, declare_register): Likewise.
	(declare_addrtype, md_begin, arc_extcorereg): Likewise.
	* config/tc-arm.c (insert_reg_alias): Likewise.
	(arm_tc_equal_in_insn, md_begin): Likewise.
	* config/tc-cr16.c (initialise_reg_hash_table, md_begin): Likewise.
	* config/tc-cris.c (md_begin): Likewise.
	* config/tc-crx.c (md_begin): Likewise.
	* config/tc-csky.c (md_begin): Likewise.
	* config/tc-d10v.c (md_begin): Likewise.
	* config/tc-dlx.c (md_begin): Likewise.
	* config/tc-ft32.c (md_begin): Likewise.
	* config/tc-h8300.c (md_begin): Likewise.
	* config/tc-hppa.c (md_begin): Likewise.
	* config/tc-i386.c (md_begin): Likewise.
	* config/tc-ia64.c (dot_rot, dot_entry, declare_register): Likewise.
	(md_begin, dot_alias): Likewise.
	* config/tc-m68hc11.c (md_begin): Likewise.
	* config/tc-m68k.c (md_begin): Likewise.
	* config/tc-mcore.c (md_begin): Likewise.
	* config/tc-microblaze.c (md_begin): Likewise.
	* config/tc-mips.c (md_begin): Likewise.
	* config/tc-mmix.c (md_begin): Likewise.
	* config/tc-mn10200.c (md_begin): Likewise.
	* config/tc-mn10300.c (md_begin): Likewise.
	* config/tc-moxie.c (md_begin): Likewise.
	* config/tc-nds32.c (nds32_relax_hint, md_begin): Likewise.
	* config/tc-nios2.c (md_begin): Likewise.
	* config/tc-ns32k.c (md_begin): Likewise.
	* config/tc-pdp11.c (md_begin): Likewise.
	* config/tc-pj.c (fake_opcode, md_begin): Likewise.
	* config/tc-ppc.c (ppc_setup_opcodes): Likewise.
	* config/tc-pru.c (md_begin): Likewise.
	* config/tc-riscv.c (init_ext_version_hash): Likewise.
	(init_opcode_names_hash, hash_reg_name, init_opcode_hash): Likewise.
	(riscv_init_csr_hash): Likewise.
	* config/tc-s390.c (s390_setup_opcodes, md_begin): Likewise.
	* config/tc-score.c (s3_insert_reg): Likewise.
	(s3_build_score_ops_hsh, s3_build_dependency_insn_hsh): Likewise.
	* config/tc-score7.c (s7_build_score_ops_hsh): Likewise.
	(s7_build_dependency_insn_hsh, s7_insert_reg): Likewise.
	* config/tc-sh.c (md_begin): Likewise.
	* config/tc-sparc.c (md_begin): Likewise.
	* config/tc-spu.c (md_begin): Likewise.
	* config/tc-tic30.c (md_begin): Likewise.
	* config/tc-tic4x.c (tic4x_inst_insert): Likewise.
	* config/tc-tic54x.c (stag_add_field_symbols, md_begin): Likewise.
	(tic54x_endstruct, tic54x_var, tic54x_macro_info): Likewise.
	(subsym_substitute): Likewise.
	* config/tc-tilegx.c (md_begin): Likewise.
	* config/tc-tilepro.c (md_begin): Likewise.
	* config/tc-vax.c (vip_begin): Likewise.
	* config/tc-wasm32.c (md_begin): Likewise.
	* config/tc-xgate.c (md_begin): Likewise.
	* config/tc-z8k.c (md_begin): Likewise.
	* testsuite/gas/ppc/dcbt.d,
	* testsuite/gas/ppc/dcbt.s: New test.
	* testsuite/gas/ppc/ppc.exp: Run it.

	* ecoff.c (add_string): Report fatal error on duplicates.
	* config/tc-alpha.c (md_begin): Likewise.
	* config/tc-arc.c (arc_insert_opcode, declare_register): Likewise.
	(declare_addrtype, md_begin, arc_extcorereg): Likewise.
	* config/tc-cr16.c (initialise_reg_hash_table, md_begin): Likewise.
	* config/tc-cris.c (md_begin): Likewise.
	* config/tc-crx.c (md_begin): Likewise.
	* config/tc-dlx.c (md_begin): Likewise.
	* config/tc-hppa.c (md_begin): Likewise.
	* config/tc-i386.c (md_begin): Likewise.
	* config/tc-ia64.c (dot_rot, dot_entry, declare_register): Likewise.
	(md_begin): Likewise.
	* config/tc-m68k.c (md_begin): Likewise.
	* config/tc-mips.c (md_begin): Likewise.
	* config/tc-nios2.c (md_begin): Likewise.
	* config/tc-ns32k.c (md_begin): Likewise.
	* config/tc-ppc.c (ppc_setup_opcodes): Likewise.
	* config/tc-pru.c (md_begin): Likewise.
	* config/tc-riscv.c (init_ext_version_hash): Likewise.
	(init_opcode_names_hash, hash_reg_name, init_opcode_hash): Likewise.
	* config/tc-s390.c (s390_setup_opcodes, md_begin): Likewise.
	* config/tc-sparc.c (md_begin): Likewise.
	* config/tc-tic30.c (md_begin): Likewise.
	* config/tc-tic4x.c (tic4x_inst_insert): Likewise.
	* config/tc-tilegx.c (md_begin): Likewise.
	* config/tc-tilepro.c (md_begin): Likewise.
	* config/tc-vax.c (vip_begin): Likewise.

	* config/tc-alpha.c,
	* config/tc-arm.c,
	* config/tc-avr.c,
	* config/tc-cr16.c,
	* config/tc-csky.c,
	* config/tc-i386.c,
	* config/tc-m68hc11.c,
	* config/tc-m68k.c,
	* config/tc-microblaze.c,
	* config/tc-ns32k.c,
	* config/tc-pj.c,
	* config/tc-ppc.c,
	* config/tc-score.c,
	* config/tc-score7.c,
	* config/tc-tic4x.c,
	* config/tc-tic54x.c,
	* config/tc-tilegx.c,
	* config/tc-tilepro.c,
	* config/tc-xgate.c: Formatting.
2020-08-23 21:38:05 +09:30
Alan Modra
3c0d9d71db gas symbol struct field renaming
Get rid of sy_ prefix, and some unused fields.

	* symbols.c (struct symbol_flags): Rename sy_volatile to volatil,
	and remove sy_ from other field names.  Update throughout.
	(struct symbol): Remove sy_ from field names.  Delete unused
	TARGET_SYMBOL_FIELDS.  Update throughout file.  Move after..
	(struct local_symbol): ..here.  Remove lsy_ from field names.
	Delete unused TC_LOCAL_SYMFIELD_TYPE.  Update throughout file.
	(local_symbol_resolved_p, local_symbol_mark_resolved): Delete.
	Expand uses throughout file.
	(local_symbol_get_frag, local_symbol_set_frag): Likewise.
	(symbol_new): Move symbol_table_frozen test to..
	(symbol_append): ..here, and..
	(symbol_insert): ..here.
	(resolve_symbol_value, symbol_relc_make_expr): White space fixes.
	(HANDLE_XADD_OPT1, HANDLE_XADD_OPT2): Likewise.
	* config/obj-coff.h (RESOLVE_SYMBOL_REDEFINITION): Update.
2020-08-21 18:39:23 +09:30
Alan Modra
e01e1cee39 Rearrange symbol_create parameters
These functions take an offset within frag, frag within section, and
section parameter.  So it makes sense to order the parameters as
section, frag, offset.

	* symbols.h (symbol_new, symbol_create, local_symbol_make),
	(symbol_temp_new): Arrange params as section, frag, offset.
	* symbols.c: Adjust to suit.
	* as.c: Likewise.
	* cgen.c: Likewise.
	* dwarf2dbg.c: Likewise.
	* ecoff.c: Likewise.
	* expr.c: Likewise.
	* itbl-ops.c: Likewise.
	* read.c: Likewise.
	* stabs.c: Likewise.
	* subsegs.c: Likewise.
	* config/obj-coff.c: Likewise.
	* config/obj-elf.c: Likewise.
	* config/obj-macho.c: Likewise.
	* config/tc-aarch64.c: Likewise.
	* config/tc-alpha.c: Likewise.
	* config/tc-arc.c: Likewise.
	* config/tc-arm.c: Likewise.
	* config/tc-avr.c: Likewise.
	* config/tc-cr16.c: Likewise.
	* config/tc-cris.c: Likewise.
	* config/tc-csky.c: Likewise.
	* config/tc-dlx.c: Likewise.
	* config/tc-hppa.c: Likewise.
	* config/tc-i386.c: Likewise.
	* config/tc-ia64.c: Likewise.
	* config/tc-m32r.c: Likewise.
	* config/tc-m68k.c: Likewise.
	* config/tc-mips.c: Likewise.
	* config/tc-mmix.c: Likewise.
	* config/tc-mn10200.c: Likewise.
	* config/tc-mn10300.c: Likewise.
	* config/tc-nds32.c: Likewise.
	* config/tc-nios2.c: Likewise.
	* config/tc-ppc.c: Likewise.
	* config/tc-riscv.c: Likewise.
	* config/tc-s390.c: Likewise.
	* config/tc-sh.c: Likewise.
	* config/tc-tic4x.c: Likewise.
	* config/tc-tic54x.c: Likewise.
	* config/tc-xtensa.c: Likewise.
2020-08-21 18:26:35 +09:30
Cooper Qu
d285ba8d06 CSKY: Support two operands form for bloop.
gas/
        * config/tc-csky.c (csky_insn_info): Add member last_isize.
        (md_assemble): Assign value to csky_insn.last_isize.
        * testsuite/gas/csky/enhance_dsp.d: Test bloop's two operands form.
        * testsuite/gas/csky/enhance_dsp.s: Likewise.

opcodes/
        * csky-opc.h (csky_v2_opcodes): Add two operands form for bloop.
2020-08-21 16:50:11 +08:00
Martin Liska
629310abec Port gas/config/* to str_htab.
* config/obj-coff-seh.c (seh_hash_insert): Port to use new
	str_htab type.
	(seh_hash_find): Likewise.
	(seh_hash_find_or_make): Likewise.
	* config/obj-coff.c (tag_init): Likewise.
	(tag_insert): Likewise.
	(tag_find): Likewise.
	* config/obj-elf.c (struct group_list): Likewise.
	(build_additional_section_info): Likewise.
	(free_section_idx): Likewise.
	(elf_adjust_symtab): Likewise.
	(elf_frob_file_after_relocs): Likewise.
	* config/tc-aarch64.c (INSN_SIZE): Likewise.
	(parse_reg): Likewise.
	(insert_reg_alias): Likewise.
	(create_register_alias): Likewise.
	(s_unreq): Likewise.
	(parse_shift): Likewise.
	(parse_pldop): Likewise.
	(parse_barrier): Likewise.
	(parse_barrier_psb): Likewise.
	(parse_bti_operand): Likewise.
	(parse_sys_reg): Likewise.
	(parse_sys_ins_reg): Likewise.
	(lookup_mnemonic): Likewise.
	(opcode_lookup): Likewise.
	(parse_operands): Likewise.
	(checked_hash_insert): Likewise.
	(sysreg_hash_insert): Likewise.
	(fill_instruction_hash_table): Likewise.
	(md_begin): Likewise.
	* config/tc-alpha.c (struct alpha_reloc_tag): Likewise.
	(get_alpha_reloc_tag): Likewise.
	(assemble_tokens_to_insn): Likewise.
	(assemble_tokens): Likewise.
	(md_begin): Likewise.
	* config/tc-arc.c (arc_find_opcode): Likewise.
	(arc_insert_opcode): Likewise.
	(find_opcode_match): Likewise.
	(declare_register): Likewise.
	(declare_addrtype): Likewise.
	(md_begin): Likewise.
	(arc_parse_name): Likewise.
	(tc_arc_regname_to_dw2regnum): Likewise.
	(arc_extcorereg): Likewise.
	* config/tc-arm.c (MVE_BAD_QREG): Likewise.
	(arm_reg_parse_multi): Likewise.
	(parse_reloc): Likewise.
	(insert_reg_alias): Likewise.
	(create_register_alias): Likewise.
	(s_unreq): Likewise.
	(parse_shift): Likewise.
	(parse_psr): Likewise.
	(parse_cond): Likewise.
	(parse_barrier): Likewise.
	(do_vfp_nsyn_opcode): Likewise.
	(opcode_lookup): Likewise.
	(arm_tc_equal_in_insn): Likewise.
	(md_begin): Likewise.
	* config/tc-avr.c (md_begin): Likewise.
	(avr_ldi_expression): Likewise.
	(md_assemble): Likewise.
	(avr_update_gccisr): Likewise.
	(avr_emit_insn): Likewise.
	* config/tc-cr16.c (get_register): Likewise.
	(get_register_pair): Likewise.
	(get_index_register): Likewise.
	(get_index_register_pair): Likewise.
	(get_pregister): Likewise.
	(get_pregisterp): Likewise.
	(initialise_reg_hash_table): Likewise.
	(md_begin): Likewise.
	(cr16_assemble): Likewise.
	(md_assemble): Likewise.
	* config/tc-cris.c (cris_insn_first_word_frag): Likewise.
	(md_begin): Likewise.
	(cris_process_instruction): Likewise.
	* config/tc-crx.c (get_register): Likewise.
	(get_copregister): Likewise.
	(md_begin): Likewise.
	(md_assemble): Likewise.
	* config/tc-csky.c (md_begin): Likewise.
	(parse_opcode): Likewise.
	(get_operand_value): Likewise.
	(v1_work_jbsr): Likewise.
	(v2_work_rotlc): Likewise.
	(v2_work_bgeni): Likewise.
	(v2_work_not): Likewise.
	* config/tc-d10v.c (sizeof): Likewise.
	(md_begin): Likewise.
	(do_assemble): Likewise.
	(md_apply_fix): Likewise.
	* config/tc-d30v.c (sizeof): Likewise.
	(md_begin): Likewise.
	(do_assemble): Likewise.
	* config/tc-dlx.c (RELOC_DLX_VTENTRY): Likewise.
	(md_begin): Likewise.
	(machine_ip): Likewise.
	* config/tc-ft32.c (md_begin): Likewise.
	(md_assemble): Likewise.
	* config/tc-h8300.c (md_begin): Likewise.
	(md_assemble): Likewise.
	* config/tc-hppa.c (pa_ip): Likewise.
	(md_begin): Likewise.
	* config/tc-i386.c (md_begin): Likewise.
	(i386_print_statistics): Likewise.
	(parse_insn): Likewise.
	(process_operands): Likewise.
	(i386_index_check): Likewise.
	(parse_real_register): Likewise.
	* config/tc-ia64.c (dot_rot): Likewise.
	(dot_entry): Likewise.
	(declare_register): Likewise.
	(md_begin): Likewise.
	(ia64_parse_name): Likewise.
	(md_assemble): Likewise.
	(dot_alias): Likewise.
	(do_alias): Likewise.
	(ia64_adjust_symtab): Likewise.
	(do_secalias): Likewise.
	(ia64_frob_file): Likewise.
	* config/tc-m68hc11.c (m68hc11_print_statistics): Likewise.
	(md_begin): Likewise.
	(print_insn_format): Likewise.
	(md_assemble): Likewise.
	* config/tc-m68k.c (tc_gen_reloc): Likewise.
	(m68k_ip): Likewise.
	(md_begin): Likewise.
	* config/tc-mcore.c (md_begin): Likewise.
	(md_assemble): Likewise.
	* config/tc-microblaze.c (md_begin): Likewise.
	(md_assemble): Likewise.
	(md_apply_fix): Likewise.
	* config/tc-mips.c (nopic_need_relax): Likewise.
	(md_begin): Likewise.
	(macro_build): Likewise.
	(mips16_macro_build): Likewise.
	(mips_lookup_insn): Likewise.
	(mips_ip): Likewise.
	(mips16_ip): Likewise.
	* config/tc-mmix.c (sizeof): Likewise.
	(mmix_md_begin): Likewise.
	(md_assemble): Likewise.
	* config/tc-mn10200.c (md_begin): Likewise.
	(md_assemble): Likewise.
	* config/tc-mn10300.c (HAVE_AM30): Likewise.
	(md_begin): Likewise.
	(md_assemble): Likewise.
	* config/tc-moxie.c (md_begin): Likewise.
	(md_assemble): Likewise.
	* config/tc-msp430.c (md_begin): Likewise.
	(msp430_operands): Likewise.
	(md_assemble): Likewise.
	* config/tc-nds32.c (PV_DONT_CARE): Likewise.
	(builtin_isreg): Likewise.
	(builtin_regnum): Likewise.
	(nds32_init_nds32_pseudo_opcodes): Likewise.
	(nds32_lookup_pseudo_opcode): Likewise.
	(nds32_relax_hint): Likewise.
	(md_begin): Likewise.
	(nds32_find_reloc_table): Likewise.
	(nds32_elf_append_relax_relocs_traverse): Likewise.
	(nds32_relax_branch_instructions): Likewise.
	(md_convert_frag): Likewise.
	(nds32_elf_analysis_relax_hint): Likewise.
	(tc_nds32_regname_to_dw2regnum): Likewise.
	* config/tc-nios2.c (nios2_opcode_lookup): Likewise.
	(nios2_reg_lookup): Likewise.
	(nios2_ps_lookup): Likewise.
	(md_begin): Likewise.
	* config/tc-ns32k.c (struct hash_control): Likewise.
	(parse): Likewise.
	(md_begin): Likewise.
	* config/tc-pdp11.c (md_begin): Likewise.
	(md_assemble): Likewise.
	* config/tc-pj.c (fake_opcode): Likewise.
	(alias): Likewise.
	(md_begin): Likewise.
	(md_assemble): Likewise.
	* config/tc-ppc.c (ppc_setup_opcodes): Likewise.
	(md_assemble): Likewise.
	* config/tc-pru.c (pru_opcode_lookup): Likewise.
	(pru_reg_lookup): Likewise.
	(md_begin): Likewise.
	(md_end): Likewise.
	* config/tc-riscv.c (init_ext_version_hash): Likewise.
	(riscv_get_default_ext_version): Likewise.
	(riscv_set_arch): Likewise.
	(init_opcode_names_hash): Likewise.
	(opcode_name_lookup): Likewise.
	(enum reg_class): Likewise.
	(hash_reg_name): Likewise.
	(riscv_init_csr_hash): Likewise.
	(reg_csr_lookup_internal): Likewise.
	(reg_lookup_internal): Likewise.
	(init_opcode_hash): Likewise.
	(md_begin): Likewise.
	(DECLARE_CSR): Likewise.
	(macro_build): Likewise.
	(riscv_ip): Likewise.
	* config/tc-s390.c (register_name): Likewise.
	(s390_setup_opcodes): Likewise.
	(md_begin): Likewise.
	(md_assemble): Likewise.
	(s390_insn): Likewise.
	* config/tc-score.c (struct s3_reg_map): Likewise.
	(s3_score_reg_parse): Likewise.
	(s3_dependency_type_from_insn): Likewise.
	(s3_parse_16_32_inst): Likewise.
	(s3_parse_48_inst): Likewise.
	(s3_insert_reg): Likewise.
	(s3_build_reg_hsh): Likewise.
	(s3_build_score_ops_hsh): Likewise.
	(s3_build_dependency_insn_hsh): Likewise.
	(s3_begin): Likewise.
	* config/tc-score7.c (struct s7_reg_map): Likewise.
	(s7_score_reg_parse): Likewise.
	(s7_dependency_type_from_insn): Likewise.
	(s7_parse_16_32_inst): Likewise.
	(s7_build_score_ops_hsh): Likewise.
	(s7_build_dependency_insn_hsh): Likewise.
	(s7_insert_reg): Likewise.
	(s7_build_reg_hsh): Likewise.
	(s7_begin): Likewise.
	* config/tc-sh.c (EMPTY): Likewise.
	(md_begin): Likewise.
	(find_cooked_opcode): Likewise.
	* config/tc-sparc.c (md_begin): Likewise.
	(sparc_ip): Likewise.
	* config/tc-spu.c (md_begin): Likewise.
	(md_assemble): Likewise.
	* config/tc-tic30.c (md_begin): Likewise.
	(tic30_operand): Likewise.
	(tic30_parallel_insn): Likewise.
	(md_assemble): Likewise.
	* config/tc-tic4x.c (TIC4X_ALT_SYNTAX): Likewise.
	(tic4x_asg): Likewise.
	(tic4x_inst_insert): Likewise.
	(tic4x_inst_add): Likewise.
	(md_begin): Likewise.
	(tic4x_operand_parse): Likewise.
	(md_assemble): Likewise.
	* config/tc-tic54x.c (MAX_SUBSYM_HASH): Likewise.
	(stag_add_field_symbols): Likewise.
	(tic54x_endstruct): Likewise.
	(tic54x_tag): Likewise.
	(tic54x_remove_local_label): Likewise.
	(tic54x_clear_local_labels): Likewise.
	(tic54x_var): Likewise.
	(tic54x_macro_start): Likewise.
	(tic54x_macro_info): Likewise.
	(tic54x_macro_end): Likewise.
	(subsym_isreg): Likewise.
	(subsym_structsz): Likewise.
	(md_begin): Likewise.
	(is_mmreg): Likewise.
	(is_type): Likewise.
	(encode_condition): Likewise.
	(encode_cc3): Likewise.
	(encode_cc2): Likewise.
	(encode_operand): Likewise.
	(tic54x_parse_insn): Likewise.
	(tic54x_parse_parallel_insn_firstline): Likewise.
	(subsym_create_or_replace): Likewise.
	(subsym_lookup): Likewise.
	(subsym_substitute): Likewise.
	(tic54x_undefined_symbol): Likewise.
	* config/tc-tic6x.c (md_begin): Likewise.
	(md_assemble): Likewise.
	* config/tc-tilegx.c (O_hw2_last_plt): Likewise.
	(INSERT_SPECIAL_OP): Likewise.
	(md_begin): Likewise.
	(tilegx_parse_name): Likewise.
	(parse_reg_expression): Likewise.
	(md_assemble): Likewise.
	* config/tc-tilepro.c (O_tls_ie_load): Likewise.
	(INSERT_SPECIAL_OP): Likewise.
	(tilepro_parse_name): Likewise.
	(parse_reg_expression): Likewise.
	(md_assemble): Likewise.
	* config/tc-v850.c (md_begin): Likewise.
	(md_assemble): Likewise.
	* config/tc-vax.c (md_ri_to_chars): Likewise.
	(vip_begin): Likewise.
	(vip): Likewise.
	(main): Likewise.
	(md_begin): Likewise.
	* config/tc-wasm32.c (md_begin): Likewise.
	(md_assemble): Likewise.
	* config/tc-xgate.c (xgate_parse_operand): Likewise.
	(md_begin): Likewise.
	(md_assemble): Likewise.
	* config/tc-z8k.c (md_begin): Likewise.
	(md_assemble): Likewise.
2020-08-20 10:56:07 +09:30
Martin Liska
32e4c1c2d7 Use libiberty hash in gas/read.c.
* read.c (struct po_entry): New.
	(hash_po_entry): Likewise.
	(eq_po_entry): Likewise.
	(po_entry_alloc): Likewise.
	(po_entry_find): Likewise.
	(pop_insert): Likewise.
	(pobegin): Use htab hash table.
	(read_a_source_file): Likewise.
	(s_macro): Likewise.
	(read_print_statistics): Likewise.
	* config/tc-m68k.c (m68k_conditional_pseudoop): Add const qualifier.
	* config/tc-m68k.h (m68k_conditional_pseudoop): Likewise.
2020-08-20 10:56:07 +09:30
Martin Liska
2b272f449e Use libiberty hash in gas/macro.c.
* config/tc-iq2000.c (iq2000_add_macro): Use htab hash table.
	* macro.c (struct hash_control): Use htab.
	(macro_init): Likewise.
	(do_formals): Likewise.
	(free_macro): Likewise.
	(define_macro): Likewise.
	(sub_actual): Likewise.
	(macro_expand_body): Likewise.
	(macro_expand): Likewise.
	(check_macro): Likewise.
	(delete_macro): Likewise.
	(expand_irp): Likewise.
	* macro.h (struct macro_hash_entry): New struct.
	(hash_macro_entry): New.
	(eq_macro_entry): Likewise.
	(macro_entry_alloc): Likewise.
	(macro_entry_find): Likewise.
	(struct formal_hash_entry): Likewise.
	(hash_formal_entry): Likewise.
	(eq_formal_entry): Likewise.
	(formal_entry_alloc): Likewise.
	(formal_entry_find): Likewise.
2020-08-20 10:53:40 +09:30
Alex Coplan
d4d05d13eb gas: Fix internal error in S_SET_SEGMENT
This patch fixes an internal error in GAS when defining a section using
a symbol that has already been named but not defined. For a minimal
reproducer, try the following input:

a=b
.sect a

The problem is that obj_elf_change_section() happily reuses the symbol
"a" created by equals() without clearing the sy_value field: prior to
this patch, it just set bsym. This caused a problem when attempting to
resolve the section symbol, since resolve_symbol_value() ended up
resolving the symbol as if it were the original symbol created by
equals(), which ends up leaving the section symbol in the undefined
section instead of in section a, hence the call to abort() in
S_SET_SEGMENT().

gas/ChangeLog:

	* config/obj-elf.c (obj_elf_change_section): When repurposing an
	existing symbol, ensure that we set sy_value as per other (fresh)
	section symbols.
	* testsuite/gas/elf/elf.exp: Add new test.
	* testsuite/gas/elf/section-symbol-redef.d: New test.
	* testsuite/gas/elf/section-symbol-redef.s: Input for test.
2020-08-17 14:23:14 +01:00
Nick Clifton
8118fd4346 Fix an internal compiler error when attempting to create a second $GDB_DEBUG$ section.
PR 26359
	* config/obj-som.c (obj_som_init_stab_section): Do nothing if the
	$GDB_DEBUG$ section has already been created.
2020-08-13 11:50:13 +01:00
Joe Ramsay
225f168451 [PATCH] gas: arm: Fix IT-predicated MVE vcvt
* config/tc-arm.c (do_neon_cvt_1): Parse vcvtne as vcvt-ne for
	NS_FD shape when MVE is present
	* testsuite/gas/arm/mve-vcvtne-it-bad.d: New test.
	* testsuite/gas/arm/mve-vcvtne-it-bad.l: New test.
	* testsuite/gas/arm/mve-vcvtne-it-bad.s: New test.
	* testsuite/gas/arm/mve-vcvtne-it.d: New test.
	* testsuite/gas/arm/mve-vcvtne-it.s: New test.
2020-08-12 16:44:54 +01:00
Alex Coplan
fa63795f40 aarch64: Don't assert on long sysreg names
This patch fixes an assertion failure on long system register operands
in the AArch64 backend. See the new testcase for an input which
reproduces the issue.

gas/ChangeLog:

	* config/tc-aarch64.c (parse_sys_reg): Don't assert when parsing
	a long system register.
	(parse_sys_ins_reg): Likewise.
	(sysreg_hash_insert): New.
	(md_begin): Use sysreg_hash_insert() to ensure all system
	registers are no longer than the maximum length at startup.
	* testsuite/gas/aarch64/invalid-sysreg-assert.d: New test.
	* testsuite/gas/aarch64/invalid-sysreg-assert.l: Error output.
	* testsuite/gas/aarch64/invalid-sysreg-assert.s: Input.

include/ChangeLog:

	* opcode/aarch64.h (AARCH64_MAX_SYSREG_NAME_LEN): New.
2020-08-10 17:44:02 +01:00
Przemyslaw Wirkus
f7cb161ea6 [aarch64] GAS doesn't validate the architecture version for any tlbi registers. Fixed with this patch.
* gas/config/tc-aarch64.c (parse_sys_reg): Call to
	aarch64_sys_ins_reg_supported_p instead of aarch64_sys_reg_supported_p.
	(parse_sys_ins_reg): Add aarch64_sys_reg_deprecated_p check.
	* include/opcode/aarch64.h (aarch64_sys_reg_deprecated_p): Functions
	paramaters changed.
	(aarch64_sys_reg_supported_p): Function removed.
	(aarch64_sys_ins_reg_supported_p): Functions paramaters changed.
	* opcodes/aarch64-opc.c (aarch64_print_operand):
	(aarch64_sys_reg_deprecated_p): Functions paramaters changed.
	(aarch64_sys_reg_supported_p): Function removed.
	(aarch64_sys_ins_reg_supported_p): Functions paramaters changed.
	(aarch64_sys_ins_reg_supported_p): Merged aarch64_sys_reg_supported_p
	into this function.
	* gas/testsuite/gas/aarch64/illegal-sysreg-5.d: New test.
	* gas/testsuite/gas/aarch64/illegal-sysreg-5.l: New test.
	* gas/testsuite/gas/aarch64/sysreg-5.s: New test.
2020-08-10 16:20:17 +01:00
Alan Modra
86c0f617ac Error on lmw, lswi and related PowerPC insns when LE
* config/tc-ppc.c (md_assemble): Error for lmw, stmw, lswi, lswx,
	stswi, or stswx in little-endian mode.
	* testsuite/gas/ppc/476.d,
	* testsuite/gas/ppc/476.s: Delete lmw, stmw, lswi, lswx, stswi, stswx.
	* testsuite/gas/ppc/a2.d,
	* testsuite/gas/ppc/a2.s: Move lmw, stmw, lswi, lswx, stswi, stswx..
	* testsuite/gas/ppc/be.d,
	* testsuite/gas/ppc/be.s: ..to here, new big-endian only test.
	* testsuite/gas/ppc/le_error.d,
	* testsuite/gas/ppc/le_error.l: New little-endian test.
	* testsuite/gas/ppc/ppc.exp: Run new tests.
2020-08-10 21:52:17 +09:30
Jozef Lawrynowicz
e4ae357fe8 MSP430: Remove unused -md GAS option
The MSP430 GAS option "-md" is supposed to indicate that the CRT startup
code should copy data from ROM to RAM at startup. However, this option
has no effect; GAS handles the related behaviour automatically by
looking for the presence of certain symbols in the input file.

gas/ChangeLog:

	* config/tc-msp430.c (OPTION_MOVE_DATA): Remove.
	(md_parse_option): Remove case for OPTION_MOVE_DATA.
	(md_longopts): Remove "md" entry.
	(md_show_usage): Likewise.
2020-08-03 16:05:48 +01:00
H.J. Lu
41eb8e8885 x86: Add {disp16} pseudo prefix
Use Prefix_XXX for pseudo prefixes.  Add {disp16} pseudo prefix and
replace {disp32} pseudo prefix with {disp16} in 16-bit mode test.
Check invalid {disp16}/{disp32} pseudo prefixes.

gas/

	PR gas/26305
	* config/tc-i386.c (_i386_insn::disp_encoding): Add
	disp_encoding_16bit.
	(parse_insn): Check Prefix_XXX for pseudo prefixes.  Handle
	{disp16}.
	(build_modrm_byte): Handle {disp16}.
	(i386_index_check): Check invalid {disp16} and {disp32} pseudo
	prefixes.
	* doc/c-i386.texi: Update {disp32} documentation and document
	{disp16}.
	* testsuite/gas/i386/i386.exp: Run x86-64-inval-pseudo.
	* testsuite/gas/i386/inval-pseudo.s: Add {disp32}/{disp16}
	tests.
	* testsuite/gas/i386/pseudos.s: Add {disp8}/{disp32} vmovaps
	tests with 128-byte displacement.  Add {disp16} tests.
	* testsuite/gas/i386/x86-64-pseudos.s: Add {disp8}/{disp32}
	vmovaps test.  Add (%r13)/(%r13d) tests.
	* testsuite/gas/i386/x86-64-inval-pseudo.l: New file.
	* testsuite/gas/i386/x86-64-inval-pseudo.s: Likewise.
	* testsuite/gas/i386/inval-pseudo.l: Updated.
	* testsuite/gas/i386/pseudos.d: Likewise.
	* testsuite/gas/i386/x86-64-pseudos.d: Likewise.

opcodes/

	PR gas/26305
	* i386-opc.h (Prefix_Disp8): New.
	(Prefix_Disp16): Likewise.
	(Prefix_Disp32): Likewise.
	(Prefix_Load): Likewise.
	(Prefix_Store): Likewise.
	(Prefix_VEX): Likewise.
	(Prefix_VEX3): Likewise.
	(Prefix_EVEX): Likewise.
	(Prefix_REX): Likewise.
	(Prefix_NoOptimize): Likewise.
	* i386-opc.tbl: Use Prefix_XXX on pseudo prefixes.  Add {disp16}.
	* i386-tbl.h: Regenerated.
2020-07-30 16:13:17 -07:00
H.J. Lu
1a02d6b0ff x86: Handle {disp32} for (%bp)/(%ebp)/(%rbp)
Since (%bp)/(%ebp)/(%rbp) are encoded as 0(%bp)/0(%ebp)/0(%rbp), use
disp32/disp16 on 0(%bp)/0(%ebp)/0(%rbp) for {disp32}.

Note: Since there is no disp32 on 0(%bp), use disp16 instead.

	PR gas/26305
	* config/tc-i386.c (build_modrm_byte): Use disp32/disp16 on
	(%bp)/(%ebp)/(%rbp) for {disp32}.
	* doc/c-i386.texi: Update {disp32} documentation.
	* testsuite/gas/i386/pseudos.s: Add (%bp)/(%ebp) tests.
	* testsuite/gas/i386/x86-64-pseudos.s: Add (%ebp)/(%rbp) tests.
	* testsuite/gas/i386/pseudos.d: Updated.
	* testsuite/gas/i386/x86-64-pseudos.d: Likewise.
2020-07-28 03:55:53 -07:00
Cooper Qu
2b42b0415a Fix Unreasonable arch and cpu conflict warning for ther CSky architecture.
* config/tc-csky.c (md_begin): Fix tests of arch and mach flags.
2020-07-21 11:32:44 +01:00
Maciej W. Rozycki
ec4fcab0ee MIPS/GAS: Remove stale `prev_reloc_op_frag' variable
Ever since commit 4d7206a284 ("Rework MIPS macro relaxation, fix string
merging bug"), <https://sourceware.org/ml/binutils/2004-01/msg00248.html>,
`prev_reloc_op_frag' has only been set and never used.  Remove it then.

	gas/
	* config/tc-mips.c (prev_reloc_op_frag): Remove variable.
	(my_getSmallExpression): Adjust accordingly.
2020-07-21 01:59:24 +01:00
Jan Beulich
b3983e5f53 x86: handle SVR4 escaped binary operators
PR gas/4572

When / is a comment character, its use as binary "divide" operator needs
escaping by a backslash. Besides the scrubber needing to support this
(addressed in an earlier change), there are also a few provisions needed
in target specific operator handling.

As the spec calls for % and * to also be escaped because of being
"overloaded", also recognize these, despite the overloading there not
really preventing their use as operators in most (%) or all (*) cases,
given the way how the rest of the assembler works.

To bring source and testsuite in line, also drop the TE_I386AIX part of
the respective conditional, as i?86-*-aix* support had been removed a
while ago.
2020-07-20 08:57:18 +02:00
Jan Beulich
48ef937e91 x86: honor absolute section when emitting code
Various provisions exist for insns to be placed in the absolute section,
yet actually trying to do so didn't work. While data emission (of non-
zero values) is not allowed by generic code, I think this functionality
is useful for the programmer to be able to determine the size of insns.
Therefore, rather than turning the silnet failure into a verbose one,
make things mostly work; the one class of insns not supported (yet) are
branches (JMP and Jcc) with dynamically determined displacement widths.
In this one case, an error now gets reported instead of silently
ignoring the code.

Also avoid recording ISA / feature usage for insns emitted to the
absolute section.
2020-07-20 08:55:48 +02:00
H.J. Lu
2585b7a5ce x86: Change PLT32 reloc against section to PC32
Commit 292676c1 resolved PLT32 reloc aganst local symbol to section.
Since PLT32 relocation must be against symbols, turn such PLT32
relocation into PC32 relocation.

gas/

	PR gas/26263
	* config/tc-i386.c (i386_validate_fix): Change PLT32 reloc
	against section to PC32 reloc.
	* testsuite/gas/i386/relax-5.d: Updated.
	* testsuite/gas/i386/x86-64-relax-4.d: Likewise.

ld/

	PR gas/26263
	* testsuite/ld-i386/i386.exp: Run PR gas/26263 test.
	* testsuite/ld-x86-64/x86-64.exp: Likewise.
	* testsuite/ld-i386/pr26263.d: New file.
	* testsuite/ld-x86-64/pr26263.d: Likewise.
	* testsuite/ld-x86-64/pr26263.s: Likewise.
2020-07-19 06:51:32 -07:00
H.J. Lu
7a70531559 x86: Remove 32-bit sign extension in offset_in_range
When encoding a 32-bit offset, there is no need to sign-extend it to 64
bits since only the lower 32 bits are used.

	* config/tc-i386.c (offset_in_range): Remove 32-bit sign
	extension.
2020-07-13 10:32:15 -07:00
H.J. Lu
a308b89de7 x86: Support GNU_PROPERTY_X86_FEATURE_2_TMM
Support GNU_PROPERTY_X86_FEATURE_2_TMM in

https://gitlab.com/x86-psABIs/x86-64-ABI/-/merge_requests/1

 #define GNU_PROPERTY_X86_FEATURE_2_TMM      (1U << 10)

binutils/

	* readelf.c (decode_x86_feature_2): Handle
	GNU_PROPERTY_X86_FEATURE_2_TMM.

gas/

	* config/tc-i386.c (output_insn): Check i.xstate to set
	GNU_PROPERTY_X86_FEATURE_2_TMM.
	* testsuite/gas/i386/i386.exp: Run x86-64-property-7,
	x86-64-property-8 and x86-64-property-9.
	* testsuite/gas/i386/x86-64-property-7.d: New file.
	* testsuite/gas/i386/x86-64-property-7.s: Likewise.
	* testsuite/gas/i386/x86-64-property-8.d: Likewise.
	* testsuite/gas/i386/x86-64-property-8.s: Likewise.
	* testsuite/gas/i386/x86-64-property-9.d: Likewise.
	* testsuite/gas/i386/x86-64-property-9.s: Likewise.

include/

	* elf/common.h (GNU_PROPERTY_X86_FEATURE_2_TMM): New.
2020-07-11 04:04:20 -07:00
H.J. Lu
921eafeada x86: Extract extended states from instruction template
Extract extended states from operand types in instruction template.  Set
xstate_zmm for master register move.

	* config/tc-i386.c (_i386_insn): Remove has_regmmx, has_regxmm,
	has_regymm, has_regzmm and has_regtmm.  Add xstate.
	(md_assemble): Set i.xstate from operand types in instruction
	template.
	(build_modrm_byte): Updated.
	(output_insn): Check i.xstate.
	* testsuite/gas/i386/i386.exp: Run property-6 and
	x86-64-property-6.
	* testsuite/gas/i386/property-6.d: New file.
	* testsuite/gas/i386/property-6.s: Updated.
	* testsuite/gas/i386/x86-64-property-6.d: Likewise.
2020-07-10 08:43:47 -07:00
Lili Cui
260cd341da x86: Add support for Intel AMX instructions
gas/

	* doc/c-i386.texi: Document amx_int8, amx_bf16 and amx_tile.
	* config/tc-i386.c (i386_error): Add invalid_sib_address.
	(cpu_arch): Add .amx_int8, .amx_bf16 and .amx_tile.
	(cpu_noarch): Add noamx_int8, noamx_bf16 and noamx_tile.
	(match_simd_size): Add tmmword check.
	(operand_type_match): Add tmmword.
	(type_names): Add rTMM.
	(i386_error): Add invalid_tmm_register_set.
	(check_VecOperands): Handle invalid_sib_address and
	invalid_tmm_register_set.
	(match_template): Handle invalid_sib_address.
	(build_modrm_byte): Handle non-vector SIB and zmmword.
	(i386_index_check): Disallow RegIP for non-vector SIB.
	(check_register): Handle zmmword.
	* testsuite/gas/i386/i386.exp: Add AMX new tests.
	* testsuite/gas/i386/intel-regs.d: Add tmm.
	* testsuite/gas/i386/intel-regs.s: Add tmm.
	* testsuite/gas/i386/x86-64-amx-intel.d: New.
	* testsuite/gas/i386/x86-64-amx-inval.l: New.
	* testsuite/gas/i386/x86-64-amx-inval.s: New.
	* testsuite/gas/i386/x86-64-amx.d: New.
	* testsuite/gas/i386/x86-64-amx.s: New.
	* testsuite/gas/i386/x86-64-amx-bad.d: New.
	* testsuite/gas/i386/x86-64-amx-bad.s: New.

opcodes/

	* i386-dis.c (TMM): New.
	(EXtmm): Likewise.
	(VexTmm): Likewise.
	(MVexSIBMEM): Likewise.
	(tmm_mode): Likewise.
	(vex_sibmem_mode): Likewise.
	(REG_VEX_0F3849_X86_64_P_0_W_0_M_1): Likewise.
	(MOD_VEX_0F3849_X86_64_P_0_W_0): Likewise.
	(MOD_VEX_0F3849_X86_64_P_2_W_0): Likewise.
	(MOD_VEX_0F3849_X86_64_P_3_W_0): Likewise.
	(MOD_VEX_0F384B_X86_64_P_1_W_0): Likewise.
	(MOD_VEX_0F384B_X86_64_P_2_W_0): Likewise.
	(MOD_VEX_0F384B_X86_64_P_3_W_0): Likewise.
	(MOD_VEX_0F385C_X86_64_P_1_W_0): Likewise.
	(MOD_VEX_0F385E_X86_64_P_0_W_0): Likewise.
	(MOD_VEX_0F385E_X86_64_P_1_W_0): Likewise.
	(MOD_VEX_0F385E_X86_64_P_2_W_0): Likewise.
	(MOD_VEX_0F385E_X86_64_P_3_W_0): Likewise.
	(RM_VEX_0F3849_X86_64_P_0_W_0_M_1_R_0): Likewise.
	(PREFIX_VEX_0F3849_X86_64): Likewise.
	(PREFIX_VEX_0F384B_X86_64): Likewise.
	(PREFIX_VEX_0F385C_X86_64): Likewise.
	(PREFIX_VEX_0F385E_X86_64): Likewise.
	(X86_64_VEX_0F3849): Likewise.
	(X86_64_VEX_0F384B): Likewise.
	(X86_64_VEX_0F385C): Likewise.
	(X86_64_VEX_0F385E): Likewise.
	(VEX_LEN_0F3849_X86_64_P_0_W_0_M_0): Likewise.
	(VEX_LEN_0F3849_X86_64_P_0_W_0_M_1_REG_0_RM_0): Likewise.
	(VEX_LEN_0F3849_X86_64_P_2_W_0_M_0): Likewise.
	(VEX_LEN_0F3849_X86_64_P_3_W_0_M_0): Likewise.
	(VEX_LEN_0F384B_X86_64_P_1_W_0_M_0): Likewise.
	(VEX_LEN_0F384B_X86_64_P_2_W_0_M_0): Likewise.
	(VEX_LEN_0F384B_X86_64_P_3_W_0_M_0): Likewise.
	(VEX_LEN_0F385C_X86_64_P_1_W_0_M_0): Likewise.
	(VEX_LEN_0F385E_X86_64_P_0_W_0_M_0): Likewise.
	(VEX_LEN_0F385E_X86_64_P_1_W_0_M_0): Likewise.
	(VEX_LEN_0F385E_X86_64_P_2_W_0_M_0): Likewise.
	(VEX_LEN_0F385E_X86_64_P_3_W_0_M_0): Likewise.
	(VEX_W_0F3849_X86_64_P_0): Likewise.
	(VEX_W_0F3849_X86_64_P_2): Likewise.
	(VEX_W_0F3849_X86_64_P_3): Likewise.
	(VEX_W_0F384B_X86_64_P_1): Likewise.
	(VEX_W_0F384B_X86_64_P_2): Likewise.
	(VEX_W_0F384B_X86_64_P_3): Likewise.
	(VEX_W_0F385C_X86_64_P_1): Likewise.
	(VEX_W_0F385E_X86_64_P_0): Likewise.
	(VEX_W_0F385E_X86_64_P_1): Likewise.
	(VEX_W_0F385E_X86_64_P_2): Likewise.
	(VEX_W_0F385E_X86_64_P_3): Likewise.
	(names_tmm): Likewise.
	(att_names_tmm): Likewise.
	(intel_operand_size): Handle void_mode.
	(OP_XMM): Handle tmm_mode.
	(OP_EX): Likewise.
	(OP_VEX): Likewise.
	* i386-gen.c (cpu_flag_init): Add entries for CpuAMX_INT8,
	CpuAMX_BF16 and CpuAMX_TILE.
	(operand_type_shorthands): Add RegTMM.
	(operand_type_init): Likewise.
	(operand_types): Add Tmmword.
	(cpu_flag_init): Add CPU_AMX_INT8, CpuAMX_BF16 and CpuAMX_TILE.
	(cpu_flags): Add CpuAMX_INT8, CpuAMX_BF16 and CpuAMX_TILE.
	* i386-opc.h (CpuAMX_INT8): New.
	(CpuAMX_BF16): Likewise.
	(CpuAMX_TILE): Likewise.
	(SIBMEM): Likewise.
	(Tmmword): Likewise.
	(i386_cpu_flags): Add cpuamx_int8, cpuamx_bf16 and cpuamx_tile.
	(i386_opcode_modifier): Extend width of fields vexvvvv and sib.
	(i386_operand_type): Add tmmword.
	* i386-opc.tbl: Add AMX instructions.
	* i386-reg.tbl: Add AMX registers.
	* i386-init.h: Regenerated.
	* i386-tbl.h: Likewise.
2020-07-10 05:18:34 -07:00
H.J. Lu
39776b1117 x86: Properly set YMM/ZMM features
Since VEX/EVEX vector instructions will always update the full YMM/ZMM
registers, set YMM/ZMM features for VEX/EVEX vector instructions.

	* config/tc-i386.c (output_insn): Set YMM/ZMM features for
	VEX/EVEX vector instructions.
	* testsuite/gas/i386/property-4.d: New file.
	* testsuite/gas/i386/property-4.s: Likewise.
	* testsuite/gas/i386/property-5.d: Likewise.
	* testsuite/gas/i386/property-5.s: Likewise.
	* testsuite/gas/i386/x86-64-property-4.d: Likewise.
	* testsuite/gas/i386/x86-64-property-5.d: Likewise.
2020-07-09 10:33:43 -07:00
Alan Modra
fe49679d51 Remove powerpc PE support
Plus some leftover powerpc lynxos support.

bfd/
	* coff-ppc.c: Delete.
	* pe-ppc.c: Delete.
	* pei-ppc.c: Delete.
	* Makefile.am (BFD32_BACKENDS, BFD32_BACKENDS_CFILES): Remove PE PPC.
	* coffcode.h (coff_set_arch_mach_hook, coff_set_flags): Remove
	PPCMAGIC code.
	(coff_write_object_contents): Remove PPC_PE code.
	* config.bfd: Move powerpcle-pe to removed targets.
	* configure.ac: Remove powerpc PE entries.
	* libcoff-in.h (ppc_allocate_toc_section): Delete.
	(ppc_process_before_allocation): Delete.
	* peXXigen.c: Remove POWERPC_LE_PE code and comments.
	* targets.c: Remove powerpc PE vectors.
	* po/SRC-POTFILES.in: Regenerate.
	* libcoff.h: Regenerate.
	* Makefile.in: Regenerate.
	* configure: Regenerate.
binutils/
	* dlltool.c: Remove powerpc PE support and comments.
	* configure.ac: Remove powerpc PE dlltool config.
	* configure: Regenerate.
gas/
	* config/obj-coff.h: Remove TE_PE support.
	* config/tc-ppc.c: Likewise.
	* config/tc-ppc.h: Likewise.
	* configure.tgt: Remove powerpc PE and powerpc lynxos.
	* testsuite/gas/cfi/cfi.exp (cfi-common-6): Remove powerpc PE
	condition.
	* testsuite/gas/macros/macros.exp: Don't xfail powerpc PE.
include/
	* coff/powerpc.h: Delete.
ld/
	* emulparams/ppcpe.sh: Delete.
	* scripttempl/ppcpe.sc: Delete.
	* emulparams/ppclynx.sh: Delete.
	* Makefile.am (ALL_EMULATION_SOURCES): Remove ppc PE and lynxos.
	* configure.tgt: Likewise.
	* emultempl/beos.em: Remove powerpc PE support.
	* emultempl/pe.em: Likewise.
	* po/BLD-POTFILES.in: Regenerate.
	* Makefile.in: Regenerate.
2020-07-09 22:58:16 +09:30