Some functions that should be marked static.
sim/rx/ChangeLog:
* fpu.c (check_exceptions): Make static.
* gdb-if.c (handle_step): Likewise.
* mem.c (mem_put_byte): Likewise.
While experimenting with switching on warnings for the rx simulator I
discovered this bug. In sim_do_command we get passed a 'const char *'
argument. We create a copy of this string to work with locally, but
then while processing this we accidentally switch back to reference
the original string.
sim/rx/ChangeLog:
* gdb-if.c (sim_do_command): Work with a copy of the command.
The rx simulator doesn't define sim_memory_map and so fails to link
with GDB. Define it now to return NULL, this can be extended later to
return an actual memory map if anyone wants this functionality.
sim/rx/ChangeLog:
* gdb-if.c (sim_memory_map): New function.
These ports don't use the common sim core, so they weren't providing
a sim_memory_map for gdb, so they failed to link with the new memory
map logic added for the sim. Add stubs to fix.
Few arches implement STATE_WATCHPOINTS()->pc while all of them implement
sim_pc_get. Lets switch the sim-watch core for monitoring pc events to
the sim_pc_get API so this module works for all ports, and then we can
delete this old back channel of snooping in the port's cpu state -- the
code needs the pointer to the pc storage so that it can read out bytes
and compare them to the watchrange.
This also fixes the logic on multi-cpu sims by removing the limitation
of only being able to watch CPU0's state.
The AC_CONFIG_HEADER macro is long deprecated, so switch to the
newer form. This also gets rid of the position limitation, and
drops support for an argument to SIM_AC_COMMON which we haven't
used anywhere.
These settings might have made sense in darker compiler times, but I
think they're largely obsolete now. Looking through the values that
get used in HDEFINES, it's quite limited, and configure itself should
handle them. If we still need something, we can leverage standard
autoconf macros instead, after we get a clear user report.
TDEFINES was never set anywhere and was always empty, so prune that.
This is a hand-written implementation that should have fairly complete
coverage for the base integer instruction set ("i"), and for the atomic
("a") and integer multiplication+division ("m") extensions. It also
covers 32-bit & 64-bit targets.
The unittest coverage is a bit weak atm, but should get better.
We renamed these years ago, but it looks like the cgen core missed the
TRACE_EXTRACT function, so these new ports still used the incompatible
common name. Fix those ports to use the right func.
When compiling we get the following warnings:
common/cgen-accfp.c: In function 'fixsfsi':
common/cgen-accfp.c:370:18: warning: pointer targets in passing argument 1 of 'sim_fpu_to32i' differ in signedness [-Wpointer-sign]
sim_fpu_to32i (&res, &op1, sim_fpu_round_near);
^
common/cgen-accfp.c: In function 'fixdfsi':
common/cgen-accfp.c:381:18: warning: pointer targets in passing argument 1 of 'sim_fpu_to32i' differ in signedness [-Wpointer-sign]
sim_fpu_to32i (&res, &op1, sim_fpu_round_near);
^
This port only had one minor warning left in it, so fix it and then
enable -Werror behavior by deleting the macro call. We'll use the
common default now (which is -Werror).
My recent rewrite of the nltvals generator fixed a bug where SYS_times
was not being exported for v850. But that in turn uncovered this bug
where the SYS_times codepath had a compile error.
This port only had one minor warning left in it, so fix it and then
enable -Werror behavior by deleting the macro call. We'll use the
common default now (which is -Werror).
Existing ports already have sizeof_pc set to the same size as sim_cia,
so simply make that part of the core code. We already assume this in
places by way of sim_pc_{get,set}, and this is how it's documented in
the sim-base.h API.
There is code to allow sims to pick different register word sizes from
address sizes, but most ports use the defaults for both (32-bits), and
the few that support multiple register sizes never change the address
size (so address defaults to register). I can't think of any machine
where the register hardware size would be larger than the address word
size either. We have ABIs that behave that way (e.g. x32), but the
hardware is still equivalent register sized.
When the target's PC is 64-bits, this shift expands into a range of
8 * 8 - 1 which doesn't work with 32-bit constants. Force it to be
a 64-bit value all the time and let the compiler truncate it.
This port doesn't build if these hardware modules are omitted, and
there's no reason we need to make it conditional at build time, so
always enable it. The hardware devices only get turned on if the
user requests it at runtime via hardware settings.
This wasn't supposed to be in here when it was first merged as we
had specifically disabled it for all the tests (and ADI has papers
in place w/the FSF). Clean up this one.
This was mostly orphaned a while back, but left behind so people could
still run `make headers`. Merge that one target to the top sim dir and
delete all the build logic. This should avoid confusing people further.
It's not 1996 anymore, so stop writing shell code like it is, and
rewrite it with modern POSIX shell standards. This makes it much
more user friendly.
Then regenerate the file with latest newlib sources to verify.
Now that all port tests live under testsuite/sim/*/, and none live
in testsuite/ directly, flatten the structure by moving all of the
dirs under testsuite/sim/ to testsuite/ directly.
We need to stop passing --tool to dejagnu so that it searches all
dirs and not just ones that start with "sim". Since we have no
other dirs in this tree, and no plans to add any, should be fine.
Now that we've moved all ports to dejagnu & testsuite/sim/, the only
thing the testsuite/configure script has been doing is filling in the
sim_arch field in the testsuite/Makefile. We can simply let the top
sim/configure script do that for us now. This simplifies & speeds up
the build a bit by killing an entire configure script.
This is the only target using a dir directly under testsuite/. All
others use sim/<arch>/ instead. Relocate it so all targets look the
same, and so we can leverage the common test harness.
We drop loop.s in the process because it was never referenced and
was just 2 lines of code.
All other test files are moved & have directives added to the top so
that the test harness can invoke them correctly.
No tests were ever added in here in the ~22 years since it was first
created. Seems unlikely any tests will be added at this rate, and
the sim/mips/ testdir already has some (light) coverage for this
target. So punt the tree.
The frv-elf subdir contained five tests:
* cache: A cache test of some sort.
* exit47: A program to test exit status of 47 from sim.
* grloop: Some basic limited loop test program.
* hello: Standard "hello world" output program.
* loop: An infinite loop program.
The loop.s test is never referenced anywhere, and is all of 2 lines.
Anyone who really needs a while(1); test case and re-implement it
themselves locally.
The cache.s code isn't referenced anywhere because it requires some
custom args to the run program, and when this testcase was added, we
didn't have any support for that. We do now, so we can add a header
to enable that. Turns out the code crashes even with those, so turn
around and mark it xfail. Maybe someone someday will care.
That leaves the small exit47, grloop, and hello tests. Now that the
sim test harness supports testing for custom exit status, we can move
them all to sim/frv/ to maintain test coverage.
The remaining differences between frv-elf & sim/frv are:
* frv-elf/ runs for frv-*-elf while sim/frv/ runs for frv*-*-*.
* frv-elf/ runs "*.s" files while sim/frv/ only has .cgs and such.
On closer inspection, these are also meaningless distinctions:
* There is nothing specific to the tests that require an *-elf
target. Normally that would mean newlib+libgloss type stuff,
but there's no such requirement in frv-elf/.
* The ".s" suffix is the standard "this is an assembly file" suffix.
Since FRV is a CGEN target, we can reuse the existing convention of
".ms" to mean "miscellaneous .s" as in "this is an assembly file,
and run/bucket its test results in the miscellaneous category".
So moving frv-elf/{cache,exit47,grloop,hello}.s to sim/frv/*.ms makes
sense and simplifies things quite a bit for the target while also
slightly increasing the coverage for some tuples.
The m32r-elf subdir contained three tests:
* exit47: A program to test exit status of 47 from sim.
* hello: Standard "hello world" output program.
* loop: An infinite loop program.
There's already a sim/m32r/hello.ms test that does exactly the same
thing as m32r-elf/hello.s, so we can delete that.
The loop.s test is never referenced anywhere, and is all of 2 lines.
Anyone who really needs a while(1); test case and re-implement it
themselves locally.
That leaves the single exit47 test. Now that the sim test harness
supports testing for custom exit status, we can easily move that to
sim/m32r/exit47.ms to maintain test coverage.
The remaining differences between m32r-elf & sim/m32r are:
* m32r-elf/ runs for m32r-*-elf while sim/m32r/ runs for m32r*-*-*.
* m32r-elf/ runs "*.s" files while sim/m32r/ runs "*.ms" files.
On closer inspection, these are also meaningless distinctions:
* There is nothing specific to the tests that require an *-elf
target. Normally that would mean newlib+libgloss type stuff,
but there's no such requirement in m32r-elf/.
* The ".s" suffix is the standard "this is an assembly file"
suffix. Turns out ".ms" is just how sim/m32r/ (and a few other
CGEN based targets) categorize/bucket test cases. It simply
means "miscellaneous .s" as in "this is an assembly file, and
run/bucket its test results in the miscellaneous category".
So moving m32r-elf/exit47.s to sim/m32r/exit47.ms makes sense and
simplifies things quite a bit for the target while also slightly
increasing the coverage for some tuples.
Some tests want to verify they can control the exit status, and
allowing any non-zero value would allow tests to silently fail:
if it crashed & exited 1, or forced all non-zero to 1, then we
wouldn't be able to differentiate with a test exiting with a
status like 47.
Extend the test harness to allow tests to declare their expected
exit status that would be defined as a "pass". This requires a
small tweak to the sim_run API to return the status directly, but
that shouldn't be a big deal as it's only used by sim code.
The h8300 sim has its own implementation for memory handling that I'd
like to replace with the common sim memory code. However, it's got a
weird bit of code it calls "eightbit mem" that makes this not as easy
as it would otherwise be. The code has this comment:
/* These define the size of main memory for the simulator.
Note the size of main memory for the H8/300H is only 256k. Keeping it
small makes the simulator run much faster and consume less memory.
The linker knows about the limited size of the simulator's main memory
on the H8/300H (via the h8300h.sc linker script). So if you change
H8300H_MSIZE, be sure to fix the linker script too.
Also note that there's a separate "eightbit" area aside from main
memory. For simplicity, the simulator assumes any data memory reference
outside of main memory refers to the eightbit area (in theory, this
can only happen when simulating H8/300H programs). We make no attempt
to catch overlapping addresses, wrapped addresses, etc etc. */
I've read the H8/300 Programming Manual and the H8/300H Software Manual
and can't find documentation on it. The closest I can find is the bits
about the exception vectors, but that sounds like a convention where the
first 256 bytes of memory are used for a special purpose. The sim will
actually allocate a sep memory buffer of 256 bytes and you address it by
accessing anywhere outside of main memory. e.g. I would expect code to
access it like:
uint32_t *data = (void *)0;
data[0] = reset_exception_vector;
not like the sim expects like:
uint8_t *data = (void *)0x1000000;
data[0] = ...;
The gcc manual has an "eightbit_data" attribute:
Use this attribute on the H8/300, H8/300H, and H8S to indicate that
the specified variable should be placed into the eight-bit data
section. The compiler generates more efficient code for certain
operations on data in the eight-bit data area. Note the eight-bit
data area is limited to 256 bytes of data.
And the gcc code implies that it's accessed via special addressing:
eightbit_data: This variable lives in the 8-bit data area and can
be referenced with 8-bit absolute memory addresses.
I'm fairly certain these are referring to the 8-bit addressing modes
that allow access to 0xff00 - 0xffff with only an 8-bit immediate.
They aren't completely separate address spaces which this eightbit
memory buffer occupies.
But the sim doesn't access its eightbit memory based on specific insns,
it does it purely on the addresses requested.
Unfortunately, much of this code was authored by Michael Snyder, so I
can't ask him :(. I asked Renesas support and they didn't know:
https://renesasrulz.com/the_vault/f/archive-forum/6952/question-about-eightbit-memory
So I've come to the conclusion that this was a little sim-specific hack
done for <some convenience> and has no relation to real hardware. And
as such, let's drop it until someone notices and can provide a reason
for why we need to support it.
The default watchpoint handler is NULL. That means any port that
sets the STATE_WATCHPOINTS->pc field will crash if you try to use
the --watch options but don't configure the interrupt handler. In
the past, you had to setup STATE_WATCHPOINTS->pc if you wanted to
support PC profiling, and while that was fixed a while ago, we have
a lot of ports who still configure it.
We already add a default set of interrupts (just "int") if the port
doesn't define any. Let's also add a default handler that raises a
SIGTRAP. When connected to gdb, this is a breakpoint which is what
people would expect. When running standalone, it'll abort the sim,
but it's unclear whether there's anything better to do there. This
really is just to make the watchpoint module more usable out of the
box for most ports with very little setup, at least inside of gdb.
The code supports a <start>[,<end>] syntax, but the logic for handling
the <end> check was broken: it would detect the first byte was ",", but
then include that in the strtoul call meaning the result is always 0.
Further, it (re)assigned to arg0 when it meant arg1 which means this
code always processed a range expression as 0,0. Oops.
My change 1ac72f0659 ("sim: convert to
bfd_endian") subtly broke the watchpoint module on little endian host
systems. The old code used 0 to mean "whatever the host endian is",
and while that was changed to use BFD_ENDIAN_UNKNOWN, this caller was
missed. Since its API used an int instead of an enum, the coercion
from 0 to the BFD endian enum was silently missed, and 0 happens to
be BFD_ENDIAN_BIG.
Instead of restoring the old logic by passing in BFD_ENDIAN_UNKNOWN,
we know the right host endian at compile time, so use that directly.
