PR ld/21884
* testsuite/ld-elf/pr21884.d: Add AVR, HPPA, IA64, M68HC1x and
SCORE to list of targets not supporting file format changes during
linking.
* testsuite/ld-unique/pr21529.d: Likewise.
* emultempl/avrelf.em (_before_allocation): Skip for non-ELF
output formats.
(avr_elf_create_output_section_statements): Fail if the output
format is not ELF.
(avr_finish): Do not access the ELF header in non-ELF format
output bfds.
* emultempl/m68hc1xelf.em (_before_allocation): Skip for non-ELF
output formats.
(m68hc11elf_create_output_section_statements): Fail if the putput
format is not ELF.
(m68hc11elf_after_allocation): Skip for non-ELF output formats.
The AVR target has an elf header flag to indicate if an object was
assembler ready for linker relaxation. If a partial link is performed
then it is important that the link-relax flag in the output object is
set correctly, otherwise, during the final link, we might try to perform
linker relaxation on code that was not assembled suitably.
As the link-relax elf header covers the entire object file we must be
conservative when setting the flag in the output object, so, for a
partial link, any input object that does not have the link-relax flag
set will cause the output object to also not have the link-relax flag
set.
This conservative approach could be softened in future, we only need to
disable the link relax flag if an input file is not marked link-relax
ready, and the input file contains a relaxable section. However, I've
left this optimisation for a later day.
For the final link I've overloaded the use of the link-relax elf header
flag, in a final executable, the flag now indicates if the executable
was built with linker relaxation on or not.
ld/ChangeLog:
* emultempl/avrelf.em: Add include of elf/avr.h.
(avr_finish): New function.
(LDEMUL_FINISH): Added.
ld/testsuite/ChangeLog:
* ld-avr/relax-elf-flags-01.d: New file.
* ld-avr/relax-elf-flags-02.d: New file.
* ld-avr/relax-elf-flags-03.d: New file.
* ld-avr/relax-elf-flags-04.d: New file.
* ld-avr/relax-elf-flags-05.d: New file.
* ld-avr/relax-elf-flags-06.d: New file.
* ld-avr/relax-elf-flags-07.d: New file.
* ld-avr/relax-elf-flags-08.d: New file.
* ld-avr/relax-elf-flags-a.s: New file.
* ld-avr/relax-elf-flags-b.s: New file.
2011-03-22 Eric B. Weddington <eric.weddington@atmel.com>
* archures.c: Add AVR XMEGA architecture information.
* cpu-avr.c (arch_info_struct): Likewise.
* elf32-avr.c (bfd_elf_avr_final_write_processing): Likewise.
(elf32_avr_object_p): Likewise.
/gas:
2011-03-22 Eric B. Weddington <eric.weddington@atmel.com>
* config/tc-avr.c (struct avr_opcodes_s): Add opcode field.
(AVR_INSN): Change definition to match.
(avr_opcodes): Likewise, change to match.
(mcu_types): Add XMEGA architecture names and new XMEGA device names.
(md_show_usage): Add XMEGA architecture names.
(avr_operand): Add 'E' constraint for DES instruction of XMEGA devices.
Add support for SPM Z+ instruction.
* doc/c-avr.texi: Add documentation for XMEGA architectures and
devices.
/include/opcode:
2011-03-22 Eric B. Weddington <eric.weddington@atmel.com>
* avr.h (AVR_ISA_SPMX,AVR_ISA_DES,AVR_ISA_M256,AVR_ISA_XMEGA):
New instruction set flags.
(AVR_INSN): Add new instructions for SPM Z+, DES for XMEGA.
/ld:
2011-03-22 Eric B. Weddington <eric.weddington@atmel.com>
* Makefile.am (ALL_EMULATION_SOURCES): Add AVR XMEGA architectures.
(eavrxmega?.c): Likewise.
* configure.tgt (targ_extra_emuls): Likewise.
* emulparams/avrxmega1.sh: New file.
* emulparams/avrxmega2.sh: Likewise.
* emulparams/avrxmega3.sh: Likewise.
* emulparams/avrxmega4.sh: Likewise.
* emulparams/avrxmega5.sh: Likewise.
* emulparams/avrxmega6.sh: Likewise.
* emulparams/avrxmega7.sh: Likewise.
* emultempl/avrelf.em (avr_elf_${EMULATION_NAME}_before_allocation):
Add avrxmega6, avrxmega7 to list of architectures for no stubs.
/opcodes:
2011-03-22 Eric B. Weddington <eric.weddington@atmel.com>
* avr-dis.c (avr_operand): Add opcode_str parameter. Check for
post-increment to support LPM Z+ instruction. Add support for 'E'
constraint for DES instruction.
(print_insn_avr): Adjust calls to avr_operand. Rename variable.
* ld.h (struct args_type): Rename 'relax' field to
'disable_target_specific_optimizations' and turn it into a
tri-state variable.
(RELAXATION_DISABLED_BY_DEFAULT): New macro.
(RELAXATION_DISABLED_BY_USER): New macro.
(RELAXATION_ENABLED): New macro.
(DISABLE_RELAXATION): New macro.
(ENABLE_RELAXATION): New macro.
* lexsup (enum option_values): Add OPTION_NO_RELAX.
(struct ld_options): Add --no-relax.
(parse_args): Handle OPTION_NO_RELAX. Use DISABLE_RELAXATION and
ENABLE_RELAXATION macros.
* ldlang.c (lang_relax_sections): Use RELAXATION_ENABLED macro.
(lang_process): Likewise.
* ldmain.c (main): Initialise
disable_target_specific_optimizations field.
(multiple_definition): Use RELAXATION_ENABLED macro.
* ld.texinfo: Document new command line option.
* emultempl/alphaelf.em: Remove --no-relax option.
(before_allocation): Test RELAXATION_DISABLED_BY_USER macro.
Use ENABLE_RELAXATION macro.
* emultempl/avrelf.em: (after_allocation): Test RELAXATION_ENABLED
macro.
* emultempl/cr16elf.em: Remove --no-relax option.
(before_allocation): Test RELAXATION_DISABLED_BY_USER macro.
Use ENABLE_RELAXATION macro.
* emultempl/crxelf.em: Remove --no-relax option.
(before_allocation): Test RELAXATION_DISABLED_BY_USER macro.
Use ENABLE_RELAXATION macro.
* emultempl/mmix-elfnmmo.em: (before_allocation): Use
ENABLE_RELAXATION macro.
* emultempl/needrelax.em: (before_allocation): Use
ENABLE_RELAXATION macro.
* emultempl/ppc32elf.em: (before_allocation): Test
RELAXATION_DISABLED_BY_DEFAULT macro. Use
ENABLE_RELAXATION macro.
* emultempl/sh64elf.em: (before_allocation): Test
RELAXATION_ENABLED macro. Use DISABLE_RELAXATION macro.
* emultempl/xtensaelf.em: Remove --no-relax option.
(before_allocation): Test RELAXATION_ENABLED macro.
Use ENABLE_RELAXATION macro.
