For some reason, these targets are missing although others from the
same family are present. This looks like an oversight.
This enables calling 'make install-dvi' from the top-level build
directory.
The attempt in 5e9091dab8 to correct gold for modern LLVM has broken
gold for older compilers. This commit introduced C++11 types without
changing the build system to require a C++ compiler. More importantly
it depends on the compiler having at least C++11 as the default
language. Older compilers which support C++11 but not as the default
language needlessly break. Fix that.
PR gold/30867
* configure.ac (AX_CXX_COMPILE_STDCXX): Require C++11.
* Makefile.in: Regenerate.
* aclocal.m4: Regenerate.
* config.in: Regenerate.
* configure: Regenerate.
* testsuite/Makefile.in: Regenerate.
Adds two new external authors to etc/update-copyright.py to cover
bfd/ax_tls.m4, and adds gprofng to dirs handled automatically, then
updates copyright messages as follows:
1) Update cgen/utils.scm emitted copyrights.
2) Run "etc/update-copyright.py --this-year" with an extra external
author I haven't committed, 'Kalray SA.', to cover gas testsuite
files (which should have their copyright message removed).
3) Build with --enable-maintainer-mode --enable-cgen-maint=yes.
4) Check out */po/*.pot which we don't update frequently.
This reloc is meant for the 16-bit LWGP instruction, 0x6400/0xfc00
match/mask encoding in `micromips_opcodes'. It is correctly specified
to operate on a half-word by the howtos in elf32-mips.c, elfn32-mips.c
and elf64-mips.c, but is incorrectly subject to shuffle/unshuffle in
code like _bfd_mips_elf32_gprel16_reloc.
Current behaviour when applying the reloc to .byte 0x11,0x22,0x33,0x44
is to apply the reloc to byte 0x22 when big-endian, and to byte 0x33
when little-endian. Big-endian behaviour is unchanged after this
patch and little-endian correctly applies the reloc to byte 0x11.
The patch also corrects REL addend extraction from section contents,
and overflow checking. gold had all of the bfd problems with this
reloc and additionally did not apply the rightshift by two.
bfd/
* elfxx-mips.c (micromips_reloc_shuffle_p): Return false for
R_MICROMIPS_GPREL7_S2.
(mips_elf_calculate_relocation): Correct sign extension and
overflow calculation for R_MICROMIPS_GPREL7_S2.
(_bfd_mips_elf_relocate_section): Update small-data overflow
message.
gold/
* mips.cc (Mips_relocate_functions::should_shuffle_micromips_reloc):
Return false for R_MICROMIPS_GPREL7_S2.
(Mips_relocate_functions::mips_reloc_unshuffle): Update comment.
(Mips_relocate_functions::relgprel): Remove R_MICROMIPS_GPREL7_S2
handling.
(Mips_relocate_functions::relgprel7): New function.
(Target_mips::Relocate::relocate): Adjust to suit.
ld/
* testsuite/ld-mips-elf/reloc-4.d: Adjust expected error.
* testsuite/ld-mips-elf/reloc-5.d: Likewise.
The std::basic_string template type is only specified for
instantiations using character types. Newer (LLVM) libc++
implementations no longer allow non-character integer types
to be used.
gold/
* output.cc: Include <uchar.h>.
(Output_section::add_merge_input_section): Use char16_t and
char32_t for 2- and 4-byte entry size, respectively.
* stringpool.cc: Include <uchar.h>.
(Stringpool_template): Explicitly instantiate for char16_t,
char32_t instead of uint16_t, uint32_t.
* merge.cc (Output_merge_string): Likewise.
Following the arrangement in GCC select a 64-bit ABI by default, either
n32 or n64, rather than o32 for `mipsisa64*-*-linux*' targets, just as
with the corresponding `mips64*-*-linux*' targets.
Only mips*el triples are supported by binutils. The mips*le
or mips*el* may cause some problem with other components of
binutils, since they will consider them as big endian.
EM_MIPS_RS3_LE has been deprecated quite long ago, and in fact
most of current LE ELF files are using EM_MIPS.
This problem didn't make some trouble for us, is due to that
gold is a linker, and all of the inputs to it has right EM values.
Caused by commit 5a97377e55, specifically this code added to
Target_powerpc::do_relax
+ if (parameters->options().output_is_position_independent())
+ this->rela_dyn_size_
+ = this->rela_dyn_section(layout)->current_data_size();
The problem here is that if .rela.dyn isn't already created then the
call to rela_dyn_section creates it, and as this comment in
Target_powerpc::do_finalize_sections says:
// Annoyingly, we need to make these sections now whether or
// not we need them. If we delay until do_relax then we
// need to mess with the relaxation machinery checkpointing.
We can't be creating sections in do_relax.
PR 30794
* powerpc.cc (Target_powerpc::do_relax): Only set rela_dyn_size_
for size == 64, and assert that rela_dyn_ already exists.
Tidy code setting plt_thread_safe, which also only needs to be
set when size == 64 for ELFv1.
This reverts commit 32f1c80375. It had
two unrelated changes lumped together, one of which changed the meaning
of the `mipsisa64*-*-linux*' target triplets, which was not properly
evaluated.
get_symbol_name currently returns "" for the usual STT_SECTION symbols
generated by gas. That's not very helpful, return the section name.
Demangle local symbols too, fixing an inconsistency in
issue_discarded_error where global symbols are demangled.
* object.cc (Sized_relobj_file::get_symbol_name): Return a
std::string. Return section name for STT_SECTION symbols with
zero st_name. Sanity check st_name, and don't run off the end
of an improperly terminated .strtab. Demangle sym names.
* object.h (Sized_relobj_file::get_symbol_name): Update decl.
* target-reloc.h (issue_discarded_error): Adjust.
* powerpc.cc (Target_powerpc::Relocate::relocate): Report reloc
type and symbol for relocation overflows.
It is possible to build huge binaries on powerpc64, where 32-bit
addresses in debug info are insufficient to descibe locations in the
binary. Help out the user, and only warn about debug overflows.
* powerpc.cc (Target_powerpc::Relocate::relocate): Warn on
relocation overflows in debug info.
Many of the reloc error messages have already been converted from
using %C to using %H in ld.bfd, to print section+offset as well as
file/line/function. This catches a few remaining, and changes gold to
do the same.
PR 10957
bfd/
* elf32-sh.c (sh_elf_relocate_section): Use %H in error messages.
gold/
* object.cc (Relocate_info::location): Always report section+offset.
* testsuite/debug_msg.sh: Adjust to suit.
* testsuite/x32_overflow_pc32.sh: Likewise.
* testsuite/x86_64_overflow_pc32.sh: Likewise.
ld/
* emultempl/pe.em (read_addend): Use %H in error message.
* emultempl/pep.em (read_addend): Likewise.
* ldcref.c (check_reloc_refs): Likewise.
* ldmain.c (warning_find_reloc, undefined_symbol): Likewise.
* pe-dll.c (pe_create_import_fixup): Likewise.
* testsuite/ld-cris/undef2.d: Adjust expected output to suit.
* testsuite/ld-cris/undef3.d: Likewise.
* testsuite/ld-elf/shared.exp: Likewise.
* testsuite/ld-i386/compressed1.d: Likewise.
* testsuite/ld-ia64/line.exp: Likewise.
* testsuite/ld-plugin/lto.exp: Likewise.
* testsuite/ld-undefined/undefined.exp: Likewise.
* testsuite/ld-x86-64/compressed1.d: Likewise.
* testsuite/ld-x86-64/line.exp: Likewise.
* testsuite/ld-x86-64/pr27587.err: Likewise.
PowerPC64 gold and ld.bfd implement an indirect branch trampoline,
used when the destination of a branch exceeds a bounce through another
"b" instruction. When generating PIEs or shared libraries, the
addresses need dynamic relocations. This was implemented in gold
using a dedicated relocation section, but this means the relative
relocations for these addresses are not sorted properly with other
dynamic relative relocations: gold doesn't support merging relocation
sections, then sorting. Instead we need to use a single .rela.dyn
section.
This is done by increasing the size of rela_dyn_ during do_relax to
account for needed dynamic relocations, delaying adding the actual
relocations until the end of relaxation once the layout has
stabilised.
* powerpc.cc (Target_powerpc): Add rela_dyn_size_;
(update_current_size): New function.
(Target_powerpc::do_relax): Capture the size of rela_dyn_ at
the start of relaxation. Artifically increase its size during
relaxation to account for needed indirect branches, and add
those relocations at the end.
(Output_data_brlt_powerpc::rel_, reset_brlt_sizes),
(finalize_brlt_sizes, add_reloc, set_current_size): Delete.
(Target_powerpc::make_brlt_section): Don't make reloc section.
PowerPC gold adds relative dynamic relocs in do_relax. These aren't
accounted for in the value set in add_target_dynamic_tags, which is
called before do_relax. Provide a way of setting DT_RELCOUNT and
DT_RELACOUNT at the point where .dynamic is written.
* layout.cc (Layout::add_target_dynamic_tags): Add custom_relcount
parameter. Emit DT_RELCOUNT/RELACOUNT as a custom target handled
dynamic tag if set.
* layout.h(Layout::add_target_dynamic_tags): Update prototype.
* aarch64.cc (Target_aarch64::do_finalize_sections): Adjust
add_target_dynamic_tags call.
* arm.cc (Target_arm::do_finalize_sections): Likewise.
* i386.cc (Target_i386::do_finalize_sections): Likewise.
* mips.cc (Target_mips::do_finalize_sections): Likewise.
* s390.cc (Target_s390::do_finalize_sections): Likewise.
* sparc.cc (Target_sparc::do_finalize_sections): Likewise.
* tilegx.cc (Target_tilegx::do_finalize_sections): Likewise.
* x86_64.cc (Target_x86_64::do_finalize_sections): Likewise.
* powerpc.cc (Target_powerpc::do_finalize_sections): Likewise.
(Target_powerpc::do_dynamic_tag_custom_value): New function.
DT_RELACOUNT was calculated incorrectly, and relative relocs not
sorted as they should be to the start of .rela.dyn, due to adding one
particular class of dynamic reloc using the wrong "add" method.
* powerpc.cc (Target_powerpc::Scan::global): Add relative
dyn relocs for ADDR64 and similar using add_global_relative.
In commit 0961e63157, the fix for PR30217, make_lplt_section and
make_brlt_section were changed to use rela_dyn_ rather than their own
separate dynamic reloc sections. This fails miserably whenever brlt_
is needed for long branches, due to needing to iterate sizing and thus
reset brlt_ sizes.
PR 30536
PR 30217
* powerpc.cc (Target_powerpc::make_brlt_section): Don't use
rela_dyn_.
For MIPS64r6 ports, Debian as an example, `mipsisa64r6el` is
used as the cpu name in triple.
Let's recognize them by `mips*64*(el)`.
For 64bit Ports, like Debian's mips64el and mips64r6el ports,
`gnuabi64` is used as the abi section.
Let's use N64 abi by default for the triple with gnuabi64.
PR 30187
* options.h (class General_options): Add enable-linker-version.
* layout.cc (Layout::create_gold_note): If linker-version is enabled put the version string into the .comment section.
glibc's ld.so ignores local dynamic symbols. It's been that way
forever. We therefore can't use them on dynamic relocations. Fixing
that problem uncovered another problem in sorting of dynamic relocs,
caused no doubt by copying make_iplt_section (where we don't want
reloc sorting by the generic gold function, we want iplt relocs last)
to make_lplt_section (where we do want sorting).
PR 30217
* powerpc.cc (branch_needs_plt_entry): New function.
(Target_powerpc::plt_off): Use it here..
(Target_powerpc::Scan::global): ..and here to correct PLT16 reloc
handling for forced-local global symbols.
(Output_data_plt_powerpc::add_entry): Rename "stash"
parameter "is_local". Emit relative relocs for globals that
are forced local, and don't set_needs_dynsym_entry.
(Target_powerpc::make_lplt_section): Don't create a separate
reloc section, use rela_dyn.
(Target_powerpc::make_brlt_section): Likewise.
