m32c_md_end attempted to pad out a code section with nops, but this
was just plain wrong in many ways:
- The padding didn't happen at all if the last section emitted wasn't
a code section.
- The padding went to the wrong place if subsections were used, and
the last subseg used wasn't the highest numbered subseg.
- Padding wasn't added to all code sections.
- If the last section was empty, it was padded to 4 bytes.
- The padding didn't go to a 4-byte alignment boundary, instead it
effectively made the last instruction 4 bytes in size.
- The padding didn't take into account that code sections may have
contents other than machine instructions.
So, rip it out and handle nop padding properly, also fixing .align
.balign/.p2align in the middle of code.
gas/
* config/tc-m32c.c (insn_size): Delete static var.
(md_begin): Don't set it.
(m32c_md_end): Delete.
(md_assemble): Add insn_size auto var.
* config/tc-m32c.h (md_end): Don't define.
(m32c_md_end): Delete.
(NOP_OPCODE, HANDLE_ALIGN, MAX_MEM_FOR_RS_ALIGN_CODE): Define.
* testsuite/gas/all/align.d: Remove m32c from notarget list.
* testsuite/gas/all/incbin.d: Likewise.
* testsuite/gas/elf/dwarf2-11.d: Likewise.
* testsuite/gas/macros/semi.d: Likewise.
* testsuite/gas/all/gas.exp (do_comment): Similarly.
ld/
* testsuite/ld-scripts/fill.d: Don't xfail m32c
* testsuite/ld-scripts/fill16.d: Likewise.
This patch restricts the section names matched in coff_section_type,
a function that translates section names to symbol type, and arranges
to translate section flags to symbol type before looking at names.
The latter change resulted in various test failures due to improper
section flags being used in tests, and by the plugin support, so fix
that too.
The new test fails on many ELF targets that lack .init/fini_array
in their scripts. I've just xfailed those. pru-elf oddly defines
__init_array_begin rather than __init_array_start. I've left that
target as a FAIL, and pj-elf too which reports an error for undefined
weak symbols.
bfd/
PR 24511
* syms.c (coff_section_type): Only allow '.', '$' and numeric
following the standard section names.
(bfd_decode_symclass): Prioritize section flag tests in
decode_section_type before name tests in coff_section_type.
* plugin.c (bfd_plugin_canonicalize_symtab): Init fake_section
and fake_common_section using BFD_FAKE_SECTION. Use "fake" as
their names and choose standard .text section flags for
fake_section.
ld/
PR 24511
* testsuite/ld-elf/pr14156a.d: Allow for .init/.fini being a
data section on hppa64.
* testsuite/ld-elf/pr14156b.d: Likewise.
* testsuite/ld-scripts/pr18963.t: Map standard sections to set
output section flags.
* testsuite/ld-scripts/sane1.t: Likewise.
* testsuite/ld-elf/init-fini-arrays.s: Reference __init_array_start
and __fini_array_start. Define __start et al.
* testsuite/ld-elf/pr24511.d: New test.
Fixes the following error:
ld.pod around line 568: Expected '=item *'
POD document had syntax errors at /usr/bin/pod2man line 71.
* ld.texi (How GNU properties are merged): Avoid pod2man error.
Correct example.
When undefined non-weak references in IR objects are optimized out
by LTO, we can have weak dynamic referencs to symbols marked with
bfd_link_hash_undefined. We shouldn't complain such undefined weak
dynamic references.
bfd/
PR ld/24486
* elflink.c (elf_link_output_extsym): Don't complain undefined
weak dynamic reference.
ld/
PR ld/24486
* testsuite/ld-plugin/lto.exp: Run PR ld/24486 tests.
* testsuite/ld-plugin/pr24486a.c: New file.
* testsuite/ld-plugin/pr24486b.c: Likewise.
* testsuite/ld-plugin/pr24486c.c: Likewise.
When a wrapper symbol, __wrap_FOO, is defined in IR, its resolution
should be LDPR_PREVAILING_DEF, not PREVAILING_DEF_IRONLY, since LTO
doesn't know that __wrap_FOO provides definition of FOO. And resolution
of FOO should be LDPR_RESOLVED_IR since it is resolved by __wrap_FOO in
IR.
PR ld/24406
* ld.texi: Remove LTO warning from --wrap.
* plugin.c (get_symbols): Update resolution for wrapper and
wrapped symbols.
* testsuite/ld-plugin/lto.exp: Run ld/24406 tests.
* testsuite/ld-plugin/pr24406-1.c: New file.
* testsuite/ld-plugin/pr24406-2a.c: Likewise.
* testsuite/ld-plugin/pr24406-2b.c: Likewise.
This patch aims to improve the definitions of BTI and PAC based PLTs.
The following changes are made:
* PLT0 does not need PAC instructions since the PLTGOT[2] (and PLTGOT[1])
are readonly so they cannot be corrupted at runtime. Thus both PAC plt0
and BTI+PAC plt0 are removed and we can use basic plt0 and BTI plt0
instead, respectively.
* We can remove the extra padding nops when we add the new bti instructions.
BTI plt0 and BTI TLSDESC plt are updated.
* For better performance PLTn could be padded to 24bytes. Both BTI pltn and
PAC pltn are updated.
*** bfd/ChangeLog ***
2019-04-25 Sudakshina Das <sudi.das@arm.com>
* elfnn-aarch64.c (PLT_BTI_ENTRY_SIZE): Remove.
(PLT_BTI_TLSDESC_ENTRY_SIZE): Remove.
(PLT_PAC_ENTRY_SIZE, PLT_BTI_PAC_ENTRY_SIZE): Remove.
(PLT_BTI_SMALL_ENTRY_SIZE, PLT_PAC_SMALL_ENTRY_SIZE): Update.
(elfNN_aarch64_small_plt0_pac_entry): Remove.
(elfNN_aarch64_small_plt0_bti_pac_entry): Remove.
(elfNN_aarch64_small_plt0_bti_entry): Update.
(elfNN_aarch64_small_plt_bti_entry): Update.
(elfNN_aarch64_small_plt_pac_entry): Update.
(elfNN_aarch64_tlsdesc_small_plt_bti_entry): Update.
(setup_plt_values): Setup new entries.
(elfNN_aarch64_finish_dynamic_sections): Remove size change.
(elfNN_aarch64_plt_sym_val): Likewise.
*** ld/ChangeLog ***
2019-04-25 Sudakshina Das <sudi.das@arm.com>
* testsuite/ld-aarch64/bti-pac-plt-1.d: Update.
* testsuite/ld-aarch64/bti-pac-plt-2.d: Update.
* testsuite/ld-aarch64/bti-plt-1.d: Update.
* testsuite/ld-aarch64/bti-plt-3.d: Update.
* testsuite/ld-aarch64/bti-plt-5.d: Update.
* testsuite/ld-aarch64/pac-plt-1.d: Update.
* testsuite/ld-aarch64/pac-plt-2.d: Update.
The ld testsuite includes numerous tests that depend on being able to
compile and link programs with the C compiler. Some of these tests
use [which $CC] to check for the presence of the compiler before
proceeding with the test, but run_ld_link_exec_tests and run_cc_link_tests
give ERRORs if compilation fails. Also, even if $CC is defined and present,
it may not be usable due to missing libraries, etc.
This patch adds a new procedure check_compiler_available that attempts
to build an empty program and caches the result. Uses of [which $CC]
are replaced with calls to this procedure, and run_ld_link_exec_tests
and run_cc_link_tests now also guard attempts to use $CC.
2019-04-24 Sandra Loosemore <sandra@codesourcery.com>
ld/
* testsuite/config/default.exp: Use [check_compiler_available]
instead of [which $CC].
* testsuite/ld-auto-import/auto-import.exp: Likewise.
* testsuite/ld-cygwin/exe-export.exp: Likewise.
* testsuite/ld-elf/audit.exp: Likewise.
* testsuite/ld-elf/compress.exp: Likewise.
* testsuite/ld-elf/dwarf.exp: Likewise.
* testsuite/ld-elf/elf.exp: Likewise.
* testsuite/ld-elf/indirect.exp: Likewise.
* testsuite/ld-elf/linux-x86.exp: Likewise.
* testsuite/ld-elf/shared.exp: Likewise.
* testsuite/ld-elf/tls.exp: Likewise.
* testsuite/ld-elf/wrap.exp: Likewise.
* testsuite/ld-elfcomm/elfcomm.exp: Likewise.
* testsuite/ld-elfvers/vers.exp: Likewise.
* testsuite/ld-elfvsb/elfvsb.exp: Likewise.
* testsuite/ld-elfweak/elfweak.exp: Likewise.
* testsuite/ld-gc/gc.exp: Likewise.
* testsuite/ld-i386/i386.exp: Likewise.
* testsuite/ld-i386/no-plt.exp: Likewise.
* testsuite/ld-i386/tls.exp: Likewise.
* testsuite/ld-ifunc/ifunc.exp: Likewise.
* testsuite/ld-mn10300/mn10300.exp: Likewise.
* testsuite/ld-pe/pe-compile.exp: Likewise.
* testsuite/ld-pe/pe-run.exp: Likewise.
* testsuite/ld-pe/pe-run2.exp: Likewise.
* testsuite/ld-pie/pie.exp: Likewise.
* testsuite/ld-plugin/lto.exp: Likewise.
* testsuite/ld-plugin/plugin.exp: Likewise.
* testsuite/ld-scripts/crossref.exp: Likewise.
* testsuite/ld-sh/sh.exp: Likewise.
* testsuite/ld-shared/shared.exp: Likewise.
* testsuite/ld-size/size.exp: Likewise.
* testsuite/ld-srec/srec.exp: Likewise.
* testsuite/ld-undefined/undefined.exp: Likewise.
* testsuite/ld-unique/unique.exp: Likewise.
* testsuite/ld-x86-64/mpx.exp: Likewise.
* testsuite/ld-x86-64/no-plt.exp: Likewise.
* testsuite/ld-x86-64/tls.exp: Likewise.
* testsuite/ld-x86-64/x86-64.exp: Likewise.
* testsuite/lib/ld-lib.exp (run_ld_link_exec_tests): Call
check_compiler_available before trying to use the compiler.
(run_cc_link_tests): Likewise.
(check_compiler_available): New. Use it instead of [which $CC].
Commit c40e31a121 broke --enable-dependency-tracking=no.
* Makefile.am (GENDEPDIR): New var, used..
(GENSCRIPTS): ..here.
* Makefile.in: Regenerate.
* genscripts.sh: Test for $DEPDIR set before every use.
This tidies the remaining --no-print-map-discarded fails. h8300-elf
warns on a section without flags, and s12z doesn't support
--gc-sections.
bfd/
* elf32-s12z.c (elf_backend_can_gc_sections): Don't define
ld/
* testsuite/ld-gc/skip-map-discarded.s: Add section attributes.
* testsuite/lib/ld-lib.exp (check_gc_sections_available): Add
s12z to list of targets not supporting --gc-sections.
ld * config/tc-msp430.c (msp430_make_init_symbols): Define __crt0_init_bss
symbol when .lower.bss or .either.bss sections exist.
Define __crt0_movedata when .lower.data or .either.data sections exist.
* testsuite/gas/msp430/either-data-bss-sym.d: New test.
* testsuite/gas/msp430/low-data-bss-sym.d: New test.
* testsuite/gas/msp430/either-data-bss-sym.s: New test source.
* testsuite/gas/msp430/low-data-bss-sym.s: New test source.
* testsuite/gas/msp430/msp430.exp: Run new tests.
Enable large code model when running -mdata-region={upper,either}
tests.
Some of these tests were excluded for ns32k-netbsd, exclude for all
ns32k instead.
binutils/
* testsuite/binutils-all/copy-2.d: Don't run for ns32k-*-*.
* testsuite/binutils-all/copy-3.d: Likewise.
gas/
* testsuite/gas/all/gas.exp: Remove ns32k xfails.
* testsuite/gas/all/weakref1u.d: Don't run for ns32k-*-*.
ld/
* testsuite/ld-scripts/pr20302.d: Don't run for ns32k-*-*.
* testsuite/ld-scripts/section-match-1.d: Likewise.
* testsuite/ld-undefined/require-defined.exp: Likewise.
s patch is part of a series of patches to add support for Armv8.1-M Mainline instructions to binutils.
This patch adds the BFCSEL instruction. It also adds a local relocation with a new bfd_reloc_code_real enum.
ChangeLog entries are as follows:
2019-04-15 Sudakshina Das <sudi.das@arm.com>
* reloc.c (BFD_RELOC_THUMB_PCREL_BFCSEL): New relocation.
* bfd-in2.h: Regenerated.
* libbfd.h: Likewise.
*** gas/ChangeLog ***
2019-04-15 Sudakshina Das <sudi.das@arm.com>
Andre Vieira <andre.simoesdiasvieira@arm.com>
* config/tc-arm.c (T16_32_TAB): New entriy for bfcsel.
(do_t_v8_1_branch): New switch case for bfcsel.
(toU): Define.
(insns): New instruction for bfcsel.
(md_pcrel_from_section): New switch case
for BFD_RELOC_THUMB_PCREL_BFCSEL.
(md_appdy_fix): Likewise
(tc_gen_reloc): Likewise.
* testsuite/gas/arm/armv8_1-m-bfcsel.d: New.
* testsuite/gas/arm/armv8_1-m-bfcsel.s: New.
*** ld/ChangeLog ***
2019-04-15 Sudakshina Das <sudi.das@arm.com>
* testsuite/ld-arm/bfcsel.s: New.
* testsuite/ld-arm/bfcsel.d: New.
* testsuite/ld-arm/arm-elf.exp: Add above test.
*** opcodes/ChangeLog ***
2019-04-15 Sudakshina Das <sudi.das@arm.com>
* arm-dis.c (thumb32_opcodes): New instruction bfcsel.
(print_insn_thumb32): Edit the switch case for %Z.
This patch is part of a series of patches to add support for Armv8.1-M Mainline
instructions to binutils.
This patch adds the BFL instruction.
*** gas/ChangeLog ***
2019-04-15 Sudakshina Das <sudi.das@arm.com>
Andre Vieira <andre.simoesdiasvieira@arm.com>
* config/tc-arm.c (T16_32_TAB): New entrie for bfl.
(do_t_v8_1_branch): New switch case for bfl.
(insns): New instruction for bfl.
* testsuite/gas/arm/armv8_1-m-bfl.d: New.
* testsuite/gas/arm/armv8_1-m-bfl.s: New.
* testsuite/gas/arm/armv8_1-m-bfl-bad.s: New.
* testsuite/gas/arm/armv8_1-m-bfl-bad.d: New.
* testsuite/gas/arm/armv8_1-m-bfl-bad.l: New.
* testsuite/gas/arm/armv8_1-m-bfl-rel.d: New.
* testsuite/gas/arm/armv8_1-m-bfl-rel.s: New.
*** ld/ChangeLog ***
2019-04-15 Sudakshina Das <sudi.das@arm.com>
* testsuite/ld-arm/bfl.s: New.
* testsuite/ld-arm/bfl.d: New.
* testsuite/ld-arm/arm-elf.exp: Add above test.
*** opcodes/ChangeLog ***
2019-04-15 Sudakshina Das <sudi.das@arm.com>
* arm-dis.c (thumb32_opcodes): New instruction bfl.
This patch is part of a series of patches to add support for Armv8.1-M Mainline
instructions to binutils.
This patch adds the BF instruction.
ChangeLog entries are as follows:
*** gas/ChangeLog ***
2019-04-15 Sudakshina Das <sudi.das@arm.com>
Andre Vieira <andre.simoesdiasvieira@arm.com>
* config/tc-arm.c (T16_32_TAB): New entries for bf.
(do_t_branch_future): New.
(insns): New instruction for bf.
* testsuite/gas/arm/armv8_1-m-bf.d: New.
* testsuite/gas/arm/armv8_1-m-bf.s: New.
* testsuite/gas/arm/armv8_1-m-bf-bad.s: New.
* testsuite/gas/arm/armv8_1-m-bf-bad.l: New.
* testsuite/gas/arm/armv8_1-m-bf-bad.d: New.
* testsuite/gas/arm/armv8_1-m-bf-rel.d: New.
* testsuite/gas/arm/armv8_1-m-bf-rel.s: New.
*** ld/ChangeLog ***
2019-04-15 Sudakshina Das <sudi.das@arm.com>
* testsuite/ld-arm/bf.s: New.
* testsuite/ld-arm/bf.d: New.
* testsuite/ld-arm/arm-elf.exp: Add above test.
*** opcodes/ChangeLog ***
2019-04-15 Sudakshina Das <sudi.das@arm.com>
* arm-dis.c (thumb32_opcodes): New instructions for bf.
The patch is straightforward, it does the following:
- support the new Tag_CPU_arch build attribute value, ie.:
+ declare the new value
+ update all the asserts forcing logic to be reviewed for new
architectures
+ create a corresponding bfd_mach_arm_8_1M_MAIN enumerator in bfd and
add mapping from Tag_CPU_arch to it
+ teach readelf about new Tag_CPU_arch value
- declare armv8.1-m.main as a supported architecture value
- define Armv8.1-M Mainline in terms of feature bits available
- tell objdump mapping from bfd_mach_arm_8_1M_MAIN enumerator to feature
bits available
- update architecture-specific logic in gas and bfd guarded by the
asserts mentioned above.
- tests for all the above
ChangeLog entries are as follows:
*** bfd/ChangeLog ***
2019-04-15 Thomas Preud'homme <thomas.preudhomme@arm.com>
* archures.c (bfd_mach_arm_8_1M_MAIN): Define.
* bfd-in2.h: Regenerate.
* cpu-arm.c (arch_info_struct): Add entry for Armv8.1-M Mainline.
* elf32-arm.c (using_thumb_only): Return true for Armv8.1-M Mainline
and update assert.
(using_thumb2): Likewise.
(using_thumb2_bl): Update assert.
(arch_has_arm_nop): Likewise.
(bfd_arm_get_mach_from_attributes): Add case for Armv8.1-M Mainline.
(tag_cpu_arch_combine): Add logic for Armv8.1-M Mainline merging.
*** binutils/ChangeLog ***
2019-04-15 Thomas Preud'homme <thomas.preudhomme@arm.com>
* readelf.c (arm_attr_tag_CPU_arch): Add entry for Armv8.1-M Mainline.
*** gas/ChangeLog ***
2019-04-15 Thomas Preud'homme <thomas.preudhomme@arm.com>
* config/tc-arm.c (cpu_arch_ver): Add entry for Armv8.1-M Mainline
Tag_CPU_arch build attribute value. Reindent.
(get_aeabi_cpu_arch_from_fset): Update assert.
(aeabi_set_public_attributes): Update assert for Tag_DIV_use logic.
* testsuite/gas/arm/attr-march-armv8_1-m.main.d: New test.
*** include/ChangeLog ***
2019-04-15 Thomas Preud'homme <thomas.preudhomme@arm.com>
* elf/arm.h (TAG_CPU_ARCH_V8_1M_MAIN): new macro.
(MAX_TAG_CPU_ARCH): Set value to above macro.
* opcode/arm.h (ARM_EXT2_V8_1M_MAIN): New macro.
(ARM_AEXT_V8_1M_MAIN): Likewise.
(ARM_AEXT2_V8_1M_MAIN): Likewise.
(ARM_ARCH_V8_1M_MAIN): Likewise.
*** ld/ChangeLog ***
2019-04-15 Thomas Preud'homme <thomas.preudhomme@arm.com>
* testsuite/ld-arm/attr-merge-13.attr: New test.
* testsuite/ld-arm/attr-merge-13a.s: New test.
* testsuite/ld-arm/attr-merge-13b.s: New test.
*** opcodes/ChangeLog ***
2019-04-15 Thomas Preud'homme <thomas.preudhomme@arm.com>
* arm-dis.c (select_arm_features): Add logic for Armv8.1-M Mainline.
It is no longer true that autoconf/automake cannot substitute vars
with embedded new-lines.
* configure.ac (TDIRS): Build up tdirs in this variable and
AC_SUBST, also using AM_SUBST_NOTMAKE.
* configure: Regenerate.
* Makefile.am (DISTCLEANFILES): Remove tdirs.
* Makefile.in: Regenerate.
Add a new option to disable the listing of discarded sections
in map file output. The use case stems from a large application
built with -ffunction-sections --gc-sections where the list of
discarded sections blows up the map file output. The default
behaviour remains to print discarded sections, but the new option
allows us to disable it.
ld/
* NEWS: Mention new option --no-print-map-discarded.
* ld.h (ld_config_type) <print_map_discarded>: New field.
* ldlang.c (lang_map): Conditionally output discarded sections
in map files based on configuration option.
* ldlex.h (option_values) <OPTION_PRINT_MAP_DISCARDED,
OPTION_NO_PRINT_MAP_DISCARDED>: New.
* ldmain.c (main): Enabled print_map_discarded by default.
* lexsup.c (ld_options): Add new command-line options.
(parse_args) <OPTION_NO_PRINT_MAP_DISCARDED,
OPTION_PRINT_MAP_DISCARDED>: New cases.
* ld.texi: Document new options.
* testsuite/ld-gc/gc.exp: Add new test.
* testsuite/ld-gc/skip-map-discarded.s: New file.
* testsuite/ld-gc/skip-map-discarded.d: New file.
* testsuite/ld-gc/skip-map-discarded.map: New file.
Add -static-pie tests for DT_INIT_ARRAY, DT_FINI_ARRAY, DT_PREINIT_ARRAY
and IFUNC.
* testsuite/config/default.exp (STATIC_PIE_LDFLAGS): New. Set
to "-static-pie" if target compiler supports it.
* testsuite/ld-elf/elf.exp: Run -static-pie tests if
$STATIC_PIE_LDFLAGS isn't empty.
* testsuite/ld-ifunc/ifunc.exp: Likewise.
When using DF_BIND_NOW on AArch64 we don't reserve the GOT slot for a TLSDESC,
but we still emitted DT_TLSDESC_GOT and DT_TLSDESC_PLT. This caused random
memory corruption as the "special" value of (bfd_vma)-1 would be set for
dt_tlsdesc_got.
Since we don't have a value of dt_tlsdesc_got I also don't emit DT_TLSDESC_PLT
now becuase it would point to an incomplete PLT. To be able to write the PLT
entry DT_TLSDESC_GOT is needed and since we don't have one we can't write the
PLT entry either.
It is my understanding that GLIBC doesn't need these two entries when not lazy
loading. Conversely AArch32 does not reserve neither the GOT not the PLT slot
when doing DF_BIND_NOW.
AArch32 does not need these checks because these values are initialized to 0
and so the if (...) checks don't pass, but on AArch64 these are initialized
to (bfd_vma)-1 and thus we need some extra checks.
bfd/ChangeLog:
PR ld/24302
* elfnn-aarch64.c (elfNN_aarch64_size_dynamic_sections): Don't emit
DT_TLSDESC_GOT and DT_TLSDESC_PLT when DF_BIND_NOW.
(elfNN_aarch64_finish_dynamic_sections): Don't write PLT if DF_BIND_NOW.
ld/ChangeLog:
PR ld/24302
* testsuite/ld-aarch64/aarch64-elf.exp: Add new test.
* testsuite/ld-aarch64/tls-relax-gdesc-le-now.d: New test.
__rel[a]_iplt_start and __rel[a]_iplt_end are defined to handle IFUNC in
static executables. For PIE, since IFUNC is handled as the part of the
normal dynamic relocation processing, there is no need to define these
symbols in PIE.
* scripttempl/elf.sc (CREATE_PIC): New. Set for CREATE_SHLIB or
CREATE_PIE.
(__rel_iplt_start): Don't define for CREATE_PIC.
(__rel_iplt_end): Likewise.
(__rela_iplt_start): Likewise.
(__rela_iplt_end): Likewise.
This fixes the csky-elf ld-elf/pr21884 and ld-unique/pr21529 failures,
by disabling branch stubs for binary (and other non-csky) output.
The csky-linux target gets branch stubs off by default because
presumably there are reasons why branch stubs were disabled, but
rather than killing the support completely it can be enabled by
--branch-stub.
* emultempl/cskyelf.em (csk_elf_before_parse): New function,
setting use_branch_stub false for linux.
(csky_elf_create_output_section_statements): Do emit this
function and all others in the file for linux, plus the branch
option control. Disable branch stubs when non-ELF.
In looking at the csky-elf vs. csky-linux differences, the first thing
I compared was csky_elf.sh and cskyelf_linux.sh. Those files are
mostly the same but besides the real differences, annoyingly have some
lines ordered differently. It's better in such cases to have one file
source the other, making differences plain. This patch does that for
csky and microblaze, removes an unused variable defined in a few
places, and fixes ld makefile dependencies.
* Makefile.am (eskyelf.c, eskyelf_linux.c): Depend on cskyelf.em.
(ecskyelf_linux.c): Depend on cskyelf.sh.
(eelf32microblazeel.c): Depend on elf32microblaze.sh.
* Makefile.in: Regenerate.
* emulparams/cskyelf.sh: Comment regarding cskelf_linux.sh.
(PAGE_SIZE): Don't define.
* emulparams/cskyelf_linux.sh: Source sckyelf.sh, leaving just
the differing variable defs/undefs.
* emulparams/elf32mcore.sh (PAGE_SIZE): Don't define.
* emulparams/elf32microblaze.sh: Comment re. elf32microblazeel.sh.
(OUTPUT_FORMAT): Use BIG_OUTPUT_FORMAT.
(PAGE_SIZE): Don't define.
* emulparams/elf32microblazeel.sh: Source elf32microblaze.sh,
leaving just the differing OUTPUT_FORMAT.
When an instruction has operands, the PowerPC disassembler prints
spaces after the opcode so as to line up operands. If the operands
are all optional and all default value, then no operands are printed,
leaving trailing spaces. This patch fixes that.
opcodes/
* ppc-dis.c (print_insn_powerpc): Delay printing spaces after
opcode until first operand is output.
gas/
* testsuite/gas/ppc/476.d: Remove trailing spaces.
* testsuite/gas/ppc/a2.d: Likewise.
* testsuite/gas/ppc/booke.d: Likewise.
* testsuite/gas/ppc/booke_xcoff.d: Likewise.
* testsuite/gas/ppc/e500.d: Likewise.
* testsuite/gas/ppc/e500mc.d: Likewise.
* testsuite/gas/ppc/e6500.d: Likewise.
* testsuite/gas/ppc/htm.d: Likewise.
* testsuite/gas/ppc/power6.d: Likewise.
* testsuite/gas/ppc/power8.d: Likewise.
* testsuite/gas/ppc/power9.d: Likewise.
* testsuite/gas/ppc/vle.d: Likewise.
ld/
* testsuite/ld-powerpc/tlsexe32.d: Remove trailing spaces.
* testsuite/ld-powerpc/tlsopt5.d: Likewise.
* testsuite/ld-powerpc/tlsopt5_32.d: Likewise.
Let's hope no one has section names starting with '/' in scripts. If
they do, this change to fix parsing of '/' in expressiongs will break
their project.
PR 24411
ldlex.l (SYMBOLNAMECHAR1): Don't match '/'.
(<EXPRESSION>"/DISCARD/"): New.
Underscore was specified twice in all these patterns, and backslash
twice in some. Flex warned about the $SYSROOT rule, which is covered
by earlier rules: "ldlex.l:386: warning, rule cannot be matched".
* ldlex.l: Formatting.
(CMDFILENAMECHAR, CMDFILENAMECHAR1): Delete.
(FILENAMECHAR1, SYMBOLNAMECHAR1, FILENAMECHAR, WILDCHAR),
(NOCFILENAMECHAR): Remove duplicate chars. Reorder.
(SYMBOLCHARN): Likewise. Rename to SYMBOLNAMECHAR.
(<INPUTLIST>"$SYSROOT"..): Delete rule.
shrink_dynamic_reloc_sections must remove PLT entry that was created for
an undefined weak symbol in the presence of --export-dynamic option when
relaxation coalesces literals pointing to that symbol. This fixes the
following assertion:
ld: BFD (GNU Binutils) 2.31.1 internal error, aborting at
elf32-xtensa.c:3292 in elf_xtensa_finish_dynamic_sections
2019-03-29 Max Filippov <jcmvbkbc@gmail.com>
bfd/
* elf32-xtensa.c (shrink_dynamic_reloc_sections): Add
info->export_dynamic to the conditional.
ld/
* testsuite/ld-xtensa/relax-undef-weak-pie-export-dynamic.d: New
test definition.
* testsuite/ld-xtensa/xtensa.exp
(relax-undef-weak-pie-export-dynamic): Add new test.
ld/ChangeLog:
2019-02-26 Martin Liska <mliska@suse.cz>
* plugin.c (get_symbols): Add lto_kind_str, lto_resolution_str,
lto_visibility_str and use then to inform about plugin-symbols.
* testsuite/ld-plugin/plugin-12.d: Adjust expected pattern.
Similar to the AArch64 patches the Arm disassembler has the same issues with
out of order sections but also a few short comings.
For one thing there are multiple code blocks to determine mapping symbols, and
they all work slightly different, and neither fully correct. The first thing
this patch does is centralise the mapping symbols search into one function
mapping_symbol_for_insn. This function is then updated to perform a search in
a similar way as AArch64.
Their used to be a value has_mapping_symbols which was used to determine the
default disassembly for objects that have no mapping symbols. The problem with
the approach was that it was determining this value in the same loop that needed
it, which is why this field could take on the states -1, 0, 1 where -1 means
"don't know". However this means that until you actually find a mapping symbol
or reach the end of the disassembly glob, you don't know if you did the right
action or not, and if you didn't you can't correct it anymore.
This is why the two jump-reloc-veneers-* testcases end up disassembling some
insn as data when they shouldn't.
Out of order here refers to an object file where sections are not listed in a
monotonic increasing VMA order.
The ELF ABI for Arm [1] specifies the following for mapping symbols:
1) A text section must always have a corresponding mapping symbol at it's
start.
2) Data sections do not require any mapping symbols.
3) The range of a mapping symbol extends from the address it starts on up to
the next mapping symbol (exclusive) or section end (inclusive).
However there is no defined order between a symbol and it's corresponding
mapping symbol in the symbol table. This means that while in general we look
up for a corresponding mapping symbol, we have to make at least one check of
the symbol below the address being disassembled.
When disassembling different PCs within the same section, the search for mapping
symbol can be cached somewhat. We know that the mapping symbol corresponding to
the current PC is either the previous one used, or one at the same address as
the current PC.
However this optimization and mapping symbol search must stop as soon as we
reach the end or start of the section. Furthermore if we're only disassembling
a part of a section, the search is a allowed to search further than the current
chunk, but is not allowed to search past it (The mapping symbol if there, must
be at the same address, so in practice we usually stop at PC+4).
lastly, since only data sections don't require a mapping symbol the default
mapping type should be DATA and not INSN as previously defined, however if the
binary has had all its symbols stripped than this isn't very useful. To fix
this we determine the default based on the section flags. This will allow the
disassembler to be more useful on stripped binaries. If there is no section
than we assume you to be disassembling INSN.
[1] https://developer.arm.com/docs/ihi0044/latest/elf-for-the-arm-architecture-abi-2018q4-documentation#aaelf32-table4-7
binutils/ChangeLog:
* testsuite/binutils-all/arm/in-order-all.d: New test.
* testsuite/binutils-all/arm/in-order.d: New test.
* testsuite/binutils-all/arm/objdump.exp: Support .d tests.
* testsuite/binutils-all/arm/out-of-order-all.d: New test.
* testsuite/binutils-all/arm/out-of-order.T: New test.
* testsuite/binutils-all/arm/out-of-order.d: New test.
* testsuite/binutils-all/arm/out-of-order.s: New test.
ld/ChangeLog:
* testsuite/ld-arm/jump-reloc-veneers-cond-long.d: Update disassembly.
* testsuite/ld-arm/jump-reloc-veneers-long.d: Update disassembly.
opcodes/ChangeLog:
* arm-dis.c (struct arm_private_data): Remove has_mapping_symbols.
(mapping_symbol_for_insn): Implement new algorithm.
(print_insn): Remove duplicate code.
The AArch64 linker option to turn on BTI (--force-bti) warns in case there are
input objects which have a missing GNU NOTE section for BTI. This patch is trying
to improve the warnings that come out.
In order to do so, I propose adding a new argument to elf_merge_gnu_properties
and the backend function merge_gnu_properties. This new argument makes sure
that we now pass both the objects along with the properties to which they
belong to. The x86 backend function has also been updated to match this
change.
*** bfd/ChangeLog ***
2019-03-21 Sudakshina Das <sudi.das@arm.com>
* elf-bfd.h (struct elf_backend_data): Add argument to
merge_gnu_properties.
* elf-properties.c (elf_merge_gnu_properties): Add argument to
itself and while calling bed->merge_gnu_properties.
(elf_merge_gnu_property_list): Update the calls for
elf_merge_gnu_properties.
* elfnn-aarch64.c (elfNN_aarch64_merge_gnu_properties): Update handling
of --force-bti warning and add argument.
* elfxx-aarch64.c (_bfd_aarch64_elf_link_setup_gnu_properties): Add
warning.
* elfxx-x86.c (_bfd_x86_elf_merge_gnu_properties): Add argument.
* elfxx-x86.h (_bfd_x86_elf_merge_gnu_properties): Likewise in
declaration.
*** ld/ChangeLog ***
2019-03-21 Sudakshina Das <sudi.das@arm.com>
* testsuite/ld-aarch64/aarch64-elf.exp: Add new test.
* testsuite/ld-aarch64/bti-plt-1.s: Add .ifdef for PAC note section.
* testsuite/ld-aarch64/bti-plt-6.d: Update warning.
* testsuite/ld-aarch64/bti-plt-7.d: Likewise.
* testsuite/ld-aarch64/bti-warn.d: New test.
The special case for .init and .fini in update_wild_statements is
ineffective for .init or .fini wildcards inside other output sections.
The special case needs to be on the wildcard, not the output section.
This patch is belt and braces, both fixing update_wild_statements and
the scripts.
* scripttempl/alpha.sc, * scripttempl/armbpabi.sc,
* scripttempl/crisaout.sc, * scripttempl/elf32cr16.sc,
* scripttempl/elf32crx.sc, * scripttempl/elf32xc16x.sc,
* scripttempl/elf32xc16xl.sc, * scripttempl/elf32xc16xs.sc,
* scripttempl/elf64hppa.sc, * scripttempl/elf_chaos.sc,
* scripttempl/elfarc.sc, * scripttempl/elfarcv2.sc,
* scripttempl/elfd30v.sc, * scripttempl/elfm68hc11.sc,
* scripttempl/elfm68hc12.sc, * scripttempl/elfm9s12z.sc,
* scripttempl/elfmicroblaze.sc, * scripttempl/elfxgate.sc,
* scripttempl/elfxtensa.sc, * scripttempl/epiphany_4x4.sc,
* scripttempl/ft32.sc, * scripttempl/i386beos.sc,
* scripttempl/iq2000.sc, * scripttempl/mcorepe.sc,
* scripttempl/mep.sc, * scripttempl/mips.sc, * scripttempl/moxie.sc,
* scripttempl/pe.sc, * scripttempl/pep.sc, * scripttempl/ppcpe.sc,
* scripttempl/tic4xcoff.sc, * scripttempl/tic80coff.sc,
* scripttempl/v850.sc, * scripttempl/v850_rh850.sc,
* scripttempl/visium.sc, * scripttempl/xstormy16.sc: Add KEEP and
SORT_NONE to .init and .fini wildcards.
* scripttempl/elf32xc16x.sc,
* scripttempl/elf32xc16xl.sc,
* scripttempl/elf32xc16xs.sc: Add .fini wildcard.
* scripttempl/elf_chaos.sc: Add .init output section.
* scripttempl/elfd30v.sc: Remove duplicate .init.
* scripttempl/elfm68hc11.sc, * scripttempl/elfm68hc12.sc,
* scripttempl/elfm9s12z.sc, * scripttempl/elfxgate.sc: Remove
duplicate .init, and add .fini wildcard.
* scripttempl/ppcpe.sc (INIT, FINI): Delete.
* ldlang.c (update_wild_statements): Special case .init and
.fini in the wildcard, not the output section.
A number of the fails are due to ld supporting the creation of shared
libraries but not allowing linking against them without using an
option like -Bdynamic.
FAIL: Symbol export class test (final shared object)
FAIL: PROVIDE_HIDDEN test 4
FAIL: PROVIDE_HIDDEN test 6
FAIL: PROVIDE_HIDDEN test 10
FAIL: PROVIDE_HIDDEN test 12
FAIL: Build pr22471b.so
FAIL: Build pr22649-2b.so
FAIL: Build pr22649-2d.so
FAIL: PR ld/20828 dynamic symbols with section GC (plain)
FAIL: PR ld/20828 dynamic symbols with section GC (version script)
FAIL: PR ld/20828 dynamic symbols with section GC (versioned)
FAIL: PR ld/21233 dynamic symbols with section GC (--undefined)
FAIL: PR ld/21233 dynamic symbols with section GC (--require-defined)
FAIL: PR ld/21233 dynamic symbols with section GC (EXTERN)
FAIL: Build pr22150
FAIL: PR ld/14170
FAIL: Link using broken linker script
FAIL: pr17068 link --as-needed lib in group
FAIL: ld-gc/pr20022
* emulparams/elf32lm32fd.sh (DYNAMIC_LINK): Undef.
Generic linker ELF targets using CREATE_OBJECT_SYMBOLS in their
scripts run into a problem. The file symbols are created by
_bfd_generic_link_output_symbols in each object file, in the section
corresponding to the CREATE_OBJECT_SYMBOLS section, typically .text.
If it so happens that the output .text section is stripped due to
being empty, then elf.c:assign_section_numbers won't assign an ELF
section number and swap_out_syms will report "unable to find
equivalent output section" for the object symbols. Fix this by
always keeping an output section with CREATE_OBJECT_SYMBOLS.
* ldlang.c (lang_size_sections_1): Set SEC_KEEP on
create_object_symbols_section.
* testsuite/ld-elf/pr22319.d: Don't xfail dlx.
