SHF_INFO_LINK bit set, which shows up in readelf section dumps. This
has broken a couple of IA64 testcases in the gas testsuite, which are
fixed by this patch.
PR binutils/16317
* gas/ia64/group-2.d: Expect I attribute with RELA sections.
* gas/ia64/xdata.d: Likewise.
For each object, if it has a nonempty .data or .bss section,
emit a symbol that could cause the startup code to selectively
link in the code to initialize those sections.
* config/tc-msp430.c (msp430_section): Always flag data sections,
regardless of -md.
(msp430_frob_section): New. Make sure all sections are noticed if
they have content.
(msp430_lcomm): New. Flag bss if .lcomm is seen.
(msp430_comm): New. Likewise.
(md_pseudo_table): Add them.
* config/tc-msp430.h (msp430_frob_section): Declare.
(tc_frob_section): Define.
New MSP430 MCU parts are being created by TI all the time and the
list is basically always out of date. Instead any name will be
accepted by the -mmcu= command line option. ISA selection is now
based upon the -mcpu= command line option, just as is done for GCC.
gas/ChangeLog
* config/tc-msp430.c (show_mcu_list): Delete.
(md_parse_option): Accept any MCU name. Accept several more
variants for the -mcpu option.
(md_show_usage): Do not call show_mcu_list.
* config/tc-msp430.c (msp430_refsym): New: ".refsym <symbol>"
* doc/c-msp430.texi (MSP430 Directives): Document it.
The purpose of this patch is to provide a way for one object file
to require the inclusion of another object, without having to
allocate space for a .word address reference.
Since regzmm can't be used in AVX2 gather instructions, there is no need
to check regzmm in AVX2 gather assert.
2014-01-22 Michael Zolotukhin <michael.v.zolotukhin@gmail.com>
* config/tc-i386.c (check_VecOperands): Remove regzmm from AVX2
gather assert.
This is to avoid expressions like: %hi(foo) + 1, which will
not do what you expect. The complex relocations can handle it,
but the internal fixups can't.
The direct rounding floating-point VCVT instructions introduced in
ARMv8 encode the s32.f64 variant incorrectly. The op bit should be
set to 1 for all signed conversions.
gas/ChangeLog:
2014-01-17 Will Newton <will.newton@linaro.org>
* config/tc-arm.c (do_vfp_nsyn_cvt_fpv8): Set OP to 1
for the s32.f64 flavours of VCVT.
gas/testsuite/ChangeLog:
2014-01-17 Will Newton <will.newton@linaro.org>
* gas/arm/armv8-a+fp.d: Correct encoding of vcvta.s32.f64.
binutils/
* version.c (print_version): Update copyright year to 2014.
gas/
* as.c (parse_args): Update copyright year to 2014.
gold/
* version.cc (print_version): Update copyright year to 2014.
ld/
* ldver.c (ldversion): Update copyright year to 2014.
opcodes/
* i386-gen.c (process_copyright): Update copyright year to 2014.
This removes the last uses of the obsolete VA_* macros from binutils.
All the binutils and bfd changes were tested by rebuilding.
I didn't rebuild the gas change but I think it is obviously correct.
2014-01-07 Tom Tromey <tromey@redhat.com>
* elf32-xtensa.c (vsprint_msg): Don't use old VA_* compatibility
wrappers.
2014-01-07 Tom Tromey <tromey@redhat.com>
* bucomm.c (fatal, non_fatal): Replace obsolete VA_* macros with
stdarg macros.
* dlltool.c (inform): Replace obsolete VA_* macros with stdarg
macros.
* dllwrap.c (inform, warn): Replace obsolete VA_* macros with
stdarg macros.
2014-01-07 Tom Tromey <tromey@redhat.com>
* config/tc-tic30.c (debug): Avoid old VA_* compatibility
wrappers.
This removes the last uses of PARAMS from binutils.
The two changes in binutils were tested by rebuilding.
I didn't rebuild the gas change but I think it is obviously correct.
2014-01-07 Tom Tromey <tromey@redhat.com>
* coffgrok.h (coff_ofile): Don't use PARAMS.
* nlmheader.y (strerror): Don't use PARAMS.
2014-01-07 Tom Tromey <tromey@redhat.com>
* config/tc-microblaze.h (parse_cons_expression_microblaze): Don't
use PARAMS.
This removes the last use of ANSI_PROTOTYPES in the tree.
It appears in gas.
I didn't even rebuild this but I think it is obviously correct.
2014-01-07 Tom Tromey <tromey@redhat.com>
* config/tc-xc16x.h: Don't use ANSI_PROTOTYPES.
Add two more as test files for user special and system register.
Fix typo.
2013-12-17 Kuan-Lin Chen <kuanlinchentw@gmail.com>
* gas/nds32/nds32.exp: Add system and user special register tests.
* gas/nds32/sys-reg.s: New test.
* gas/nds32/sys-reg.d: Likewise.
* gas/nds32/usr-spe-reg.s: Likewise.
* gas/nds32/usr-spe-reg.d: Likewise.
* gas/nds32/alu-2.d: Delete the new blank line at EOF.
* gas/nds32/br-1.d: Likewise.
* gas/nds32/br-2.d: Likewise.
* gas/nds32/ji-jr.d: Likewise.
* gas/nds32/lsi.d: Likewise.
* nds32-dis.c (sr_map): Add system register table for disassembling.
(usr_map): Fix typo.
* nds32-asm.c (keyword_sr): Add embedded debug registers.
2013-12-16 Andrew Bennett <andrew.bennett@imgtec.com>
gas/testsuite/gas/mips/
* mips.exp: Add CP1 register name tests.
* cp1-names-mips32.d: New test.
* cp1-names-mips32r2.d: New test.
* cp1-names-mips64.d: New test.
* cp1-names-mips64r2.d: New test.
* cp1-names-numeric.d: New test.
* cp1-names-r3000.d: New test.
* cp1-names-r4000.d: New test.
* cp1-names-sb1.d: New test.
* cp1-names.s: New test.
* micromips-insn32.d: Add the correct symbolic names for the CP1
registers.
* micromips-noinsn32.d: Likewise.
* micromips-trap.d: Likewise.
* micromips.d: Likewise.
opcodes/
* mips-dis.c: Add mips_cp1_names pointer.
(mips_cp1_names_numeric): New array.
(mips_cp1_names_mips3264): New array.
(mips_arch_choice): Add cp1_names.
(mips_arch_choices): Add relevant cp1 register name array to each of
the elements.
(set_default_mips_dis_options): Add support for setting up the
mips_cp1_names pointer.
(parse_mips_dis_option): Add support for the cp1-names command line
variable. Also setup the mips_cp1_names pointer.
(print_reg): Print out name of the cp1 register.
The element index range for the following MIPS MSA instructions: sldi, splati,
copy_s, copy_u, insert and insve is 1 bit too large. This patch fixes this issue.
ChangeLog:
gas/testsuite/gas/mips/
* msa.s: Reduced maximum element index range for sldi, splati,
copy_s, copy_u, insert and insve instructions.
* msa64.s: Likewise.
* micromips@msa.d: Likewise.
* micromips@msa64.d: Likewise.
* msa.d: Likewise.
* msa64.d: Likewise.
include/opcode/
* mips.h: Updated description of +o, +u, +v and +w for MIPS and
microMIPS.
opcodes/
* micromips-opc.c (decode_micromips_operand): Reduced range of +o, +u,
+v and +w.
(micromips_opcodes): Reduced element index range for sldi, splati,
copy_s, copy_u, insert and insve instructions.
* opcodes/mips-opc.c (decode_mips_operand): Reduced range of +o, +u,
+v and +w.
(mips_builtin_opcodes): Reduced element index range for sldi, splati,
copy_s, copy_u, insert and insve instructions.
(OPTION_INTR_NOPS): Define.
(gen_interrupt_nops): Default to FALSE.
(md_parse_opton): Add support for OPTION_INTR_NOPS.
(md_longopts): Add -mn.
(md_show_usage): Add -mn.
(msp430_operands): Generate NOPs for all MCUs not just 430Xv2.
* doc/c-msp430.c: Document -mn.
These files are source files and have no business being +x. We couldn't
easily fix it in CVS (you need login+write access to the raw rcs files),
but we can fix this w/git.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2013-11-27 Matthew Fortune <matthew.fortune@imgtec.com>
* binutils-all/objcopy.exp: Consider mips-mti-elf the same as
mips-sde-elf
* binutils-all/readelf.exp: Likewise
gas/testsuite/
2013-11-27 Matthew Fortune <matthew.fortune@imgtec.com>
* gas/mips/mips.exp: Consider mips-mti-elf the same as mips-sde-elf
ld/testsuite/
2013-11-27 Matthew Fortune <matthew.fortune@imgtec.com>
* ld-mips-elf/mips-elf.exp: Consider mips-mti-elf the same as
mips-sde-elf
gas/
* config/tc-arm.c (arm_archs): New armv7ve architecture option.
(arm_cpus): Replace ARM_ARCH_V7A_IDIV_MP_SEC_VIRT with
ARM_ARCH_V7VE for cortex-a7, cortex-a12 and cortex-a15.
(cpu_arch_ver): Likewise.
* doc/c-arm.texi: Document armv7ve.
gas/testsuite/
* gas/arm/attr-march-armv7ve.d: New test case for armv7ve.
include/opcode/
* arm.h (ARM_AEXT_V7VE): New define.
(ARM_ARCH_V7VE): New define.
(ARM_ARCH_V7A_IDIV_MP_SEC_VIRT): Removed.
