Commit Graph

20 Commits

Author SHA1 Message Date
Szabolcs Nagy
0b4eac57c4 aarch64: override default elf .set handling in gas
Allow st_other values such as STO_AARCH64_VARIANT_PCS to be set for alias
symbols independently.  This is needed for ifunc symbols which are
aliased to the resolver using .set and don't expect resolver attributes
to override the ifunc symbol attributes.  This means .variant_pcs must be
added explicitly to aliases.

gas/ChangeLog:

	* config/tc-aarch64.c (aarch64_elf_copy_symbol_attributes): Define.
	* config/tc-aarch64.h (aarch64_elf_copy_symbol_attributes): Declare.
	(OBJ_COPY_SYMBOL_ATTRIBUTES): Define.
	* testsuite/gas/aarch64/symbol-variant_pcs-3.d: New test.
	* testsuite/gas/aarch64/symbol-variant_pcs-3.s: New test.
2019-05-24 15:09:06 +01:00
H.J. Lu
db22231044 gas: Pass max_bytes to TC_FRAG_INIT
ommit 3ae729d5a4
Author: H.J. Lu <hjl.tools@gmail.com>
Date:   Wed Mar 7 04:18:45 2018 -0800

    x86: Rewrite NOP generation for fill and alignment

increased MAX_MEM_FOR_RS_ALIGN_CODE to 4095 which resulted in increase
of assembler time and memory usage by 5 times for inputs with many
.p2align directives, which is typical for LTO output.  This patch passes
max_bytes to TC_FRAG_INIT so that MAX_MEM_FOR_RS_ALIGN_CODE can be set
as needed and tracked by backend it so that HANDLE_ALIGN can check the
maximum alignment for each rs_align_code frag.  Wall time to assemble
the same cc1plus.s:

before:

423.78user 0.89system 7:05.71elapsed 99%CPU

after:

102.35user 0.27system 1:42.89elapsed 99%CPU

	PR gas/24165
	* frags.c (frag_var_init): Pass max_chars to TC_FRAG_INIT as
	max_bytes.
	* config/tc-aarch64.h (TC_FRAG_INIT): Add and pass max_bytes to
	aarch64_init_frag.
	* /config/tc-arm.h (TC_FRAG_INIT): And and pass max_bytes to
	arm_init_frag.
	* config/tc-avr.h (TC_FRAG_INIT): And and ignore max_bytes.
	* config/tc-ia64.h (TC_FRAG_INIT): Likewise.
	* config/tc-mmix.h (TC_FRAG_INIT): Likewise.
	* config/tc-nds32.h (TC_FRAG_INIT): Likewise.
	* config/tc-ns32k.h (TC_FRAG_INIT): Likewise.
	* config/tc-rl78.h (TC_FRAG_INIT): Likewise.
	* config/tc-rx.h (TC_FRAG_INIT): Likewise.
	* config/tc-score.h (TC_FRAG_INIT): Likewise.
	* config/tc-tic54x.h (TC_FRAG_INIT): Likewise.
	* config/tc-tic6x.h (TC_FRAG_INIT): Likewise.
	* config/tc-xtensa.h (TC_FRAG_INIT): Likewise.
	* config/tc-i386.h (MAX_MEM_FOR_RS_ALIGN_CODE): Set to
	(alignment ? ((1 << alignment) - 1) : 1)
	(i386_tc_frag_data): Add max_bytes.
	(TC_FRAG_INIT): Add and track max_bytes.
	(HANDLE_ALIGN): Replace MAX_MEM_FOR_RS_ALIGN_CODE with
	fragP->tc_frag_data.max_bytes.
	* doc/internals.texi: Update TC_FRAG_TYPE with max_bytes.
2019-02-10 04:34:22 -08:00
Alan Modra
827041555a Update year range in copyright notice of binutils files 2019-01-01 22:06:53 +10:30
Sam Tebbs
0903806253 Move aarch64 CIE code to aarch64 backend
This commit moves all aarch64-specific code to deal with CIE structure
introduced in 3a67e1a6b4 from
target-independent files to the aarch64 backend.

2018-12-13  Sam Tebbs  <sam.tebbs@arm.com>

binutils/
	* dwarf.c (read_cie):  Add check for 'B'.

gas/
	* config/tc-aarch64.h (enum pointer_auth_key,
	tc_fde_entry_extras, tc_cie_entry_extras, tc_fde_entry_init_extra,
	tc_output_cie_extra, tc_cie_fde_equivalent_extra,
	tc_cie_entry_init_extra): Define.
	* dw2gencfi.c (struct cie_entry): Add tc_cie_entry_extras invocation.
	(alloc_fde_entry, select_cie_for_fde): Add tc_fde_entry_init_extra
	invocation.
	(output_cie): Add tc_output_cie_extra invocation.
	(select_cie_for_fde): Add tc_cie_fde_equivalent_extra invocation.
	* dw2gencfi.h (enum pointer_auth_key): Move to config/tc-aarch64.h.
	(struct fde_entry): Add tc_fde_entry_extras invocation
2018-12-13 16:37:40 +00:00
Tamar Christina
4f5d253628 AArch64: Close sequences at the end of sections
Any open sequence at the end of a section or assembly is considered an error.
This patch adds a check at the end to ensure that all sequences have been closed
and if not reports a warning.

During disassembly it's not possible to detect this condition in the back-end so
the warning is only emitted from the assembler for now.

gas/

	* config/tc-aarch64.c (force_automatic_sequence_close,
	aarch64_frob_section): New.
	* config/tc-aarch64.h (tc_frob_section, aarch64_frob_section): New.
2018-10-03 18:50:40 +01:00
Tamar Christina
7e84b55d8f AArch64: Wire through instr_sequence
This patch introduces aarch64_instr_sequence which is a structure similar to IT
blocks on Arm in order to track instructions that introduce a constraint or
dependency on instruction 1..N positions away from the instruction that opened
the block.

The struct is also wired through to the locations that require it.

gas/

	* config/tc-aarch64.c (now_instr_sequence):
	(*insn_sequence, now_instr_sequence): New.
	(output_operand_error_record, do_encode): Add insn_sequence.
	(md_assemble): Update insn_sequence.
	(try_to_encode_as_unscaled_ldst, fix_mov_imm_insn, fix_insn):
	Pass insn_sequence.
	* config/tc-aarch64.h (struct aarch64_segment_info_type):
	Add insn_sequence.

include/

	* opcode/aarch64.h (struct aarch64_instr_sequence): New.
	(aarch64_opcode_encode): Use it.

opcodes/

	* aarch64-asm.c (aarch64_opcode_encode): Add insn_sequence.
	* aarch64-dis.c (insn_sequence): New.
2018-10-03 18:33:33 +01:00
Alan Modra
219d1afa89 Update year range in copyright notice of binutils files 2018-01-03 17:49:56 +10:30
Jiong Wang
3c0367d0e2 [AArch64, gas] Support ILP32 triplet aarch64*-linux-gnu_ilp32
This patch allows AArch64 GAS defaulting to ILP32 if it is configured with
aarch64*-linux-gnu_ilp32.

"md_after_parse_args" is implemented to update ABI into ILP32 if DEFAULT_ARCH is
"aarch64:32".

gas/
	* configure.tgt: Set "arch" to "aarch64" if ${cpu} equals "aarch64".
	Recognize the new triplet name aarch64*-linux-gnu_ilp32.
	* configure.ac: Output DEFAULT_ARCH macro for AArch64.
	* configure: Regenerate.
	* config/tc-aarch64.h (aarch64_after_parse_args): New declaration.
	(md_after_parse_args): New define.
	* config/tc-aarch64.c (aarch64_abi_type): New enumeration
	AARCH64_ABI_NONE.
	(DEFAULT_ARCH): New define.
	(aarch64_abi): Set default value to AARCH64_ABI_NONE.
	(aarch64_after_parse_args): New function.
2017-05-22 13:27:11 +01:00
Alan Modra
91cb9803fc Allow target files access to default TC_FORCE_RELOCATION defines
* write.c (GENERIC_FORCE_RELOCATION_LOCAL): Define.
	(TC_FORCE_RELOCATION_LOCAL): Use it.
	(GENERIC_FORCE_RELOCATION_SUB_SAME): Define.
	(TC_FORCE_RELOCATION_SUB_SAME): Use it.
	* config/tc-arm.h (TC_FORCE_RELOCATION_LOCAL,
	TC_FORCE_RELOCATION_SUB_SAME): Use GENERIC defines.
	* config/tc-aarch64.h: Similarly.
	* config/tc-avr.h: Similarly.
	* config/tc-cris.h: Similarly.
	* config/tc-i386.h: Similarly.
	* config/tc-i960.h: Similarly.
	* config/tc-ia64.h: Similarly.
	* config/tc-microblaze.h: Similarly.
	* config/tc-mips.h: Similarly.
	* config/tc-msp430.h: Similarly.
	* config/tc-nds32.h: Similarly.
	* config/tc-pru.h: Similarly.
	* config/tc-riscv.h: Similarly.
	* config/tc-rl78.h: Similarly.
	* config/tc-s390.h: Similarly.
	* config/tc-sh.h: Similarly.
	* config/tc-sh64.h: Similarly.
	* config/tc-sparc.h: Similarly.
	* config/tc-xtensa.h: Similarly.
	* config/tc-mn10300.h: Similarly.
	(GENERIC_FORCE_RELOCATION_LOCAL): Define.
	* config/tc-msp430.c (msp430_force_relocation_local): Modify to
	be addition to rather than replacement of standard
	TC_FORCE_RELOCATION_LOCAL.
2017-05-16 10:35:02 +09:30
Alan Modra
2571583aed Update year range in copyright notice of all files. 2017-01-02 14:08:56 +10:30
Alan Modra
6f2750feaf Copyright update for binutils 2016-01-01 23:00:01 +10:30
Alan Modra
2e57ce7b14 More fallout from "Allow symbol and label names to be enclosed in double quotes"
Some of the TC_START_LABEL implementations need to adjust the end of
the symbol, when a colon doesn't mean a label definition.  That means
they need access to nul_char both the restore the NUL location (it may
be a quote rather than a colon) and to store the new nul_char.  Others
need adjusting to step over a potential trailing quote.

	PR gas/18581
	* config/tc-aarch64.h (TC_START_LABEL): Redefine.
	* config/tc-arm.c (tc_start_label_without_colon): Delete params.
	Use input_line_pointer directly.
	* config/tc-arm.h (TC_START_LABEL): Redefine.
	(TC_START_LABEL_WITHOUT_COLON): Redefine.
	(tc_start_label_without_colon): Update prototype.
	* config/tc-bfin.c (bfin_start_label): Delete ptr param.  Check
	for NUL instead.
	* config/tc-bfin.h (bfin_start_label): Update prototype.
	(TC_START_LABEL): Redefine.
	* config/tc-d30v.h (TC_START_LABEL): Redefine.
	* config/tc-fr30.c (restore_colon): Rewrite.
	(fr30_is_colon_insn): Add nul_char param.  Return int.  Bump
	i_l_p over quote.  Update restore_colon calls.
	* config/tc-fr30.h (TC_START_LABEL): Redefine.
	(fr30_is_colon_insn): Update prototype.
	* config/tc-m32c.c (restore_colon, m32c_is_colon_insn): As above.
	* config/tc-m32c.h (TC_START_LABEL): Redefine.
	(m32c_is_colon_insn): Update prototype.
	* config/tc-m32r.h (TC_START_LABEL): Redefine.
	* config/tc-mep.h (TC_START_LABEL): Redefine.
	* config/tc-nds32.h (TC_START_LABEL): Redefine.
	* config/tc-tic54x.c (tic54x_start_label): Replace params with
	nul_char and next_char.  Step over trailing quote.
	* config/tc-tic54x.h (TC_START_LABEL_WITHOUT_COLON): Redefine.
	(tic54x_start_label): Update prototype.
	* read.c (TC_START_LABEL): Redefine.  Update invocation.
	(TC_START_LABEL_WITHOUT_COLON): Update invocation.
	* config/tc-nios2.c (s_nios2_set): Save initial input_line_pointer
	and restore if calling s_set.  Don't restore delim again.
2015-08-27 23:19:59 +09:30
Jiong Wang
bc9706f823 [AArch64] Don't tail-pads sections to the alignment
2015-03-13  Jiong Wang  <jiong.wang@arm.com>

gas/
  * config/tc-aarch64.h (SUB_SEGMENT_ALIGN): Define to be zero.

gas/testsuite/
  * gas/aarch64/tail_padding.s: New testcase.
  * gas/aarch64/tail_padding.d: New expectation file.
2015-03-13 12:00:37 +00:00
Alan Modra
b90efa5b79 ChangeLog rotatation and copyright year update 2015-01-02 00:53:45 +10:30
Dr Philipp Tomsich
f803aa8ead Remove the artificial limit on code alignment through the use of the
fixed part of a fragment for output generation only, which required
MAX_MEM_FOR_RS_ALIGN_CODE to be large enough to hold the maximum pad.

	* config/tc-aarch64.h (MAX_MEM_FOR_RS_ALIGN_CODE): Define to 7.
	* config/tc-aarch64.c (aarch64_handle_align): Rewrite to handle
	large alignments with a constant fragment size of
	MAX_MEM_FOR_RS_ALIGN_CODE.
2014-10-30 10:53:09 +00:00
Richard Henderson
49b9c17cf4 aarch64: Adjust dwarf2 encoding factors
* config/tc-aarch64.h (DWARF2_LINE_MIN_INSN_LENGTH): Set to 4.
	(DWARF2_CIE_DATA_ALIGNMENT): Set to -8.
2014-08-22 14:42:39 -07:00
Nick Clifton
00c06fdc57 Fix a few more targets affected by the change to the TC_CONS_FIX_NEW macro.
* config/tc-rl78.h (TC_CONS_FIX_NEW): Add RELOC parameter.
	* config/tc-z80.h (TC_CONS_FIX_NEW): Discard RELOC parameter.
	* config/tc-aarch64.h (TC_CONS_FIX_NEW): Discard RELOC parameter.
	* read.c (emit_expr_fix): Mark the r parameter as potentially
	unused.
2014-04-09 14:05:58 +01:00
Alan Modra
4b95cf5c0c Update copyright years 2014-03-05 22:16:15 +10:30
Yufeng Zhang
cec5225bd8 [AArch64, ILP32] 2/6 Parametrize elfnn-aarch64.c and add basic support in ld
and gas.

bfd/

	* Makefile.am (BFD64_BACKENDS): Add elf32-aarch64.lo.
	(BUILD_CFILES): Add elf32-aarch64.c.
	(elf32-aarch64.c): New rule for generating from elfnn-aarch64.c.
	* Makefile.in: Re-generated.
	* archures.c (bfd_mach_aarch64_ilp32): New define.
	* bfd-in.h (bfd_elf32_aarch64_init_maps): New declaration.
	(bfd_elf32_aarch64_set_options): Ditto.
	(elf32_aarch64_setup_section_lists): Ditto.
	(elf32_aarch64_next_input_section): Ditto.
	(elf32_aarch64_size_stubs): Ditto.
	(elf32_aarch64_build_stubs): Ditto.
	* bfd-in2.h: Re-generated.
	* config.bfd (aarch64-*-elf): Add bfd_elf32_littleaarch64_vec
	and bfd_elf32_bigaarch64_vec.
	(aarch64-*-linux*): Likewise.
	(aarch64_be-*-elf): Likewise.
	(aarch64_be-*-linux*): Likewise.
	* configure.in (bfd_elf32_bigaarch64_vec)
	(bfd_elf32_littleaarch64_vec): New.
	* configure: Re-generated.
	* cpu-aarch64.c (compatible): Don't allow mixing ilp32 objects with
	lp64 ones.
	(bfd_aarch64_arch_ilp32): New.
	(bfd_aarch64_arch): Link to bfd_aarch64_arch_ilp32.
	* elfnn-aarch64.c (ARCH_SIZE): New define.
	(AARCH64_R, AARCH64_R_STR, LOG_FILE_ALIGN): New defines.
	(GOT_ENTRY_SIZE): Re-define as (ARCH_SIZE / 8).
	(elf64_aarch64_*): Rename to elfNN_aarch64_*.
	(ELF64_R_*): Rename to ELFNN_R_*.
	Plus other paramaterization.
	* targets.c (bfd_elf32_bigaarch64_vec, bfd_elf32_littleaarch64_vec):
	New declarations.
	(_bfd_target_vector): Add bfd_elf32_bigaarch64_vec and
	bfd_elf32_littleaarch64_vec.

gas/

	* config/tc-aarch64.c (ilp32_p): New static variable.
	(elf64_aarch64_target_format): Return the target according to the
	value of 'ilp32_p'.
	(md_begin): Determine 'mach' according to the value of 'ilp32_p'.
	(aarch64_opts): Add support for options '-milp32' and '-mlp64'.
	(aarch64_dwarf2_addr_size): New function.
	* config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration.
	(DWARF2_ADDR_SIZE): New define.

ld/

	* Makefile.am (ALL_64_EMULATION_SOURCES): Add eaarch64elf32.c.
	(eaarch64elf32.c): New dependency and rule.
	* Makefile.in: Re-generated.
	* configure.tgt (aarch64-*-elf): Add aarch64elf32.
	(aarch64_be-*-elf, aarch64_be-*-linux*, aarch64-*-linux*): Likewise.
	* emulparams/aarch64elf32.sh: New file.
2013-06-26 10:41:42 +00:00
Nick Clifton
a06ea96464 Add support for 64-bit ARM architecture: AArch64 2012-08-13 14:52:54 +00:00