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26 Commits

Author SHA1 Message Date
Alan Modra
d87bef3a7b Update year range in copyright notice of binutils files 
The newer update-copyright.py fixes file encoding too, removing cr/lf
on binutils/bfdtest2.c and ld/testsuite/ld-cygwin/exe-export.exp, and
embedded cr in binutils/testsuite/binutils-all/ar.exp string match.
 2023-01-01 21:50:11 +10:30
Alan Modra
d64336e655 opcodes: remove use of PTR 
The non-cgen parts of opcodes.

	* cr16-dis.c (print_arg): Replace PTR with void *.
	* crx-dis.c (print_arg): Likewise.
	* rl78-dis.c (print_insn_rl78_common): Don't use PTR cast.
	* rx-dis.c (print_insn_rx): Likewise.
	* visium-dis.c (print_insn_visium): Likewise.
	* z8k-dis.c (print_insn_z8k): Likewise.
 2022-05-10 11:21:37 +09:30
Alan Modra
a2c5833233 Update year range in copyright notice of binutils files 
The result of running etc/update-copyright.py --this-year, fixing all
the files whose mode is changed by the script, plus a build with
--enable-maintainer-mode --enable-cgen-maint=yes, then checking
out */po/*.pot which we don't update frequently.

The copy of cgen was with commit d1dd5fcc38ead reverted as that commit
breaks building of bfp opcodes files.
 2022-01-02 12:04:28 +10:30
Alan Modra
250d07de5c Update year range in copyright notice of binutils files 2021-01-01 10:31:05 +10:30
Alan Modra
c73eac969a rx-dis.c:103:3: suspicious concatenation of string literals 
* rx-dis.c (flag_names): Add missing comma.
	(register_names, flag_names, double_register_names),
	(double_register_high_names, double_register_low_names),
	(double_control_register_names, double_condition_names): Remove
	trailing commas.
 2020-09-21 18:20:58 +09:30
Alan Modra
b3adc24a07 Update year range in copyright notice of binutils files 2020-01-01 18:42:54 +10:30
Nick Clifton
27cee81d06 Fix potential undefined behaviour in the RX disassembler. 
* rx-dis.c (print_insn_rx): Use parenthesis to ensure correct
	access to opcodes.op array element.
 2019-10-25 16:10:04 +01:00
Nick Clifton
de6d8dc25c Fix typo in RX disassembler error messages. 
* rx-dis.c (get_register_name): Fix spelling typo in error
	message.
	(get_condition_name, get_flag_name, get_double_register_name)
	(get_double_register_high_name, get_double_register_low_name)
	(get_double_control_register_name, get_double_condition_name)
	(get_opsize_name, get_size_name): Likewise.
 2019-10-23 10:17:21 +01:00
Nick Clifton
6207ed2877 Prevent more potential illegal memory accesses in the RX disassembler. 
* rx-dis.c (get_size_name): New function.  Provides safe
	access to name array.
	(get_opsize_name): Likewise.
	(print_insn_rx): Use the accessor functions.
 2019-10-22 12:01:45 +01:00
Nick Clifton
12234dfd5f Fix potential illegal memory access when disassembling corrupt RX binaries. 
opcodes * rx-dis.c (get_register_name): New function.  Provides safe
	access to name array.
	(get_condition_name, get_flag_name, get_double_register_name)
	(get_double_register_high_name, get_double_register_low_name)
	(get_double_control_register_name, get_double_condition_name):
	Likewise.
	(print_insn_rx): Use the accessor functions.
 2019-10-16 12:56:58 +01:00
Yoshinori Sato
4ce8c66d19 Add RXv3 instructions. 
* rx-decode.opc (DSIZE): New. double size.
        (_ld): New. dmov size attribute.
        (PSCALE): Add double size.
        (DCR, DDR, DDRH, DDRL, DCND): New. Double FPU registers.
        (SCR, SDR, SDRH, SDRL): Likewise.
        (S2DR, S2CR): Likewise.
        (SDD): New. double displacement.
        (DL): New. Set dmov size attribute.
        (rx_decode_opcode): Add RXv3 instructions.
        * rx-decode.c: Regenerate.
        * rx-dis.c (size_names): Add double entry.
        (opsize_names): Likewise.
        (double_register_names): New. Double FPU registers.
        (double_register_high_names): Likewise.
        (double_register_low_names): Likewise.
        (double_register_control_names): Likewise.
        (double_condition_names): dcmp condition.
        (print_insn_rx): Add  bfmov / bfmovz output.
        Add double FPU output.
 2019-01-13 01:30:34 +09:00
Alan Modra
827041555a Update year range in copyright notice of binutils files 2019-01-01 22:06:53 +10:30
Alan Modra
219d1afa89 Update year range in copyright notice of binutils files 2018-01-03 17:49:56 +10:30
Alan Modra
2571583aed Update year range in copyright notice of all files. 2017-01-02 14:08:56 +10:30
Yao Qi
029e9d52de Handle memory error in print_insn_rx 
Nowadays, memory error in rx disassembly is not handled, so if I
start a fresh GDB, and disassemble,

(gdb) set architecture rx
The target architecture is assumed to be rx
(gdb) disassemble 0x0,+4
Dump of assembler code from 0x0 to 0x4:
   0x00000000:	brk
   0x00000001:	brk
   0x00000002:	brk
   0x00000003:	brk

the output is wrong.  This patch adds code to call dis->memory_error_func
on memory error, and longjmp to print_insn_rx.  With this patch applied,

(gdb) set architecture rx
The target architecture is assumed to be rx
(gdb) disassemble 0,+4
Dump of assembler code from 0x0 to 0x4:
   0x00000000:	Cannot access memory at address 0x0

opcodes:

2016-12-12  Yao Qi  <yao.qi@linaro.org>

	* rx-dis.c: Include <setjmp.h>
	(struct private): New.
	(rx_get_byte): Check return value of read_memory_func, and
	call memory_error_func and OPCODES_SIGLONGJMP on error.
	(print_insn_rx): Call OPCODES_SIGSETJMP.
 2016-12-12 09:03:34 +00:00
Alan Modra
6f2750feaf Copyright update for binutils 2016-01-01 23:00:01 +10:30
Yoshinori Sato
a117b0a51c Add support for RX V2 Instruction Set 
binutils
	* readelf.c(get_machine_flags): Add v2 flag.

gas
	* config/rx-defs.h(rx_cpu_type): Add RXV2 type.
	* config/tc-rx.c(cpu_type_list): New type lookup table.
	(md_parse_option): Use lookup table for choose cpu.
	(md_show_usage): Add rxv2 for mcpu option.
	* doc/c-rx.texi: Likewise.
	* config/rx-parse.y: Add v2 instructions and ACC register.
	(rx_check_v2): check v2 type.

include/elf
	* rx.h(E_FLAG_RX_V2): New RXv2 type.

include/opcode
	* rx.h: Add new instructions.

opcoes
	* rx-deocde.opc(rx_decode_opcode): Add new instructions pattern.
	* rx-dis.c(register_name): Add new register.

gas/testsuite
	* gas/rx/emaca.d: New.
	* gas/rx/emaca.sm: New.
	* gas/rx/emsba.d: New.
	* gas/rx/emsba.sm: New.
	* gas/rx/emula.d: New.
	* gas/rx/emula.sm: New.
	* gas/rx/fadd.d: Add new pattern.
	* gas/rx/fadd.sm: Add new pattern.
	* gas/rx/fmul.d: Add new pattern.
	* gas/rx/fmul.sm: Add new pattern.
	* gas/rx/fsqrt.d: New.
	* gas/rx/fsqrt.sm: New.
	* gas/rx/fsub.d: Add new pattern.
 	* gas/rx/fsub.sm: Add new pattern.
	* gas/rx/ftou.d: New.
	* gas/rx/ftou.sm: New.
	* gas/rx/maclh.d: New.
	* gas/rx/maclh.sm: New.
	* gas/rx/maclo.d: Add new pattern.
	* gas/rx/maclo.sm: Add new pattern.
	* gas/rx/macros.inc: Add new register.
	* gas/rx/movco.d: New.
	* gas/rx/movco.sm: New.
	* gas/rx/movli.d: New.
	* gas/rx/movli.sm: New.
	* gas/rx/msbhi.d: New.
	* gas/rx/msbhi.sm: New.
	* gas/rx/msblh.d: New.
	* gas/rx/msblh.sm: New.
	* gas/rx/msblo.d: New.
	* gas/rx/msblo.sm: New.
	* gas/rx/mullh.d: New.
	* gas/rx/mullh.sm: New.
	* gas/rx/mvfacgu.d: New.
	* gas/rx/mvfacgu.sm: New.
	* gas/rx/mvfachi.d: Add new pattern.
	* gas/rx/mvfachi.sm: Add new pattern.
	* gas/rx/mvfaclo.d: Add new pattern.
	* gas/rx/mvfaclo.sm: Add new pattern.
	* gas/rx/mvfacmi.d: Add new pattern.
	* gas/rx/mvfacmi.sm: Add new pattern.
	* gas/rx/mvfc.d: Add new pattern.
	* gas/rx/mvtacgu.d: New.
	* gas/rx/mvtacgu.sm: New.
	* gas/rx/mvtc.d: Add new pattern.
	* gas/rx/popc.d: Add new pattern.
	* gas/rx/pushc.d: Add new pattern.
	* gas/rx/racl.d: New.
	* gas/rx/racl.sm: New.
	* gas/rx/racw.d: Add new pattern.
	* gas/rx/racw.sm: Add new pattern.
	* gas/rx/rdacl.d: New.
	* gas/rx/rdacl.sm: New.
	* gas/rx/rdacw.d: New.
	* gas/rx/rdacw.sm: New.
	* gas/rx/rx.exp: Add option.
	* gas/rx/stnz.d: Add new pattern.
	* gas/rx/stnz.sm: Add new pattern.
	* gas/rx/stz.d: Add new pattern.
	* gas/rx/stz.sm: Add new pattern.
	* gas/rx/utof.d: New.
	* gas/rx/utof.sm: New.
 2015-12-15 09:26:56 +00:00
Nick Clifton
e7286c5668 Fix the disassembly of conditional instructions will illegal condition selections. 
* rx-dis.c (condition_names): Replace always and never with
	invalid, since the always/never conditions can never be legal.
 2015-11-17 11:37:14 +00:00
Nick Clifton
e292aa7a95 Fix disassembly of RX zero-offset register indirect instructions. 
opcode	* rx.h (enum RX_Operand_Type): Add RX_Operand_Zero_Indirect.

opcodes	* rx-decode.opc (rx_disp): If the displacement is zero, set the
	type to RX_Operand_Zero_Indirect.
	* rx-decode.c: Regenerate.
	* rx-dis (print_insn): Handle RX_Operand_Zero_Indirect.

gas	* config/rx-parse.y: Allow zero value for 5-bit displacements.

tests	* gas/rx/mov.sm: Add tests for zero offset indirect moves.
	* gas/rx/mov.d: Update expected output.
 2015-11-02 14:14:22 +00:00
Nick Clifton
f04265eceb Enhance the RX disassembler to detect and report bad instructions. 
opcode	* rx.h (enum RX_Size): Add RX_Bad_Size entry.

opcodes	* rx-decode.opc (bwl): Use RX_Bad_Size.
	(sbwl): Likewise.
	(ubwl): Likewise.  Rename to ubw.
	(uBWL): Rename to uBW.
	Replace all references to uBWL with uBW.
	* rx-decode.c: Regenerate.
	* rx-dis.c (size_names): Add entry for RX_Bad_Size.
	(opsize_names): Likewise.
	(print_insn_rx): Detect and report RX_Bad_Size.
 2015-09-22 17:21:13 +01:00
Alan Modra
b90efa5b79 ChangeLog rotatation and copyright year update 2015-01-02 00:53:45 +10:30
Alan Modra
4b95cf5c0c Update copyright years 2014-03-05 22:16:15 +10:30
Alan Modra
5eb3690ee9 * arc-dis.c: Include sysdep.h first, remove some redundant includes. 
* bfin-dis.c: Likewise.
	* i860-dis.c: Likewise.
	* ia64-dis.c: Likewise.
	* ia64-gen.c: Likewise.
	* m68hc11-dis.c: Likewise.
	* mmix-dis.c: Likewise.
	* msp430-dis.c: Likewise.
	* or32-dis.c: Likewise.
	* rl78-dis.c: Likewise.
	* rx-dis.c: Likewise.
	* tic4x-dis.c: Likewise.
	* tilegx-opc.c: Likewise.
	* tilepro-opc.c: Likewise.
	* rx-decode.c: Regenerate.
 2012-05-18 01:59:38 +00:00
DJ Delorie
90d6ff629e * rx-dis.c (print_insn_rx): Support RX_Operand_TwoReg. 2011-01-12 07:06:29 +00:00
DJ Delorie
0d734b5d06 [opcodes] 
* rx-decode.opc (rx_decode_opcode) (mvtipl): Add.
	(mvtcp, mvfcp, opecp): Remove.
	* rx-decode.c: Regenerate.
	* rx-dis.c (cpen): Remove.

[gas]
	* config/rx-parse.y (MVTIPL): Update bit pattern.
	(cpen): Remove.

[include/opcode]
	* rx.h (rx_decode_opcode) (mvtipl): Add.
	(mvtcp, mvfcp, opecp): Remove.
 2009-11-05 00:38:45 +00:00
Nick Clifton
c7927a3c0e bfd 
* Makefile.am (ALL_MACHINES): Add cpu-rx.lo.
        (ALL_MACHINES_CFILES): Add cpu-rx.c.
        (BFD32_BACKENDS): Add elf32-rx.lo.
        (BFD32_BACKENDS_CFILES): Add elf32-rx.c.
        * archures.c (bfd_architecture): Add bfd_arch_rx and bfd_mach_rx.
        Export bfd_rx_arch.
        (bfd_archures_list): Add bfd_rx_arch.
        * config.bfd: Add entry for rx-*-elf.
        * configure.in: Add entries for bfd_elf32_rx_le_vec and
        bfd_elf32_rx_be_vec.
        * reloc.c: Add RX relocations.
        * targets.c: Add RX target vectors.
        * Makefile.in: Regenerate.
        * bfd-in2.h: Regenerate.
        * configure: Regenerate.
        * libbfd.h: Regenerate.
        * cpu-rx.c: New file.
        * elf32-rx.c: New file.

binutils
        * readelf.c: Add support for RX target.
        * MAINTAINERS: Add DJ and NickC as maintainers for RX.

gas
        * Makefile.am: Add RX target.
        * configure.in: Likewise.
        * configure.tgt: Likewise.
        * read.c (do_repeat_with_expander): New function.
        * read.h: Provide a prototype for do_repeat_with_expander.
        * doc/Makefile.am: Add RX target documentation.
        * doc/all.texi: Likewise.
        * doc/as.texinfo: Likewise.
        * Makefile.in: Regenerate.
        * NEWS: Mention support for RX architecture.
        * configure: Regenerate.
        * doc/Makefile.in: Regenerate.
        * config/rx-defs.h: New file.
        * config/rx-parse.y: New file.
        * config/tc-rx.h: New file.
        * config/tc-rx.c: New file.
        * doc/c-rx.texi: New file.

gas/testsuite
        * gas/rx: New directory.
        * gas/rx/*: New set of test cases.
        * gas/elf/section2.e-rx: New expected output file.
        * gas/all/gas.exp: Add support for RX target.
        * gas/elf/elf.exp: Likewise.
        * gas/lns/lns.exp: Likewise.
        * gas/macros/macros.exp: Likewise.

include
        * dis-asm.h: Add prototype for print_insn_rx.

include/elf
        * rx.h: New file.

include/opcode
        * rx.h: New file.

ld
        * Makefile.am: Add rules to build RX emulation.
        * configure.tgt: Likewise.
        * NEWS: Mention support for RX architecture.
        * Makefile.in: Regenerate.
        * emulparams/elf32rx.sh: New file.
        * emultempl/rxelf.em: New file.

opcodes
        * Makefile.am: Add RX files.
        * configure.in: Add support for RX target.
        * disassemble.c: Likewise.
        * Makefile.in: Regenerate.
        * configure: Regenerate.
        * opc2c.c: New file.
        * rx-decode.c: New file.
        * rx-decode.opc: New file.
        * rx-dis.c: New file.
 2009-09-29 14:17:19 +00:00