Commit Graph

4039 Commits

Author SHA1 Message Date
Mike Frysinger
7eb99e5e27 sim: cr16/d10v: move storage out of header
These ports declare their State variable in a header and then include
multiple times.  This causes linker errors with newer gcc due to the
change in -fno-common behavior.  Move the storage to a C file so we
only have one instance of it in the final program.
2021-01-09 09:39:17 -05:00
Mike Frysinger
f074c07d8d sim: common: clean up asprintf includes a bit
Delete stale prototypes that libiberty.h already provides, and add
missing libiberty.h includes to files that use those functions.
2021-01-09 09:32:34 -05:00
Mike Frysinger
f8cab0b995 sim: sh64: delete port
Support for sh64 was dropped from bfd et al in 2018.  Without
that, the sim port is useless.  So clean up this code too.
2021-01-09 09:29:17 -05:00
Mike Frysinger
50df264dae sim: clean up stale AC_PREREQ refs
This was purged from the tree when we upgraded to autoconf-2.69,
but a few references in the sim tree were missed.
2021-01-09 09:27:29 -05:00
Mike Frysinger
bf470982f9 sim: enable -Werror by default for some arches
We've had this off for a long time because the sim code was way too
full of warnings for it to be feasible.  However, I've cleaned things
up significantly from when this was first merged, and we can start to
turn this around.

Change the macro to enable -Werror by default, and allow ports to opt
out.  New ports will get it automatically (and we can push back on
them if they try to turn it off).

Also turn it off for the few ports that still hit warnings for me.
All the rest will get the new default, and we'll wait for feedback
if/when new issues come up.
2021-01-09 09:19:37 -05:00
Mike Frysinger
f41464416a sim: pru: fix include ordering with sim-main.h
Make sure config.h is included before C library headers otherwise the
later libiberty.h include gets confused about asprintf state leading
to warnings like:
common/sim-utils.c:330:9:
	warning: implicit declaration of function 'vasprintf';
	did you mean 'xvasprintf'? [-Wimplicit-function-declaration]
2021-01-09 08:43:48 -05:00
Mike Frysinger
b5a4a01af4 sim: hw: rework code to avoid gcc warnings
Newer gcc thinks we might return a pointer to a stack buffer, but
we don't -- we strdup it before returning.  Rework the code to just
malloc the buffer from the start and avoid the stack+strdup.
2021-01-09 08:40:07 -05:00
Mike Frysinger
ce0be4070f sim: common: add missing stdlib.h for abort() 2021-01-09 02:45:14 -05:00
Mike Frysinger
46f900c065 sim: require a C11 compiler
With GDB requiring a C++11 compiler now, this hopefully shouldn't
be a big deal.  It's been 10 years since C11 came out, so should
be plenty of time to upgrade.

This will allow us to start cleaning up random header logic and
many of our non-standard custom types.
2021-01-08 15:45:42 -05:00
Mike Frysinger
f4cfa91741 sim: ppc: stub out sim_memory_map
Not clear how to implement this in the ppc-specific sim, so just
stub it out.  This is as good as it was previously.
2021-01-08 01:03:10 -05:00
Mike Frysinger
0f8e278da2 sim: ChangeLog: move arch-specific entries into the arch dir
We don't want arch-specific entries in the common ChangeLog files.
Most arches do this already, so clean up the recent additions, and
move some older entries down to help avoid confusing newcomers.
2021-01-07 12:22:33 -05:00
Mike Frysinger
e6c1dbbfe8 sim: cris: disable test that crashes the linker
PR ld/13900
Linking this test crashes the linker, so disable it.  The crash
was reported about 9 years ago but haven't made progress, so lets
avoid the failures in test runs.
2021-01-07 12:22:14 -05:00
Mike Frysinger
a39487c668 sim: cris: use -sim with C tests for cris-elf targets
Building the C tests with a cris-elf toolchain (gcc-10.2 &
newlib-4.1.0) currently fail due to warnings it emits:
cris-elf-ld: libc.a(lib_a-closer.o): in function `_close_r':
newlib/libc/reent/closer.c:47: warning: _close is not implemented and will always fail

This is because the default target for cris-elf is bare metal, not
the simulator.  For that, we need -sim.  So add it for elf targets.

We don't add it for all targets as the simulator (and testsuite)
run both libgloss programs as well as Linux userspace programs.
2021-01-07 12:21:48 -05:00
Mike Frysinger
bfc7d04afb sim: h8300: delete opcode caching
This is in preparation for converting h8300 over to the common memory
framework.  It's not clear how much of a speed gain this was providing
in the first place -- a naive test of ~400k insns (using shlr.s) shows
that this code actually slowed things down a bit.

If anyone really cares about h8300 anymore, they can migrate to the
common insn caching logic.
2021-01-07 12:21:12 -05:00
Mike Frysinger
e904f56d02 gdb/sim: add support for exporting memory map
This allows gdb to quickly dump & process the memory map that the sim
knows about.  This isn't fully accurate, but is largely limited by the
gdb memory map format.  While the sim supports RWX bits, gdb can only
handle RW or RO regions.
2021-01-07 12:18:59 -05:00
Mike Frysinger
9446bcf6be fix paths in ChangeLog 2021-01-07 01:27:06 -05:00
Mike Frysinger
1861f7cfbf sim: cris: fix C tests with newer toolchains
Make sure we include unistd.h for getpid prototypes to fix build
warnings/errors with newer compilers & C libraries.

Doing that for close in openpf highlights these were using the
wrong function -- need to use fclose on FILE*, not close.

These tests pass again with a cris-elf toolchain.
2021-01-07 01:19:49 -05:00
Mike Frysinger
865288236d sim: fr30: delete unused testsuite
Looking through the history, it doesn't seem like the fr30 port was
ever merged.  There used to be a testsuite/fr30-elf/ dir, but that
was punted back in 2005 as being dead too.  Since there's no refs
and the dir hasn't been touched since 1999, lets assume no one will
ever notice or care.
2021-01-05 19:29:46 -05:00
Mike Frysinger
c004e77f7d sim: testsuite: delete unused Make-common.in file
This seems like it was meant to unify arch test Makefiles, but
that never happened, and we've instead unified using dejagnu.
2021-01-05 19:29:11 -05:00
Mike Frysinger
a2f8e947a8 sim: h8300: fix test mach markers
These tests all fail to assemble when targeting the h8300 or h8300h
cpu variants with errors like:
rotl.s:242: Warning: Opcode `rotl.b' with these operand types not available in H8/300H mode
rotl.s:242: Error: invalid operands

It's been this way for years and no one seems to care, so disable
them for those targets since the assembler thinks it's impossible.
2021-01-05 19:26:33 -05:00
Mike Frysinger
0c7f5bd08c sim: h8300: simplify testsuite runner
We don't need to manually enumerate every test.  Use a glob function
like every other port and rely on the (already existing) #mach headers
in each file to filter out targets we don't care about.
2021-01-05 19:26:17 -05:00
Mike Frysinger
3d52735bab sim: include stdlib.h for atoi()
Make sure the files using atoi() include stdlib.h for its prototype.
These files were relying on it being included implicitly by others
which isn't guaranteed, and newer toolchains produce warnings.
2021-01-04 20:17:37 -05:00
Mike Frysinger
9416af6e7d sim: stdlib.h for abs()
Make sure the files using abs() include stdlib.h for its prototype.
These files were relying on it being included implicitly by others
which isn't guaranteed, and newer toolchains produce warnings.
2021-01-04 20:13:10 -05:00
Mike Frysinger
dfb856ba26 sim: update bug URI to https:// 2021-01-04 18:14:37 -05:00
Mike Frysinger
babd2ee15d sim: common: version: add build & homepage info when interactive
This mirrors gdb behavior of dumping extra info when being run in
interactive mode.  It also gives us an excuse to use the otherwise
unused sim_print_config.
2021-01-04 18:10:40 -05:00
Mike Frysinger
2b667e3297 sim: common: use sim_config_print name
Meant to push this variant where naming preference is given to the
module the code resides in rather than the operation it performs.
2021-01-04 18:10:40 -05:00
Mike Frysinger
19b1c38562 sim: common: add a version output helper w/copyright+license info
This mirrors the existing sim_print_help function, and the behavior
of all other GNU tools with their --version.
2021-01-04 17:41:23 -05:00
Mike Frysinger
dbed468bcb sim: common: rename sim_print_config
print_sim_config has never been used anywhere, so rename it to follow
the sim_* naming style for all other symbols we export.
2021-01-04 17:35:20 -05:00
Mike Frysinger
0ede24f2c4 sim: common: add align_{up,down} to match gdb
We have ALIGN_{8,16,PAGE} and FLOOR_PAGE macros (where PAGE is defined as
4k) which were imported from the ppc sim.  But no other sim utilizes these
and hardcoding the sizes in the name is a bit limiting.

Let's delete these and import the two general macros that gdb uses:
	align_up(addr, bytes)
	align_down(addr, bytes)

This in turn allows us to cut over the Blackfin code immediately.
2021-01-02 20:55:21 -05:00
Joel Brobecker
3666a04883 Update copyright year range in all GDB files
This commits the result of running gdb/copyright.py as per our Start
of New Year procedure...

gdb/ChangeLog

        Update copyright year range in copyright header of all GDB files.
2021-01-01 12:12:21 +04:00
Pavel I. Kryukov
382bc56bc7 sim/mips/sim-main.c: Include <stdlib.h> (for abort() declaration)
sim/mips/ChangeLog:

	* sim-main.c: Include <stdlib.h>.
2020-12-31 08:14:36 +04:00
Jens Bauer
9f132af9e1 Add support for the SDIV and UDIV instructions to the ARM simulator.
* armemu.c (handle_v6_insn): Add support for SDIV and UDIV.
	* thumbemu.c (handle_T2_insn): Likewise.
2020-12-15 12:40:35 +00:00
Pavel I. Kryukov
ad9675dd80 sim/mips/cp1.c: Include <stdlib.h> for abort() declaration
sim/mips/ChangeLog:

	* cp1.c: Include <stdlib.h>
2020-12-14 07:02:05 +04:00
Dimitar Dimitrov
e57cf1f2cd sim: pru: Add support for LMBD instruction
Binutils support for LMBD instruction was merged [1]. So add it also
to simulator.

LMBD instruction does left-most-bit-detection. It returns 32 if
the given bit value is not found in the provided word value.

[1] https://sourceware.org/pipermail/binutils/2020-October/113901.html

sim/pru/ChangeLog:

	* pru.h (RS1SEL): New macro.
	(RS1_WIDTH): New macro.
	* pru.isa: Describe the LMBD instruction.

sim/testsuite/sim/pru/ChangeLog:

	* lmbd.s: New test.
2020-11-12 22:41:10 +02:00
Nick Clifton
94cde56ab3 m32r sim: Add prototypes for functions that pass/return DI values
* m32r-sim.h (m32rbf_h_accum_get_handler): Always provide a
	prototype for this function.
	(m32rbf_h_accum_set_handler): Likewise.
	(m32r2f_h_accums_get_handler): Prototype.
	(m32r2f_h_accums_set_handler): Prototype.
2020-11-12 12:22:18 +00:00
Simon Marchi
8807d3127c sim/bpf: re-generate configure
I noticed a little diff when re-generating the configure file in this
directory.

sim/ChangeLog:

	* bpf/configure: Re-generate.

Change-Id: Ieb26be2cc1be8108d4b08387255f45b57f288171
2020-11-01 19:39:11 -05:00
Andrew Burgess
63aa0ac0fd sim: move ChangeLog entries into the correct files
Moves some ChangeLog entries under sim/ into the correct files.
2020-10-22 13:39:26 +01:00
Dr. David Alan Gilbert
777cd7ab3f Fix printf formatting errors where "0x" is used as a prefix for a decimal number.
bfd	* po/es.po: Fix printf format

binutils * windmc.c: Fix printf format

gas	* config/tc-arc.c: Fix printf format

opcodes	* po/es.po: Fix printf format

sim	* arm/armos.c: Fix printf format
	* ppc/emul_netbsd.c: Fix printf format
--
Dr. David Alan Gilbert / dgilbert@redhat.com / Manchester, UK
2020-10-22 12:00:10 +01:00
Andrew Burgess
043f5c63f0 sim: Fix autoreconf errors in sim/ directory
Run autoreconf in sim/ directory and you'll see some errors.  The
problem is that autoreconf (a perl script) does not evaluate the value
passed as an argument to AC_CONFIG_AUX_DIR, so something like:

  AC_CONFIG_AUX_DIR(`cd $srcdir;pwd`/../..)

does not do the right thing inside autoreconf, my understanding is
that changing to something like this is fine:

  AC_CONFIG_AUX_DIR(../..)

the generated configure seems to check the value passed, and the value
passed relative to the source directory, so I think we get basically
the same behaviour as before.

sim/testsuite/ChangeLog:

	* configure: Regnerate.
	* configure.ac (AC_CONFIG_AUX_DIR): Update.

sim/testsuite/d10v-elf/ChangeLog:

	* configure: Regnerate.
	* configure.ac (AC_CONFIG_AUX_DIR): Update.

sim/testsuite/frv-elf/ChangeLog:

	* configure: Regnerate.
	* configure.ac (AC_CONFIG_AUX_DIR): Update.

sim/testsuite/m32r-elf/ChangeLog:

	* configure: Regnerate.
	* configure.ac (AC_CONFIG_AUX_DIR): Update.

sim/testsuite/mips64el-elf/ChangeLog:

	* configure: Regnerate.
	* configure.ac (AC_CONFIG_AUX_DIR): Update.
2020-10-06 11:29:44 +01:00
Andrew Burgess
e163628395 sim/m32r: return register sizes after fetch and store
The m32r simulator currently always returns -1 for the register size
after both a fetch and a store.  In the fetch case GDB is forgiving of
this, but in the store case GDB treats a return value of -1 as an
error.

This commit updates the m32r simulator to return a valid register size
when fetching or storing a register.  This fixes any GDB test that
writes to a register, which will include any GDB test that makes an
inferior call, for example gdb.base/break.exp.

sim/m32r/ChangeLog:

	* m32r.c (m32rbf_register_size): New function.
	(m32rbf_fetch_register): Use new function.
	(m32rbf_store_register): Likewise.
2020-09-18 17:26:07 +01:00
David Faust
3ad6c19423 bpf: simulator: correct div, mod insn semantics
The div and mod eBPF instructions are unsigned, but the semantic
specification for the simulator incorrectly used signed operators.
Correct them to unsigned versions, and correct the ALU tests in
the simulator (which incorrectly assumed signed semantics).

Tested in bpf-unknown-none.

cpu/ChangeLog:
2020-09-08  David Faust  <david.faust@oracle.com>

	* bpf.cpu (define-alu-instructions): Correct semantic operators
	for div, mod to unsigned versions.

sim/ChangeLog:
2020-09-08  David Faust  <david.faust@oracle.com>

	* bpf/sem-be.c: Regenerate.
	* bpf/sem-le.c: Likewise.

sim/testsuite/ChangeLog:
2020-09-08  David Faust  <david.faust@oracle.com>

	* sim/bpf/alu.s: Correct div and mod tests.
	* sim/bpf/alu32.s: Likewise.
2020-09-08 11:39:07 -07:00
Jose E. Marchesi
0316fb52d6 bpf: several small fixes in the simulator
This patch fixes the following problems:
- Missing includes in several files leading to implicit function
  declarations.
- Missing prototype for bpf_trace_printk in bpf-helpers.h
- The simulator bitsize was set to 32 bits, causing truncation of
  the program counter.

Tested in bpf-unknown-none.

sim/ChangeLog:

2020-09-03  Jose E. Marchesi  <jose.marchesi@oracle.com>

	* bpf/bpf.c: Include bpf-helpers.h.
	* bpf/bpf-helpers.h: Provide a prototype for bpf_trace_printk.
	* bpf/configure.ac: Set simulator bitsize to 64.
	* bpf/configure (includedir): Regenerate.
	* bpf/sim-if.c: Include stdlib.h.
	* bpf/traps.c: Likewise.
2020-09-03 18:22:08 +02:00
Jose E. Marchesi
1d01693f55 sim: better handle builds of primary targets lacking sims
When building with a primary target that doesn't feature a simulator,
one would expect for nothing to be done in sim/.  However, a
$(top_builddir)/sim/testsuite directory is created, with a Makefile
containing a rule like:

check-DEJAGNU: site.exp
	echo "Dejagnu-checking in `pwd` directory ..."
	rootme=`pwd`; export rootme; echo rootme = $$rootme; \
	srcdir=`cd ${srcdir}; pwd`; export srcdir ; echo srcdir = $$srcdir; \
	EXPECT=${EXPECT} ; export EXPECT ; echo EXPECT = $$EXPECT; \
	if [ -f $$rootme/../../expect/expect ]; then \
	  TCL_LIBRARY=`cd $$srcdir/../../tcl/library && pwd`; \
	  export TCL_LIBRARY; \
	fi; \
        echo TCL_LIBRARY = $$TCL_LIBRARY; \
	runtest=$(RUNTEST); echo runtest = $$runtest; \
	if $(SHELL) -c "$$runtest --version" > /dev/null 2>&1; then \
	  $$runtest $(RUNTESTFLAGS); \
	else echo "WARNING: could not find \`runtest'" 1>&2; :;\
	fi

Consequently, when `make check' recurses into sim/testsuite, the above
rule is executed.  Until now, the desired effect (of doing nothing)
was achieved because `runtest --version' fails due to a malformed
site.exp being generated in objdir: it is malformed because the
primary target doesn't configure a $sim_arch. i.e. this was doing the
right thing just by chance.

However, the git version of dejagnu seems to have changed in a way
runtest doesn't try to load site.exp when it gets --version.  The net
effect is that the rule above tries to actually run the tests, failing
miserably.

This little patch makes sim/configure to not recurse into
sim/testsuite if the primary target didn't configure a simulator.

Tested with:
- A simulator target (bpf-unkonwn-none).
- A simulator-less target (x86_64-linux-gnu).
- A simulator-less target and --build-targets=all.

sim/ChangeLog:

2020-09-03  Jose E. Marchesi  <jose.marchesi@oracle.com>

	* configure.ac: Do not configure sim/testsuite nor sim/igen if the
	primary target doesn't have a simulator.
	* configure: Regenerate.
2020-09-03 18:21:20 +02:00
Simon Marchi
5798d69f03 sim/bfin: include config/pkg.m4 in configure.ac
When trying to re-generate configure in sim/bfin, I get:

    $ autoreconf -vf
    autoreconf: Entering directory `.'
    autoreconf: configure.ac: not using Gettext
    autoreconf: running: aclocal --force
    autoreconf: configure.ac: tracing
    autoreconf: configure.ac: not running libtoolize: --install not given
    autoreconf: running: /opt/autostuff/bin/autoconf --force
    configure.ac:57: error: possibly undefined macro: AC_CHECK_LIB
          If this token and others are legitimate, please use m4_pattern_allow.
          See the Autoconf documentation.
    autoreconf: /opt/autostuff/bin/autoconf failed with exit status: 1

This happens since commit f693213d12 ("Run `autoreconf -vf` throughout").

The problem (not clear from the error message) is that the
PKG_CHECK_MODULES macro used in configure.ac is undefined.  In the past, I
suppose that it relied on the person running autoconf having pkg.m4 (from
pkg-config) in their include path.  That's not my case.

Since we recently added a local version of PKG_CHECK_MODULES to our tree,
we can just make sim/bfin/configure.ac use it.  This patch makes
configure.ac include config/pkg.m4, and re-generates configure.  With this,
the configure script appears to be generated correctly, I am able to
configure and build the bfin simulator.

Note: using sinclude to include the required m4 files makes no sense to
me.  These files contain macros we need, if they are not defined then
the resulting file is unusable.  And sinclude fails silently if the file
is not found.  So, better use include/m4_include.

sim/bfin/ChangeLog:

	* configure.ac: Include config/pkg.m4.

Change-Id: I7d8012e5ed510cd7746b94e918f0feb1c701cd83
2020-08-21 11:55:08 -04:00
Luis Machado
a5353ae6cf [ARM, sim] Fix build failure with -Werror (PR26365)
There is a bit of a situation in the ARM sim with regards to the handling
of argv. sim_open () gets a const char **argv, but ARM's sim_open gets
clever and decides to modify argv in place via sim_target_parse_command_line.
I'm not sure why.

In any case, here's a fix that makes the code modify a copy of argv instead.

sim/arm/ChangeLog:

2020-08-13  Luis Machado  <luis.machado@linaro.org>

	PR sim/26365

	* wrapper.c (sim_target_parse_command_line): Free discarded argv
	entries.
	(sim_open): Use a duplicate of argv instead of the original argv.
2020-08-13 10:32:52 -03:00
Tom de Vries
b3f8962bdb [sim] Fix mbuild build breaker in sim-cpu.c
When running gdb/gdb_mbuild.sh, I run into:
...
src/sim/aarch64/../common/sim-cpu.c: In function 'sim_cpu_free':
src/sim/aarch64/../common/sim-cpu.c:64:3: error: implicit declaration of \
  function 'free' [-Werror=implicit-function-declaration]
   free (cpu);
   ^~~~
src/sim/aarch64/../common/sim-cpu.c:64:3: error: incompatible implicit \
  declaration of built-in function 'free' [-Werror]
src/sim/aarch64/../common/sim-cpu.c:64:3: note: include '<stdlib.h>' or \
  provide a declaration of 'free'
...

Fix this by adding "#include <stdlib.h>".

Tested by gdb/gdb_mbuild.sh -e aarch64-elf.

sim/common/ChangeLog:

2020-08-10  Tom de Vries  <tdevries@suse.de>

	* sim-cpu.c: Include stdlib.h for free.
2020-08-10 17:26:09 +02:00
Jozef Lawrynowicz
4b48e6d46d MSP430: sim: Increase main memory region size
The area between 0xFF00 and 0xFFC0 is unallocated in the simulator
memory map, so extend the main memory region up to 0xFFC0 to allow the
simulator to make use of the extra 192 bytes of space.

sim/msp430/ChangeLog:

	* msp430-sim.c (sim_open): Increase the size of the main memory region
	to 0xFAC0.
2020-08-07 11:01:22 +01:00
Jozef Lawrynowicz
e8a387fb5f MSP430: sim: Fix incorrect simulation of unsigned widening multiply
Operand sizes used for simulation of MSP430 hardware multiply
operations are not aligned with the sizes used on the target, resulting
in the simulator storing signed operands with too much precision.

Additionally, simulation of unsigned multiplication is missing explicit
casts to prevent any implicit sign extension.

gcc.c-torture/execute/pr91450-1.c uses unsigned widening multiplication
of 32-bit operands -4 and 2, to produce a 64-bit result:
0xffff fffc * 0x2 = 0x1 ffff fff8

If -4 is stored in 64-bit precision, then the multiplication is
essentially signed and the result is -8 in 64-bit precision
(0xffff ffff ffff fffc), which is not correct.

sim/msp430/ChangeLog:

	* msp430-sim.c (put_op): For unsigned multiplication, explicitly cast
	operands to the unsigned type before multiplying.
	* msp430-sim.h (struct msp430_cpu_state): Fix types used to store hwmult
	operands.

sim/testsuite/sim/msp430/ChangeLog:

	* mpyull_hwmult.s: New test.
2020-08-05 15:02:30 +01:00
Jose E. Marchesi
8c4c18181e sim: generated files for the eBPF simulator
This patch adds the CGEN generated files for the eBPF simulator.

sim/ChangeLog:

2020-08-04  Jose E. Marchesi  <jose.marchesi@oracle.com>
	    David Faust <david.faust@oracle.com>

	* bpf/arch.c: Likewise.
	* bpf/arch.h: Likewise.
	* bpf/cpu.c: Likewise.
	* bpf/cpu.h: Likewise.
	* bpf/cpuall.h: Likewise.
	* bpf/decode-be.c: Likewise.
	* bpf/decode-be.h: Likewise.
	* bpf/decode-le.c: Likewise.
	* bpf/decode-le.h: Likewise.
	* bpf/defs-be.h: Likewise.
	* bpf/defs-le.h: Likewise.
	* bpf/sem-be.c: Likewise.
	* bpf/sem-le.c: Likewise.
2020-08-04 18:11:31 +02:00
Jose E. Marchesi
b26e2ae7d3 sim: eBPF simulator
This patch introduces the basics of an instruction-simulator for eBPF.
The simulator is based on CGEN.

gdb/ChangeLog:

2020-08-04  Jose E. Marchesi  <jose.marchesi@oracle.com>

	* configure.tgt: Set gdb_sim for bpf-*-* targets.

sim/ChangeLog:

2020-08-04  Jose E. Marchesi  <jose.marchesi@oracle.com>
	    David Faust <david.faust@oracle.com>

	* configure.tgt (sim_arch): Add entry for bpf-*-*.
	* configure: Regenerate.
	* MAINTAINERS: Add maintainer for the BPF simulator.
	* bpf/Makefile.in: New file.
	* bpf/bpf-helpers.c: Likewise.
	* bpf/bpf-helpers.def: Likewise.
	* bpf/bpf-helpers.h: Likewise.
	* bpf/bpf-sim.h: Likewise.
	* bpf/bpf.c: Likewise.
	* bpf/config.in: Likewise.
	* bpf/configure.ac: Likewise.
	* bpf/decode.h: Likewise.
	* bpf/eng.h: Likewise.
	* bpf/mloop.in: Likewise.
	* bpf/sim-if.c: Likewise.
	* bpf/sim-main.h: Likewise.
	* bpf/traps.c: Likewise.
	* bpf/configure: Generate.
	* bpf/aclocal.m4: Likewise.

sim/testsuite/ChangeLog:

2020-08-04  David Faust  <david.faust@oracle.com>
	    Jose E. Marchesi  <jose.marchesi@oracle.com>

	* configure: Regenerate.
	* sim/bpf/allinsn.exp: New file.
	* sim/bpf/alu.s: Likewise.
	* sim/bpf/alu32.s: Likewise.
	* sim/bpf/endbe.s: Likewise.
	* sim/bpf/endle.s: Likewise.
	* sim/bpf/jmp.s: Likewise.
	* sim/bpf/jmp32.s: Likewise.
	* sim/bpf/ldabs.s: Likewise.
	* sim/bpf/mem.s: Likewise.
	* sim/bpf/mov.s: Likewise.
	* sim/bpf/testutils.inc: Likewise.
	* sim/bpf/xadd.s: Likewise.
2020-08-04 18:09:16 +02:00
Simon Marchi
f693213d12 Run autoreconf -vf throughout
I ran

    for i in $(find . -name configure.ac); do pushd $(dirname $i); autoreconf -vf; popd; done

to re-generate all automake/autoconf files throughout the repo (with
upstream autoconf 2.69 and automake 1.15.1).  These were the changes
that came out.  I am pushing this as obvious.

libdecnumber/ChangeLog:

	* aclocal.m4, configure: Re-generate.

sim/bfin/ChangeLog:

	* aclocal.m4, configure: Re-generate.

sim/erc32/ChangeLog:

	* configure: Re-generate.

sim/mips/ChangeLog:

	* configure: Re-generate.

sim/testsuite/ChangeLog:

	* configure: Re-generate.

Change-Id: I97335c09972d25cc5f6fd8da4db4ffe4a0348787
2020-07-29 16:03:55 -04:00
Sebastian Huber
c4df5bbeb8 sim/igen: Fix linker error with -fno-common
GCC 10 enables -fno-common by default.  This resulted in multiple
definition linker errors since a global variable was declared and
defined in a header file:

  ld: libsim.a(idecode.o):sim/v850/idecode.h:71: multiple definition of
  `idecode_issue'; libsim.a(irun.o):sim/v850/idecode.h:71: first defined
  here

  ld: libsim.a(engine.o):sim/v850/idecode.h:71: multiple definition of
  `idecode_issue'; libsim.a(irun.o):sim/v850/idecode.h:71: first defined
  here

  ld: libsim.a(support.o):sim/v850/idecode.h:71: multiple definition of
  `idecode_issue'; libsim.a(irun.o):sim/v850/idecode.h:71: first defined
  here

  ld: libsim.a(semantics.o):sim/v850/idecode.h:71: multiple definition
  of `idecode_issue'; libsim.a(irun.o):sim/v850/idecode.h:71: first
  defined here

sim/igen

	PR sim/26194

	* lf.h (lf_get_file_type): Declare.
	* lf.c (lf_get_file_type): Define.
	* gen-idecode.c (print_idecode_issue_function_header): Use
	lf_get_file_type() to issue an extern variable declaration in
	case of header files.
2020-07-03 21:03:47 +02:00
Sebastian Huber
ad8464f799 sim/ppc: Fix linker error with -fno-common
GCC 10 enables -fno-common by default.  This resulted in a multiple
definition linker error since global variables were declared and defined
in a header file:

  ld: ld-insn.o:sim/ppc/ld-insn.h:221: multiple definition of
  `max_model_fields_len'; igen.o:sim/ppc/ld-insn.h:221: first defined here

sim/ppc

	* ld-insn.h (last_model, last_model_data, last_model_function,
	last_model_internal, last_model_macro, last_model_static):
	Delete.
	(max_model_fields_len, model_data, model_functions,
	model_internal, model_macros, model_static, models): Declare, but do not
	define.
	* ld-insn.c (last_model, last_model_data, last_model_function,
	last_model_internal, last_model_macro, last_model_static,
	max_model_fields_len, model_data, model_functions,
	model_internal, model_macros, model_static, models): Define.
2020-07-03 18:47:40 +02:00
Kamil Rytarowski
7a20f753ef sim: ppc: netbsd: Sync signal names with NetBSD 9.99.49
sim/ppc/ChangeLog:

	* emul_netbsd.c (netbsd_signal_names): Sync with NetBSD 9.99.49.
2020-03-12 16:07:37 +01:00
Kamil Rytarowski
607c693210 sim: ppc: netbsd: Sync errno codes with NetBSD 9.99.49
sim/ppc/ChangeLog:

	* emul_netbsd.c (netbsd_error_names): Sync with NetBSD 9.99.49.
2020-03-12 16:07:37 +01:00
Carlo Bramini
69b1ffdb01 sim/aarch64: Fix register ordering bug in blr (PR sim/25318)
A comment in the implementation of blr says:

  /* The pseudo code in the spec says we update LR before fetching.
     the value from the rn.  */

With 'rn' being the register holding the destination address.

This may have been true at one point, but the ISA manual now clearly
shows the destination register being read before the link register is
written.

This commit updates the implementation of blr to match.

sim/aarch64/ChangeLog:

	PR sim/25318
	* simulator.c (blr): Read destination register before calling
	aarch64_save_LR.

Change-Id: Icb1c556064e3d9c807ac28440475caa205ab1064
2020-02-06 22:50:26 +00:00
Jozef Lawrynowicz
b7dcc42dfd MSP430: Fix simulator execution of RRUX instruction
The MSP430X RRUX instruction (unsigned right shift) is synthesized as
the RRC (rotate right through carry) instruction, but with the ZC
(zero carry) bit of the opcode extention word set.

Ensure the carry flag is ignored when the ZC bit is set.

sim/msp430/ChangeLog:

2020-01-22  Jozef Lawrynowicz  <jozef.l@mittosystems.com>

	* msp430-sim.c (msp430_step_once): Ignore the carry flag when executing
	an RRC instruction, if the ZC bit of the extension word is set.

sim/testsuite/sim/msp430/ChangeLog:

2020-01-22  Jozef Lawrynowicz  <jozef.l@mittosystems.com>

	* rrux.s: New test.
2020-01-22 21:52:29 +00:00
Simon Marchi
b760fb3a1c sim: add some stdlib.h includes
When trying to compile GDB with --target=avr, with gcc 9.2.0, I am
getting a bunch of:

    /home/simark/src/binutils-gdb/sim/avr/../common/nrun.c:94:7: error: implicit declaration of function ‘abort’ [-Werror=implicit-function-declaration]
       94 |       abort ();
          |       ^~~~~
    /home/simark/src/binutils-gdb/sim/avr/../common/nrun.c:94:7: error: incompatible implicit declaration of built-in function ‘abort’ [-Werror]
    /home/simark/src/binutils-gdb/sim/avr/../common/nrun.c:94:7: note: include ‘<stdlib.h>’ or provide a declaration of ‘abort’

I did what the compiler told me and added the relevant includes in the
problematic files.

sim/common/ChangeLog:

	* nrun.c: Include stdlib.h.
	* sim-core.c: Likewise.
	* sim-engine.c: Likewise.
	* sim-io.c: Likewise.
	* sim-module.c: Likewise.
	* sim-reason.c: Likewise.
2020-01-19 19:48:16 -05:00
Christian Biesinger
07f1f3aa53 Fix spelling errors
seperate -> separate

bfd/ChangeLog:

2020-01-17  Christian Biesinger  <cbiesinger@google.com>

	* coff-arm.c: Fix spelling error (seperate).
	* elfxx-riscv.c (riscv_parse_sv_or_non_std_ext): Fix spelling
	error (seperate).
	* sysdep.h (strnlen): Fix spelling error (seperate).

opcodes/ChangeLog:

2020-01-17  Christian Biesinger  <cbiesinger@google.com>

	* opintl.h: Fix spelling error (seperate).

sim/arm/ChangeLog:

2020-01-17  Christian Biesinger  <cbiesinger@google.com>

	* iwmmxt.c: Fix spelling error (seperate).

Change-Id: I55e5f47bcf3cf3533d2acb7ad338f1be0d5f30f9
2020-01-17 12:34:03 -06:00
Joel Brobecker
b811d2c292 Update copyright year range in all GDB files.
gdb/ChangeLog:

        Update copyright year range in all GDB files.
2020-01-01 10:20:53 +04:00
Tom Tromey
78aa740b76 Add install-strip to sim/
PR build/24572 notes that "make install-strip" fails.  For me, it
works in every directory except "sim", so this patch adds
install-strip targets to the Makefiles that appear there.

sim/ChangeLog
2019-12-19  Tom Tromey  <tromey@adacore.com>

	PR build/24572:
	* Makefile.in (install-strip): New target.

sim/common/ChangeLog
2019-12-19  Tom Tromey  <tromey@adacore.com>

	PR build/24572:
	* Makefile.in (install-strip): New target.

sim/igen/ChangeLog
2019-12-19  Tom Tromey  <tromey@adacore.com>

	PR build/24572:
	* Makefile.in (install-strip): New target.

sim/ppc/ChangeLog
2019-12-19  Tom Tromey  <tromey@adacore.com>

	PR build/24572:
	* Makefile.in (install-strip): New target.

sim/testsuite/ChangeLog
2019-12-19  Tom Tromey  <tromey@adacore.com>

	PR build/24572:
	* Makefile.in (install-strip): New target.

Change-Id: I76613bc5c7e7812284f33826f8a5d914477fcdc5
2019-12-19 11:28:53 -07:00
Anthony Green
fb46334198 Add unlink support to moxie simulator
This change adds support for the unlink system call, which is
required by the GCC testsuite.  It also switches read/write/open
system calls to use the sim_io_* functions.

2019-12-14  Anthony Green  <green@moxielogic.com>

	* interp.c (sim_engine_run): Make use of sim_io_* functions for
	read/write/open system calls.  Implement the unlink system call.
2019-12-14 05:33:39 -05:00
Luis Machado
851c0536ca [ARM, sim] Fix build error and warnings
Newer GCC's have switched to -fno-common by default, and this breaks the build
for the ARM sim, like this:

binutils-gdb.git~gdb-8.3-release/sim/arm/maverick.c:65: multiple definition of `DSPsc'; libsim.a(wrapper.o):binutils-gdb.git~gdb-8.3-release/sim/arm/wrapper.c:134: first defined here
binutils-gdb.git~gdb-8.3-release/sim/arm/maverick.c:64: multiple definition of `DSPacc'; libsim.a(wrapper.o):binutils-gdb.git~gdb-8.3-release/sim/arm/wrapper.c:133: first defined here
binutils-gdb.git~gdb-8.3-release/sim/arm/maverick.c:63: multiple definition of `DSPregs'; libsim.a(wrapper.o):binutils-gdb.git~gdb-8.3-release/sim/arm/wrapper.c:132: first defined here

I also noticed a few warnings due to mismatching types, as follows:

../../../../repos/binutils-gdb/sim/arm/wrapper.c: In function ‘sim_create_inferior’:
../../../../repos/binutils-gdb/sim/arm/wrapper.c:335:16: warning: assignment discards ‘const’ qualifier from pointer target type [-Wdiscarded-qualifiers]
       for (arg = argv; *arg != NULL; arg++)
                ^
../../../../repos/binutils-gdb/sim/arm/wrapper.c:342:8: warning: assignment discards ‘const’ qualifier from pointer target type [-Wdiscarded-qualifiers]
    arg = argv;
        ^
../../../../repos/binutils-gdb/sim/arm/wrapper.c:345:13: warning: assignment discards ‘const’ qualifier from pointer target type [-Wdiscarded-qualifiers]
    for (arg = argv; *arg != NULL; arg++)
             ^
The following patch fixes both of the above.

sim/arm/ChangeLog:

2019-12-06  Luis Machado  <luis.machado@linaro.org>

	* armemu.c (isize): Move this declaration ...
	* arminit.c (isize): ... here.
	* maverick.h: New file.
	* wrapper.c: Include "maverick.h".
	(<struct maverick_regs>, <union maverick_acc_regs>): Remove and update
	comment.
	(sim_create_inferior): Cast variables to proper type.
	* maverick.c: Include "maverick.h".
	(<struct maverick_regs>, <union maverick_acc_regs>): Move
	declarations to maverick.h and update comment.
	(DSPsc, DSPacc, DSPregs): Adjust comment.

Change-Id: I21db699d3b61b2de8c44053e47be4387285af28f
2019-12-06 18:16:20 -03:00
Pavel I. Kryukov
f47674be8e sim-utils.c: prevent buffer overflow.
Representation of max 32-bit integer is 10 chars.
The potential issue is observed by GCC 7 targeted to AArch64.

sim/common/ChangeLog:
2019-12-01  Pavel I. Kryukov  <kryukov@frtk.ru>

	* sim-utils.c: Prevent buffer overflow.
2019-12-04 10:38:08 -07:00
Dimitar Dimitrov
e2e9097bd2 Add testsuite for the PRU simulator port
sim/testsuite/ChangeLog:

	* configure: Regenerate.

sim/testsuite/sim/pru/ChangeLog:

	* add.s: New test.
	* allinsn.exp: New file.
	* dmem-zero-pass.s: New test.
	* dmem-zero-trap.s: New test.
	* dram.s: New test.
	* jmp.s: New test.
	* loop-imm.s: New test.
	* loop-reg.s: New test.
	* mul.s: New test.
	* subreg.s: New test.
	* testutils.inc: New file.
2019-09-23 22:11:16 +01:00
Dimitar Dimitrov
ddd44b7053 sim: Add PRU simulator port
A simulator port for the TI PRU I/O processor.

v1: https://sourceware.org/ml/gdb-patches/2016-12/msg00143.html
v2: https://sourceware.org/ml/gdb-patches/2017-02/msg00397.html
v3: https://sourceware.org/ml/gdb-patches/2017-02/msg00516.html
v4: https://sourceware.org/ml/gdb-patches/2018-06/msg00484.html
v5: https://sourceware.org/ml/gdb-patches/2019-08/msg00584.html
v6: https://sourceware.org/ml/gdb-patches/2019-09/msg00036.html

gdb/ChangeLog:

	* NEWS: Mention new simulator port for PRU.

sim/ChangeLog:

	* MAINTAINERS: Add myself as PRU maintainer.
	* configure: Regenerated.
	* configure.tgt: Add PRU.

sim/common/ChangeLog:

	* gennltvals.sh: Add PRU libgloss target.
	* nltvals.def: Regenerate from the latest libgloss sources.

sim/pru/ChangeLog:

	* Makefile.in: New file.
	* aclocal.m4: Regenerated.
	* config.in: Regenerated.
	* configure: Regenerated.
	* configure.ac: New file.
	* interp.c: New file.
	* pru.h: New file.
	* pru.isa: New file.
	* sim-main.h: New file.
2019-09-23 22:11:02 +01:00
Alan Modra
00f93c4492 bfd macro conversion to inline functions
This converts some of the macros that access struct bfd fields to
inline functions.

bfd/
	* archive.c (bfd_generic_archive_p): Use bfd_set_thin_archive.
	* bfd-in.h (bfd_get_filename, bfd_get_cacheable, bfd_get_format),
	(bfd_get_target, bfd_get_flavour, bfd_family_coff, bfd_big_endian),
	(bfd_little_endian, bfd_header_big_endian, bfd_header_little_endian),
	(bfd_get_file_flags, bfd_applicable_file_flags),
	(bfd_applicable_section_flags, bfd_has_map, bfd_is_thin_archive),
	(bfd_valid_reloc_types, bfd_usrdata, bfd_get_start_address),
	(bfd_get_symcount, bfd_get_outsymbols, bfd_count_sections),
	(bfd_get_dynamic_symcount, bfd_get_symbol_leading_char): Delete.
	* bfd/bfd.c (bfd_get_filename, bfd_get_cacheable, bfd_get_format),
	(bfd_get_file_flags, bfd_get_start_address, bfd_get_symcount),
	(bfd_get_dynamic_symcount, bfd_get_outsymbols, bfd_count_sections),
	(bfd_has_map, bfd_is_thin_archive, bfd_set_thin_archive),
	(bfd_usrdata, bfd_set_usrdata): New inline functions.
	* targets.c (bfd_get_target, bfd_get_flavour),
	(bfd_applicable_file_flags, bfd_family_coff, bfd_big_endian),
	(bfd_little_endian, bfd_header_big_endian),
	(bfd_header_little_endian, bfd_applicable_section_flags),
	(bfd_get_symbol_leading_char): New inline functions.
	* bfd-in2.h: Regenerate.
binutils/
	* ar.c (write_archive): Use bfd_set_thin_archive.
gdb/
	* gdb_bfd.c (gdb_bfd_ref, gdb_bfd_unref): Use bfd_set_usrdata.
	* dwarf2read.c (dwarf2_read_gdb_index, dwarf2_read_debug_names),
	(read_indirect_string_from_dwz): Use bfd accessor.
	* dwarf2read.h (struct dwz_file <filename>): Likewise.
	* machoread.c (macho_symfile_read_all_oso): Likewise.
	* solib.c (solib_bfd_open): Likewise.
ld/
	* ldelf.c (ldelf_after_open, ldelf_place_orphan
	* ldlang.c (walk_wild_file, lang_process): Use bfd_usrdata.
	(load_symbols, ldlang_add_file): Use bfd_set_usrdata.
	* ldmain.c (add_archive_element): Use bfd_usrdata.
	* ldlang.h (bfd_input_just_syms): New inline function.
	* emultempl/aarch64elf.em (build_section_lists): Use it.
	* emultempl/mmo.em (mmo_place_orphan): Likewise.
	* emultempl/pe.em (gld_${EMULATION_NAME}_place_orphan): Likewise.
	* emultempl/pep.em (gld_${EMULATION_NAME}_place_orphan): Likewise.
	* emultempl/ppc64elf.em (build_section_lists): Likewise.
sim/
	* ppc/emul_generic.c (emul_add_tree_options): Delete old bfd code.
2019-09-20 18:04:02 +09:30
Alan Modra
fd3619828e bfd_section_* macros
This large patch removes the unnecessary bfd parameter from various
bfd section macros and functions.  The bfd is hardly ever used and if
needed for the bfd_set_section_* or bfd_rename_section functions can
be found via section->owner except for the com, und, abs, and ind
std_section special sections.  Those sections shouldn't be modified
anyway.

The patch also removes various bfd_get_section_<field> macros,
replacing their use with bfd_section_<field>, and adds
bfd_set_section_lma.  I've also fixed a minor bug in gas where
compressed section renaming was done directly rather than calling
bfd_rename_section.  This would have broken bfd_get_section_by_name
and similar functions, but that hardly mattered at such a late stage
in gas processing.

bfd/
	* bfd-in.h (bfd_get_section_name, bfd_get_section_vma),
	(bfd_get_section_lma, bfd_get_section_alignment),
	(bfd_get_section_size, bfd_get_section_flags),
	(bfd_get_section_userdata): Delete.
	(bfd_section_name, bfd_section_size, bfd_section_vma),
	(bfd_section_lma, bfd_section_alignment): Lose bfd parameter.
	(bfd_section_flags, bfd_section_userdata): New.
	(bfd_is_com_section): Rename parameter.
	* section.c (bfd_set_section_userdata, bfd_set_section_vma),
	(bfd_set_section_alignment, bfd_set_section_flags, bfd_rename_section),
	(bfd_set_section_size): Delete bfd parameter, rename section parameter.
	(bfd_set_section_lma): New.
	* bfd-in2.h: Regenerate.
	* mach-o.c (bfd_mach_o_init_section_from_mach_o): Delete bfd param,
	update callers.
	* aoutx.h, * bfd.c, * coff-alpha.c, * coff-arm.c, * coff-mips.c,
	* coff64-rs6000.c, * coffcode.h, * coffgen.c, * cofflink.c,
	* compress.c, * ecoff.c, * elf-eh-frame.c, * elf-hppa.h,
	* elf-ifunc.c, * elf-m10200.c, * elf-m10300.c, * elf-properties.c,
	* elf-s390-common.c, * elf-vxworks.c, * elf.c, * elf32-arc.c,
	* elf32-arm.c, * elf32-avr.c, * elf32-bfin.c, * elf32-cr16.c,
	* elf32-cr16c.c, * elf32-cris.c, * elf32-crx.c, * elf32-csky.c,
	* elf32-d10v.c, * elf32-epiphany.c, * elf32-fr30.c, * elf32-frv.c,
	* elf32-ft32.c, * elf32-h8300.c, * elf32-hppa.c, * elf32-i386.c,
	* elf32-ip2k.c, * elf32-iq2000.c, * elf32-lm32.c, * elf32-m32c.c,
	* elf32-m32r.c, * elf32-m68hc1x.c, * elf32-m68k.c, * elf32-mcore.c,
	* elf32-mep.c, * elf32-metag.c, * elf32-microblaze.c,
	* elf32-moxie.c, * elf32-msp430.c, * elf32-mt.c, * elf32-nds32.c,
	* elf32-nios2.c, * elf32-or1k.c, * elf32-ppc.c, * elf32-pru.c,
	* elf32-rl78.c, * elf32-rx.c, * elf32-s390.c, * elf32-score.c,
	* elf32-score7.c, * elf32-sh.c, * elf32-spu.c, * elf32-tic6x.c,
	* elf32-tilepro.c, * elf32-v850.c, * elf32-vax.c, * elf32-visium.c,
	* elf32-xstormy16.c, * elf32-xtensa.c, * elf64-alpha.c,
	* elf64-bpf.c, * elf64-hppa.c, * elf64-ia64-vms.c, * elf64-mmix.c,
	* elf64-ppc.c, * elf64-s390.c, * elf64-sparc.c, * elf64-x86-64.c,
	* elflink.c, * elfnn-aarch64.c, * elfnn-ia64.c, * elfnn-riscv.c,
	* elfxx-aarch64.c, * elfxx-mips.c, * elfxx-sparc.c,
	* elfxx-tilegx.c, * elfxx-x86.c, * i386msdos.c, * linker.c,
	* mach-o.c, * mmo.c, * opncls.c, * pdp11.c, * pei-x86_64.c,
	* peicode.h, * reloc.c, * section.c, * syms.c, * vms-alpha.c,
	* xcofflink.c: Update throughout for bfd section macro and function
	changes.
binutils/
	* addr2line.c, * bucomm.c, * coffgrok.c, * dlltool.c, * nm.c,
	* objcopy.c, * objdump.c, * od-elf32_avr.c, * od-macho.c,
	* od-xcoff.c, * prdbg.c, * rdcoff.c, * rddbg.c, * rescoff.c,
	* resres.c, * size.c, * srconv.c, * strings.c, * windmc.c: Update
	throughout for bfd section macro and function changes.
gas/
	* as.c, * as.h, * dw2gencfi.c, * dwarf2dbg.c, * ecoff.c,
	* read.c, * stabs.c, * subsegs.c, * subsegs.h, * write.c,
	* config/obj-coff-seh.c, * config/obj-coff.c, * config/obj-ecoff.c,
	* config/obj-elf.c, * config/obj-macho.c, * config/obj-som.c,
	* config/tc-aarch64.c, * config/tc-alpha.c, * config/tc-arc.c,
	* config/tc-arm.c, * config/tc-avr.c, * config/tc-bfin.c,
	* config/tc-bpf.c, * config/tc-d10v.c, * config/tc-d30v.c,
	* config/tc-epiphany.c, * config/tc-fr30.c, * config/tc-frv.c,
	* config/tc-h8300.c, * config/tc-hppa.c, * config/tc-i386.c,
	* config/tc-ia64.c, * config/tc-ip2k.c, * config/tc-iq2000.c,
	* config/tc-lm32.c, * config/tc-m32c.c, * config/tc-m32r.c,
	* config/tc-m68hc11.c, * config/tc-mep.c, * config/tc-microblaze.c,
	* config/tc-mips.c, * config/tc-mmix.c, * config/tc-mn10200.c,
	* config/tc-mn10300.c, * config/tc-msp430.c, * config/tc-mt.c,
	* config/tc-nds32.c, * config/tc-or1k.c, * config/tc-ppc.c,
	* config/tc-pru.c, * config/tc-rl78.c, * config/tc-rx.c,
	* config/tc-s12z.c, * config/tc-s390.c, * config/tc-score.c,
	* config/tc-score7.c, * config/tc-sh.c, * config/tc-sparc.c,
	* config/tc-spu.c, * config/tc-tic4x.c, * config/tc-tic54x.c,
	* config/tc-tic6x.c, * config/tc-tilegx.c, * config/tc-tilepro.c,
	* config/tc-v850.c, * config/tc-visium.c, * config/tc-wasm32.c,
	* config/tc-xc16x.c, * config/tc-xgate.c, * config/tc-xstormy16.c,
	* config/tc-xtensa.c, * config/tc-z8k.c: Update throughout for
	bfd section macro and function changes.
	* write.c (compress_debug): Use bfd_rename_section.
gdb/
	* aarch64-linux-tdep.c, * arm-tdep.c, * auto-load.c,
	* coff-pe-read.c, * coffread.c, * corelow.c, * dbxread.c,
	* dicos-tdep.c, * dwarf2-frame.c, * dwarf2read.c, * elfread.c,
	* exec.c, * fbsd-tdep.c, * gcore.c, * gdb_bfd.c, * gdb_bfd.h,
	* hppa-tdep.c, * i386-cygwin-tdep.c, * i386-fbsd-tdep.c,
	* i386-linux-tdep.c, * jit.c, * linux-tdep.c, * machoread.c,
	* maint.c, * mdebugread.c, * minidebug.c, * mips-linux-tdep.c,
	* mips-sde-tdep.c, * mips-tdep.c, * mipsread.c, * nto-tdep.c,
	* objfiles.c, * objfiles.h, * osabi.c, * ppc-linux-tdep.c,
	* ppc64-tdep.c, * record-btrace.c, * record-full.c, * remote.c,
	* rs6000-aix-tdep.c, * rs6000-tdep.c, * s390-linux-tdep.c,
	* s390-tdep.c, * solib-aix.c, * solib-dsbt.c, * solib-frv.c,
	* solib-spu.c, * solib-svr4.c, * solib-target.c,
	* spu-linux-nat.c, * spu-tdep.c, * symfile-mem.c, * symfile.c,
	* symmisc.c, * symtab.c, * target.c, * windows-nat.c,
	* xcoffread.c, * cli/cli-dump.c, * compile/compile-object-load.c,
	* mi/mi-interp.c: Update throughout for bfd section macro and
	function changes.
	* gcore (gcore_create_callback): Use bfd_set_section_lma.
	* spu-tdep.c (spu_overlay_new_objfile): Likewise.
gprof/
	* corefile.c, * symtab.c: Update throughout for bfd section
	macro and function changes.
ld/
	* ldcref.c, * ldctor.c, * ldelf.c, * ldlang.c, * pe-dll.c,
	* emultempl/aarch64elf.em, * emultempl/aix.em,
	* emultempl/armcoff.em, * emultempl/armelf.em,
	* emultempl/cr16elf.em, * emultempl/cskyelf.em,
	* emultempl/m68hc1xelf.em, * emultempl/m68kelf.em,
	* emultempl/mipself.em, * emultempl/mmix-elfnmmo.em,
	* emultempl/mmo.em, * emultempl/msp430.em,
	* emultempl/nios2elf.em, * emultempl/pe.em, * emultempl/pep.em,
	* emultempl/ppc64elf.em, * emultempl/xtensaelf.em: Update
	throughout for bfd section macro and function changes.
libctf/
	* ctf-open-bfd.c: Update throughout for bfd section macro changes.
opcodes/
	* arc-ext.c: Update throughout for bfd section macro changes.
sim/
	* common/sim-load.c, * common/sim-utils.c, * cris/sim-if.c,
	* erc32/func.c, * lm32/sim-if.c, * m32c/load.c, * m32c/trace.c,
	* m68hc11/interp.c, * ppc/hw_htab.c, * ppc/hw_init.c,
	* rl78/load.c, * rl78/trace.c, * rx/gdb-if.c, * rx/load.c,
	* rx/trace.c: Update throughout for bfd section macro changes.
2019-09-19 09:40:13 +09:30
Alan Modra
b16c44debc bfd_get_filename
This macro says:
/* Cast from const char * to char * so that caller can assign to
   a char * without a warning.  */

I reckon that isn't such a good idea since it can result in char*
variables where const char* is appropriate.  Not very many places
need the char* cast.

bfd/
	* aout-target.h (object_p): Formatting.
	* bfd-in.h (bfd_get_filename): Don't cast to char*.
	* corefile.c (generic_core_file_matches_executable_p): Constify
	variables and remove cast.
	* bfd-in2.h: Regenerate.
binutils/
	* nm.c (print_object_filename_bsd, print_object_filename_sysv),
	(print_object_filename_posix, print_archive_filename_bsd),
	(print_archive_filename_sysv, print_archive_filename_posix),
	(print_archive_member_bsd, print_archive_member_sysv),
	(print_archive_member_posix): Constify parameter.
	(struct output_fns <print_object_filename, print_archive_filename>),
	(<print_archive_member>): Likewise.
	* objcopy.c (copy_archive): Add cast for make_tempdir.
ld/
	* emultempl/elf32.em (gld${EMULATION_NAME}_search_needed): Constify
	variable.
	* emultempl/pe.em (gld_${EMULATION_NAME}_after_open): Likewise.
	* emultempl/pep.em (gld_${EMULATION_NAME}_after_open): Likewise.
gdb/
	* coffread.c (coff_symfile_read): Constify filename variable.
	* dbxread.c (dbx_symfile_init, coffstab_build_psymtabs),
	(elfstab_build_psymtabs, stabsect_build_psymtabs): Likewise.
	* gdb_bfd.c (gdb_bfd_close_or_warn): Likewise.
	* solib.c (reload_shared_libraries_1): Likewise.
	* symfile.c (reread_symbols): Likewise.
	* solib-aix.c (solib_aix_bfd_open): Add cast for xfree of filename.
	* solib-darwin.c (darwin_bfd_open): Likewise.
	* symfile-mem.c (symbol_file_add_from_memory): Likewise.
sim/cris/
	* sim-if.c (sim_open): Constify filename variable.
2019-09-06 12:22:59 +09:30
Stafford Horne
57a63d27dc sim/testsuite/or1k: Add tests for unordered compares
Add tests for 32-bit and 64-bit unordered compare instructions.

sim/testsuite/sim/or1k/ChangeLog:

yyyy-mm-dd  Stafford Horne  <shorne@gmail.com>

	* fpu-unordered.S: New file.
	* fpu64a32-unordered.S: New file.
2019-06-13 21:27:10 +09:00
Stafford Horne
3c83b496d4 sim/testsuite/or1k: Add test case for l.adrp instruction
This is a simple test to ensure that the l.adrp instruction can be assembled and
simulated correctly.

sim/testsuite/sim/or1k/ChangeLog:

yyyy-mm-dd  Stafford Horne  <shorne@gmail.com>

	* adrp.S: New file.
2019-06-13 21:27:10 +09:00
Stafford Horne
b4f9e00346 sim/testsuite/or1k: Add test for 64-bit fpu operations
This is a very basic test but it ensure the machine is wired up
correctly and that the assembler works.

sim/testsuite/sim/or1k/ChangeLog:

yyyy-mm-dd  Stafford Horne  <shorne@gmail.com>

	* fpu64a32.S: New file.
2019-06-13 21:27:10 +09:00
Stafford Horne
f1cc84f594 sim/common: wire up new unordered comparisons
Define and wire up unordered floating point comparison operations for cgen
targets.  This patch depends on my posted cgen patches[0].

[0] https://www.sourceware.org/ml/cgen/2019-q2/msg00013.html

sim/common/ChangeLog:

yyyy-mm-dd  Stafford Horne  <shorne@gmail.com>

	* cgen-accfp.c (unorderedsf, unordereddf): New functions.
	(cgen_init_accurate_fpu): Wire up unorderedsf and unordereddf.
	* cgen-fpu.h (cgen_fp_ops): Define fields unorderedsf and unordereddf.
2019-06-13 21:27:10 +09:00
Stafford Horne
688cea90bc sim/common: Wire in df/di conversion
Up until now these have not been used in any CGEN targets, add them as
they are now used by OpenRISC.

sim/common/ChangeLog:

	* cgen-accfp.c (floatdidf, fixdfdi): New functions.
	(cgen_init_accurate_fpu): Add floatdidf and fixdfdi.
2019-06-13 21:27:10 +09:00
Stafford Horne
7ccbb4437a sim/or1k: Regenerate sim
This picks up changes for:

 - new orfpx64a32 spec
 - new unordered instructions
 - documentation and symbol updates

sim/ChangeLog:

	* or1k/cpu.c: Regenerate.
	* or1k/cpu.h: Regenerate.
	* or1k/decode.c: Regenerate.
	* or1k/decode.h: Regenerate.
	* or1k/model.c: Regenerate.
	* or1k/sem-switch.c: Regenerate.
	* or1k/sem.c: Regenerate.
2019-06-13 21:27:09 +09:00
Andrew Burgess
798066abd8 sim: Use host not target byte order for merging and splitting values
When using writes to memory through a struct to merge and extract
multi-word value, it is the endianness of the host, not the target
that affects which order the component words need to be written into
the structure.

Of the 5 functions adjusted here 4 of them are unused.  The 5th,
JOINSIDF will soon be used by the or1k target.

For or1k, simulated on x86-64, this change fixes this function so that
the correct bytes are now returned.

sim/common/ChangeLog:

	* cgen-ops.h (SUBWORDXFSI): Compare HOST_BYTE_ORDER not
	CURRENT_TARGET_BYTE_ORDER.
	(SUBWORDTFSI): Likewise.
	(JOINSIDF): Likewise.
	(JOINSIXF): Likewise.
	(JOINSITF): Likewise.
2019-04-13 22:21:14 +01:00
Andrew Burgess
d3fe0d7bb8 sim: fix all sim builds
This commit:

  commit ef9866970c
  Date:   Thu Mar 28 06:40:30 2019 +0900

      sim/common: convert sim-arange to use sim-inline

broke many simulator targets.  I fixed aarch64 in a previous commit
without realising how many other target were also broken.

This commit adds the missing includes (sim-assert.h and libiberty.h),
which seem to be needed by many simulator targets, in a central
location, this should fix most builds.

sim/common/ChangeLog:

	* sim-base.h: Add 'sim-assert.h' include.
	* sim-basics.h: Add 'libiberty.h' include.
2019-03-28 22:33:29 +00:00
Andrew Burgess
cd5b607419 sim: fix aarch64 sim build
This commit:

  commit ef9866970c
  Date:   Thu Mar 28 06:40:30 2019 +0900

      sim/common: convert sim-arange to use sim-inline

Broke the simulator build for aarch64 - some required macros are no
longer included where needed, fixed in this commit.

sim/aarch64/ChangeLog:

	* cpustate.c: Add 'libiberty.h' include.
	* interp.c: Add 'sim-assert.h' include.
2019-03-28 13:46:09 +00:00
Stafford Horne
b6061d4d38 sim/common: Fix warnings: "warning: implicit declaration of function..."
During building of several cgen simulator's I notices the below
warnings.  Adding includes fixes these.

Including config.h allows stdio.h to properly configure itself to expose
asprintf().

The other warnings for abort, free, memset, strlen are trivial.

Warnings:

../../../binutils-gdb/sim/or1k/../common/sim-watch.c: In function ‘sim_watchpoint_install’:
../../../binutils-gdb/sim/or1k/../common/sim-watch.c:415:10: warning: implicit declaration of function ‘asprintf’; did you mean ‘vasprintf’? [-Wimplicit-function-declaration]
      if (asprintf (&name, "watch-%s-%s",
          ^~~~~~~~
          vasprintf

../../../binutils-gdb/sim/lm32/../common/hw-device.c: In function ‘hw_strdup’:
../../../binutils-gdb/sim/lm32/../common/hw-device.c:59:34: warning: implicit declaration of function ‘strlen’ [-Wimplicit-function-declaration]
       char *dup = hw_zalloc (me, strlen (str) + 1);
                                  ^~~~~~

../../../binutils-gdb/sim/lm32/../common/hw-events.c: In function ‘hw_event_queue_schedule’:
../../../binutils-gdb/sim/lm32/../common/hw-events.c:92:3: warning: implicit declaration of function ‘memset’ [-Wimplicit-function-declaration]
   memset (&dummy, 0, sizeof dummy);
   ^~~~~~

../../../binutils-gdb/sim/lm32/../common/hw-handles.c: In function ‘hw_handle_remove_ihandle’:
../../../binutils-gdb/sim/lm32/../common/hw-handles.c:211:4: warning: implicit declaration of function ‘free’ [-Wimplicit-function-declaration]
    free (delete);
    ^~~~

../../../binutils-gdb/sim/lm32/../common/sim-fpu.c: In function ‘pack_fpu’:
../../../binutils-gdb/sim/lm32/../common/sim-fpu.c:292:7: warning: implicit declaration of function ‘abort’ [-Wimplicit-function-declaration]
       abort ();
       ^~~~~

sim/common/ChangeLog:

	* sim-options.c: Include "config.h".
	Include <stdio.h>.
	* sim-watch.c: Include "config.h".
	Include <stdio.h>.
	* hw-device.c: Include <string.h>.
	* hw-events.c: Include <string.h>.
	* hw-handles.c: Include <stdlib.h>.
	* sim-fpu.c: Include <stdlib.h>.
2019-03-28 06:40:30 +09:00
Stafford Horne
ef9866970c sim/common: convert sim-arange to use sim-inline
This fixes a TODO item and also fixes an error which we get when
building with no optimizations (-O0) in at least gcc 8.2.1.

Tested with sims that use cgen code lm32, or1k, cris, m32r and inlining
is working corretly.

Reference Error:

gcc -DHAVE_CONFIG_H -DWITH_DEFAULT_MODEL='"or1200"' -DWITH_ALIGNMENT=STRICT_ALIGNMENT \
 -DWITH_TARGET_WORD_BITSIZE=32 -DWITH_TARGET_WORD_MSB=31 -DWITH_TARGET_ADDRESS_BITSIZE=32 \
 -DWITH_TARGET_BYTE_ORDER=BFD_ENDIAN_BIG   -DDEFAULT_INLINE=0  -DWITH_SCACHE=16384 \
 -I. -I../../../binutils-gdb/sim/or1k -I../common -I../../../binutils-gdb/sim/or1k/../common \
 -I../../include -I../../../binutils-gdb/sim/or1k/../../include -I../../bfd \
 -I../../../binutils-gdb/sim/or1k/../../bfd -I../../opcodes -I../../../binutils-gdb/sim/or1k/../../opcodes \
 -g -o run nrun.o libsim.a ../../bfd/libbfd.a ../../opcodes/libopcodes.a  ../../libiberty/libiberty.a \
 -ldl  -lz -lm

/usr/bin/ld: libsim.a(mloop.o): in function `extract':
/home/shorne/work/openrisc/gdb-musl/sim/or1k/mloop.c:82: undefined reference to `sim_addr_range_hit_p'
/usr/bin/ld: /home/shorne/work/openrisc/gdb-musl/sim/or1k/mloop.c:83: undefined reference to `sim_addr_range_hit_p'
collect2: error: ld returned 1 exit status
make[3]: *** [Makefile:305: run] Error 1

sim/common/ChangeLog:

	* Make-common.in (sim-arange_h): Remove sim-arange.c
	* sim-arange.c: Remove SIM_ARANGE_C.
	Add ifdef for _SIM_ARANGE_C_.
	Include "sim-arange.h".
	Remove include for unused "sim-assert.h".
	Remove DEFINE_INLINE_P.  Remove DEFINE_NON_INLINE_P.
	(sim_addr_range_add): Declare as INLINE_SIM_ARANGE.
	(sim_addr_range_delete): Declare as INLINE_SIM_ARANGE.
	(sim_addr_range_hit_p): Change from SIM_ARANGE_INLINE to
	INLINE_SIM_ARANGE.
	* sim-arange.h (sim_addr_range_add): Declare as
	INLINE_SIM_ARANGE.
	(sim_addr_range_delete): Declare as INLINE_SIM_ARANGE.
	(sim_addr_range_hit_p) Declare as INLINE_SIM_ARANGE.
	Remove definition of SIM_ARANGE_INLINE.
	Remove [HAVE_INLINE].
	Wrap include "sim-arange.c" in H_REVEALS_MODULE_P.
	* sim-base.h: Include "sim-arange.h"
	* sim-basics.h: Remove include of "sim-arange.h"
	* sim-inline.c: Include "sim-arange.c"
	* sim-inline.h: Define INLINE_SIM_ARANGE.
	Define SIM_ARANGE_INLINE.  Define EXTERN_SIM_ARANGE_P.
	Define STATIC_INLINE_SIM_ARANGE.  Define STATIC_SIM_ARANGE.
2019-03-28 06:40:30 +09:00
Joel Brobecker
9c4c331816 (gdb/sim) Move Mike Frysinger to past maintainers section
sim/ChangeLog:

	* MAINTAINERS: Move Mike Frysinger to past maintainers' section.
2019-02-28 11:20:29 +04:00
Simon Marchi
007024cc6a Add Andrew Burgess as global maintainer of gdb/ and sim/ 2019-02-13 16:56:21 -05:00
Tom Tromey
67f8b42f3e Fix the sim build
Simon pointed out that the "common/" include change in gdb broke the
sim build.  The problem was that the sim was using gdb's
create-version.sh, which changed.

This patch copies create-version.sh to the sim, so that it can
generate "version.c" in a way that works in the sim build.

Tested by rebuilding.

sim/common/ChangeLog
2019-01-26  Tom Tromey  <tom@tromey.com>

	* Make-common.in (version.c): Use sim's create-version.sh.
	* create-version.sh: New file.

sim/ppc/ChangeLog
2019-01-26  Tom Tromey  <tom@tromey.com>

	* Makefile.in (version.c): Use sim's create-version.sh.
2019-01-26 08:53:31 -07:00
Simon Marchi
b84bb29de9 Actually remove definitions of DEFINE_NON_INLINE_P and DEFINE_INLINE_P
I applied the patch "Do not expand macros to 'defined'" by hand because
I couldn't apply it with git-am, and of course forgot to remove the
macro definitions.  This patch fixes it, and also makes the ChangeLog
entry a bit cleaner.
2019-01-16 17:05:28 -05:00
Pavel I. Kryukov
7516c26f86 Do not expand macros to 'defined'
Expanding a macro which contains 'defined' PP keyword is UB.  It causes
a compilation failure when -Wexpansion-to-defined is used.

sim/common/Changelog:
2019-01-16  Pavel I. Kryukov  <kryukov@frtk.ru>

	* sim-arange.c: eliminate DEFINE_NON_INLINE_P
2019-01-16 16:10:35 -05:00
Simon Marchi
dc7e818497 sim: Fix definition of SIM_ARANGE_INLINE
If HAVE_INLINE is false, SIM_ARANGE_INLINE is currently defined as

    #define SIM_ARANGE_INLINE EXTERN

However, EXTERN is not defined anywhere, leading to errors such as:

    In file included from
    /mipt-mips/simulator/../../sim/common/sim-basics.h:147:0,
                     from /mipt-mips/simulator/export/gdb/sim-main.h:13,
                     from /mipt-mips/simulator/export/gdb/gdb_interface.cpp:7:
    /mipt-mips/simulator/../../sim/common/sim-arange.h:71:27: error: ‘EXTERN’
    does not name a type; did you mean ‘EUSERS’?
     #define SIM_ARANGE_INLINE EXTERN
                               ^
    /mipt-mips/simulator/../../sim/common/sim-arange.h:76:1: note: in expansion
    of macro ‘SIM_ARANGE_INLINE’
     SIM_ARANGE_INLINE int
     ^~~~~~~~~~~~~~~~~

I (Simon) have reproduced the problem by simply removing the HAVE_INLINE
definition.  This was originally reported by Pavel I. Kryukov
<kryukov@frtk.ru>.

sim/common/ChangeLog:

	* sim-arange.h (SIM_ARANGE_INLINE): Change EXTERN to extern.
2019-01-15 17:46:40 -05:00
Павел Крюков
444b3faef5 Add 'extern C' if simulator is written in C++
sim/common/Changelog:
2018-12-31  Pavel I. Kryukov  <kryukov@frtk.ru>

        * sim-base.h: Add 'extern C' if header is compiled with C++
2019-01-03 09:41:13 -05:00
Joel Brobecker
42a4f53d2b Update copyright year range in all GDB files.
This commit applies all changes made after running the gdb/copyright.py
script.

Note that one file was flagged by the script, due to an invalid
copyright header
(gdb/unittests/basic_string_view/element_access/char/empty.cc).
As the file was copied from GCC's libstdc++-v3 testsuite, this commit
leaves this file untouched for the time being; a patch to fix the header
was sent to gcc-patches first.

gdb/ChangeLog:

	Update copyright year range in all GDB files.
2019-01-01 10:01:51 +04:00
Andrew Burgess
c5ebe0ff70 sim: Don't overwrite stored errno in sim_syscall_multi
The host syscall callback mechanism should take care of updating the
errcode within the CB_SYSCALL struct, and we should not be adjusting
the error code once the syscall has completed.  We especially, should
not be rewriting the syscall errcode based on the value of errno some
time after running the host syscall, as there is no guarantee that
errno has not be overwritten.

To perform a syscall we call cb_syscall (in syscall.c).  To return
from cb_syscall control passes through one of two exit paths these are
labeled FinishSyscall and ErrorFinish and are reached using goto
statements scattered throughout the cb_syscall function.

In FinishSyscall we store the syscall result in 'sc->result', and the
error code is transated to target encoding, and stored in
'sc->errcode'.

In ErrorFinish, we again store the syscall result in 'sc->result', and
fill in 'sc->errcode' by fetching the actual errno from the host with
the 'cb->get_errno' callback.

In both cases 'sc->errcode' will have been filled in with an
appropriate value.

Further, if we look at a specific syscall example, CB_SYS_open, in
this case the first thing we do is fetch the path to open from the
target with 'get_path', if this fails then the errcode is returned,
and we jump to FinishSyscall.  Notice that in this case, no host
syscall may have been performed, for example a failure to read the
path to open out of simulated memory can return EINVAL without
performing any host syscall.  Given that no host syscall has been
performed, reading the host errno makes absolutely no sense.

This commit removes from sim_syscall_multi the rewriting of
sc->errcode based on the value of errno, and instead relies on the
value stored in the cb_syscall.

sim/common/ChangeLog:

	* sim-syscall.c (sim_syscall_multi): Don't update sc->errcode at
	this point, it should have already been set in cb_syscall.
2018-12-18 00:02:01 +00:00
Andrew Burgess
23ebf37881 sim/cris: Fix references to cgen cpu directory
Don't assume that cgen is located within the binutils-gdb tree.  We
already have CGEN_CPU_DIR and CPU_DIR defined, these are the cpu/
directory within cgen, and the cpu/ directory within binutils-cpu.

The cris target tries to find CPU_DIR relative to the cgen source
tree, which can be wrong when building with an out of tree cgen.

sim/cris/ChangeLog:

	* Makefile.in: Replace uses of CGEN_CPU_DIR with CPU_DIR, and
	remove the definition of CGEN_CPU_DIR.
2018-12-06 12:21:11 +00:00
Andrew Burgess
7fb45a6895 sim/opcodes: Allow use of out of tree cgen source directory
When configuring with '--enbale-cgen-maint' the default for both the
opcodes/ and sim/ directories is to assume that the cgen source is
within the binutils-gdb source tree as binutils-gdb/cgen/.

In the old cvs days, this worked well, as cgen was just another
sub-module of the single cvs repository and could easily be checked
out within the binutils-gdb directory, and managed by cvs in the
normal way.

Now that binutils-gdb is in git, while cgen is still in cvs, placing
the cgen respository within the binutils-gdb tree is more troublesome,
and it would be nice if the two tools could be kept separate.

Luckily there is already some initial code in the configure.ac files
for both opcodes/ and sim/ to support having cgen be located outside
of the binutils-gdb tree, however, this was speculative code written
imagining a future where cgen would be built and installed to some
location.

Right now there is no install support for cgen, and so the configure
code in opcodes/ and sim/ doesn't really do anything useful.  In this
commit I repurpose this code to allow binutils-gdb to be configured so
that it can make use of a cgen source directory that is outside of the
binutils-gdb tree.

With this commit applied it is now possible to configure and build
binutils-gdb like this:

    /path/to/binutils-gdb/src/configure --enable-cgen-maint=/path/to/cgen/src/cgen/
    make all-opcodes
    make -C opcodes run-cgen-all

Just in case anyone is still using cgen inside the binutils-gdb tree,
I have left the default behaviour of '--enable-cgen-maint' (with no
parameter) unchanged, that is it looks for the cgen directory as
'binutils-gdb/cgen/'.

opcodes/ChangeLog:

	* configure.ac (enable-cgen-maint): Support passing path to cgen
	source tree.
	* configure: Regenerate.

sim/ChangeLog:

	* common/acinclude.m4 (enable-cgen-maint): Support passing path to
	cgen source tree.
	* cris/configure: Regenerate.
	* frv/configure: Regenerate.
	* iq2000/configure: Regenerate.
	* lm32/configure: Regenerate.
	* m32r/configure: Regenerate.
	* or1k/configure: Regenerate.
	* sh64/configure: Regenerate.
2018-12-06 12:21:10 +00:00
Joel Sherrill
c1230d1bab [src/erc32] Use ncurses instead of termcap on Cygwin too
This removes a Cygwin-specific libtermcap hack that was dependent on
the presence of one of the multiple alternative libraries.  The one it
was hard-coded to pick isn't included with Cygwin anymore.

According to Corinna, libtermcap was removed from Cygwin a long time
ago, and libncurses is used in Cygwin for a long time too.

The fix is to make Cygwin use the same autoconf code to figure out the
correct lib as any other target.

sim/erc32/Changelog:
2018-10-30  Joel Sherrill <joel@rtems.org>

	* configure.ac: Remove the Cygwin-specific libtermcap.a hack
	and use the standard logic to determine which library to use.
	* configure: Regenerate.
2018-10-30 16:41:12 +00:00
Richard Henderson
07f5f4c683 or1k: Add the l.muld, l.muldu, l.macu, l.msbu insns
Also fix the incorrect definitions of multiply and divide carry and
overflow float.

Changes to the instructions are made in the .cpu file, then we
regenerate the binutils and sim files.

The changes also required a few fixups for tests and additional sim helpers.

cpu/ChangeLog:

yyyy-mm-dd  Richard Henderson  <rth@twiddle.net>
	    Stafford Horne  <shorne@gmail.com>

	* or1korbis.cpu (insn-opcode-mac): Add opcodes for MACU and MSBU.
	(insn-opcode-alu-regreg): Add opcodes for MULD and MULDU.
	(l-mul): Fix overflow support and indentation.
	(l-mulu): Fix overflow support and indentation.
	(l-muld, l-muldu, l-msbu, l-macu): New instructions.
	(l-div); Remove incorrect carry behavior.
	(l-divu): Fix carry and overflow behavior.
	(l-mac): Add overflow support.
	(l-msb, l-msbu): Add carry and overflow support.

opcodes/ChangeLog:

yyyy-mm-dd  Richard Henderson  <rth@twiddle.net>
	    Stafford Horne  <shorne@gmail.com>

	* or1k-desc.c: Regenerate.
	* or1k-desc.h: Regenerate.
	* or1k-opc.c: Regenerate.
	* or1k-opc.h: Regenerate.
	* or1k-opinst.c: Regenerate.

sim/common/ChangeLog:

yyyy-mm-dd  Stafford Horne  <shorne@gmail.com>

	* cgen-ops.h (ADDCFDI): New function, add carry flag DI variant.
	(ADDOFDI): New function, add overflow flag DI variant.
	(SUBCFDI): New function, subtract carry flag DI variant.
	(SUBOFDI): New function, subtract overflow flag DI variant.

sim/ChangeLog:

yyyy-mm-dd  Stafford Horne  <shorne@gmail.com>

	* or1k/cpu.h: Regenerate.
	* or1k/decode.c: Regenerate.
	* or1k/decode.h: Regenerate.
	* or1k/model.c: Regenerate.
	* or1k/sem-switch.c: Regenerate.
	* or1k/sem.c: Regenerate:

sim/testsuite/sim/or1k/ChangeLog:

yyyy-mm-dd  Stafford Horne  <shorne@gmail.com>

	* div.S: Fix tests to match correct overflow/carry semantics.
	* mul.S: Likewise.

gas/ChangeLog:

yyyy-mm-dd  Stafford Horne  <shorne@gmail.com>

	* testsuite/gas/or1k/allinsn.s: Add instruction tests for
	l.muld, l.muldu, l.macu, l.msb, l.msbu.
	* testsuite/gas/or1k/allinsn.d: Add test results for new
	instructions.
2018-10-05 11:41:42 +09:00
Компан, Вячеслав Олегович
2283a21049 Change "xor" name in cpu_core to allow building with iso646.h or C++ compiler
This code was introduced back in 1998, and C99 appeared next year,
defining the `xor` as an 'alternative keyword' if iso646.h is
included. Moreover, C++98 defines it on the language level. As a
result, the code is not buildable with C++ compiler or if iso646.h is
included beforehand.
According to comment, `sim_cpu_core` is mostly a clone of `sim_core`,
so I renamed it to `byte_xor` as it's called in `sim_core`.

sim/common/ChangeLog:

	* sim-core.h (sim_cpu_core): Rename cpu_core.xor to
	cpu_core.byte_xor.
	* sim-core.c (sim_core_set_xor): Likewise.
	(sim_core_xor_read_buffer): Likewise.
	(sim_core_xor_write_buffer): Likewise.
2018-09-28 16:00:46 -04:00
Maciej W. Rozycki
e2e31f1039 Update my e-mail address, limit maintenance to MIPS I-IV ISAs
binutils/
	* MAINTAINERS: Update my e-mail address, downgrade to MIPS I-IV
	ISA maintenance.

	gdb/
	* MAINTAINERS: Update my e-mail address, downgrade to MIPS I-IV
	ISA maintenance.

	sim/
	* MAINTAINERS: Update my e-mail address, downgrade to MIPS I-IV
	ISA maintenance.
2018-07-21 00:14:01 +01:00
DJ Delorie
79f5b65e3e Remove myself from target-specific MAINTAINERS
[binutils]
	* MAINTAINERS (RL78, RX): Remove myself as maintainer.
[sim]
	* MAINTAINERS (rl78, m32c, rx, v850): Remove myself as maintainer.
2018-07-19 22:08:51 -04:00
Stafford Horne
3137562654 sim: Add Stafford Horne as or1k maintainer.
Since I helped upstream the or1k port I would like to claim myself as
maintainer.

sim/ChangeLog:

yyyy-mm-dd  Stafford Horne  <shorne@gmail.com>

	* MAINTAINERS (or1k): Add myself as or1k maintainer.

Signed-off-by: Stafford Horne <shorne@gmail.com>
2018-07-14 05:59:26 +09:00
Simon Marchi
d0ac1c4488 Bump to autoconf 2.69 and automake 1.15.1
When trying to run the update-gnulib.sh script in gdb, I get this:

Error: Wrong automake version (Unescaped left brace in regex is deprecated, passed through in regex; marked by <-- HERE in m/\${ <-- HERE ([^      =:+{}]+)}/ at /opt/automake/1.11.1/bin/automake line 4113.), we need 1.11.1.
Aborting.

Apparently, it's an issue with a regex in automake that triggers a
warning starting with Perl 5.22.  It has been fixed in automake 1.15.1.
So I think it's a good excuse to bump the versions of autoconf and
automake used in the gnulib import.  And to avoid requiring multiple
builds of autoconf/automake, it was suggested that we bump the required
version of those tools for all binutils-gdb.

For autoconf, the 2.69 version is universally available, so it's an easy
choice.  For automake, different distros and distro versions have
different automake versions.  But 1.15.1 seems to be the most readily
available as a package.  In any case, it's easy to build it from source.

I removed the version checks from AUTOMAKE_OPTIONS and AC_PREREQ,
because I don't think they are useful in our case.  They only specify a
lower bound for the acceptable version of automake/autoconf.  That's
useful if you let the user choose the version of the tool they want to
use, but want to set a minimum version (because you use a feature that
was introduced in that version).  In our case, we force people to use a
specific version anyway.  For the autoconf version, we have the check in
config/override.m4 that enforces the version we want.  It will be one
less thing to update next time we change autotools version.

I hit a few categories of problems that required some changes.  They are
described below along with the chosen solutions.

Problem 1:

  configure.ac:17: warning: AM_INIT_AUTOMAKE: two- and three-arguments forms are deprecated.  For more info, see:
  configure.ac:17: http://www.gnu.org/software/automake/manual/automake.html#Modernize-AM_005fINIT_005fAUTOMAKE-invocation

Solution 1:

  Adjust the code based on the example at that URL.

Problem 2 (in zlib/):

  Makefile.am: error: required file './INSTALL' not found
  Makefile.am:   'automake --add-missing' can install 'INSTALL'
  Makefile.am: error: required file './NEWS' not found
  Makefile.am: error: required file './AUTHORS' not found
  Makefile.am: error: required file './COPYING' not found
  Makefile.am:   'automake --add-missing' can install 'COPYING'

Solution 2:

  Add the foreign option to AUTOMAKE_OPTIONS.

Problem 3:

  doc/Makefile.am:20: error: support for Cygnus-style trees has been removed

Solution 3:

  Remove the cygnus options.

Problem 4:

  Makefile.am:656: warning: 'INCLUDES' is the old name for 'AM_CPPFLAGS' (or '*_CPPFLAGS')

Solution 4:

  Rename "INCLUDES = " to "AM_CPPFLAGS += " (because AM_CPPFLAGS is
  already defined earlier).

Problem 5:

  doc/Makefile.am:71: warning: suffix '.texinfo' for Texinfo files is discouraged; use '.texi' instead
  doc/Makefile.am: warning: Oops!
  doc/Makefile.am:     It appears this file (or files included by it) are triggering
  doc/Makefile.am:     an undocumented, soon-to-be-removed automake hack.
  doc/Makefile.am:     Future automake versions will no longer place in the builddir
  doc/Makefile.am:     (rather than in the srcdir) the generated '.info' files that
  doc/Makefile.am:     appear to be cleaned, by e.g. being listed in CLEANFILES or
  doc/Makefile.am:     DISTCLEANFILES.
  doc/Makefile.am:     If you want your '.info' files to be placed in the builddir
  doc/Makefile.am:     rather than in the srcdir, you have to use the shiny new
  doc/Makefile.am:     'info-in-builddir' automake option.

Solution 5:

  Rename .texinfo files to .texi.

Problem 6:

  doc/Makefile.am: warning: Oops!
  doc/Makefile.am:     It appears this file (or files included by it) are triggering
  doc/Makefile.am:     an undocumented, soon-to-be-removed automake hack.
  doc/Makefile.am:     Future automake versions will no longer place in the builddir
  doc/Makefile.am:     (rather than in the srcdir) the generated '.info' files that
  doc/Makefile.am:     appear to be cleaned, by e.g. being listed in CLEANFILES or
  doc/Makefile.am:     DISTCLEANFILES.
  doc/Makefile.am:     If you want your '.info' files to be placed in the builddir
  doc/Makefile.am:     rather than in the srcdir, you have to use the shiny new
  doc/Makefile.am:     'info-in-builddir' automake option.

Solution 6:

  Remove the hack at the bottom of doc/Makefile.am and use
  the info-in-builddir automake option.

Problem 7:

  doc/Makefile.am:35: error: required file '../texinfo.tex' not found
  doc/Makefile.am:35:   'automake --add-missing' can install 'texinfo.tex'

Solution 7:

  Use the no-texinfo.tex automake option.  We also have one in
  texinfo/texinfo.tex, not sure if we should point to that, or move it
  (or a newer version of it added with automake --add-missing) to
  top-level.

Problem 8:

  Makefile.am:131: warning: source file 'config/tc-aarch64.c' is in a subdirectory,
  Makefile.am:131: but option 'subdir-objects' is disabled
  automake: warning: possible forward-incompatibility.
  automake: At least a source file is in a subdirectory, but the 'subdir-objects'
  automake: automake option hasn't been enabled.  For now, the corresponding output
  automake: object file(s) will be placed in the top-level directory.  However,
  automake: this behaviour will change in future Automake versions: they will
  automake: unconditionally cause object files to be placed in the same subdirectory
  automake: of the corresponding sources.
  automake: You are advised to start using 'subdir-objects' option throughout your
  automake: project, to avoid future incompatibilities.

Solution 8:

  Use subdir-objects, that means adjusting references to some .o that will now
  be in config/.

Problem 9:

  configure.ac:375: warning: AC_LANG_CONFTEST: no AC_LANG_SOURCE call detected in body
  ../../lib/autoconf/lang.m4:193: AC_LANG_CONFTEST is expanded from...
  ../../lib/autoconf/general.m4:2601: _AC_COMPILE_IFELSE is expanded from...
  ../../lib/autoconf/general.m4:2617: AC_COMPILE_IFELSE is expanded from...
  ../../lib/m4sugar/m4sh.m4:639: AS_IF is expanded from...
  ../../lib/autoconf/general.m4:2042: AC_CACHE_VAL is expanded from...
  ../../lib/autoconf/general.m4:2063: AC_CACHE_CHECK is expanded from...
  configure.ac:375: the top level

Solution 9:

  Use AC_LANG_SOURCE, or use proper quoting.

Problem 10 (in intl/):

  configure.ac:7: warning: AC_COMPILE_IFELSE was called before AC_USE_SYSTEM_EXTENSIONS
  /usr/share/aclocal/threadlib.m4:36: gl_THREADLIB_EARLY_BODY is expanded from...
  /usr/share/aclocal/threadlib.m4:29: gl_THREADLIB_EARLY is expanded from...
  /usr/share/aclocal/threadlib.m4:318: gl_THREADLIB is expanded from...
  /usr/share/aclocal/lock.m4:9: gl_LOCK is expanded from...
  /usr/share/aclocal/intl.m4:211: gt_INTL_SUBDIR_CORE is expanded from...
  /usr/share/aclocal/intl.m4:25: AM_INTL_SUBDIR is expanded from...
  /usr/share/aclocal/gettext.m4:57: AM_GNU_GETTEXT is expanded from...
  configure.ac:7: the top level

Solution 10:

  Add AC_USE_SYSTEM_EXTENSIONS in configure.ac.

ChangeLog:

	* libtool.m4: Use AC_LANG_SOURCE.
	* configure.ac: Remove AC_PREREQ, use AC_LANG_SOURCE.
	* README-maintainer-mode: Update version requirements.
	* ar-lib: New file.
	* test-driver: New file.
	* configure: Re-generate.

bfd/ChangeLog:

	* Makefile.am (AUTOMAKE_OPTIONS): Remove 1.11.
	(INCLUDES): Rename to ...
	(AM_CPPFLAGS): ... this.
	* configure.ac: Remove AC_PREREQ.
	* doc/Makefile.am (AUTOMAKE_OPTIONS): Remove 1.9, cygnus, add
	info-in-builddir no-texinfo.tex.
	(info_TEXINFOS): Rename bfd.texinfo to bfd.texi.
	* doc/bfd.texinfo: Rename to ...
	* doc/bfd.texi: ... this.
	* Makefile.in: Re-generate.
	* aclocal.m4: Re-generate.
	* config.in: Re-generate.
	* configure: Re-generate.
	* doc/Makefile.in: Re-generate.

binutils/ChangeLog:

	* configure.ac: Remove AC_PREREQ.
	* doc/Makefile.am (AUTOMAKE_OPTIONS): Remove cygnus, add
	info-in-builddir no-texinfo.tex.
	* Makefile.in: Re-generate.
	* aclocal.m4: Re-generate.
	* config.in: Re-generate.
	* configure: Re-generate.
	* doc/Makefile.in: Re-generate.

config/ChangeLog:

	* override.m4 (_GCC_AUTOCONF_VERSION): Bump from 2.64 to 2.69.

etc/ChangeLog:

	* configure.in: Remove AC_PREREQ.
	* configure: Re-generate.

gas/ChangeLog:

	* Makefile.am (AUTOMAKE_OPTIONS): Remove 1.11, add subdir-objects.
	(TARG_CPU_O, OBJ_FORMAT_O, ATOF_TARG_O): Add config/ prefix.
	* configure.ac (TARG_CPU_O, OBJ_FORMAT_O, ATOF_TARG_O, emfiles,
	extra_objects): Add config/ prefix.
	* doc/as.texinfo: Rename to...
	* doc/as.texi: ... this.
	* doc/Makefile.am: Rename as.texinfo to as.texi throughout.
	Remove DISTCLEANFILES hack.
	(AUTOMAKE_OPTIONS): Remove 1.8, cygnus, add no-texinfo.tex and
	info-in-builddir.
	* Makefile.in: Re-generate.
	* aclocal.m4: Re-generate.
	* config.in: Re-generate.
	* configure: Re-generate.
	* doc/Makefile.in: Re-generate.

gdb/ChangeLog:

	* common/common-defs.h (PACKAGE_NAME, PACKAGE_VERSION,
	PACKAGE_STRING, PACKAGE_TARNAME): Undefine.
	* configure.ac: Remove AC_PREREQ, add missing quoting.
	* gnulib/configure.ac: Modernize usage of
	AC_INIT/AM_INIT_AUTOMAKE.  Remove AC_PREREQ.
	* gnulib/update-gnulib.sh (AUTOCONF_VERSION): Bump to 2.69.
	(AUTOMAKE_VERSION): Bump to 1.15.1.
	* configure: Re-generate.
	* config.in: Re-generate.
	* aclocal.m4: Re-generate.
	* gnulib/aclocal.m4: Re-generate.
	* gnulib/config.in: Re-generate.
	* gnulib/configure: Re-generate.
	* gnulib/import/Makefile.in: Re-generate.

gdb/gdbserver/ChangeLog:

	* configure.ac: Remove AC_PREREQ, add missing quoting.
	* configure: Re-generate.
	* config.in: Re-generate.
	* aclocal.m4: Re-generate.

gdb/testsuite/ChangeLog:

	* configure.ac: Remove AC_PREREQ.
	* configure: Re-generate.

gold/ChangeLog:

	* configure.ac: Remove AC_PREREQ, add missing quoting and usage
	of AC_LANG_SOURCE.
	* Makefile.in: Re-generate.
	* aclocal.m4: Re-generate.
	* configure: Re-generate.
	* testsuite/Makefile.in: Re-generate.

gprof/ChangeLog:

	* configure.ac: Remove AC_PREREQ.
	* Makefile.am: Remove DISTCLEANFILES hack.
	(AUTOMAKE_OPTIONS): Remove 1.11, add info-in-builddir.
	* Makefile.in: Re-generate.
	* aclocal.m4: Re-generate.
	* configure: Re-generate.
	* gconfig.in: Re-generate.

intl/ChangeLog:

	* configure.ac: Add AC_USE_SYSTEM_EXTENSIONS, remove AC_PREREQ.
	* configure: Re-generate.
	* config.h.in: Re-generate.
	* aclocal.m4: Re-generate.

ld/ChangeLog:

	* configure.ac: Remove AC_PREREQ.
	* Makefile.am: Remove DISTCLEANFILES hack, rename ld.texinfo to
	ld.texi, ldint.texinfo to ldint.texi throughout.
	(AUTOMAKE_OPTIONS): Add info-in-builddir.
	* README: Rename ld.texinfo to ld.texi, ldint.texinfo to
	ldint.texi throughout.
	* gen-doc.texi: Likewise.
	* h8-doc.texi: Likewise.
	* ld.texinfo: Rename to ...
	* ld.texi: ... this.
	* ldint.texinfo: Rename to ...
	* ldint.texi: ... this.
	* Makefile.in: Re-generate.
	* aclocal.m4: Re-generate.
	* config.in: Re-generate.
	* configure: Re-generate.

libdecnumber/ChangeLog:

	* configure.ac: Remove AC_PREREQ.
	* configure: Re-generate.
	* aclocal.m4.

libiberty/ChangeLog:

	* configure.ac: Remove AC_PREREQ.
	* configure: Re-generate.
	* config.in: Re-generate.

opcodes/ChangeLog:

	* Makefile.am (AUTOMAKE_OPTIONS): Remove 1.11.
	* configure.ac: Remove AC_PREREQ.
	* Makefile.in: Re-generate.
	* aclocal.m4: Re-generate.
	* configure: Re-generate.

readline/ChangeLog.gdb:

	* configure: Re-generate.
	* examples/rlfe/configure: Re-generate.

sim/ChangeLog:

	* All configure.ac: Remove AC_PREREQ.
	* All configure: Re-generate.

zlib/ChangeLog.bin-gdb:

	* configure.ac: Modernize AC_INIT call, remove AC_PREREQ.
	* Makefile.am (AUTOMAKE_OPTIONS): Remove 1.8, cygnus, add
	foreign.
	* Makefile.in: Re-generate.
	* aclocal.m4: Re-generate.
	* configure: Re-generate.
2018-06-19 16:55:06 -04:00
Simon Marchi
37f980dc03 config: Sync with GCC
... and re-generate all possible configure files, since they may depend
on things in config/.

config/ChangeLog:

	Sync with GCC
	2018-06-08  Martin Liska  <mliska@suse.cz>

	* bootstrap-mpx.mk: Remove.

	2018-05-10  Martin Liska  <mliska@suse.cz>

	PR bootstrap/64914
	* bootstrap-ubsan.mk: Define UBSAN_BOOTSTRAP.

	2018-05-09  Joshua Watt <jpewhacker@gmail.com>

        * ax_pthread.m4: Add file.

	2018-05-08  Richard Biener  <rguenther@suse.de>

	PR bootstrap/85571
	* bootstrap-lto-noplugin.mk: Disable compare.
	* bootstrap-lto.mk: Supply contrib/compare-lto for do-compare.

	2018-04-24  H.J. Lu  <hongjiu.lu@intel.com>

	PR bootstrap/85490
	* bootstrap-cet.mk (STAGE4_CFLAGS): New.

	2018-04-24  H.J. Lu  <hongjiu.lu@intel.com>

	PR target/85485
	* bootstrap-cet.mk (STAGE2_CFLAGS): Remove -mcet.
	(STAGE3_CFLAGS): Likewise.

	2018-04-24  H.J. Lu  <hongjiu.lu@intel.com>

	PR target/85485
	* cet.m4 (GCC_CET_FLAGS): Replace -mcet with -mshstk.

	2018-04-19  Jakub Jelinek  <jakub@redhat.com>

	* cet.m4 (GCC_CET_FLAGS): Default to --disable-cet, replace
	--enable-cet=default with --enable-cet=auto.

	2018-04-18  David Malcolm  <dmalcolm@redhat.com>

	PR jit/85384
	* acx.m4 (GCC_BASE_VER): Remove \$\$ from sed expression.
2018-06-18 09:33:48 -04:00
Alan Modra
84f9f8c330 PR22069, Several instances of register accidentally spelled as regsiter
PR 22069
binutils/
	* od-macho.c (dump_unwind_encoding_x86): Adjust for macro renaming.
cpu/ChangeLog
	* or1kcommon.cpu (spr-reg-info): Typo fix.
include/ChangeLog
	* mach-o/unwind.h (MACH_O_UNWIND_X86_64_RBP_FRAME_REGISTERS):
	Rename from MACH_O_UNWIND_X86_64_RBP_FRAME_REGSITERS.
	(MACH_O_UNWIND_X86_EBP_FRAME_REGISTERS): Rename from
	MACH_O_UNWIND_X86_EBP_FRAME_REGSITERS.
opcodes/ChangeLog
	* cr16-opc.c (cr16_instruction): Comment typo fix.
	* hppa-dis.c (print_insn_hppa): Likewise.
sim/ppc/ChangeLog
	* e500_registers.h: Comment typo fix.
	* ppc-instructions (ppc_insn_mfcr): Likewise.
2018-05-09 15:55:28 +09:30
Maciej W. Rozycki
d65ce302ab MAINTAINERS: Update my company e-mail address
Following my recent transition from Imagination Technologies to the
reincarnated MIPS company update MAINTAINERS entries accordingly.

	binutils/
	* MAINTAINERS: Update my company e-mail address.

	gdb/
	* MAINTAINERS: Update my company e-mail address.

	sim/
	* MAINTAINERS: Update my company e-mail address.
2018-01-22 15:39:18 +00:00
Nick Clifton
43724d16be Fix compile time warning (in the ARM simulator) about a print statement with insufficient arguments.
PR 22663
	* maverick.c (DSPCDP4): Add missing parameter to debug print
	statement.
2018-01-02 17:15:16 +00:00
Joel Brobecker
e2882c8578 Update copyright year range in all GDB files
gdb/ChangeLog:

        Update copyright year range in all GDB files
2018-01-02 07:38:06 +04:00
Peter Gavin
702d582e2c sim: testsuite: add testsuite for or1k sim
This is the testsuite for the or1k sim, it tests running many of the
basic architecture instructions on the openrisc sim.

sim/testsuite/sim/or1k/ChangeLog:

2017-12-12  Peter Gavin  <pgavin@gmail.com>
	    Stafford Horne <shorne@gmail.com>

	* add.S: New file.
	* alltests.exp: New file.
	* and.S: New file.
	* basic.S: New file.
	* div.S: New file.
	* ext.S: New file.
	* find.S: New file.
	* flag.S: New file.
	* fpu.S: New file.
	* jump.S: New file.
	* load.S: New file.
	* mac.S: New file.
	* mfspr.S: New file.
	* mul.S: New file.
	* or.S: New file.
	* or1k-asm-test-env.h: New file.
	* or1k-asm-test-helpers.h: New file.
	* or1k-asm-test.h: New file.
	* or1k-asm.h: New file.
	* or1k-test.ld: New file.
	* ror.S: New file.
	* shift.S: New file.
	* spr-defs.h: New file.
	* sub.S: New file.
	* xor.S: New file.

sim/testsuite/ChangeLog:

2017-12-12  Stafford Horne  <shorne@gmail.com>
	    Peter Gavin  <pgavin@gmail.com>

	* configure: Regenerated.
2017-12-12 23:49:57 +09:00
Stafford Horne
0cd7970733 sim: or1k: add autoconf generated files
These are separted out to make the patch easier to read and smaller.

sim/ChangeLog:

2017-12-12  Stafford Horne  <shorne@gmail.com>
	    Peter Gavin  <pgavin@gmail.com>

	* configure: Regenerated.
	* or1k/aclocal.m4: Generated.
	* or1k/config.in: Generated.
	* or1k/configure: Generated.
2017-12-12 23:46:53 +09:00
Stafford Horne
6e51bfa755 sim: or1k: add cgen generated files
These are the simulator files generated by cgen.  These are split out
from the main sim patch to make the patch easier to review and smaller.

sim/ChangeLog:

2017-12-12  Stafford Horne  <shorne@gmail.com>
	    Peter Gavin  <pgavin@gmail.com>

	* or1k/arch.c: Generated.
	* or1k/arch.h: Generated.
	* or1k/cpu.c: Generated.
	* or1k/cpu.h: Generated.
	* or1k/cpuall.h: Generated.
	* or1k/decode.c: Generated.
	* or1k/decode.h: Generated.
	* or1k/model.c: Generated.
	* or1k/sem-switch.c: Generated.
	* or1k/sem.c: Generated.
2017-12-12 23:45:45 +09:00
Stafford Horne
fa8b7c2128 sim: or1k: add or1k target to sim
This adds the OpenRISC 32-bit sim target.  The OpenRISC sim is a CGEN
based sim so the bulk of the code is generated from the .cpu files by
CGEN.  The engine decode and execute logic in mloop uses scache with
pseudo-basic-block extraction and supports both full and fast (switch)
modes.

The sim does not implement an mmu at the moment.  The sim does implement
fpu instructions via the common sim-fpu implementation.

sim/ChangeLog:

2017-12-12  Stafford Horne  <shorne@gmail.com>
	    Peter Gavin  <pgavin@gmail.com>

	* configure.tgt: Add or1k sim.
	* or1k/README: New file.
	* or1k/Makefile.in: New file.
	* or1k/configure.ac: New file.
	* or1k/mloop.in: New file.
	* or1k/or1k-sim.h: New file.
	* or1k/or1k.c: New file.
	* or1k/sim-if.c: New file.
	* or1k/sim-main.h: New file.
	* or1k/traps.c: New file.
2017-12-12 23:44:14 +09:00
Peter Gavin
58884b0e45 sim: cgen: add MUL2OFSI and MUL1OFSI functions (needed for OR1K l.mul[u])
sim/common/ChangeLog:

2017-12-12  Peter Gavin  <pgavin@gmail.com>
	    Stafford Horne  <shorne@gmail.com>

	* cgen-ops.h (MUL2OFSI): New function, 2's complement overflow
	flag.
	(MUL1OFSI): New function, 1's complement overflow flag.
2017-12-12 23:43:02 +09:00
Peter Gavin
07b95864f3 sim: cgen: add remainder functions (needed for OR1K lf.rem.[sd])
* sim/common/ChangeLog:

2017-12-12  Peter Gavin  <pgavin@gmail.com>
	    Stafford Horne <shorne@gmail.com>

	* cgen-accfp.c (remsf, remdf): New function.
	(cgen_init_accurate_fpu): Add remsf and remdf.
	* cgen-fpu.h (cgen_fp_ops): Add remsf, remdf, remxf and remtf.
	* sim-fpu.c (sim_fpu_rem): New function.
	* sim-fpu.h (sim_fpu_status_invalid_irx): New enum.
	(sim_fpu_rem): New function.
	(sim_fpu_print_status): Add case for sim_fpu_status_invalid_irx.
2017-12-12 23:41:43 +09:00
James Bowman
dcc31d286a FT32: support for FT32B processor - part 2/2
FT32B is a new FT32 family member.
This patch adds support for the compressed instructions to gdb and sim.

gdb/ChangeLog:
        * ft32-tdep.c (ft32_fetch_instruction): New function.
        (ft32_analyze_prologue): Use ft32_fetch_instruction().

sim/ChangeLog:
        * ft32/interp.c (step_once): Add ft32 shortcode decoder.
2017-11-01 18:36:51 -07:00
James Bowman
3b4b0a629a FT32: support for FT32B processor - part 1
FT32B is a new FT32 family member. It has a code
compression scheme, which requires the use of linker
relaxations. The change is quite large, so submission
is in several parts.

Part 1 adds a 15-bit instruction field, and CPU-specific functions for
the code compression that are used in binutils and GDB.

bfd/ChangeLog:

2017-10-12  James Bowman  <james.bowman@ftdichip.com>

	* bfd-in2.h: Regenerate.
	* libbfd.h: Regenerate.
	* elf32-ft32.c: Add HOWTO R_FT32_15.
	* reloc.c: Add BFD_RELOC_FT32_15.

gas/ChangeLog:

2017-10-12  James Bowman  <james.bowman@ftdichip.com>

	* config/tc-ft32.c (md_assemble): Replace FT32_FLD_K8 with
	K15.
	(md_apply_fix, tc_gen_reloc): Add BFD_RELOC_FT32_15.

include/ChangeLog:

2017-10-12  James Bowman  <james.bowman@ftdichip.com>

	* elf/ft32.h: Add R_FT32_15.
	* opcode/ft32.h: Replace FT32_FLD_K8 with K15.
	(ft32_shortcode, sc_compar, ft32_split_shortcode,
	ft32_merge_shortcode, ft32_merge_shortcode): New functions.

opcodes/ChangeLog:

2017-10-12  James Bowman  <james.bowman@ftdichip.com>

	* opcodes/ft32-dis.c (print_insn_ft32): Replace FT32_FLD_K8 with K15.
	* opcodes/ft32-opc.c (ft32_opc_info): Replace FT32_FLD_K8 with
	K15. Add jmpix pattern.

sim/ChangeLog:

2017-10-12  James Bowman  <james.bowman@ftdichip.com>

	* sim/ft32/interp.c (step_once): Replace FT32_FLD_K8 with K15.
2017-10-12 18:41:29 -07:00
James Bowman
d268bbaff7 Add myself as ft32 maintainer for sim.
sim/ChangeLog:
2017-10-12  James Bowman  <james.bowman@ftdichip.com>

	* MAINTAINERS (ft32): Add myself.
2017-10-12 18:12:42 -07:00
Jim Wilson
c0107b0f57 Update my email address.
sim/
	* MAINTAINERS (aarch64): Update my email address.
2017-10-03 14:23:56 -07:00
Yao Qi
88240b186d [SIM, ARM] Fix build failure
This patch fixes the build failure by using disassembler to get
disassemble function pointer, and do the disassembly, because
print_insn_little_arm is no longer visible outside opcodes/

binutils-gdb/sim/arm/wrapper.c:98:10: error: implicit declaration of function 'print_insn_little_arm' [-Werror=implicit-function-declaration]
   size = print_insn_little_arm (0, & info);
          ^

sim/arm:

2017-09-21  Yao Qi  <yao.qi@linaro.org>

	* wrapper.c (print_insn): Use disassembler instead of
	print_insn_little_arm.
2017-09-21 09:02:25 +01:00
John Baldwin
5c887dd5f6 Honor an existing CC_FOR_BUILD in the environment for sim.
This matches the equivalent bits in bfd/acinclude.m4

sim/ChangeLog:

	* configure.ac: Honor existing CC_FOR_BUILD in environment.
	* configure: Regenerate.

sim/aarch64/ChangeLog:

	* configure: Regenerate.

sim/arm/ChangeLog:

	* configure: Regenerate.

sim/avr/ChangeLog:

	* configure: Regenerate.

sim/bfin/ChangeLog:

	* configure: Regenerate.

sim/common/ChangeLog:

	* acinclude.m4 (SIM_AC_COMMON) Honor existing CC_FOR_BUILD in
	environment.

sim/cr16/ChangeLog:

	* configure: Regenerate.

sim/cris/ChangeLog:

	* configure: Regenerate.

sim/d10v/ChangeLog:

	* configure: Regenerate.

sim/erc32/ChangeLog:

	* configure: Regenerate.

sim/frv/ChangeLog:

	* configure: Regenerate.

sim/ft32/ChangeLog:

	* configure: Regenerate.

sim/h8300/ChangeLog:

	* configure: Regenerate.

sim/iq2000/ChangeLog:

	* configure: Regenerate.

sim/lm32/ChangeLog:

	* configure: Regenerate.

sim/m32c/ChangeLog:

	* configure: Regenerate.

sim/m32r/ChangeLog:

	* configure: Regenerate.

sim/m68hc11/ChangeLog:

	* configure: Regenerate.

sim/mcore/ChangeLog:

	* configure: Regenerate.

sim/microblaze/ChangeLog:

	* configure: Regenerate.

sim/mips/ChangeLog:

	* configure: Regenerate.

sim/mn10300/ChangeLog:

	* configure: Regenerate.

sim/moxie/ChangeLog:

	* configure: Regenerate.

sim/msp430/ChangeLog:

	* configure: Regenerate.

sim/rl78/ChangeLog:

	* configure: Regenerate.

sim/rx/ChangeLog:

	* configure: Regenerate.

sim/sh/ChangeLog:

	* configure: Regenerate.

sim/sh64/ChangeLog:

	* configure: Regenerate.

sim/v850/ChangeLog:

	* configure: Regenerate.
2017-09-06 10:16:12 -07:00
John Baldwin
625ce09c1c Define an error function in the PPC simulator library.
Previously this used the error function from GDB directly when linked
against GDB instead of the error method in the host callbacks
structure.  This was exposed via a link error when GDB was converted
to C++.  The error function invokes the error callback similar to
sim_io_error.

Note that there are also error functions in sim/ppc/main.c and
sim/ppc/misc.c.  The ppc libsim.a expects each consumer to provide
several symbols used by the library including "error".  sim-calls.c
provides these symbols when the library is linked into gdb.  The dgen,
igen, tmp-filter, tmp-ld-decode, tmp-ld-cache, and tmp-ld-insn programs
use the functions from misc.c.  psim uses the functions from main.c.

sim/ppc/ChangeLog:

	PR sim/20863
	* sim_calls.c (error): New function.
2017-09-04 19:56:00 -07:00
Anthony Green
6c869779da Fix simulator 2017-09-04 10:00:37 -04:00
Jozef Lawrynowicz
3819af136d Fix simulation of MSP430's open system call.
* sim/msp430/msp430-sim.c (maybe_perform_syscall): Fix passing of
	arguments for variadic syscall "open".
2017-08-29 14:09:58 +01:00
Michael Eager
e7cd2680e0 Correct check for endianness
* interp.c: (target_big_endian): target endianess recognition fix.
2017-06-02 08:04:59 -07:00
Yao Qi
003ca0fd22 Refactor disassembler selection
Nowadays, opcodes/disassemble.c:disassembler selects the proper
disassembler according to ABFD only.  However, it actually
selects disassemblers according to arch, mach, endianess, and
abfd.  This patch adds them to the parameters of disassembler,
so that its caller can still select disassemblers in case that
abfd is NULL (a typical case in GDB).

There isn't any functionality change.

binutils:

2017-05-24  Yao Qi  <yao.qi@linaro.org>

	* objdump.c (disassemble_data): Caller update.

include:

2017-05-24  Yao Qi  <yao.qi@linaro.org>

	* dis-asm.h (disassembler): Update declaration.

opcodes:

2017-05-24  Yao Qi  <yao.qi@linaro.org>

	* disassemble.c (disassembler): Add arguments a, big and mach.
	Use them.

sim/common:

2017-05-24  Yao Qi  <yao.qi@linaro.org>

	* sim-trace.c (trace_disasm): Caller update.
2017-05-24 17:23:52 +01:00
Jim Wilson
bf1554384b Fix ldn/stn multiple instructions. Fix testcases with unaligned data.
sim/aarch64/
	* simulator.c (vec_load): Add M argument.  Rewrite to iterate over
	registers based on structure size.
	(LD4, LD3, LD2, LD1_2, LD1_3, LD1_4): Pass new arg to vec_load.
	(LD1_1): Replace with call to vec_load.
	(vec_store): Add new M argument.  Rewrite to iterate over registers
	based on structure size.
	(ST4, ST3, ST2, ST1_2, ST1_3, ST1_4): Pass new arg to vec_store.
	(ST1_1): Replace with call to vec_store.

	sim/testsuite/sim/aarch64/
	* fcvtz.s, fstur.s, ldn_single.s, ldnr.s, mla.s, mls.s, uzp.s: Align
	data.
	* sumulh.s: Delete unnecessary data alignment.
	* stn_single.s: Align data.  Fix unaligned ldr insns.  Adjust cmp
	arguments to match change.
	* ldn_multiple.s, stn_multiple.s: New.
2017-04-22 16:36:01 -07:00
Jim Wilson
b630840c9c Add support for fcvtl and fcvtl2.
sim/aarch64/
	* simulator.c (do_vec_FCVTL): New.
	(do_vec_op1): Call do_vec_FCVTL.

	sim/testsuite/sim/aarch64/
	* fcvtl.s: New.
2017-04-08 12:08:20 -07:00
Jim Wilson
ae27d3fe76 Support the fcmXX zero instructions.
sim/aarch64/
	* simulator.c (do_scalar_FCMGE_zero): New.
	(do_scalar_FCMLE_zero, do_scalar_FCMGT_zero, do_scalar_FCMEQ_zero)
	(do_scalar_FCMLT_zero): Likewise.
	(do_scalar_vec): Add calls to new functions.

	sim/testsuite/sim/aarch64/
	* fcmXX.s: New.
2017-04-08 07:10:38 -07:00
Jim Wilson
f124168208 Fix bug with cmn/adds where C flag was incorrectly set.
sim/aarch64/
	* simulator.c (set_flags_for_add32): Cast result to uint32_t in carry
	flag check.

	sim/testsuite/sim/aarch64/
	* adds.s: Add checks for values -2 and 1, where C is not set.
2017-03-25 20:32:02 -07:00
Jim Wilson
8ecbe595e6 Fix umulh and smulh bugs. Fix bugs in last week's sumov.s testsuite.
sim/aarch64/
	* simulator.c (mul64hi): Shift carry left by 32.
	(smulh): Change signum to negate.  If negate, invert result, and add
	carry bit if low part of multiply result is zero.

	sim/testsuite/sim/aarch64/
	* sumov.s: Correct compare test values.
	* sumulh.s: New.
2017-03-03 13:10:45 -08:00
Jim Wilson
152e1e1bc9 Add missing smov support, and clean up existing umov support.
sim/aarch64/
	* simulator.c (do_vec_SMOV_into_scalar): New.
	(do_vec_UMOV_into_scalar): Renamed from do_vec_MOV_into_scalar.
	Rewritten.
	(do_vec_UMOV): Merged into do_vec_UMOV_into_scalar and deleted.
	(do_vec_op1): Move do_vec_TRN call and do_vec_UZP call.  Add
	do_vec_SMOV_into_scalar call.  Delete do_vec_MOV_into_scalar and
	do_vec_UMOV calls.  Add do_vec_UMOV_into_scalar call.

	sim/testsuite/sim/aarch64/
	* sumov.s: New.
2017-02-25 20:06:36 -08:00
Jim Wilson
ac189e7bf8 Add missing cnt (popcount) instruction support.
sim/aarch64/
	* simulator.c (popcount): New.
	(do_vec_CNT): New.
	(do_vec_op1): Add do_vec_CNT call.

	sim/testsuite/sim/aarch64/
	* cnt.s: New.
2017-02-25 20:04:09 -08:00
Jim Wilson
2e7e5e2890 Fix for aarch64 sim sxtl/uxtl insns, plus another fix for addv.
sim/aarch64/
	* simulator.c (do_vec_ADDV): Mov val declaration inside each case,
	with type set to input type size.
	(do_vec_xtl): Change bias from 3 to 4 for byte case.

	sim/testsuite/sim/aarch64/
	* bit.s: Change cmp immediates to account for addv bug fix.
	* cmtst.s, ldn_single.s, stn_single.s: Likewise.
	* xtl.s: New.
2017-02-19 13:16:56 -08:00
Jim Wilson
742e3a7781 Add self to aarch64 maintainers. Fix mla instruction.
sim/
	* MAINTAINTERS (aarch64): Add myself.

	sim/aarch64/
	* simulator.c (do_vec_MLA): Rewrite switch body.

	sim/testsuite/sim/aarch64/
	* mla.s: New.
2017-02-14 15:23:12 -08:00
Jim Wilson
bf25e9a0f1 Fix bit/bif instructions.
sim/aarch64/
	* simulator.c (do_vec_bit): Change loop limits from 16 and 8 to 4 and
	2.  Move test_false if inside loop.  Fix logic for computing result
	stored to vd.

	sim/testsuite/sim/aarch64
	* bit.s: New.
2017-02-14 14:35:57 -08:00
Jim Wilson
e8f42b5e36 Add ldn/stn single support, fix ldnr support.
sim/aarch64/
	* simulator.c: (LDn_STn_SINGLE_LANE_AND_SIZE): New.
	(do_vec_LDn_single, do_vec_STn_single): New.
	(do_vec_LDnR): Add and set new nregs var.  Replace switch on nregs with
	loop over nregs using new var n.  Add n times size to address in loop.
	Add n to vd in loop.
	(do_vec_load_store): Add comment for instruction bit 24.  New var
	single to hold instruction bit 24.  Add new code to use single.  Move
	ldnr support inside single if statements.  Fix ldnr register counts
	inside post if statement.  Change HALT_NYI calls to HALT_UNALLOC.

	sim/testsuite/sim/aarch64/
	* ldn_single.s: New.
	* ldnr.s: New.
	* stn_single.s: New.
2017-02-14 14:31:03 -08:00
Mike Frysinger
13a590ca65 sim: use ARRAY_SIZE instead of ad-hoc sizeof calculations 2017-02-13 01:26:21 -05:00
Jim Wilson
fbf32f638c Add support for cmtst.
sim/aarch64/
	* simulator.c (do_vec_compare): Add case 0x23 for CMTST.

	sim/testsuite/sim/aarch64/
	* cmtst.s: New.
2017-01-23 17:26:53 -08:00
Jim Wilson
05b3d79d26 Fixes for addv and xtn2 instructions.
sim/aarch64/
	* simulator.c (do_vec_ADDV): Call aarch64_set_vec_u64 instead of
	aarch64_set_reg_u64.  In case 2, call HALT_UNALLOC if not full.  In
	case 3, call HALT_UNALLOC unconditionally.
	(do_vec_XTN): Delete shifts.  In case 2, change index from i + 4 to
	i + 2.  Delete if on bias, change index to i + bias * X.

	sim/testsuite/sim/aarch64/
	* addv.s: New.
	* xtn.s: New.
2017-01-17 16:11:09 -08:00
Jim Wilson
a4fb5981b7 Fix problems with the implementation of the uzp1 and uzp2 instructions.
sim/aarch64/
	* simulator.c (do_vec_UZP): Rewrite.
	sim/testsuite/sim/aarch64/
	* uzp.s: New.
2017-01-09 15:44:57 -08:00
Jim Wilson
c0386d4d54 Five fixes, for fcsel, fcvtz, fminnm, mls, and non-widening mul.
sim/aarch64/
	* cpustate.c: Include math.h.
	(aarch64_set_FP_float): Use signbit to check for signed zero.
	(aarch64_set_FP_double): Likewise.
	* simulator.c (do_vec_MOV_immediate, case 0x8): Add missing break.
	(do_vec_mul): In all DO_VEC_WIDENING_MUL calls, make second and fourth
	args same size as third arg.
	(fmaxnm): Use isnan instead of fpclassify.
	(fminnm, dmaxnm, dminnm): Likewise.
	(do_vec_MLS): Reverse order of subtraction operands.
	(dexSimpleFPCondSelect): Call aarch64_get_FP_double or
	aarch64_get_FP_float to get source register contents.
	(UINT_MIN, ULONG_MIN, FLOAT_UINT_MAX, FLOAT_UINT_MIN,
	DOUBLE_UINT_MAX, DOUBLE_UINT_MIN, FLOAT_ULONG_MAX, FLOAT_ULONG_MIN,
	DOUBLE_ULONG_MAX, DOUBLE_ULONG_MIN): New.
	(do_fcvtzu): Use ULONG instead of LONG, and UINT instead of INT in
	raise_exception calls.

	sim/testsuite/sim/aarch64/
	* fcsel.s: New.
	* fcvtz.s: New.
	* fminnm.s: New.
	* mls.s: New.
	* mul.s: New.
2017-01-04 16:07:50 -08:00
Joel Brobecker
61baf725ec update copyright year range in GDB files
This applies the second part of GDB's End of Year Procedure, which
updates the copyright year range in all of GDB's files.

gdb/ChangeLog:

        Update copyright year range in all GDB files.
2017-01-01 10:52:34 +04:00
Jim Wilson
87903eafb0 Fix bugs with float compare and Inf operands.
sim/aarch64/
	* simulator.c (set_flags_for_float_compare): Add code to handle Inf.
	Add comment to document NaN issue.
	(set_flags_for_double_compare): Likewise.

	sim/testsuite/sim/aarch64/
	* fcmp.s: New.
2016-12-21 12:33:12 -08:00
Maciej W. Rozycki
cadf97cf20 MAINTAINERS: Add myself as a MIPS maintainer
* MAINTAINERS (Maintainers for particular sims): Add myself as
	a MIPS maintainer.
2016-12-14 22:19:08 +00:00
Jim Wilson
963201cf5d Fix aarch64 sim bug with adds64, and add testcases for last 3 bug fixes.
sim/aarch64
	* simulator.c (NEG, POS): Move before set_flags_for_add64.
	(set_flags_for_add64): Replace with a modified copy of
	set_flags_for_sub64.

	sim/testsuite/sim/aarch64
	* testutils.inc (pass): Move .Lpass to start.
	(fail): Move .Lfail to start.  Return 1 instead of 0.
	(start): Moved .Lpass and .Lfail to here.
	* adds.s: New.
	* fstur.s: New.
	* tbnz.s: New.
2016-12-13 08:44:31 -08:00
Jim Wilson
668650d58d Fix bugs with tbnz/tbz instructions.
sim/aarch64
	* simulator.c (tbnz, tbz): Cast 1 to uint64_t before shifting.
	(dexTestBranchImmediate): Shift high bit of pos by 5 not 4.
2016-12-03 17:29:44 -08:00
Jim Wilson
88256e713c Fix typo in ChangeLog entry. 2016-12-01 09:07:55 -08:00
Jim Wilson
88ddd4a1ef Fix bug with FP stur instructions.
sim/aarch64
	* simulator.c (fsturs): Switch use of rn and st variables.
	(fsturd, fsturq): Likewise
2016-12-01 09:06:07 -08:00
Mike Frysinger
6cb2202baa sim: mips: add PR info to ChangeLog 2016-11-12 01:02:23 -05:00
Mike Frysinger
91588b3af8 sim: mips: fix dv-tx3904cpu build error
When building for mipstx39-rtems4.12 targets, some funcs use SD and CPU
implicitly.  Restore the defines for these to the local sd and cpu vars.

This was broken by the clean up in commit d47f5b30d8.

Reported-by: Joel Sherrill <joel.sherrill@oarcorp.com>
2016-11-11 01:29:21 -05:00
Mike Frysinger
e04659e860 sim: mips: fix builds for r3900 cpus due to missing check_u64 2016-11-11 01:28:36 -05:00
Mike Frysinger
333ec25d7e sim: avr: move changelog entries to subdir 2016-10-18 01:04:53 -04:00
Mike Frysinger
fa0843f502 sim: m68hc11: use standard STATIC_INLINE helper
Rather than redefine inline locally, use the common STATIC_INLINE.
2016-08-16 06:12:39 -07:00
Mike Frysinger
5357150c97 sim: unify symbol table handling
The common sim tracing code already handles loading and tracking of
symbols from the target program so that it can show symbol info in
trace/disassembly calls.  Once we touch up the trace code and add a
few API callbacks, ports don't need to do loading and searching of
symbol tables themselves anymore.
2016-08-15 07:00:11 -07:00
Mike Frysinger
6f64fd48c5 sim: m68hc11: standardize sim_cpu naming
We use "sim_cpu *cpu" in the sim code base, not "struct _sim_cpu" or
the name "proc", so clean up this sim to follow along.
2016-08-13 22:54:05 -07:00