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Sat Sep 7 13:25:55 1996 James G. Smith <jsmith@cygnus.co.uk>
* config/tc-mips.c (COUNT_TOP_ZEROES): Added macro to count leading zeroes. (load_register): Ensure hi32 bits are not lost during lo32bit processing. Fix shift offset that was overflowing into the next instruction field. Add code to generate shorter sequences for constants with a single contiguous seqeuence of ones. Fri Sep 6 18:23:54 1996 James G. Smith <jsmith@cygnus.co.uk> * gas/mips/dli.{s,d}: More test cases added. NOTE: The COUNT_TOP_ZEROES macro is a bit bulky, and the same result can be achieved by using a "standard" ffs() routine: count = ffs(~v); count = count == 0 ? 0 : 33 - count; However the following timings (VR4300 CPU clock ticks on a CMA101 board) show the performance gain. Number of ffs() for loop if/then/else conditional leading ?: zeroes ------------------------------------------------------------------------------- 0 167 179 266 251 1 1718 283 263 259 2 1670 379 287 295 3 1622 475 311 311 4 1574 571 295 287 5 1534 667 311 319 6 1478 763 307 299 7 1430 859 323 323 8 1382 962 287 295 9 1334 1051 319 311 10 1286 1154 299 307 11 1238 1250 323 331 12 1183 1346 299 307 13 1135 1442 331 323 14 1087 1546 311 319 15 1039 1642 335 343 16 991 1730 295 287 17 950 1834 311 319 18 895 1922 307 299 19 847 2026 331 323 20 799 2122 307 299 21 751 2218 323 323 22 703 2314 311 311 23 655 2417 343 335 24 599 2506 307 299 25 559 2602 331 331 26 511 2705 311 319 27 463 2801 343 335 28 407 2897 311 319 29 367 2993 343 335 30 311 3097 323 331 31 271 3185 355 355 32 215 3233 379 371
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@ -1864,6 +1864,82 @@ check_absolute_expr (ip, ex)
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as_warn ("Instruction %s requires absolute expression", ip->insn_mo->name);
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}
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/* Count the leading zeroes by performing a binary chop. This is a
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bulky bit of source, but performance is a LOT better for the
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majority of values than a simple loop to count the bits:
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for (lcnt = 0; (lcnt < 32); lcnt++)
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if ((v) & (1 << (31 - lcnt)))
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break;
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However it is not code size friendly, and the gain will drop a bit
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on certain cached systems.
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*/
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#define COUNT_TOP_ZEROES(v) \
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(((v) & ~0xffff) == 0 \
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? ((v) & ~0xff) == 0 \
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? ((v) & ~0xf) == 0 \
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? ((v) & ~0x3) == 0 \
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? ((v) & ~0x1) == 0 \
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? !(v) \
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? 32 \
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: 31 \
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: 30 \
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: ((v) & ~0x7) == 0 \
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? 29 \
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: 28 \
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: ((v) & ~0x3f) == 0 \
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? ((v) & ~0x1f) == 0 \
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? 27 \
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: 26 \
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: ((v) & ~0x7f) == 0 \
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? 25 \
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: 24 \
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: ((v) & ~0xfff) == 0 \
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? ((v) & ~0x3ff) == 0 \
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? ((v) & ~0x1ff) == 0 \
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? 23 \
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: 22 \
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: ((v) & ~0x7ff) == 0 \
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? 21 \
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: 20 \
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: ((v) & ~0x3fff) == 0 \
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? ((v) & ~0x1fff) == 0 \
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? 19 \
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: 18 \
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: ((v) & ~0x7fff) == 0 \
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? 17 \
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: 16 \
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: ((v) & ~0xffffff) == 0 \
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? ((v) & ~0xfffff) == 0 \
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? ((v) & ~0x3ffff) == 0 \
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? ((v) & ~0x1ffff) == 0 \
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? 15 \
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: 14 \
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: ((v) & ~0x7ffff) == 0 \
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? 13 \
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: 12 \
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: ((v) & ~0x3fffff) == 0 \
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? ((v) & ~0x1fffff) == 0 \
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? 11 \
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: 10 \
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: ((v) & ~0x7fffff) == 0 \
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? 9 \
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: 8 \
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: ((v) & ~0xfffffff) == 0 \
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? ((v) & ~0x3ffffff) == 0 \
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? ((v) & ~0x1ffffff) == 0 \
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? 7 \
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: 6 \
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: ((v) & ~0x7ffffff) == 0 \
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? 5 \
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: 4 \
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: ((v) & ~0x3fffffff) == 0 \
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? ((v) & ~0x1fffffff) == 0 \
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? 3 \
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: 2 \
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: ((v) & ~0x7fffffff) == 0 \
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? 1 \
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: 0)
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/* load_register()
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* This routine generates the least number of instructions neccessary to load
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* an absolute expression value into a register.
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@ -1876,7 +1952,7 @@ load_register (counter, reg, ep, dbl)
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int dbl;
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{
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int shift, freg;
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expressionS hi32, lo32;
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expressionS hi32, lo32, tmp;
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if (ep->X_op != O_big)
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{
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@ -1910,7 +1986,7 @@ load_register (counter, reg, ep, dbl)
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|| ! ep->X_unsigned
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|| sizeof (ep->X_add_number) > 4
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|| (ep->X_add_number & 0x80000000) == 0))
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|| (mips_isa < 3
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|| ((mips_isa < 3 || !dbl)
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&& (ep->X_add_number &~ 0xffffffff) == 0))
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{
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/* 32 bit values require an lui. */
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@ -1978,6 +2054,59 @@ load_register (counter, reg, ep, dbl)
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return;
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}
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}
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/* Check for 16bit shifted constant: */
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shift = 32;
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tmp.X_add_number = hi32.X_add_number << shift | lo32.X_add_number;
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/* We know that hi32 is non-zero, so start the mask on the first
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bit of the hi32 value: */
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shift = 17;
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do
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{
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if ((tmp.X_add_number & ~((offsetT)0xffff << shift)) == 0)
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{
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tmp.X_op = O_constant;
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tmp.X_add_number >>= shift;
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macro_build ((char *) NULL, counter, &tmp, "ori", "t,r,i", reg, 0,
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(int) BFD_RELOC_LO16);
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macro_build ((char *) NULL, counter, NULL,
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(shift >= 32) ? "dsll32" : "dsll",
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"d,w,<", reg, reg, (shift >= 32) ? shift - 32 : shift);
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return;
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}
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shift++;
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} while (shift <= (64 - 16));
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freg = 0;
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shift = 32;
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tmp.X_add_number = hi32.X_add_number << shift | lo32.X_add_number;
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while ((tmp.X_add_number & 1) == 0)
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{
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tmp.X_add_number >>= 1;
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freg++;
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}
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if (((tmp.X_add_number + 1) & tmp.X_add_number) == 0) /* (power-of-2 - 1) */
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{
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shift = COUNT_TOP_ZEROES((unsigned int)hi32.X_add_number);
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if (shift != 0)
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{
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tmp.X_op = O_constant;
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tmp.X_add_number = (offsetT)-1;
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macro_build ((char *) NULL, counter, &tmp, "addiu", "t,r,j", reg, 0,
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(int) BFD_RELOC_LO16); /* set all ones */
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if (freg != 0)
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{
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freg += shift;
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macro_build ((char *) NULL, counter, NULL,
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(freg >= 32) ? "dsll32" : "dsll",
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"d,w,<", reg, reg,
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(freg >= 32) ? freg - 32 : freg);
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}
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macro_build ((char *) NULL, counter, NULL, (shift >= 32) ? "dsrl32" : "dsrl",
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"d,w,<", reg, reg, (shift >= 32) ? shift - 32 : shift);
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return;
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}
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}
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load_register (counter, reg, &hi32, 0);
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freg = reg;
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}
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@ -1999,7 +2128,7 @@ load_register (counter, reg, ep, dbl)
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macro_build ((char *) NULL, counter, &lo32, "lui", "t,u", reg,
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(int) BFD_RELOC_HI16);
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macro_build ((char *) NULL, counter, NULL, "dsrl32", "d,w,<", reg,
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reg, 32);
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reg, 0);
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return;
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}
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