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Remove powerpc PE support

Browse Source 
Plus some leftover powerpc lynxos support.

bfd/
	* coff-ppc.c: Delete.
	* pe-ppc.c: Delete.
	* pei-ppc.c: Delete.
	* Makefile.am (BFD32_BACKENDS, BFD32_BACKENDS_CFILES): Remove PE PPC.
	* coffcode.h (coff_set_arch_mach_hook, coff_set_flags): Remove
	PPCMAGIC code.
	(coff_write_object_contents): Remove PPC_PE code.
	* config.bfd: Move powerpcle-pe to removed targets.
	* configure.ac: Remove powerpc PE entries.
	* libcoff-in.h (ppc_allocate_toc_section): Delete.
	(ppc_process_before_allocation): Delete.
	* peXXigen.c: Remove POWERPC_LE_PE code and comments.
	* targets.c: Remove powerpc PE vectors.
	* po/SRC-POTFILES.in: Regenerate.
	* libcoff.h: Regenerate.
	* Makefile.in: Regenerate.
	* configure: Regenerate.
binutils/
	* dlltool.c: Remove powerpc PE support and comments.
	* configure.ac: Remove powerpc PE dlltool config.
	* configure: Regenerate.
gas/
	* config/obj-coff.h: Remove TE_PE support.
	* config/tc-ppc.c: Likewise.
	* config/tc-ppc.h: Likewise.
	* configure.tgt: Remove powerpc PE and powerpc lynxos.
	* testsuite/gas/cfi/cfi.exp (cfi-common-6): Remove powerpc PE
	condition.
	* testsuite/gas/macros/macros.exp: Don't xfail powerpc PE.
include/
	* coff/powerpc.h: Delete.
ld/
	* emulparams/ppcpe.sh: Delete.
	* scripttempl/ppcpe.sc: Delete.
	* emulparams/ppclynx.sh: Delete.
	* Makefile.am (ALL_EMULATION_SOURCES): Remove ppc PE and lynxos.
	* configure.tgt: Likewise.
	* emultempl/beos.em: Remove powerpc PE support.
	* emultempl/pe.em: Likewise.
	* po/BLD-POTFILES.in: Regenerate.
	* Makefile.in: Regenerate.
This commit is contained in:
Alan Modra 2020-07-08 21:21:32 +09:30
parent c560184eb2
commit fe49679d51
38 changed files with 95 additions and 4420 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

20
bfd/ChangeLog
View File

@ -1,3 +1,23 @@
2020-07-09 Alan Modra <amodra@gmail.com>
* coff-ppc.c: Delete.
* pe-ppc.c: Delete.
* pei-ppc.c: Delete.
* Makefile.am (BFD32_BACKENDS, BFD32_BACKENDS_CFILES): Remove PE PPC.
* coffcode.h (coff_set_arch_mach_hook, coff_set_flags): Remove
PPCMAGIC code.
(coff_write_object_contents): Remove PPC_PE code.
* config.bfd: Move powerpcle-pe to removed targets.
* configure.ac: Remove powerpc PE entries.
* libcoff-in.h (ppc_allocate_toc_section): Delete.
(ppc_process_before_allocation): Delete.
* peXXigen.c: Remove POWERPC_LE_PE code and comments.
* targets.c: Remove powerpc PE vectors.
* po/SRC-POTFILES.in: Regenerate.
* libcoff.h: Regenerate.
* Makefile.in: Regenerate.
* configure: Regenerate.
2020-07-09 Nick Clifton <nickc@redhat.com>
* po/fr.po: Updated French translation.

4
bfd/Makefile.am
View File

@ -370,14 +370,12 @@ BFD32_BACKENDS = \
pe-arm.lo \
pe-i386.lo \
pe-mcore.lo \
pe-ppc.lo \
pe-sh.lo \
pef.lo \
pei-arm-wince.lo \
pei-arm.lo \
pei-i386.lo \
pei-mcore.lo \
pei-ppc.lo \
pei-sh.lo \
peigen.lo \
plugin.lo \
@ -505,14 +503,12 @@ BFD32_BACKENDS_CFILES = \
pe-arm.c \
pe-i386.c \
pe-mcore.c \
pe-ppc.c \
pe-sh.c \
pef.c \
pei-arm-wince.c \
pei-arm.c \
pei-i386.c \
pei-mcore.c \
pei-ppc.c \
pei-sh.c \
plugin.c \
ppcboot.c \

6
bfd/Makefile.in
View File

@ -795,14 +795,12 @@ BFD32_BACKENDS = \
pe-arm.lo \
pe-i386.lo \
pe-mcore.lo \
pe-ppc.lo \
pe-sh.lo \
pef.lo \
pei-arm-wince.lo \
pei-arm.lo \
pei-i386.lo \
pei-mcore.lo \
pei-ppc.lo \
pei-sh.lo \
peigen.lo \
plugin.lo \
@ -930,14 +928,12 @@ BFD32_BACKENDS_CFILES = \
pe-arm.c \
pe-i386.c \
pe-mcore.c \
pe-ppc.c \
pe-sh.c \
pef.c \
pei-arm-wince.c \
pei-arm.c \
pei-i386.c \
pei-mcore.c \
pei-ppc.c \
pei-sh.c \
plugin.c \
ppcboot.c \
@ -1544,7 +1540,6 @@ distclean-compile:
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/pe-arm.Plo@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/pe-i386.Plo@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/pe-mcore.Plo@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/pe-ppc.Plo@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/pe-sh.Plo@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/pe-x86_64.Plo@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/pef.Plo@am__quote@
@ -1553,7 +1548,6 @@ distclean-compile:
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/pei-i386.Plo@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/pei-ia64.Plo@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/pei-mcore.Plo@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/pei-ppc.Plo@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/pei-sh.Plo@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/pei-x86_64.Plo@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/peigen.Plo@am__quote@

2582
bfd/coff-ppc.c
View File

File diff suppressed because it is too large Load Diff

36
bfd/coffcode.h
View File

@ -2136,11 +2136,6 @@ coff_set_arch_mach_hook (bfd *abfd, void * filehdr)
machine = 0;
switch (internal_f->f_magic)
{
#ifdef PPCMAGIC
case PPCMAGIC:
arch = bfd_arch_powerpc;
break;
#endif
#ifdef I386MAGIC
case I386MAGIC:
case I386PTXMAGIC:
@ -2790,12 +2785,6 @@ coff_set_flags (bfd * abfd,
return TRUE;
#endif
#ifdef PPCMAGIC
case bfd_arch_powerpc:
*magicp = PPCMAGIC;
return TRUE;
#endif
#if defined(I386MAGIC) || defined(AMD64MAGIC)
case bfd_arch_i386:
#if defined(I386MAGIC)
@ -2848,9 +2837,7 @@ coff_set_flags (bfd * abfd,
#ifdef RS6000COFF_C
case bfd_arch_rs6000:
#ifndef PPCMAGIC
case bfd_arch_powerpc:
#endif
BFD_ASSERT (bfd_get_flavour (abfd) == bfd_target_xcoff_flavour);
*magicp = bfd_xcoff_magic_number (abfd);
return TRUE;
@ -3890,11 +3877,6 @@ coff_write_object_contents (bfd * abfd)
internal_a.magic = ZMAGIC;
#endif
#if defined(PPC_PE)
#define __A_MAGIC_SET__
internal_a.magic = IMAGE_NT_OPTIONAL_HDR_MAGIC;
#endif
#if defined MCORE_PE
#define __A_MAGIC_SET__
internal_a.magic = IMAGE_NT_OPTIONAL_HDR_MAGIC;
@ -3976,24 +3958,6 @@ coff_write_object_contents (bfd * abfd)
return FALSE;
}
#endif
#ifdef COFF_IMAGE_WITH_PE
#ifdef PPC_PE
else if ((abfd->flags & EXEC_P) != 0)
{
bfd_byte b;
/* PowerPC PE appears to require that all executable files be
rounded up to the page size. */
b = 0;
if (bfd_seek (abfd,
(file_ptr) BFD_ALIGN (sym_base, COFF_PAGE_SIZE) - 1,
SEEK_SET) != 0
|| bfd_bwrite (&b, (bfd_size_type) 1, abfd) != 1)
return FALSE;
}
#endif
#endif
/* If bfd_get_symcount (abfd) != 0, then we are not using the COFF
backend linker, and obj_raw_syment_count is not valid until after
coff_write_symbols is called. */

6
bfd/config.bfd
View File

@ -53,7 +53,6 @@ case $targ in
echo "*** Use or1k-*-elf or or1k-*-linux as the target instead" >&2
exit 1
;;
powerpcle-*-pe | powerpcle-*-winnt* | powerpcle-*-cygwin* | \
xc16x-*-* | \
null)
if test "x$enable_obsolete" != xyes; then
@ -143,6 +142,7 @@ case $targ in
mips*-sgi-* | \
mips*el-*-rtems* | \
powerpc-*-lynxos* | powerpc-*-windiss* | \
powerpcle-*-pe | powerpcle-*-winnt* | powerpcle-*-cygwin* | \
sh*-*-symbianelf* | sh5*-*-* | sh64*-*-* | \
sparc*-*-*aout* | \
sparc*-*-chorus* | \
@ -1145,10 +1145,6 @@ case "${targ}" in
targ_selvecs="rs6000_xcoff_vec powerpc_elf32_vec powerpc_boot_vec"
targ64_selvecs="powerpc_elf64_vec powerpc_elf64_le_vec"
;;
powerpcle-*-pe | powerpcle-*-winnt* | powerpcle-*-cygwin*)
targ_defvec=powerpc_pe_le_vec
targ_selvecs="powerpc_pei_le_vec powerpc_pei_vec powerpc_pe_le_vec powerpc_pe_vec"
;;
pru-*-*)
targ_defvec=pru_elf32_vec

4
bfd/configure vendored
View File

@ -14883,10 +14883,6 @@ do
powerpc_elf64_vec) tb="$tb elf64-ppc.lo elf64-gen.lo elf64.lo $elf"; target_size=64 ;;
powerpc_elf64_le_vec) tb="$tb elf64-ppc.lo elf64-gen.lo elf64.lo $elf" target_size=64 ;;
powerpc_elf64_fbsd_vec) tb="$tb elf64-ppc.lo elf64-gen.lo elf64.lo $elf" target_size=64 ;;
powerpc_pe_vec) tb="$tb pe-ppc.lo peigen.lo $coff" ;;
powerpc_pe_le_vec) tb="$tb pe-ppc.lo peigen.lo $coff" ;;
powerpc_pei_vec) tb="$tb pei-ppc.lo peigen.lo $coff" ;;
powerpc_pei_le_vec) tb="$tb pei-ppc.lo peigen.lo $coff" ;;
powerpc_xcoff_vec) tb="$tb coff-rs6000.lo $xcoff" ;;
pru_elf32_vec) tb="$tb elf32-pru.lo elf32.lo $elf" ;;
riscv_elf32_vec) tb="$tb elf32-riscv.lo elfxx-riscv.lo elf32.lo $elf" ;;

4
bfd/configure.ac
View File

@ -619,10 +619,6 @@ do
powerpc_elf64_vec) tb="$tb elf64-ppc.lo elf64-gen.lo elf64.lo $elf"; target_size=64 ;;
powerpc_elf64_le_vec) tb="$tb elf64-ppc.lo elf64-gen.lo elf64.lo $elf" target_size=64 ;;
powerpc_elf64_fbsd_vec) tb="$tb elf64-ppc.lo elf64-gen.lo elf64.lo $elf" target_size=64 ;;
powerpc_pe_vec) tb="$tb pe-ppc.lo peigen.lo $coff" ;;
powerpc_pe_le_vec) tb="$tb pe-ppc.lo peigen.lo $coff" ;;
powerpc_pei_vec) tb="$tb pei-ppc.lo peigen.lo $coff" ;;
powerpc_pei_le_vec) tb="$tb pei-ppc.lo peigen.lo $coff" ;;
powerpc_xcoff_vec) tb="$tb coff-rs6000.lo $xcoff" ;;
pru_elf32_vec) tb="$tb elf32-pru.lo elf32.lo $elf" ;;
riscv_elf32_vec) tb="$tb elf32-riscv.lo elfxx-riscv.lo elf32.lo $elf" ;;

8
bfd/libcoff-in.h
View File

@ -616,11 +616,3 @@ extern bfd_boolean _bfd_xcoff_define_common_symbol
extern bfd_boolean _bfd_ppc_xcoff_relocate_section
(bfd *, struct bfd_link_info *, bfd *, asection *, bfd_byte *,
struct internal_reloc *, struct internal_syment *, asection **);
/* Functions in coff-ppc.c. FIXME: These are called by pe.em in the
linker, and so should start with bfd and be declared in bfd.h. */
extern bfd_boolean ppc_allocate_toc_section
(struct bfd_link_info *);
extern bfd_boolean ppc_process_before_allocation
(bfd *, struct bfd_link_info *);

8
bfd/libcoff.h
View File

@ -620,14 +620,6 @@ extern bfd_boolean _bfd_xcoff_define_common_symbol
extern bfd_boolean _bfd_ppc_xcoff_relocate_section
(bfd *, struct bfd_link_info *, bfd *, asection *, bfd_byte *,
struct internal_reloc *, struct internal_syment *, asection **);
/* Functions in coff-ppc.c. FIXME: These are called by pe.em in the
linker, and so should start with bfd and be declared in bfd.h. */
extern bfd_boolean ppc_allocate_toc_section
(struct bfd_link_info *);
extern bfd_boolean ppc_process_before_allocation
(bfd *, struct bfd_link_info *);
/* Extracted from coffcode.h. */
typedef struct coff_ptr_struct

47
bfd/pe-ppc.c
View File

@ -1,47 +0,0 @@
/* BFD back-end for PowerPC PECOFF files.
Copyright (C) 1995-2020 Free Software Foundation, Inc.
This file is part of BFD, the Binary File Descriptor library.
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
Foundation, 51 Franklin Street - Fifth Floor,
Boston, MA 02110-1301, USA. */
#include "sysdep.h"
#include "bfd.h"
#define E_FILENMLEN 18
#define PPC_PE
#define TARGET_LITTLE_SYM powerpc_pe_le_vec
#define TARGET_LITTLE_NAME "pe-powerpcle"
#define TARGET_BIG_SYM powerpc_pe_vec
#define TARGET_BIG_NAME "pe-powerpc"
#define COFF_WITH_PE
#define COFF_LONG_SECTION_NAMES
/* FIXME: verify PCRELOFFSET is always false */
/* FIXME: This target no longer works. Search for POWERPC_LE_PE in
coff-ppc.c and peigen.c. */
#ifndef bfd_pe_print_pdata
#define bfd_pe_print_pdata NULL
#endif
#include "coff-ppc.c"

113
bfd/peXXigen.c
View File

@ -105,12 +105,6 @@
#define HighBitSet(val) ((val) & 0x80000000)
#define SetHighBit(val) ((val) | 0x80000000)
#define WithoutHighBit(val) ((val) & 0x7fffffff)
/* FIXME: This file has various tests of POWERPC_LE_PE. Those tests
worked when the code was in peicode.h, but no longer work now that
the code is in peigen.c. PowerPC NT is said to be dead. If
anybody wants to revive the code, you will have to figure out how
to handle those issues. */
void
_bfd_XXi_swap_sym_in (bfd * abfd, void * ext1, void * in1)
@ -222,12 +216,6 @@ _bfd_XXi_swap_sym_in (bfd * abfd, void * ext1, void * in1)
in->n_sclass = C_STAT;
}
#endif
#ifdef coff_swap_sym_in_hook
/* This won't work in peigen.c, but since it's for PPC PE, it's not
worth fixing. */
coff_swap_sym_in_hook (abfd, ext1, in1);
#endif
}
static bfd_boolean
@ -592,15 +580,6 @@ _bfd_XXi_swap_aouthdr_in (bfd * abfd,
aouthdr_int->data_start &= 0xffffffff;
}
#endif
#ifdef POWERPC_LE_PE
/* These three fields are normally set up by ppc_relocate_section.
In the case of reading a file in, we can pick them up from the
DataDirectory. */
first_thunk_address = a->DataDirectory[PE_IMPORT_ADDRESS_TABLE].VirtualAddress;
thunk_size = a->DataDirectory[PE_IMPORT_ADDRESS_TABLE].Size;
import_table_size = a->DataDirectory[PE_IMPORT_TABLE].Size;
#endif
}
/* A support function for below. */
@ -1010,7 +989,7 @@ _bfd_XXi_swap_scnhdr_out (bfd * abfd, void * in, void * out)
(0x02000000). Also, the resource data should also be read and
writable. */
/* FIXME: Alignment is also encoded in this field, at least on PPC and
/* FIXME: Alignment is also encoded in this field, at least on
ARM-WINCE. Although - how do we get the original alignment field
back ? */
@ -1256,14 +1235,6 @@ static char * dir_names[IMAGE_NUMBEROF_DIRECTORY_ENTRIES] =
N_("Reserved")
};
#ifdef POWERPC_LE_PE
/* The code for the PPC really falls in the "architecture dependent"
category. However, it's not clear that anyone will ever care, so
we're ignoring the issue for now; if/when PPC matters, some of this
may need to go into peicode.h, or arguments passed to enable the
PPC- specific code. */
#endif
static bfd_boolean
pe_print_idata (bfd * abfd, void * vfile)
{
@ -1271,11 +1242,6 @@ pe_print_idata (bfd * abfd, void * vfile)
bfd_byte *data;
asection *section;
bfd_signed_vma adj;
#ifdef POWERPC_LE_PE
asection *rel_section = bfd_get_section_by_name (abfd, ".reldata");
#endif
bfd_size_type datasize = 0;
bfd_size_type dataoff;
bfd_size_type i;
@ -1331,56 +1297,6 @@ pe_print_idata (bfd * abfd, void * vfile)
dataoff = addr - section->vma;
#ifdef POWERPC_LE_PE
if (rel_section != 0 && rel_section->size != 0)
{
/* The toc address can be found by taking the starting address,
which on the PPC locates a function descriptor. The
descriptor consists of the function code starting address
followed by the address of the toc. The starting address we
get from the bfd, and the descriptor is supposed to be in the
.reldata section. */
bfd_vma loadable_toc_address;
bfd_vma toc_address;
bfd_vma start_address;
bfd_byte *data;
bfd_vma offset;
if (!bfd_malloc_and_get_section (abfd, rel_section, &data))
{
free (data);
return FALSE;
}
offset = abfd->start_address - rel_section->vma;
if (offset >= rel_section->size || offset + 8 > rel_section->size)
{
free (data);
return FALSE;
}
start_address = bfd_get_32 (abfd, data + offset);
loadable_toc_address = bfd_get_32 (abfd, data + offset + 4);
toc_address = loadable_toc_address - 32768;
fprintf (file,
_("\nFunction descriptor located at the start address: %04lx\n"),
(unsigned long int) (abfd->start_address));
fprintf (file,
/* xgettext:c-format */
_("\tcode-base %08lx toc (loadable/actual) %08lx/%08lx\n"),
start_address, loadable_toc_address, toc_address);
free (data);
}
else
{
fprintf (file,
_("\nNo reldata section! Function descriptor not decoded.\n"));
}
#endif
fprintf (file,
_("\nThe Import Tables (interpreted %s section contents)\n"),
section->name);
@ -1985,33 +1901,6 @@ pe_print_pdata (bfd * abfd, void * vfile)
bfd_fprintf_vma (abfd, file, prolog_end_addr);
fprintf (file, " %x", em_data);
#endif
#ifdef POWERPC_LE_PE
if (eh_handler == 0 && eh_data != 0)
{
/* Special bits here, although the meaning may be a little
mysterious. The only one I know for sure is 0x03
Code Significance
0x00 None
0x01 Register Save Millicode
0x02 Register Restore Millicode
0x03 Glue Code Sequence. */
switch (eh_data)
{
case 0x01:
fprintf (file, _(" Register save millicode"));
break;
case 0x02:
fprintf (file, _(" Register restore millicode"));
break;
case 0x03:
fprintf (file, _(" Glue code sequence"));
break;
default:
break;
}
}
#endif
fprintf (file, "\n");
}

50
bfd/pei-ppc.c
View File

@ -1,50 +0,0 @@
/* BFD back-end for PowerPC PE IMAGE COFF files.
Copyright (C) 1995-2020 Free Software Foundation, Inc.
This file is part of BFD, the Binary File Descriptor library.
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
Foundation, 51 Franklin Street - Fifth Floor,
Boston, MA 02110-1301, USA. */
#include "sysdep.h"
#include "bfd.h"
/* setting up for a PE environment stolen directly from the i386 structure */
#define E_FILNMLEN 18 /* # characters in a file name */
#define PPC_PE
#define TARGET_LITTLE_SYM powerpc_pei_le_vec
#define TARGET_LITTLE_NAME "pei-powerpcle"
#define TARGET_BIG_SYM powerpc_pei_vec
#define TARGET_BIG_NAME "pei-powerpc"
#define COFF_IMAGE_WITH_PE
#define COFF_WITH_PE
/* Long section names not allowed in executable images, only object files. */
#define COFF_LONG_SECTION_NAMES 0
/* FIXME: Verify PCRELOFFSET is always false */
/* FIXME: This target no longer works. Search for POWERPC_LE_PE in
coff-ppc.c and peigen.c. */
#ifndef bfd_pe_print_pdata
#define bfd_pe_print_pdata NULL
#endif
#include "coff-ppc.c"

2
bfd/po/SRC-POTFILES.in
View File

@ -314,7 +314,6 @@ pe-arm-wince.c
pe-arm.c
pe-i386.c
pe-mcore.c
pe-ppc.c
pe-sh.c
pe-x86_64.c
pef-traceback.h
@ -325,7 +324,6 @@ pei-arm.c
pei-i386.c
pei-ia64.c
pei-mcore.c
pei-ppc.c
pei-sh.c
pei-x86_64.c
peicode.h

8
bfd/targets.c
View File

@ -838,10 +838,6 @@ extern const bfd_target powerpc_elf32_vxworks_vec;
extern const bfd_target powerpc_elf64_vec;
extern const bfd_target powerpc_elf64_le_vec;
extern const bfd_target powerpc_elf64_fbsd_vec;
extern const bfd_target powerpc_pe_vec;
extern const bfd_target powerpc_pe_le_vec;
extern const bfd_target powerpc_pei_vec;
extern const bfd_target powerpc_pei_le_vec;
extern const bfd_target powerpc_xcoff_vec;
extern const bfd_target pru_elf32_vec;
extern const bfd_target riscv_elf32_vec;
@ -1229,10 +1225,6 @@ static const bfd_target * const _bfd_target_vector[] =
&powerpc_elf64_le_vec,
&powerpc_elf64_fbsd_vec,
#endif
&powerpc_pe_vec,
&powerpc_pe_le_vec,
&powerpc_pei_vec,
&powerpc_pei_le_vec,
#if 0
/* This has the same magic number as RS/6000. */
&powerpc_xcoff_vec,

6
binutils/ChangeLog
View File

@ -1,3 +1,9 @@
2020-07-09 Alan Modra <amodra@gmail.com>
* dlltool.c: Remove powerpc PE support and comments.
* configure.ac: Remove powerpc PE dlltool config.
* configure: Regenerate.
2020-07-09 Nick Clifton <nickc@redhat.com>
* rclex.c: Add OWNERDRAW keyword.

9
binutils/configure vendored
View File

@ -15146,15 +15146,6 @@ do
powerpc*-aix[5-9].*)
OBJDUMP_DEFS="-DAIX_WEAK_SUPPORT"
;;
powerpc*-*-pe* | powerpc*-*-cygwin*)
BUILD_DLLTOOL='$(DLLTOOL_PROG)$(EXEEXT)'
if test -z "$DLLTOOL_DEFAULT"; then
DLLTOOL_DEFAULT="-DDLLTOOL_DEFAULT_PPC"
fi
DLLTOOL_DEFS="$DLLTOOL_DEFS -DDLLTOOL_PPC"
BUILD_WINDRES='$(WINDRES_PROG)$(EXEEXT)'
BUILD_WINDMC='$(WINDMC_PROG)$(EXEEXT)'
;;
powerpc*-*-linux* | powerpc*-*-elf* | powerpc*-*-eabi*)
case "$BUILD_INSTALL_MISC" in
*embedspu*) ;;

9
binutils/configure.ac
View File

@ -330,15 +330,6 @@ changequote(,)dnl
changequote([,])dnl
OBJDUMP_DEFS="-DAIX_WEAK_SUPPORT"
;;
powerpc*-*-pe* | powerpc*-*-cygwin*)
BUILD_DLLTOOL='$(DLLTOOL_PROG)$(EXEEXT)'
if test -z "$DLLTOOL_DEFAULT"; then
DLLTOOL_DEFAULT="-DDLLTOOL_DEFAULT_PPC"
fi
DLLTOOL_DEFS="$DLLTOOL_DEFS -DDLLTOOL_PPC"
BUILD_WINDRES='$(WINDRES_PROG)$(EXEEXT)'
BUILD_WINDMC='$(WINDMC_PROG)$(EXEEXT)'
;;
powerpc*-*-linux* | powerpc*-*-elf* | powerpc*-*-eabi*)
case "$BUILD_INSTALL_MISC" in
*embedspu*) ;;

324
binutils/dlltool.c
View File

@ -229,7 +229,7 @@
= Array of { short, asciz } entries, one for each imported function.
The `short' is the function's ordinal number.
.idata$7 = dll name (eg: "kernel32.dll"). (.idata$6 for ppc). */
.idata$7 = dll name (eg: "kernel32.dll"). */
#include "sysdep.h"
#include "bfd.h"
@ -449,10 +449,6 @@ static const char *mname = "i386";
static const char *mname = "i386:x86-64";
#endif
#ifdef DLLTOOL_DEFAULT_PPC
static const char *mname = "ppc";
#endif
#ifdef DLLTOOL_DEFAULT_SH
static const char *mname = "sh";
#endif
@ -563,28 +559,6 @@ static const unsigned char mcore_le_jtab[] =
0x00, 0x00, 0x00, 0x00 /* <address> */
};
/* This is the glue sequence for PowerPC PE. There is a
tocrel16-tocdefn reloc against the first instruction.
We also need a IMGLUE reloc against the glue function
to restore the toc saved by the third instruction in
the glue. */
static const unsigned char ppc_jtab[] =
{
0x00, 0x00, 0x62, 0x81, /* lwz r11,0(r2) */
/* Reloc TOCREL16 __imp_xxx */
0x00, 0x00, 0x8B, 0x81, /* lwz r12,0(r11) */
0x04, 0x00, 0x41, 0x90, /* stw r2,4(r1) */
0xA6, 0x03, 0x89, 0x7D, /* mtctr r12 */
0x04, 0x00, 0x4B, 0x80, /* lwz r2,4(r11) */
0x20, 0x04, 0x80, 0x4E /* bctr */
};
#ifdef DLLTOOL_PPC
/* The glue instruction, picks up the toc from the stw in
the above code: "lwz r2,4(r1)". */
static bfd_vma ppc_glue_insn = 0x80410004;
#endif
static const char i386_trampoline[] =
"\tpushl %%ecx\n"
"\tpushl %%edx\n"
@ -661,16 +635,7 @@ mtable[] =
}
,
{
#define MPPC 2
"ppc", ".byte", ".short", ".long", ".asciz", "#",
"jmp *", ".global", ".space", ".align\t2",".align\t4", "",
"pe-powerpcle",bfd_arch_powerpc,
ppc_jtab, sizeof (ppc_jtab), 0,
0, 0, 0, 0, 0, 0
}
,
{
#define MTHUMB 3
#define MTHUMB 2
"thumb", ".byte", ".short", ".long", ".asciz", "@",
"push\t{r6}\n\tldr\tr6, [pc, #8]\n\tldr\tr6, [r6]\n\tmov\tip, r6\n\tpop\t{r6}\n\tbx\tip",
".global", ".space", ".align\t2",".align\t4", "-mthumb-interwork",
@ -679,7 +644,7 @@ mtable[] =
0, 0, 0, 0, 0, 0
}
,
#define MARM_INTERWORK 4
#define MARM_INTERWORK 3
{
"arm_interwork", ".byte", ".short", ".long", ".asciz", "@",
"ldr\tip,[pc]\n\tldr\tip,[ip]\n\tbx\tip\n\t.long",
@ -690,7 +655,7 @@ mtable[] =
}
,
{
#define MMCORE_BE 5
#define MMCORE_BE 4
"mcore-be", ".byte", ".short", ".long", ".asciz", "//",
"lrw r1,[1f]\n\tld.w r1,(r1,0)\n\tjmp r1\n\tnop\n1:.long",
".global", ".space", ".align\t2",".align\t4", "",
@ -700,7 +665,7 @@ mtable[] =
}
,
{
#define MMCORE_LE 6
#define MMCORE_LE 5
"mcore-le", ".byte", ".short", ".long", ".asciz", "//",
"lrw r1,[1f]\n\tld.w r1,(r1,0)\n\tjmp r1\n\tnop\n1:.long",
".global", ".space", ".align\t2",".align\t4", "-EL",
@ -710,7 +675,7 @@ mtable[] =
}
,
{
#define MMCORE_ELF 7
#define MMCORE_ELF 6
"mcore-elf-be", ".byte", ".short", ".long", ".asciz", "//",
"lrw r1,[1f]\n\tld.w r1,(r1,0)\n\tjmp r1\n\tnop\n1:.long",
".global", ".space", ".align\t2",".align\t4", "",
@ -720,7 +685,7 @@ mtable[] =
}
,
{
#define MMCORE_ELF_LE 8
#define MMCORE_ELF_LE 7
"mcore-elf-le", ".byte", ".short", ".long", ".asciz", "//",
"lrw r1,[1f]\n\tld.w r1,(r1,0)\n\tjmp r1\n\tnop\n1:.long",
".global", ".space", ".align\t2",".align\t4", "-EL",
@ -730,7 +695,7 @@ mtable[] =
}
,
{
#define MARM_WINCE 9
#define MARM_WINCE 8
"arm-wince", ".byte", ".short", ".long", ".asciz", "@",
"ldr\tip,[pc]\n\tldr\tpc,[ip]\n\t.long",
".global", ".space", ".align\t2",".align\t4", "-mapcs-32",
@ -740,7 +705,7 @@ mtable[] =
}
,
{
#define MX86 10
#define MX86 9
"i386:x86-64", ".byte", ".short", ".long", ".asciz", "#",
"jmp *", ".global", ".space", ".align\t2",".align\t4", "",
"pe-x86-64",bfd_arch_i386,
@ -888,7 +853,6 @@ rvaafter (int mach)
case MARM:
case M386:
case MX86:
case MPPC:
case MTHUMB:
case MARM_INTERWORK:
case MMCORE_BE:
@ -913,7 +877,6 @@ rvabefore (int mach)
case MARM:
case M386:
case MX86:
case MPPC:
case MTHUMB:
case MARM_INTERWORK:
case MMCORE_BE:
@ -936,7 +899,6 @@ asm_prefix (int mach, const char *name)
switch (mach)
{
case MARM:
case MPPC:
case MTHUMB:
case MARM_INTERWORK:
case MMCORE_BE:
@ -2296,8 +2258,6 @@ typedef struct
#define INIT_SEC_DATA(id, name, flags, align) \
{ id, name, flags, align, NULL, NULL, NULL, 0, NULL }
#ifndef DLLTOOL_PPC
#define TEXT 0
#define DATA 1
#define BSS 2
@ -2324,37 +2284,6 @@ static sinfo secdata[NSECS] =
INIT_SEC_DATA (IDATA6, ".idata$6", SEC_HAS_CONTENTS, 1)
};
#else
/* Sections numbered to make the order the same as other PowerPC NT
compilers. This also keeps funny alignment thingies from happening. */
#define TEXT 0
#define PDATA 1
#define RDATA 2
#define IDATA5 3
#define IDATA4 4
#define IDATA6 5
#define IDATA7 6
#define DATA 7
#define BSS 8
#define NSECS 9
static sinfo secdata[NSECS] =
{
INIT_SEC_DATA (TEXT, ".text", SEC_CODE | SEC_HAS_CONTENTS, 3),
INIT_SEC_DATA (PDATA, ".pdata", SEC_HAS_CONTENTS, 2),
INIT_SEC_DATA (RDATA, ".reldata", SEC_HAS_CONTENTS, 2),
INIT_SEC_DATA (IDATA5, ".idata$5", SEC_HAS_CONTENTS, 2),
INIT_SEC_DATA (IDATA4, ".idata$4", SEC_HAS_CONTENTS, 2),
INIT_SEC_DATA (IDATA6, ".idata$6", SEC_HAS_CONTENTS, 1),
INIT_SEC_DATA (IDATA7, ".idata$7", SEC_HAS_CONTENTS, 2),
INIT_SEC_DATA (DATA, ".data", SEC_DATA, 2),
INIT_SEC_DATA (BSS, ".bss", 0, 2)
};
#endif
/* This is what we're trying to make. We generate the imp symbols with
both single and double underscores, for compatibility.
@ -2376,21 +2305,7 @@ __imp_GetFileVersionInfoSizeW@8:
# Hint/Name table
.section .idata$6
ID2: .short 2
.asciz "GetFileVersionInfoSizeW"
For the PowerPC, here's the variation on the above scheme:
# Rather than a simple "jmp *", the code to get to the dll function
# looks like:
.text
lwz r11,[tocv]__imp_function_name(r2)
# RELOC: 00000000 TOCREL16,TOCDEFN __imp_function_name
lwz r12,0(r11)
stw r2,4(r1)
mtctr r12
lwz r2,4(r11)
bctr */
.asciz "GetFileVersionInfoSizeW" */
static char *
make_label (const char *prefix, const char *name)
@ -2438,11 +2353,6 @@ make_one_lib_file (export_type *exp, int i, int delay)
asymbol * iname_lab;
asymbol ** iname_lab_pp;
asymbol ** iname_pp;
#ifdef DLLTOOL_PPC
asymbol ** fn_pp;
asymbol ** toc_pp;
#define EXTRA 2
#endif
#ifndef EXTRA
#define EXTRA 0
#endif
@ -2503,18 +2413,7 @@ make_one_lib_file (export_type *exp, int i, int delay)
{
exp_label = bfd_make_empty_symbol (abfd);
exp_label->name = make_imp_label ("", exp->name);
/* On PowerPC, the function name points to a descriptor in
the rdata section, the first element of which is a
pointer to the code (..function_name), and the second
points to the .toc. */
#ifdef DLLTOOL_PPC
if (machine == MPPC)
exp_label->section = secdata[RDATA].sec;
else
#endif
exp_label->section = secdata[TEXT].sec;
exp_label->section = secdata[TEXT].sec;
exp_label->flags = BSF_GLOBAL;
exp_label->value = 0;
@ -2558,36 +2457,6 @@ make_one_lib_file (export_type *exp, int i, int delay)
iname_lab_pp = ptrs + oidx;
ptrs[oidx++] = iname_lab;
#ifdef DLLTOOL_PPC
/* The symbol referring to the code (.text). */
{
asymbol *function_name;
function_name = bfd_make_empty_symbol(abfd);
function_name->name = make_label ("..", exp->name);
function_name->section = secdata[TEXT].sec;
function_name->flags = BSF_GLOBAL;
function_name->value = 0;
fn_pp = ptrs + oidx;
ptrs[oidx++] = function_name;
}
/* The .toc symbol. */
{
asymbol *toc_symbol;
toc_symbol = bfd_make_empty_symbol (abfd);
toc_symbol->name = make_label (".", "toc");
toc_symbol->section = bfd_und_section_ptr;
toc_symbol->flags = BSF_GLOBAL;
toc_symbol->value = 0;
toc_pp = ptrs + oidx;
ptrs[oidx++] = toc_symbol;
}
#endif
ptrs[oidx] = 0;
for (i = 0; i < NSECS; i++)
@ -2629,13 +2498,7 @@ make_one_lib_file (export_type *exp, int i, int delay)
rpp[3] = 0;
}
if (machine == MPPC)
{
rel->howto = bfd_reloc_type_lookup (abfd,
BFD_RELOC_16_GOTOFF);
rel->sym_ptr_ptr = iname_pp;
}
else if (machine == MX86)
if (machine == MX86)
{
rel->howto = bfd_reloc_type_lookup (abfd,
BFD_RELOC_32_PCREL);
@ -2788,114 +2651,6 @@ make_one_lib_file (export_type *exp, int i, int delay)
sec->orelocation = rpp;
sec->reloc_count = 1;
break;
#ifdef DLLTOOL_PPC
case PDATA:
{
/* The .pdata section is 5 words long.
Think of it as:
struct
{
bfd_vma BeginAddress, [0x00]
EndAddress, [0x04]
ExceptionHandler, [0x08]
HandlerData, [0x0c]
PrologEndAddress; [0x10]
}; */
/* So this pdata section setups up this as a glue linkage to
a dll routine. There are a number of house keeping things
we need to do:
1. In the name of glue trickery, the ADDR32 relocs for 0,
4, and 0x10 are set to point to the same place:
"..function_name".
2. There is one more reloc needed in the pdata section.
The actual glue instruction to restore the toc on
return is saved as the offset in an IMGLUE reloc.
So we need a total of four relocs for this section.
3. Lastly, the HandlerData field is set to 0x03, to indicate
that this is a glue routine. */
arelent *imglue, *ba_rel, *ea_rel, *pea_rel;
/* Alignment must be set to 2**2 or you get extra stuff. */
bfd_set_section_alignment (sec, 2);
si->size = 4 * 5;
si->data = xmalloc (si->size);
memset (si->data, 0, si->size);
rpp = xmalloc (sizeof (arelent *) * 5);
rpp[0] = imglue = xmalloc (sizeof (arelent));
rpp[1] = ba_rel = xmalloc (sizeof (arelent));
rpp[2] = ea_rel = xmalloc (sizeof (arelent));
rpp[3] = pea_rel = xmalloc (sizeof (arelent));
rpp[4] = 0;
/* Stick the toc reload instruction in the glue reloc. */
bfd_put_32(abfd, ppc_glue_insn, (char *) &imglue->address);
imglue->addend = 0;
imglue->howto = bfd_reloc_type_lookup (abfd,
BFD_RELOC_32_GOTOFF);
imglue->sym_ptr_ptr = fn_pp;
ba_rel->address = 0;
ba_rel->addend = 0;
ba_rel->howto = bfd_reloc_type_lookup (abfd, BFD_RELOC_32);
ba_rel->sym_ptr_ptr = fn_pp;
bfd_put_32 (abfd, 0x18, si->data + 0x04);
ea_rel->address = 4;
ea_rel->addend = 0;
ea_rel->howto = bfd_reloc_type_lookup (abfd, BFD_RELOC_32);
ea_rel->sym_ptr_ptr = fn_pp;
/* Mark it as glue. */
bfd_put_32 (abfd, 0x03, si->data + 0x0c);
/* Mark the prolog end address. */
bfd_put_32 (abfd, 0x0D, si->data + 0x10);
pea_rel->address = 0x10;
pea_rel->addend = 0;
pea_rel->howto = bfd_reloc_type_lookup (abfd, BFD_RELOC_32);
pea_rel->sym_ptr_ptr = fn_pp;
sec->orelocation = rpp;
sec->reloc_count = 4;
break;
}
case RDATA:
/* Each external function in a PowerPC PE file has a two word
descriptor consisting of:
1. The address of the code.
2. The address of the appropriate .toc
We use relocs to build this. */
si->size = 8;
si->data = xmalloc (8);
memset (si->data, 0, si->size);
rpp = xmalloc (sizeof (arelent *) * 3);
rpp[0] = rel = xmalloc (sizeof (arelent));
rpp[1] = xmalloc (sizeof (arelent));
rpp[2] = 0;
rel->address = 0;
rel->addend = 0;
rel->howto = bfd_reloc_type_lookup (abfd, BFD_RELOC_32);
rel->sym_ptr_ptr = fn_pp;
rel = rpp[1];
rel->address = 4;
rel->addend = 0;
rel->howto = bfd_reloc_type_lookup (abfd, BFD_RELOC_32);
rel->sym_ptr_ptr = toc_pp;
sec->orelocation = rpp;
sec->reloc_count = 2;
break;
#endif /* DLLTOOL_PPC */
}
}
@ -3134,30 +2889,7 @@ make_tail (void)
fprintf (f,"\t%s\t0\n", ASM_LONG); /* NULL terminating list. */
}
#ifdef DLLTOOL_PPC
/* Normally, we need to see a null descriptor built in idata$3 to
act as the terminator for the list. The ideal way, I suppose,
would be to mark this section as a comdat type 2 section, so
only one would appear in the final .exe (if our linker supported
comdat, that is) or cause it to be inserted by something else (say
crt0). */
fprintf (f, "\t.section\t.idata$3\n");
fprintf (f, "\t%s\t0\n", ASM_LONG);
fprintf (f, "\t%s\t0\n", ASM_LONG);
fprintf (f, "\t%s\t0\n", ASM_LONG);
fprintf (f, "\t%s\t0\n", ASM_LONG);
fprintf (f, "\t%s\t0\n", ASM_LONG);
#endif
#ifdef DLLTOOL_PPC
/* Other PowerPC NT compilers use idata$6 for the dllname, so I
do too. Original, huh? */
fprintf (f, "\t.section\t.idata$6\n");
#else
fprintf (f, "\t.section\t.idata$7\n");
#endif
fprintf (f, "\t%s\t__%s_iname\n", ASM_GLOBAL, imp_name_lab);
fprintf (f, "__%s_iname:\t%s\t\"%s\"\n",
imp_name_lab, ASM_TEXT, dll_name);
@ -3463,13 +3195,13 @@ identify_member_contains_symname (bfd * abfd,
}
/* This is the main implementation for the --identify option.
Given the name of an import library in identify_imp_name, first determine
if the import library is a GNU binutils-style one (where the DLL name is
stored in an .idata$7 (.idata$6 on PPC) section, or if it is a MS-style
one (where the DLL name, along with much other data, is stored in the
.idata$6 section). We determine the style of import library by searching
for the DLL-structure symbol inserted by MS tools:
__NULL_IMPORT_DESCRIPTOR.
Given the name of an import library in identify_imp_name, first
determine if the import library is a GNU binutils-style one (where
the DLL name is stored in an .idata$7 section), or if it is a
MS-style one (where the DLL name, along with much other data, is
stored in the .idata$6 section). We determine the style of import
library by searching for the DLL-structure symbol inserted by MS
tools: __NULL_IMPORT_DESCRIPTOR.
Once we know which section to search, evaluate each section for the
appropriate properties that indicate it may contain the name of the
@ -3629,19 +3361,13 @@ identify_search_member (bfd *abfd,
}
/* This predicate returns true if section->name matches the desired value.
By default, this is .idata$7 (.idata$6 on PPC, or if the import
library is ms-style). */
By default, this is .idata$7 (.idata$6 if the import library is
ms-style). */
static bfd_boolean
identify_process_section_p (asection * section, bfd_boolean ms_style_implib)
{
static const char * SECTION_NAME =
#ifdef DLLTOOL_PPC
/* dllname is stored in idata$6 on PPC */
".idata$6";
#else
".idata$7";
#endif
static const char * SECTION_NAME = ".idata$7";
static const char * MS_SECTION_NAME = ".idata$6";
const char * section_name =
@ -3652,7 +3378,7 @@ identify_process_section_p (asection * section, bfd_boolean ms_style_implib)
return FALSE;
}
/* If *section has contents and its name is .idata$7 (.data$6 on PPC or if
/* If *section has contents and its name is .idata$7 (.idata$6 if
import lib ms-generated) -- and it satisfies several other constraints
-- then add the contents of the section to obj->list. */
@ -3938,7 +3664,7 @@ usage (FILE *file, int status)
fprintf (file, _("Usage %s <option(s)> <object-file(s)>\n"), program_name);
/* xgetext:c-format */
fprintf (file, _(" -m --machine <machine> Create as DLL for <machine>. [default: %s]\n"), mname);
fprintf (file, _(" possible <machine>: arm[_interwork], i386, mcore[-elf]{-le|-be}, ppc, thumb\n"));
fprintf (file, _(" possible <machine>: arm[_interwork], i386, mcore[-elf]{-le|-be}, thumb\n"));
fprintf (file, _(" -e --output-exp <outname> Generate an export file.\n"));
fprintf (file, _(" -l --output-lib <outname> Generate an interface library.\n"));
fprintf (file, _(" -y --output-delaylib <outname> Create a delay-import library.\n"));
@ -4372,7 +4098,7 @@ look_for_prog (const char *prog_name, const char *prefix, int end_prefix)
/* Deduce the name of the program we are want to invoke.
PROG_NAME is the basic name of the program we want to run,
eg "as" or "ld". The catch is that we might want actually
run "i386-pe-as" or "ppc-pe-ld".
run "i386-pe-as".
If argv[0] contains the full path, then try to find the program
in the same place, with and then without a target-like prefix.

10
gas/ChangeLog
View File

@ -1,3 +1,13 @@
2020-07-09 Alan Modra <amodra@gmail.com>
* config/obj-coff.h: Remove TE_PE support.
* config/tc-ppc.c: Likewise.
* config/tc-ppc.h: Likewise.
* configure.tgt: Remove powerpc PE and powerpc lynxos.
* testsuite/gas/cfi/cfi.exp (cfi-common-6): Remove powerpc PE
condition.
* testsuite/gas/macros/macros.exp: Don't xfail powerpc PE.
2020-07-08 Jan Beulich <jbeulich@suse.com>
* testsuite/gas/i386/fma4-lig.d, testsuite/gas/i386/xop-lig.d:

4
gas/config/obj-coff.h
View File

@ -41,12 +41,8 @@
#endif
#ifdef TC_PPC
#ifdef TE_PE
#include "coff/powerpc.h"
#else
#include "coff/rs6000.h"
#endif
#endif
#ifdef TC_I386
#ifdef TE_PEP

874
gas/config/tc-ppc.c
View File

@ -31,10 +31,6 @@
#include "dwarf2dbg.h"
#endif
#ifdef TE_PE
#include "coff/pe.h"
#endif
#ifdef OBJ_XCOFF
#include "coff/xcoff.h"
#include "libxcoff.h"
@ -50,12 +46,8 @@ static int set_target_endian = 0;
/* Whether to use user friendly register names. */
#ifndef TARGET_REG_NAMES_P
#ifdef TE_PE
#define TARGET_REG_NAMES_P TRUE
#else
#define TARGET_REG_NAMES_P FALSE
#endif
#endif
/* Macros for calculating LO, HI, HA, HIGHER, HIGHERA, HIGHEST,
HIGHESTA. */
@ -135,20 +127,6 @@ static void ppc_elf_localentry (int);
static void ppc_elf_abiversion (int);
static void ppc_elf_gnu_attribute (int);
#endif
#ifdef TE_PE
static void ppc_previous (int);
static void ppc_pdata (int);
static void ppc_ydata (int);
static void ppc_reldata (int);
static void ppc_rdata (int);
static void ppc_ualong (int);
static void ppc_znop (int);
static void ppc_pe_comm (int);
static void ppc_pe_section (int);
static void ppc_pe_function (int);
static void ppc_pe_tocd (int);
#endif
/* Generic assembler global variables which must be defined by all
targets. */
@ -274,22 +252,6 @@ const pseudo_typeS md_pseudo_table[] =
{ "gnu_attribute", ppc_elf_gnu_attribute, 0},
#endif
#ifdef TE_PE
/* Pseudo-ops specific to the Windows NT PowerPC PE (coff) format. */
{ "previous", ppc_previous, 0 },
{ "pdata", ppc_pdata, 0 },
{ "ydata", ppc_ydata, 0 },
{ "reldata", ppc_reldata, 0 },
{ "rdata", ppc_rdata, 0 },
{ "ualong", ppc_ualong, 0 },
{ "znop", ppc_znop, 0 },
{ "comm", ppc_pe_comm, 0 },
{ "lcomm", ppc_pe_comm, 1 },
{ "section", ppc_pe_section, 0 },
{ "function", ppc_pe_function,0 },
{ "tocd", ppc_pe_tocd, 0 },
#endif
#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
{ "tc", ppc_tc, 0 },
{ "machine", ppc_machine, 0 },
@ -1095,21 +1057,6 @@ static struct dw_section {
} dw_sections[XCOFF_DWSECT_NBR_NAMES];
#endif /* OBJ_XCOFF */
#ifdef TE_PE
/* Various sections that we need for PE coff support. */
static segT ydata_section;
static segT pdata_section;
static segT reldata_section;
static segT rdata_section;
static segT tocdata_section;
/* The current section and the previous section. See ppc_previous. */
static segT ppc_previous_section;
static segT ppc_current_section;
#endif /* TE_PE */
#ifdef OBJ_ELF
symbolS *GOT_symbol; /* Pre-defined "_GLOBAL_OFFSET_TABLE" */
unsigned long *ppc_apuinfo_list;
@ -1552,9 +1499,7 @@ extern const char*
ppc_target_format (void)
{
#ifdef OBJ_COFF
#ifdef TE_PE
return target_big_endian ? "pe-powerpc" : "pe-powerpcle";
#elif TE_POWERMAC
#if TE_POWERMAC
return "xcoff-powermac";
#else
# ifdef TE_AIX5
@ -1950,13 +1895,6 @@ md_begin (void)
ppc_data_csects = symbol_make ("dummy\001");
symbol_get_tc (ppc_data_csects)->within = ppc_data_csects;
#endif
#ifdef TE_PE
ppc_current_section = text_section;
ppc_previous_section = 0;
#endif
}
void
@ -2738,101 +2676,6 @@ ppc_elf_adjust_symtab (void)
}
#endif /* OBJ_ELF */
#ifdef TE_PE
/*
* Summary of parse_toc_entry.
*
* in: Input_line_pointer points to the '[' in one of:
*
* [toc] [tocv] [toc32] [toc64]
*
* Anything else is an error of one kind or another.
*
* out:
* return value: success or failure
* toc_kind: kind of toc reference
* input_line_pointer:
* success: first char after the ']'
* failure: unchanged
*
* settings:
*
* [toc] - rv == success, toc_kind = default_toc
* [tocv] - rv == success, toc_kind = data_in_toc
* [toc32] - rv == success, toc_kind = must_be_32
* [toc64] - rv == success, toc_kind = must_be_64
*
*/
enum toc_size_qualifier
{
default_toc, /* The toc cell constructed should be the system default size */
data_in_toc, /* This is a direct reference to a toc cell */
must_be_32, /* The toc cell constructed must be 32 bits wide */
must_be_64 /* The toc cell constructed must be 64 bits wide */
};
static int
parse_toc_entry (enum toc_size_qualifier *toc_kind)
{
char *start;
char *toc_spec;
char c;
enum toc_size_qualifier t;
/* Save the input_line_pointer. */
start = input_line_pointer;
/* Skip over the '[' , and whitespace. */
++input_line_pointer;
SKIP_WHITESPACE ();
/* Find the spelling of the operand. */
c = get_symbol_name (&toc_spec);
if (strcmp (toc_spec, "toc") == 0)
{
t = default_toc;
}
else if (strcmp (toc_spec, "tocv") == 0)
{
t = data_in_toc;
}
else if (strcmp (toc_spec, "toc32") == 0)
{
t = must_be_32;
}
else if (strcmp (toc_spec, "toc64") == 0)
{
t = must_be_64;
}
else
{
as_bad (_("syntax error: invalid toc specifier `%s'"), toc_spec);
*input_line_pointer = c;
input_line_pointer = start;
return 0;
}
/* Now find the ']'. */
*input_line_pointer = c;
SKIP_WHITESPACE_AFTER_NAME (); /* leading whitespace could be there. */
c = *input_line_pointer++; /* input_line_pointer->past char in c. */
if (c != ']')
{
as_bad (_("syntax error: expected `]', found `%c'"), c);
input_line_pointer = start;
return 0;
}
*toc_kind = t;
return 1;
}
#endif
#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
/* See whether a symbol is in the TOC section. */
@ -2997,7 +2840,7 @@ fixup_size (bfd_reloc_code_real_type reloc, bfd_boolean *pc_relative)
/* This switch statement must handle all BFD_RELOC values
possible in instruction fixups. As is, it handles all
BFD_RELOC values used in bfd/elf64-ppc.c, bfd/elf32-ppc.c,
bfd/coff-ppc, bfd/coff-rs6000.c and bfd/coff64-rs6000.c.
bfd/coff-rs6000.c and bfd/coff64-rs6000.c.
Overkill since data and marker relocs need not be handled
here, but this way we can be sure a needed fixup reloc isn't
accidentally omitted. */
@ -3135,9 +2978,7 @@ fixup_size (bfd_reloc_code_real_type reloc, bfd_boolean *pc_relative)
pcrel = TRUE;
break;
case BFD_RELOC_16_GOT_PCREL: /* coff reloc, bad name re size. */
case BFD_RELOC_32:
case BFD_RELOC_32_GOTOFF:
case BFD_RELOC_32_PLTOFF:
#ifdef OBJ_XCOFF
case BFD_RELOC_CTOR:
@ -3435,137 +3276,22 @@ md_assemble (char *str)
hold = input_line_pointer;
input_line_pointer = str;
#ifdef TE_PE
if (*input_line_pointer == '[')
if ((reg_names_p
&& (((operand->flags & PPC_OPERAND_CR_BIT) != 0)
|| ((operand->flags & PPC_OPERAND_CR_REG) != 0)))
|| !register_name (&ex))
{
/* We are expecting something like the second argument here:
*
* lwz r4,[toc].GS.0.static_int(rtoc)
* ^^^^^^^^^^^^^^^^^^^^^^^^^^^
* The argument following the `]' must be a symbol name, and the
* register must be the toc register: 'rtoc' or '2'
*
* The effect is to 0 as the displacement field
* in the instruction, and issue an IMAGE_REL_PPC_TOCREL16 (or
* the appropriate variation) reloc against it based on the symbol.
* The linker will build the toc, and insert the resolved toc offset.
*
* Note:
* o The size of the toc entry is currently assumed to be
* 32 bits. This should not be assumed to be a hard coded
* number.
* o In an effort to cope with a change from 32 to 64 bits,
* there are also toc entries that are specified to be
* either 32 or 64 bits:
* lwz r4,[toc32].GS.0.static_int(rtoc)
* lwz r4,[toc64].GS.0.static_int(rtoc)
* These demand toc entries of the specified size, and the
* instruction probably requires it.
*/
char save_lex = lex_type['%'];
int valid_toc;
enum toc_size_qualifier toc_kind;
bfd_reloc_code_real_type toc_reloc;
/* Go parse off the [tocXX] part. */
valid_toc = parse_toc_entry (&toc_kind);
if (!valid_toc)
if (((operand->flags & PPC_OPERAND_CR_REG) != 0)
|| (operand->flags & PPC_OPERAND_CR_BIT) != 0)
{
ignore_rest_of_line ();
break;
cr_operand = TRUE;
lex_type['%'] |= LEX_BEGIN_NAME;
}
/* Now get the symbol following the ']'. */
expression (&ex);
switch (toc_kind)
{
case default_toc:
/* In this case, we may not have seen the symbol yet,
since it is allowed to appear on a .extern or .globl
or just be a label in the .data section. */
toc_reloc = BFD_RELOC_PPC_TOC16;
break;
case data_in_toc:
/* 1. The symbol must be defined and either in the toc
section, or a global.
2. The reloc generated must have the TOCDEFN flag set
in upper bit mess of the reloc type.
FIXME: It's a little confusing what the tocv
qualifier can be used for. At the very least, I've
seen three uses, only one of which I'm sure I can
explain. */
if (ex.X_op == O_symbol)
{
gas_assert (ex.X_add_symbol != NULL);
if (symbol_get_bfdsym (ex.X_add_symbol)->section
!= tocdata_section)
{
as_bad (_("[tocv] symbol is not a toc symbol"));
}
}
toc_reloc = BFD_RELOC_PPC_TOC16;
break;
case must_be_32:
/* FIXME: these next two specifically specify 32/64 bit
toc entries. We don't support them today. Is this
the right way to say that? */
toc_reloc = BFD_RELOC_NONE;
as_bad (_("unimplemented toc32 expression modifier"));
break;
case must_be_64:
/* FIXME: see above. */
toc_reloc = BFD_RELOC_NONE;
as_bad (_("unimplemented toc64 expression modifier"));
break;
default:
fprintf (stderr,
_("Unexpected return value [%d] from parse_toc_entry!\n"),
toc_kind);
abort ();
break;
}
/* We need to generate a fixup for this expression. */
if (fc >= MAX_INSN_FIXUPS)
as_fatal (_("too many fixups"));
fixups[fc].reloc = toc_reloc;
fixups[fc].exp = ex;
fixups[fc].opindex = *opindex_ptr;
++fc;
/* Ok. We've set up the fixup for the instruction. Now make it
look like the constant 0 was found here. */
ex.X_unsigned = 1;
ex.X_op = O_constant;
ex.X_add_number = 0;
ex.X_add_symbol = NULL;
ex.X_op_symbol = NULL;
}
else
#endif /* TE_PE */
{
if ((reg_names_p
&& (((operand->flags & PPC_OPERAND_CR_BIT) != 0)
|| ((operand->flags & PPC_OPERAND_CR_REG) != 0)))
|| !register_name (&ex))
{
char save_lex = lex_type['%'];
if (((operand->flags & PPC_OPERAND_CR_REG) != 0)
|| (operand->flags & PPC_OPERAND_CR_BIT) != 0)
{
cr_operand = TRUE;
lex_type['%'] |= LEX_BEGIN_NAME;
}
expression (&ex);
cr_operand = FALSE;
lex_type['%'] = save_lex;
}
cr_operand = FALSE;
lex_type['%'] = save_lex;
}
str = input_line_pointer;
@ -5764,574 +5490,6 @@ ppc_machine (int ignore ATTRIBUTE_UNUSED)
}
#endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */
#ifdef TE_PE
/* Pseudo-ops specific to the Windows NT PowerPC PE (coff) format. */
/* Set the current section. */
static void
ppc_set_current_section (segT new)
{
ppc_previous_section = ppc_current_section;
ppc_current_section = new;
}
/* pseudo-op: .previous
behaviour: toggles the current section with the previous section.
errors: None
warnings: "No previous section" */
static void
ppc_previous (int ignore ATTRIBUTE_UNUSED)
{
if (ppc_previous_section == NULL)
{
as_warn (_("no previous section to return to, ignored."));
return;
}
subseg_set (ppc_previous_section, 0);
ppc_set_current_section (ppc_previous_section);
}
/* pseudo-op: .pdata
behaviour: predefined read only data section
double word aligned
errors: None
warnings: None
initial: .section .pdata "adr3"
a - don't know -- maybe a misprint
d - initialized data
r - readable
3 - double word aligned (that would be 4 byte boundary)
commentary:
Tag index tables (also known as the function table) for exception
handling, debugging, etc. */
static void
ppc_pdata (int ignore ATTRIBUTE_UNUSED)
{
if (pdata_section == 0)
{
pdata_section = subseg_new (".pdata", 0);
bfd_set_section_flags (pdata_section, (SEC_ALLOC | SEC_LOAD | SEC_RELOC
| SEC_READONLY | SEC_DATA));
bfd_set_section_alignment (pdata_section, 2);
}
else
{
pdata_section = subseg_new (".pdata", 0);
}
ppc_set_current_section (pdata_section);
}
/* pseudo-op: .ydata
behaviour: predefined read only data section
double word aligned
errors: None
warnings: None
initial: .section .ydata "drw3"
a - don't know -- maybe a misprint
d - initialized data
r - readable
3 - double word aligned (that would be 4 byte boundary)
commentary:
Tag tables (also known as the scope table) for exception handling,
debugging, etc. */
static void
ppc_ydata (int ignore ATTRIBUTE_UNUSED)
{
if (ydata_section == 0)
{
ydata_section = subseg_new (".ydata", 0);
bfd_set_section_flags (ydata_section, (SEC_ALLOC | SEC_LOAD | SEC_RELOC
| SEC_READONLY | SEC_DATA ));
bfd_set_section_alignment (ydata_section, 3);
}
else
{
ydata_section = subseg_new (".ydata", 0);
}
ppc_set_current_section (ydata_section);
}
/* pseudo-op: .reldata
behaviour: predefined read write data section
double word aligned (4-byte)
FIXME: relocation is applied to it
FIXME: what's the difference between this and .data?
errors: None
warnings: None
initial: .section .reldata "drw3"
d - initialized data
r - readable
w - writable
3 - double word aligned (that would be 8 byte boundary)
commentary:
Like .data, but intended to hold data subject to relocation, such as
function descriptors, etc. */
static void
ppc_reldata (int ignore ATTRIBUTE_UNUSED)
{
if (reldata_section == 0)
{
reldata_section = subseg_new (".reldata", 0);
bfd_set_section_flags (reldata_section, (SEC_ALLOC | SEC_LOAD | SEC_RELOC
| SEC_DATA));
bfd_set_section_alignment (reldata_section, 2);
}
else
{
reldata_section = subseg_new (".reldata", 0);
}
ppc_set_current_section (reldata_section);
}
/* pseudo-op: .rdata
behaviour: predefined read only data section
double word aligned
errors: None
warnings: None
initial: .section .rdata "dr3"
d - initialized data
r - readable
3 - double word aligned (that would be 4 byte boundary) */
static void
ppc_rdata (int ignore ATTRIBUTE_UNUSED)
{
if (rdata_section == 0)
{
rdata_section = subseg_new (".rdata", 0);
bfd_set_section_flags (rdata_section, (SEC_ALLOC | SEC_LOAD | SEC_RELOC
| SEC_READONLY | SEC_DATA ));
bfd_set_section_alignment (rdata_section, 2);
}
else
{
rdata_section = subseg_new (".rdata", 0);
}
ppc_set_current_section (rdata_section);
}
/* pseudo-op: .ualong
behaviour: much like .int, with the exception that no alignment is
performed.
FIXME: test the alignment statement
errors: None
warnings: None */
static void
ppc_ualong (int ignore ATTRIBUTE_UNUSED)
{
/* Try for long. */
cons (4);
}
/* pseudo-op: .znop <symbol name>
behaviour: Issue a nop instruction
Issue a IMAGE_REL_PPC_IFGLUE relocation against it, using
the supplied symbol name.
errors: None
warnings: Missing symbol name */
static void
ppc_znop (int ignore ATTRIBUTE_UNUSED)
{
unsigned long insn;
const struct powerpc_opcode *opcode;
char *f;
symbolS *sym;
char *symbol_name;
char c;
char *name;
/* Strip out the symbol name. */
c = get_symbol_name (&symbol_name);
name = xstrdup (symbol_name);
sym = symbol_find_or_make (name);
*input_line_pointer = c;
SKIP_WHITESPACE_AFTER_NAME ();
/* Look up the opcode in the hash table. */
opcode = (const struct powerpc_opcode *) hash_find (ppc_hash, "nop");
/* Stick in the nop. */
insn = opcode->opcode;
/* Write out the instruction. */
f = frag_more (4);
md_number_to_chars (f, insn, 4);
fix_new (frag_now,
f - frag_now->fr_literal,
4,
sym,
0,
0,
BFD_RELOC_16_GOT_PCREL);
}
/* pseudo-op:
behaviour:
errors:
warnings: */
static void
ppc_pe_comm (int lcomm)
{
char *name;
char c;
char *p;
offsetT temp;
symbolS *symbolP;
offsetT align;
c = get_symbol_name (&name);
/* just after name is now '\0'. */
p = input_line_pointer;
*p = c;
SKIP_WHITESPACE_AFTER_NAME ();
if (*input_line_pointer != ',')
{
as_bad (_("expected comma after symbol-name: rest of line ignored."));
ignore_rest_of_line ();
return;
}
input_line_pointer++; /* skip ',' */
if ((temp = get_absolute_expression ()) < 0)
{
as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) temp);
ignore_rest_of_line ();
return;
}
if (! lcomm)
{
/* The third argument to .comm is the alignment. */
if (*input_line_pointer != ',')
align = 3;
else
{
++input_line_pointer;
align = get_absolute_expression ();
if (align <= 0)
{
as_warn (_("ignoring bad alignment"));
align = 3;
}
}
}
*p = 0;
symbolP = symbol_find_or_make (name);
*p = c;
if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP))
{
as_bad (_("ignoring attempt to re-define symbol `%s'."),
S_GET_NAME (symbolP));
ignore_rest_of_line ();
return;
}
if (S_GET_VALUE (symbolP))
{
if (S_GET_VALUE (symbolP) != (valueT) temp)
as_bad (_("length of .comm \"%s\" is already %ld. Not changed to %ld."),
S_GET_NAME (symbolP),
(long) S_GET_VALUE (symbolP),
(long) temp);
}
else
{
S_SET_VALUE (symbolP, (valueT) temp);
S_SET_EXTERNAL (symbolP);
S_SET_SEGMENT (symbolP, bfd_com_section_ptr);
}
demand_empty_rest_of_line ();
}
/*
* implement the .section pseudo op:
* .section name {, "flags"}
* ^ ^
* | +--- optional flags: 'b' for bss
* | 'i' for info
* +-- section name 'l' for lib
* 'n' for noload
* 'o' for over
* 'w' for data
* 'd' (apparently m88k for data)
* 'x' for text
* But if the argument is not a quoted string, treat it as a
* subsegment number.
*
* FIXME: this is a copy of the section processing from obj-coff.c, with
* additions/changes for the moto-pas assembler support. There are three
* categories:
*
* FIXME: I just noticed this. This doesn't work at all really. It it
* setting bits that bfd probably neither understands or uses. The
* correct approach (?) will have to incorporate extra fields attached
* to the section to hold the system specific stuff. (krk)
*
* Section Contents:
* 'a' - unknown - referred to in documentation, but no definition supplied
* 'c' - section has code
* 'd' - section has initialized data
* 'u' - section has uninitialized data
* 'i' - section contains directives (info)
* 'n' - section can be discarded
* 'R' - remove section at link time
*
* Section Protection:
* 'r' - section is readable
* 'w' - section is writable
* 'x' - section is executable
* 's' - section is sharable
*
* Section Alignment:
* '0' - align to byte boundary
* '1' - align to halfword boundary
* '2' - align to word boundary
* '3' - align to doubleword boundary
* '4' - align to quadword boundary
* '5' - align to 32 byte boundary
* '6' - align to 64 byte boundary
*
*/
void
ppc_pe_section (int ignore ATTRIBUTE_UNUSED)
{
/* Strip out the section name. */
char *section_name;
char c;
char *name;
unsigned int exp;
flagword flags;
segT sec;
int align;
c = get_symbol_name (&section_name);
name = xstrdup (section_name);
*input_line_pointer = c;
SKIP_WHITESPACE_AFTER_NAME ();
exp = 0;
flags = SEC_NO_FLAGS;
if (strcmp (name, ".idata$2") == 0)
{
align = 0;
}
else if (strcmp (name, ".idata$3") == 0)
{
align = 0;
}
else if (strcmp (name, ".idata$4") == 0)
{
align = 2;
}
else if (strcmp (name, ".idata$5") == 0)
{
align = 2;
}
else if (strcmp (name, ".idata$6") == 0)
{
align = 1;
}
else
/* Default alignment to 16 byte boundary. */
align = 4;
if (*input_line_pointer == ',')
{
++input_line_pointer;
SKIP_WHITESPACE ();
if (*input_line_pointer != '"')
exp = get_absolute_expression ();
else
{
++input_line_pointer;
while (*input_line_pointer != '"'
&& ! is_end_of_line[(unsigned char) *input_line_pointer])
{
switch (*input_line_pointer)
{
/* Section Contents */
case 'a': /* unknown */
as_bad (_("unsupported section attribute -- 'a'"));
break;
case 'c': /* code section */
flags |= SEC_CODE;
break;
case 'd': /* section has initialized data */
flags |= SEC_DATA;
break;
case 'u': /* section has uninitialized data */
/* FIXME: This is IMAGE_SCN_CNT_UNINITIALIZED_DATA
in winnt.h */
flags |= SEC_ROM;
break;
case 'i': /* section contains directives (info) */
/* FIXME: This is IMAGE_SCN_LNK_INFO
in winnt.h */
flags |= SEC_HAS_CONTENTS;
break;
case 'n': /* section can be discarded */
flags &=~ SEC_LOAD;
break;
case 'R': /* Remove section at link time */
flags |= SEC_NEVER_LOAD;
break;
#if IFLICT_BRAIN_DAMAGE
/* Section Protection */
case 'r': /* section is readable */
flags |= IMAGE_SCN_MEM_READ;
break;
case 'w': /* section is writable */
flags |= IMAGE_SCN_MEM_WRITE;
break;
case 'x': /* section is executable */
flags |= IMAGE_SCN_MEM_EXECUTE;
break;
case 's': /* section is sharable */
flags |= IMAGE_SCN_MEM_SHARED;
break;
/* Section Alignment */
case '0': /* align to byte boundary */
flags |= IMAGE_SCN_ALIGN_1BYTES;
align = 0;
break;
case '1': /* align to halfword boundary */
flags |= IMAGE_SCN_ALIGN_2BYTES;
align = 1;
break;
case '2': /* align to word boundary */
flags |= IMAGE_SCN_ALIGN_4BYTES;
align = 2;
break;
case '3': /* align to doubleword boundary */
flags |= IMAGE_SCN_ALIGN_8BYTES;
align = 3;
break;
case '4': /* align to quadword boundary */
flags |= IMAGE_SCN_ALIGN_16BYTES;
align = 4;
break;
case '5': /* align to 32 byte boundary */
flags |= IMAGE_SCN_ALIGN_32BYTES;
align = 5;
break;
case '6': /* align to 64 byte boundary */
flags |= IMAGE_SCN_ALIGN_64BYTES;
align = 6;
break;
#endif
default:
as_bad (_("unknown section attribute '%c'"),
*input_line_pointer);
break;
}
++input_line_pointer;
}
if (*input_line_pointer == '"')
++input_line_pointer;
}
}
sec = subseg_new (name, (subsegT) exp);
ppc_set_current_section (sec);
if (flags != SEC_NO_FLAGS)
{
if (!bfd_set_section_flags (sec, flags))
as_bad (_("error setting flags for \"%s\": %s"),
bfd_section_name (sec),
bfd_errmsg (bfd_get_error ()));
}
bfd_set_section_alignment (sec, align);
}
static void
ppc_pe_function (int ignore ATTRIBUTE_UNUSED)
{
char *name;
char endc;
symbolS *ext_sym;
endc = get_symbol_name (&name);
ext_sym = symbol_find_or_make (name);
(void) restore_line_pointer (endc);
S_SET_DATA_TYPE (ext_sym, DT_FCN << N_BTSHFT);
SF_SET_FUNCTION (ext_sym);
SF_SET_PROCESS (ext_sym);
coff_add_linesym (ext_sym);
demand_empty_rest_of_line ();
}
static void
ppc_pe_tocd (int ignore ATTRIBUTE_UNUSED)
{
if (tocdata_section == 0)
{
tocdata_section = subseg_new (".tocd", 0);
/* FIXME: section flags won't work. */
bfd_set_section_flags (tocdata_section, (SEC_ALLOC | SEC_LOAD | SEC_RELOC
| SEC_READONLY | SEC_DATA));
bfd_set_section_alignment (tocdata_section, 2);
}
else
{
rdata_section = subseg_new (".tocd", 0);
}
ppc_set_current_section (tocdata_section);
demand_empty_rest_of_line ();
}
/* Don't adjust TOC relocs to use the section symbol. */
int
ppc_pe_fix_adjustable (fixS *fix)
{
return fix->fx_r_type != BFD_RELOC_PPC_TOC16;
}
#endif
#ifdef OBJ_XCOFF
/* XCOFF specific symbol and file handling. */
@ -7074,8 +6232,6 @@ ppc_fix_adjustable (fixS *fix)
&& fix->fx_r_type != BFD_RELOC_HI16_S_GOTOFF
&& fix->fx_r_type != BFD_RELOC_PPC64_GOT16_DS
&& fix->fx_r_type != BFD_RELOC_PPC64_GOT16_LO_DS
&& fix->fx_r_type != BFD_RELOC_16_GOT_PCREL
&& fix->fx_r_type != BFD_RELOC_32_GOTOFF
&& fix->fx_r_type != BFD_RELOC_PPC64_GOT_PCREL34
&& fix->fx_r_type != BFD_RELOC_24_PLT_PCREL
&& fix->fx_r_type != BFD_RELOC_32_PLTOFF
@ -7928,16 +7084,12 @@ md_apply_fix (fixS *fixP, valueT *valP, segT seg)
fixP->fx_addnumber = 0;
else
{
#ifdef TE_PE
fixP->fx_addnumber = 0;
#else
/* We want to use the offset within the toc, not the actual VMA
of the symbol. */
fixP->fx_addnumber = (- bfd_section_vma (S_GET_SEGMENT (fixP->fx_addsy))
- S_GET_VALUE (ppc_toc_csect));
/* Set *valP to avoid errors. */
*valP = value;
#endif
}
#endif
}

18
gas/config/tc-ppc.h
View File

@ -30,15 +30,10 @@ struct fix;
#define TARGET_BYTES_BIG_ENDIAN 1
#endif
/* If OBJ_COFF is defined, and TE_PE is not defined, we are assembling
XCOFF for AIX or PowerMac. If TE_PE is defined, we are assembling
COFF for Windows NT. */
/* If OBJ_COFF is defined we are assembling XCOFF for AIX or PowerMac. */
#ifdef OBJ_COFF
#ifndef TE_PE
#define OBJ_XCOFF
#endif
#endif
/* The target BFD architecture. */
#define TARGET_ARCH (ppc_arch ())
@ -107,17 +102,6 @@ extern ppc_cpu_t ppc_cpu;
#define TC_INIT_FIX_DATA(FIXP) \
do { (FIXP)->tc_fix_data.ppc_cpu = ppc_cpu; } while (0)
#ifdef TE_PE
/* Question marks are permitted in symbol names. */
#define LEX_QM 1
/* Don't adjust TOC relocs. */
#define tc_fix_adjustable(FIX) ppc_pe_fix_adjustable (FIX)
extern int ppc_pe_fix_adjustable (struct fix *);
#endif
#ifdef OBJ_XCOFF
/* Declarations needed when generating XCOFF code. XCOFF is an

3
gas/configure.tgt
View File

@ -342,8 +342,6 @@ case ${generic_target} in
pj*) fmt=elf ;;
ppc-*-pe | ppc-*-cygwin*) fmt=coff em=pe ;;
ppc-*-winnt*) fmt=coff em=pe ;;
ppc-*-aix5.[01]) fmt=coff em=aix5 ;;
ppc-*-aix[5-9].*) fmt=coff em=aix5 ;;
ppc-*-aix*) fmt=coff em=aix ;;
@ -355,7 +353,6 @@ case ${generic_target} in
ppc-*-macos*) fmt=coff em=macos ;;
ppc-*-nto*) fmt=elf ;;
ppc-*-kaos*) fmt=elf ;;
ppc-*-lynxos*) fmt=elf em=lynx ;;
pru-*-*) fmt=elf ;;

3
gas/testsuite/gas/cfi/cfi.exp
View File

@ -127,8 +127,7 @@ if { ![istarget "hppa64*-*"] } then {
run_dump_test "cfi-common-5"
}
# Some targets don't support PC relative cfi directives
if { ![istarget "mips*-*"] &&
!([istarget powerpc*-*-*] && [is_pecoff_format]) } then {
if { ![istarget "mips*-*"] } then {
run_dump_test "cfi-common-6"
}
run_dump_test "cfi-common-7"

1
gas/testsuite/gas/macros/macros.exp
View File

@ -57,7 +57,6 @@ if { ![istarget hppa*-*-*] || [istarget *-*-linux*] } {
# These fail due to NO_STRING_ESCAPES
setup_xfail "powerpc*-*-aix*" "powerpc*-*-beos*" "powerpc*-*-macos*"
setup_xfail "powerpc*-*-pe" "powerpc*-*-*win*"
setup_xfail "rs6000-*-*"
setup_xfail "z80-*-*"

4
include/ChangeLog
View File

@ -1,3 +1,7 @@
2020-07-09 Alan Modra <amodra@gmail.com>
* coff/powerpc.h: Delete.
2020-07-04 Nick Clifton <nickc@redhat.com>
Binutils 2.35 branch created.

57
include/coff/powerpc.h
View File

@ -1,57 +0,0 @@
/* Basic coff information for the PowerPC
Based on coff/rs6000.h, coff/i386.h and others.
Copyright (C) 2001-2020 Free Software Foundation, Inc.
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
MA 02110-1301, USA.
Initial release: Kim Knuttila (krk@cygnus.com) */
#define L_LNNO_SIZE 2
#define INCLUDE_COMDAT_FIELDS_IN_AUXENT
#include "coff/external.h"
/* Bits for f_flags:
F_RELFLG relocation info stripped from file
F_EXEC file is executable (no unresolved external references)
F_LNNO line numbers stripped from file
F_LSYMS local symbols stripped from file
F_AR32WR file has byte ordering of an AR32WR machine (e.g. vax). */
#define F_RELFLG (0x0001)
#define F_EXEC (0x0002)
#define F_LNNO (0x0004)
#define F_LSYMS (0x0008)
/* extra NT defines */
#define PPCMAGIC 0760 /* peeked on aa PowerPC Windows NT box */
/* from winnt.h */
#define IMAGE_NT_OPTIONAL_HDR_MAGIC 0x10b
#define PPCBADMAG(x) ((x).f_magic != PPCMAGIC)
/********************** RELOCATION DIRECTIVES **********************/
struct external_reloc
{
char r_vaddr[4];
char r_symndx[4];
char r_type[2];
};
#define RELOC struct external_reloc
#define RELSZ 10

12
ld/ChangeLog
View File

@ -1,3 +1,15 @@
2020-07-09 Alan Modra <amodra@gmail.com>
* emulparams/ppcpe.sh: Delete.
* scripttempl/ppcpe.sc: Delete.
* emulparams/ppclynx.sh: Delete.
* Makefile.am (ALL_EMULATION_SOURCES): Remove ppc PE and lynxos.
* configure.tgt: Likewise.
* emultempl/beos.em: Remove powerpc PE support.
* emultempl/pe.em: Likewise.
* po/BLD-POTFILES.in: Regenerate.
* Makefile.in: Regenerate.
2020-07-09 Alan Modra <amodra@gmail.com>
* testsuite/ld-gc/gc.exp: Don't set -mminimal-toc for powerpc64,

4
ld/Makefile.am
View File

@ -342,9 +342,7 @@ ALL_EMULATION_SOURCES = \
epdp11.c \
epjelf.c \
epjlelf.c \
eppclynx.c \
eppcmacos.c \
eppcpe.c \
epruelf.c \
escore3_elf.c \
escore7_elf.c \
@ -828,9 +826,7 @@ $(ALL_EMULATION_SOURCES) $(ALL_64_EMULATION_SOURCES): $(GEN_DEPENDS)
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/epdp11.Pc@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/epjelf.Pc@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/epjlelf.Pc@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eppclynx.Pc@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eppcmacos.Pc@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eppcpe.Pc@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/epruelf.Pc@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/escore3_elf.Pc@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/escore7_elf.Pc@am__quote@

6
ld/Makefile.in
View File

@ -825,9 +825,7 @@ ALL_EMULATION_SOURCES = \
epdp11.c \
epjelf.c \
epjlelf.c \
eppclynx.c \
eppcmacos.c \
eppcpe.c \
epruelf.c \
escore3_elf.c \
escore7_elf.c \
@ -1440,9 +1438,7 @@ distclean-compile:
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/epdp11.Po@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/epjelf.Po@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/epjlelf.Po@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eppclynx.Po@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eppcmacos.Po@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eppcpe.Po@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/epruelf.Po@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/escore3_elf.Po@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/escore7_elf.Po@am__quote@
@ -2423,9 +2419,7 @@ $(ALL_EMULATION_SOURCES) $(ALL_64_EMULATION_SOURCES): $(GEN_DEPENDS)
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/epdp11.Pc@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/epjelf.Pc@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/epjlelf.Pc@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eppclynx.Pc@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eppcmacos.Pc@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eppcpe.Pc@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/epruelf.Pc@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/escore3_elf.Pc@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/escore7_elf.Pc@am__quote@

6
ld/configure.tgt
View File

@ -721,10 +721,6 @@ powerpcle-*-nto*) targ_emul=elf32lppcnto
powerpc-*-macos*) targ_emul=ppcmacos
targ_extra_ofiles=
;;
powerpcle-*-pe | powerpcle-*-winnt* | powerpcle-*-cygwin*)
targ_emul=ppcpe
targ_extra_ofiles="deffilep.o pe-dll.o"
;;
powerpc-*-aix[5-9]*) targ_emul=aix5ppc
targ_extra_ofiles=
;;
@ -736,8 +732,6 @@ powerpc-*-beos*) targ_emul=aixppc
;;
powerpc-*-windiss*) targ_emul=elf32ppcwindiss
;;
powerpc-*-lynxos*) targ_emul=ppclynx
;;
pru*-*-*) targ_emul=pruelf
;;
riscv32*-*-linux*) targ_emul=elf32lriscv

12
ld/emulparams/ppclynx.sh
View File

@ -1,12 +0,0 @@
source_sh ${srcdir}/emulparams/elf32ppc.sh
TEXT_BASE=0x00002000
DYN_TEXT_BASE=0x00400000
TEXT_START_ADDR="(DEFINED(_DYNAMIC) ? ${DYN_TEXT_BASE} : ${TEXT_BASE})"
case ${LD_FLAG} in
n|N) TEXT_START_ADDR=0x1000 ;;
esac
ELF_INTERPRETER_NAME=\"/usr/lib/ld.so.1\"
# Leave room of SIZEOF_HEADERS before text.
EMBEDDED=

7
ld/emulparams/ppcpe.sh
View File

@ -1,7 +0,0 @@
ARCH=powerpc
SCRIPT_NAME=ppcpe
OUTPUT_FORMAT="pei-powerpcle"
TEMPLATE_NAME=pe
SUBSYSTEM=PE_DEF_SUBSYSTEM
INITIAL_SYMBOL_CHAR=\"_\"
TARGET_PAGE_SIZE=0x1000

21
ld/emultempl/beos.em
View File

@ -608,22 +608,6 @@ sort_sections (lang_statement_union_type *s)
static void
gld_${EMULATION_NAME}_before_allocation (void)
{
#ifdef TARGET_IS_ppcpe
/* Here we rummage through the found bfds to collect toc information */
{
LANG_FOR_EACH_INPUT_STATEMENT (is)
{
if (!ppc_process_before_allocation(is->the_bfd, &link_info))
{
einfo (_("%P: errors encountered processing file %s\n"),
is->filename);
}
}
}
/* We have seen it all. Allocate it, and carry on */
ppc_allocate_toc_section (&link_info);
#else
#ifdef TARGET_IS_armpe
/* FIXME: we should be able to set the size of the interworking stub
section.
@ -645,7 +629,6 @@ gld_${EMULATION_NAME}_before_allocation (void)
/* We have seen it all. Allocate it, and carry on */
arm_allocate_interworking_sections (& link_info);
#endif /* TARGET_IS_armpe */
#endif /* TARGET_IS_ppcpe */
sort_sections (stat_ptr->head);
@ -698,9 +681,7 @@ gld${EMULATION_NAME}_place_orphan (asection *s,
os = lang_output_section_statement_lookup (output_secname, constraint, TRUE);
/* Find the '\$' wild statement for this section. We currently require the
linker script to explicitly mention "*(.foo\$)".
FIXME: ppcpe.sc has .CRT\$foo in the .rdata section. According to the
Microsoft docs this isn't correct so it's not (currently) handled. */
linker script to explicitly mention "*(.foo\$)". */
ps[0] = '\$';
ps[1] = 0;

17
ld/emultempl/pe.em
View File

@ -1741,23 +1741,6 @@ gld_${EMULATION_NAME}_after_open (void)
static void
gld_${EMULATION_NAME}_before_allocation (void)
{
#ifdef TARGET_IS_ppcpe
/* Here we rummage through the found bfds to collect toc information. */
{
LANG_FOR_EACH_INPUT_STATEMENT (is)
{
if (!ppc_process_before_allocation (is->the_bfd, &link_info))
{
/* xgettext:c-format */
einfo (_("%P: errors encountered processing file %s\n"), is->filename);
}
}
}
/* We have seen it all. Allocate it, and carry on. */
ppc_allocate_toc_section (&link_info);
#endif /* TARGET_IS_ppcpe */
#if defined(TARGET_IS_armpe) || defined(TARGET_IS_arm_wince_pe)
/* FIXME: we should be able to set the size of the interworking stub
section.

2
ld/po/BLD-POTFILES.in
View File

@ -262,9 +262,7 @@ epc532macha.c
epdp11.c
epjelf.c
epjlelf.c
eppclynx.c
eppcmacos.c
eppcpe.c
epruelf.c
escore3_elf.c
escore7_elf.c

208
ld/scripttempl/ppcpe.sc
View File

@ -1,208 +0,0 @@
# A PE linker script for PowerPC.
# Loosely based on Steve Chamberlain's pe.sc.
# All new mistakes should be credited to Kim Knuttila (krk@cygnus.com)
#
# Copyright (C) 2014-2020 Free Software Foundation, Inc.
#
# Copying and distribution of this file, with or without modification,
# are permitted in any medium without royalty provided the copyright
# notice and this notice are preserved.
#
cat <<EOF
/* Copyright (C) 2014-2020 Free Software Foundation, Inc.
Copying and distribution of this script, with or without modification,
are permitted in any medium without royalty provided the copyright
notice and this notice are preserved. */
OUTPUT_FORMAT(${OUTPUT_FORMAT})
${LIB_SEARCH_DIRS}
/* Much of this layout was determined by delving into .exe files for
the box generated by other compilers/linkers/etc. This means that
if a particular feature did not happen to appear in one of the
subject files, then it may not be yet supported.
*/
/* It's "mainCRTStartup", not "_mainCRTStartup", and it's located in
one of the two .lib files (libc.lib and kernel32.lib) that currently
must be present on the link line. This means that you must use
"-u mainCRTStartup" to make sure it gets included in the link.
*/
${RELOCATING+ENTRY (mainCRTStartup)}
SECTIONS
{
/* text - the usual meaning */
.text ${RELOCATING+ __image_base__ + __section_alignment__ } :
{
${RELOCATING+ KEEP (*(SORT_NONE(.init)))}
*(.text)
${RELOCATING+ *(.text.*)}
*(.gcc_except_table)
${CONSTRUCTING+ ___CTOR_LIST__ = .; __CTOR_LIST__ = . ;
LONG (-1); *(.ctors); *(.ctor); LONG (0); }
${CONSTRUCTING+ ___DTOR_LIST__ = .; __DTOR_LIST__ = . ;
LONG (-1); *(.dtors); *(.dtor); LONG (0); }
${RELOCATING+ KEEP (*(SORT_NONE(.fini)))}
${RELOCATING+ etext = .};
}
/* rdata - Read Only Runtime Data
CTR sections: All of the CRT (read only C runtime data) sections
appear at the start of the .rdata (read only runtime data)
section, in the following order. Don't know if it matters or not.
Not all sections are always present either.
.rdata: compiler generated read only data
.xdata: compiler generated exception handling table. (Most docs
seem to suggest that this section is now deprecated infavor
of the ydata section)
.edata: The exported names table.
*/
.rdata BLOCK(__section_alignment__) :
{
*(.CRT\$XCA);
*(.CRT\$XCC);
*(.CRT\$XCZ);
*(.CRT\$XIA);
*(.CRT\$XIC);
*(.CRT\$XIZ);
*(.CRT\$XLA);
*(.CRT\$XLZ);
*(.CRT\$XPA);
*(.CRT\$XPX);
*(.CRT\$XPZ);
*(.CRT\$XTA);
*(.CRT\$XTZ);
*(.rdata);
*(.xdata);
}
.edata BLOCK(__section_alignment__) :
{
*(.edata);
}
/* data - initialized data
.ydata: exception handling information.
.data: the usual meaning.
.data2: more of the same.
.bss: For some reason, bss appears to be included in the data
section, as opposed to being given a section of it's own.
COMMON:
*/
.data BLOCK(__section_alignment__) :
{
__data_start__ = . ;
*(.ydata);
*(.data);
*(.data2);
__bss_start__ = . ;
*(.bss) ;
*(COMMON);
__bss_end__ = . ;
${RELOCATING+ end = .};
__data_end__ = . ;
}
/* The exception handling table. A sequence of 5 word entries. Section
address and extent are placed in the DataDirectory.
*/
.pdata BLOCK(__section_alignment__) :
{
*(.pdata)
;
}
/* The idata section is chock full of magic bits.
1. Boundaries around various idata parts are used to initialize
some of the fields of the DataDirectory. In particular, the
magic for 2, 4 and 5 are known to be used. Some compilers
appear to generate magic section symbols for this purpose.
Where we can, we catch such symbols and use our own. This of
course is something less than a perfect strategy.
2. The table of contents is placed immediately after idata4.
The ".private.toc" sections are generated by the ppc bfd. The
.toc variable is generated by gas, and resolved here. It is
used to initialized function descriptors (and anyone else who
needs the address of the module's toc). The only thing
interesting about it at all? Most ppc instructions using it
have a 16bit displacement field. The convention for addressing
is to initialize the .toc value to 32K past the start of the
actual toc, and subtract 32K from all references, thus using
the entire 64K range. Naturally, the reloc code must agree
on this number or you get pretty stupid results.
*/
.idata BLOCK(__section_alignment__) :
{
__idata2_magic__ = .;
*(.idata\$2);
__idata3_magic__ = .;
*(.idata\$3);
__idata4_magic__ = .;
*(.idata\$4);
. = ALIGN(4);
.toc = . + 32768;
*(.private.toc);
__idata5_magic__ = .;
*(.idata\$5);
__idata6_magic__ = .;
*(.idata\$6);
__idata7_magic__ = .;
*(.idata\$7);
;
}
/* reldata -- data that requires relocation
*/
.reldata BLOCK(__section_alignment__) :
{
*(.reldata)
;
}
/* Resources */
.rsrc BLOCK(__section_alignment__) :
{
*(.rsrc\$01)
*(.rsrc\$02)
;
}
.stab BLOCK(__section_alignment__) ${RELOCATING+(NOLOAD)} :
{
[ .stab ]
}
.stabstr BLOCK(__section_alignment__) ${RELOCATING+(NOLOAD)} :
{
[ .stabstr ]
}
/* The .reloc section is currently generated by the dlltool from Steve
Chamberlain in a second pass of linking. Section address and extent
are placed in the DataDirectory.
*/
.reloc BLOCK(__section_alignment__) :
{
*(.reloc)
;
}
/* We don't do anything useful with codeview debugger support or the
directive section (yet). Hopefully, we junk them correctly.
*/
/DISCARD/ BLOCK(__section_alignment__) :
{
*(.debug\$S)
*(.debug\$T)
*(.debug\$F)
*(.drectve)
;
}
}
EOF