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Power10 VSX Mask Manipulation Operations
opcodes/ * ppc-opc.c (MP, VXVAM_MASK): Define. (VXVAPS_MASK): Use VXVA_MASK. (powerpc_opcodes): Add mtvsrbmi, vexpandbm, vexpandhm, vexpandwm, vexpanddm, vexpandqm, vextractbm, vextracthm, vextractwm, vextractdm, vextractqm, mtvsrbm, mtvsrhm, mtvsrwm, mtvsrdm, mtvsrqm, vcntmbb, vcntmbh, vcntmbw, vcntmbd. gas/ * testsuite/gas/ppc/maskmanip.d, * testsuite/gas/ppc/maskmanip.s: New test. * testsuite/gas/ppc/ppc.exp: Run it.
This commit is contained in:
Alan Modra
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aa3c112fab
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@ -1,3 +1,9 @@
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2020-05-11 Alan Modra <amodra@gmail.com>
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* testsuite/gas/ppc/maskmanip.d,
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* testsuite/gas/ppc/maskmanip.s: New test.
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* testsuite/gas/ppc/ppc.exp: Run it.
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2020-05-11 Alan Modra <amodra@gmail.com>
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Peter Bergner <bergner@linux.ibm.com>
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30
gas/testsuite/gas/ppc/maskmanip.d
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30
gas/testsuite/gas/ppc/maskmanip.d
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@ -0,0 +1,30 @@
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#as: -mpower10
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#objdump: -dr -Mpower10
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#name: mask manipulation operations
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.*
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Disassembly of section \.text:
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0+0 <_start>:
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.*: (10 10 0e 42|42 0e 10 10) mtvsrbm v0,r1
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.*: (10 51 1e 42|42 1e 51 10) mtvsrhm v2,r3
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.*: (10 92 2e 42|42 2e 92 10) mtvsrwm v4,r5
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.*: (10 d3 3e 42|42 3e d3 10) mtvsrdm v6,r7
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.*: (11 14 4e 42|42 4e 14 11) mtvsrqm v8,r9
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.*: (11 5a 12 14|14 12 5a 11) mtvsrbmi v10,4660
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.*: (11 60 66 42|42 66 60 11) vexpandbm v11,v12
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.*: (11 a1 76 42|42 76 a1 11) vexpandhm v13,v14
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.*: (11 e2 86 42|42 86 e2 11) vexpandwm v15,v16
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.*: (12 23 96 42|42 96 23 12) vexpanddm v17,v18
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.*: (12 64 a6 42|42 a6 64 12) vexpandqm v19,v20
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.*: (12 a8 b6 42|42 b6 a8 12) vextractbm r21,v22
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.*: (12 e9 c6 42|42 c6 e9 12) vextracthm r23,v24
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.*: (13 2a d6 42|42 d6 2a 13) vextractwm r25,v26
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.*: (13 6b e6 42|42 e6 6b 13) vextractdm r27,v28
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.*: (13 ac f6 42|42 f6 ac 13) vextractqm r29,v30
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.*: (13 f8 06 42|42 06 f8 13) vcntmbb r31,v0,0
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.*: (13 db 0e 42|42 0e db 13) vcntmbh r30,v1,1
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.*: (13 bd 16 42|42 16 bd 13) vcntmbw r29,v2,1
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.*: (13 9e 1e 42|42 1e 9e 13) vcntmbd r28,v3,0
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22
gas/testsuite/gas/ppc/maskmanip.s
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22
gas/testsuite/gas/ppc/maskmanip.s
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@ -0,0 +1,22 @@
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.text
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_start:
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mtvsrbm 0,1
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mtvsrhm 2,3
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mtvsrwm 4,5
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mtvsrdm 6,7
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mtvsrqm 8,9
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mtvsrbmi 10,0x1234
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vexpandbm 11,12
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vexpandhm 13,14
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vexpandwm 15,16
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vexpanddm 17,18
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vexpandqm 19,20
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vextractbm 21,22
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vextracthm 23,24
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vextractwm 25,26
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vextractdm 27,28
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vextractqm 29,30
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vcntmbb 31,0,0
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vcntmbh 30,1,1
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vcntmbw 29,2,1
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vcntmbd 28,3,0
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@ -138,3 +138,4 @@ run_dump_test "vsx_32byte"
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run_dump_test "int128"
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run_dump_test "simd_perm"
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run_dump_test "outerprod"
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run_dump_test "maskmanip"
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@ -1,3 +1,12 @@
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2020-05-11 Alan Modra <amodra@gmail.com>
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* ppc-opc.c (MP, VXVAM_MASK): Define.
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(VXVAPS_MASK): Use VXVA_MASK.
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(powerpc_opcodes): Add mtvsrbmi, vexpandbm, vexpandhm, vexpandwm,
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vexpanddm, vexpandqm, vextractbm, vextracthm, vextractwm,
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vextractdm, vextractqm, mtvsrbm, mtvsrhm, mtvsrwm, mtvsrdm, mtvsrqm,
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vcntmbb, vcntmbh, vcntmbw, vcntmbd.
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2020-05-11 Alan Modra <amodra@gmail.com>
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Peter Bergner <bergner@linux.ibm.com>
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@ -2886,6 +2886,7 @@ const struct powerpc_operand powerpc_operands[] =
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{ 0x3, 9, NULL, NULL, 0 },
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#define R RMC + 1
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#define MP R
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{ 0x1, 16, NULL, NULL, 0 },
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#define RIC R + 1
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@ -3492,7 +3493,10 @@ const unsigned int num_powerpc_operands = (sizeof (powerpc_operands)
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#define VXPS_MASK (VX_MASK & ~(0x1 << 9))
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/* A VX_MASK with the VA field fixed with a PS field. */
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#define VXVAPS_MASK ((VX_MASK | (0x1f << 16)) & ~(0x1 << 9))
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#define VXVAPS_MASK (VXVA_MASK & ~(0x1 << 9))
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/* A VX_MASK with the VA field fixed with a MP field. */
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#define VXVAM_MASK (VXVA_MASK & ~(0x1 << 16))
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/* A VX_MASK for instructions using a BF field. */
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#define VXBF_MASK (VX_MASK | (3 << 21))
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@ -4114,6 +4118,7 @@ const struct powerpc_opcode powerpc_opcodes[] = {
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{"vinsbvlx", VX (4, 15), VX_MASK, POWER10, 0, {VD, RA, VB}},
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{"mulhhwu", XRC(4, 8,0), X_MASK, MULHW, 0, {RT, RA, RB}},
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{"mulhhwu.", XRC(4, 8,1), X_MASK, MULHW, 0, {RT, RA, RB}},
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{"mtvsrbmi", DX (4,10), DX_MASK, POWER10, 0, {VD, DXD}},
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{"ps_sum0", A (4, 10,0), A_MASK, PPCPS, 0, {FRT, FRA, FRC, FRB}},
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{"ps_sum0.", A (4, 10,1), A_MASK, PPCPS, 0, {FRT, FRA, FRC, FRB}},
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{"vsldbi", VX (4, 22), VXSH_MASK, POWER10, 0, {VD, VA, VB, SH3}},
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@ -4898,6 +4903,27 @@ const struct powerpc_opcode powerpc_opcodes[] = {
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{"vmoduq", VX (4,1547), VX_MASK, POWER10, 0, {VD, VA, VB}},
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{"vextublx", VX (4,1549), VX_MASK, PPCVEC3, 0, {RT, RA, VB}},
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{"vsubuhs", VX (4,1600), VX_MASK, PPCVEC, 0, {VD, VA, VB}},
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{"vexpandbm", VXVA(4,1602,0), VXVA_MASK, POWER10, 0, {VD, VB}},
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{"vexpandhm", VXVA(4,1602,1), VXVA_MASK, POWER10, 0, {VD, VB}},
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{"vexpandwm", VXVA(4,1602,2), VXVA_MASK, POWER10, 0, {VD, VB}},
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{"vexpanddm", VXVA(4,1602,3), VXVA_MASK, POWER10, 0, {VD, VB}},
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{"vexpandqm", VXVA(4,1602,4), VXVA_MASK, POWER10, 0, {VD, VB}},
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{"vextractbm", VXVA(4,1602,8), VXVA_MASK, POWER10, 0, {RT, VB}},
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{"vextracthm", VXVA(4,1602,9), VXVA_MASK, POWER10, 0, {RT, VB}},
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{"vextractwm", VXVA(4,1602,10), VXVA_MASK, POWER10, 0, {RT, VB}},
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{"vextractdm", VXVA(4,1602,11), VXVA_MASK, POWER10, 0, {RT, VB}},
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{"vextractqm", VXVA(4,1602,12), VXVA_MASK, POWER10, 0, {RT, VB}},
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{"mtvsrbm", VXVA(4,1602,16), VXVA_MASK, POWER10, 0, {VD, RB}},
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{"mtvsrhm", VXVA(4,1602,17), VXVA_MASK, POWER10, 0, {VD, RB}},
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{"mtvsrwm", VXVA(4,1602,18), VXVA_MASK, POWER10, 0, {VD, RB}},
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{"mtvsrdm", VXVA(4,1602,19), VXVA_MASK, POWER10, 0, {VD, RB}},
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{"mtvsrqm", VXVA(4,1602,20), VXVA_MASK, POWER10, 0, {VD, RB}},
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{"vcntmbb", VXVA(4,1602,24), VXVAM_MASK, POWER10, 0, {RT, VB, MP}},
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{"vcntmbh", VXVA(4,1602,26), VXVAM_MASK, POWER10, 0, {RT, VB, MP}},
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{"vcntmbw", VXVA(4,1602,28), VXVAM_MASK, POWER10, 0, {RT, VB, MP}},
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{"vcntmbd", VXVA(4,1602,30), VXVAM_MASK, POWER10, 0, {RT, VB, MP}},
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{"mtvscr", VX (4,1604), VXVDVA_MASK, PPCVEC, 0, {VB}},
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{"vcmpgtuh.", VXR(4, 582,1), VXR_MASK, PPCVEC, 0, {VD, VA, VB}},
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{"vsum4shs", VX (4,1608), VX_MASK, PPCVEC, 0, {VD, VA, VB}},
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