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Add support for marking ARM ELF binaries as support the Cirrus EP9312 Maverick

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floating point co-processor.
This commit is contained in:
Nick Clifton 2003-02-10 10:44:48 +00:00
parent 469def5365
commit fde78edd7a
11 changed files with 68 additions and 5 deletions
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11
bfd/ChangeLog
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@ -1,3 +1,14 @@
2003-02-10 Nick Clifton <nickc@redhat.com>
* archures.c (bfd_mach_arm_ep9312): Define.
* bfd-in2.h: Regenerate.
* cpu-arm.c (processors[]): Add ep9312.
(bfd_arm_arch): Add ep9312.
* elf32-arm.h (elf32_arm_merge_private_data): Update error
messages and add test for Maverick floating point support.
(elf32_arm_print_private_bfd_data): Handle
EF_ARM_MAVERICK_FLOAT flag.
2003-02-10 Alan Modra <amodra@bigpond.net.au>
* elf64-ppc.c: Rename assorted occurrences of tls_type and similar

1
bfd/archures.c
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@ -234,6 +234,7 @@ DESCRIPTION
.#define bfd_mach_arm_5T 8
.#define bfd_mach_arm_5TE 9
.#define bfd_mach_arm_XScale 10
.#define bfd_mach_arm_ep9312 11
. bfd_arch_ns32k, {* National Semiconductors ns32000 *}
. bfd_arch_w65, {* WDC 65816 *}
. bfd_arch_tic30, {* Texas Instruments TMS320C30 *}

1
bfd/bfd-in2.h
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@ -1689,6 +1689,7 @@ enum bfd_architecture
#define bfd_mach_arm_5T 8
#define bfd_mach_arm_5TE 9
#define bfd_mach_arm_XScale 10
#define bfd_mach_arm_ep9312 11
bfd_arch_ns32k, /* National Semiconductors ns32000 */
bfd_arch_w65, /* WDC 65816 */
bfd_arch_tic30, /* Texas Instruments TMS320C30 */

6
bfd/cpu-arm.c
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@ -95,7 +95,8 @@ processors[] =
{ bfd_mach_arm_4, "strongarm"},
{ bfd_mach_arm_4, "strongarm110" },
{ bfd_mach_arm_4, "strongarm1100" },
{ bfd_mach_arm_XScale, "xscale" }
{ bfd_mach_arm_XScale, "xscale" },
{ bfd_mach_arm_ep9312, "ep9312" }
};
static bfd_boolean
@ -140,7 +141,8 @@ static const bfd_arch_info_type arch_info_struct[] =
N (bfd_mach_arm_5, "armv5", FALSE, & arch_info_struct[7]),
N (bfd_mach_arm_5T, "armv5t", FALSE, & arch_info_struct[8]),
N (bfd_mach_arm_5TE, "armv5te", FALSE, & arch_info_struct[9]),
N (bfd_mach_arm_XScale, "xscale", FALSE, NULL)
N (bfd_mach_arm_XScale, "xscale", FALSE, & arch_info_struct[10]),
N (bfd_mach_arm_ep9312, "ep9312", FALSE, NULL)
};
const bfd_arch_info_type bfd_arm_arch =

25
bfd/elf32-arm.h
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@ -2310,12 +2310,28 @@ ERROR: %s passes floats in integer registers, whereas %s passes them in float re
{
if (in_flags & EF_ARM_VFP_FLOAT)
_bfd_error_handler (_("\
ERROR: %s uses VFP instructions, whereas %s uses FPA instructions"),
ERROR: %s uses VFP instructions, whereas %s does not"),
bfd_archive_filename (ibfd),
bfd_get_filename (obfd));
else
_bfd_error_handler (_("\
ERROR: %s uses FPA instructions, whereas %s uses VFP instructions"),
ERROR: %s uses FPA instructions, whereas %s does not"),
bfd_archive_filename (ibfd),
bfd_get_filename (obfd));
flags_compatible = FALSE;
}
if ((in_flags & EF_ARM_MAVERICK_FLOAT) != (out_flags & EF_ARM_MAVERICK_FLOAT))
{
if (in_flags & EF_ARM_MAVERICK_FLOAT)
_bfd_error_handler (_("\
ERROR: %s uses Maverick instructions, whereas %s does not"),
bfd_archive_filename (ibfd),
bfd_get_filename (obfd));
else
_bfd_error_handler (_("\
ERROR: %s uses Maverick instructions, whereas %s does not"),
bfd_archive_filename (ibfd),
bfd_get_filename (obfd));
@ -2410,6 +2426,8 @@ elf32_arm_print_private_bfd_data (abfd, ptr)
if (flags & EF_ARM_VFP_FLOAT)
fprintf (file, _(" [VFP float format]"));
else if (flags & EF_ARM_MAVERICK_FLOAT)
fprintf (file, _(" [Maverick float format]"));
else
fprintf (file, _(" [FPA float format]"));
@ -2430,7 +2448,8 @@ elf32_arm_print_private_bfd_data (abfd, ptr)
flags &= ~(EF_ARM_INTERWORK | EF_ARM_APCS_26 | EF_ARM_APCS_FLOAT
| EF_ARM_PIC | EF_ARM_NEW_ABI | EF_ARM_OLD_ABI
| EF_ARM_SOFT_FLOAT | EF_ARM_VFP_FLOAT);
| EF_ARM_SOFT_FLOAT | EF_ARM_VFP_FLOAT
| EF_ARM_MAVERICK_FLOAT);
break;
case EF_ARM_EABI_VER1:

5
binutils/ChangeLog
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@ -1,3 +1,8 @@
2003-02-10 Nick Clifton <nickc@redhat.com>
* readelf.c (decode_ARM_machine_flags): Handle the
EF_ARM_MAVERICK_FLOAT flag.
2003-02-04 Andreas Schwab <schwab@suse.de>
* rddbg.c (read_section_stabs_debugging_info): Cast ptrdiff_t to

4
binutils/readelf.c
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@ -1873,6 +1873,10 @@ decode_ARM_machine_flags (e_flags, buf)
strcat (buf, ", software FP");
break;
case EF_ARM_MAVERICK_FLOAT:
strcat (buf, ", Maverick FP");
break;
default:
unknown = 1;
break;

6
gas/ChangeLog
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@ -1,3 +1,9 @@
2003-02-10 Nick Clifton <nickc@redhat.com>
* config/tc-arm.c (md_begin): If the Maverick co-processor is
selected, set the EF_ARM_MAVERICK_FLOAT flag and
bfd_mach_arm_ep9312 machine number.
2003-02-08 Richard Sandiford <rsandifo@redhat.com>
* config/tc-mips.c (reloc_needs_lo_p): New function.

9
gas/config/tc-arm.c
View File

@ -9278,6 +9278,13 @@ md_begin ()
/* Using VFP conventions (even if soft-float). */
if (cpu_variant & FPU_VFP_EXT_NONE) flags |= F_VFP_FLOAT;
#if defined OBJ_ELF
if (cpu_variant & ARM_CEXT_MAVERICK)
{
flags ^= F_SOFT_FLOAT;
flags |= EF_ARM_MAVERICK_FLOAT;
}
#endif
bfd_set_private_flags (stdoutput, flags);
@ -9324,6 +9331,8 @@ md_begin ()
/* Catch special cases. */
if (cpu_variant & ARM_CEXT_XSCALE)
mach = bfd_mach_arm_XScale;
else if (cpu_variant & ARM_CEXT_MAVERICK)
mach = bfd_mach_arm_ep9312;
else if (cpu_variant & ARM_EXT_V5E)
mach = bfd_mach_arm_5TE;
else if (cpu_variant & ARM_EXT_V5)

4
include/elf/ChangeLog
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@ -1,3 +1,7 @@
2003-02-10 Nick Clifton <nickc@redhat.com>
* arm.h (EF_ARM_MAVERICK_FLOAT): Define.
2003-02-05 Alan Modra <amodra@bigpond.net.au>
* ppc.h: Add TLS relocs. Format.

1
include/elf/arm.h
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@ -34,6 +34,7 @@
#define EF_ARM_OLD_ABI 0x100
#define EF_ARM_SOFT_FLOAT 0x200
#define EF_ARM_VFP_FLOAT 0x400
#define EF_ARM_MAVERICK_FLOAT 0x800
/* Other constants defined in the ARM ELF spec. version B-01. */
#define EF_ARM_SYMSARESORTED 0x04 /* NB conflicts with EF_INTERWORK */