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gas/testsuite/

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2008-01-15  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/prescott.s: Add tests for movddup in Intel syntax.
	* gas/i386/x86-64-prescott.s: Likewise.

	* gas/i386/prescott.d: Updated.
	* gas/i386/x86-64-prescott.d: Likewise.

opcodes/

2008-01-15  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-opc.tbl: Use Qword on movddup.
	* i386-tbl.h: Regenerated.
This commit is contained in:
H.J. Lu 2008-01-16 00:05:56 +00:00
parent 38177b2923
commit fd07a1c880
8 changed files with 27 additions and 6 deletions
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8
gas/testsuite/ChangeLog
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@ -1,3 +1,11 @@
2008-01-15 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/prescott.s: Add tests for movddup in Intel syntax.
* gas/i386/x86-64-prescott.s: Likewise.
* gas/i386/prescott.d: Updated.
* gas/i386/x86-64-prescott.d: Likewise.
2008-01-15 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/i386.s: Add more tests for movsx and movzx.

4
gas/testsuite/gas/i386/prescott.d
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@ -34,4 +34,6 @@ Disassembly of section .text:
69: 0f 01 c9 [ ]*mwait %eax,%ecx
6c: 67 0f 01 c8 [ ]*monitor %ax,%ecx,%edx
70: 67 0f 01 c8 [ ]*monitor %ax,%ecx,%edx
...
74: f2 0f 12 38 [ ]*movddup \(%eax\),%xmm7
78: f2 0f 12 38 [ ]*movddup \(%eax\),%xmm7
#pass

4
gas/testsuite/gas/i386/prescott.s
View File

@ -32,4 +32,6 @@ foo:
monitor %ax,%ecx,%edx
addr16 monitor
.p2align 4,0
.intel_syntax noprefix
movddup xmm7,[eax]
movddup xmm7,QWORD PTR [eax]

4
gas/testsuite/gas/i386/x86-64-prescott.d
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@ -34,4 +34,6 @@ Disassembly of section .text:
69: 0f 01 c9 [ ]*mwait %rax,%rcx
6c: 67 0f 01 c8 [ ]*monitor %eax,%rcx,%rdx
70: 67 0f 01 c8 [ ]*monitor %eax,%rcx,%rdx
...
74: f2 0f 12 38 [ ]*movddup \(%rax\),%xmm7
78: f2 0f 12 38 [ ]*movddup \(%rax\),%xmm7
#pass

4
gas/testsuite/gas/i386/x86-64-prescott.s
View File

@ -32,4 +32,6 @@ foo:
monitor %eax,%rcx,%rdx
addr32 monitor
.p2align 4,0
.intel_syntax noprefix
movddup xmm7,[rax]
movddup xmm7,QWORD PTR [rax]

5
opcodes/ChangeLog
View File

@ -1,3 +1,8 @@
2008-01-15 H.J. Lu <hongjiu.lu@intel.com>
* i386-opc.tbl: Use Qword on movddup.
* i386-tbl.h: Regenerated.
2008-01-15 H.J. Lu <hongjiu.lu@intel.com>
* i386-opc.tbl: Put back 16bit movsx/movzx for AT&T syntax.

2
opcodes/i386-opc.tbl
View File

@ -1275,7 +1275,7 @@ monitor, 0, 0xf01, 0xc8, 2, CpuSSE3, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_
monitor, 3, 0xf01, 0xc8, 2, CpuSSE3|CpuNo64, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ImmExt|AddrPrefixOp0, { Reg16|Reg32, Reg32, Reg32 }
// Need to ensure only "monitor %rax/%eax,%rcx,%rdx" is accepted.
monitor, 3, 0xf01, 0xc8, 2, CpuSSE3|Cpu64, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ImmExt|AddrPrefixOp0|NoRex64, { Reg32|Reg64, Reg64, Reg64 }
movddup, 2, 0xf20f12, None, 2, CpuSSE3, Modrm|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Xmmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM, RegXMM }
movddup, 2, 0xf20f12, None, 2, CpuSSE3, Modrm|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Qword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM, RegXMM }
movshdup, 2, 0xf30f16, None, 2, CpuSSE3, Modrm|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Xmmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM, RegXMM }
movsldup, 2, 0xf30f12, None, 2, CpuSSE3, Modrm|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Xmmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM, RegXMM }
mwait, 0, 0xf01, 0xc9, 2, CpuSSE3, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ImmExt, { 0 }

2
opcodes/i386-tbl.h
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@ -10919,7 +10919,7 @@ const template i386_optab[] =
1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0 },
{ { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,
1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1,
1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0,
1, 0, 0 } },
{ { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,