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gdb/arm: Fix prologue analysis to support vpush

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While working on adding support for Non-secure/Secure modes unwinding,
I noticed that the prologue analysis lacked support for vpush, which
is used for instance in the CMSE stub routine.

This patch updates thumb_analyze_prologue accordingly, adding support
for vpush of D-registers.

Signed-off-by: Christophe Lyon <christophe.lyon@foss.st.com>
Signed-off-by: Christophe Lyon <christophe.lyon@arm.com>
This commit is contained in:
Christophe Lyon 2022-04-01 10:21:58 +01:00
parent 41b96eef5f
commit fcaa1071d7
1 changed files with 29 additions and 0 deletions
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29
gdb/arm-tdep.c
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@ -902,6 +902,35 @@ thumb_analyze_prologue (struct gdbarch *gdbarch,
regs[bits (insn, 0, 3)] = addr;
}
/* vstmdb Rn{!}, { D-registers } (aka vpush). */
else if ((insn & 0xff20) == 0xed20
&& (inst2 & 0x0f00) == 0x0b00
&& pv_is_register (regs[bits (insn, 0, 3)], ARM_SP_REGNUM))
{
/* Address SP points to. */
pv_t addr = regs[bits (insn, 0, 3)];
/* Number of registers saved. */
unsigned int number = bits (inst2, 0, 7) >> 1;
/* First register to save. */
int vd = bits (inst2, 12, 15) | (bits (insn, 6, 6) << 4);
if (stack.store_would_trash (addr))
break;
/* Calculate offsets of saved registers. */
for (; number > 0; number--)
{
addr = pv_add_constant (addr, -8);
stack.store (addr, 8, pv_register (ARM_D0_REGNUM
+ vd + number, 0));
}
/* Writeback SP to account for the saved registers. */
regs[bits (insn, 0, 3)] = addr;
}
else if ((insn & 0xff50) == 0xe940 /* strd Rt, Rt2,
[Rn, #+/-imm]{!} */
&& pv_is_register (regs[bits (insn, 0, 3)], ARM_SP_REGNUM))