* config/bfin-defs.h (F_REG_ALL): Remove macro.

(F_REG_HIGH): Redefine.
	(F_REG_NONE): New macro.
	(F_REG_LOW): New macro.
	(REG_CLASS): Enclose macro argument in parentheses when used.
	(REG_EVEN): Likewise.
	(IS_H): Use flags.
	(IS_HCOMPL): Use flags.
	* config/bfin-lex.l (SP.L, SP.H, FP.L, FP.H): Set flags.
	(parse_reg): Set flags.
	(parse_halfreg): Set flags.
This commit is contained in:
Jie Zhang 2009-09-03 17:06:38 +00:00
parent 118176876b
commit f31bf2c696
3 changed files with 28 additions and 11 deletions

View File

@ -1,3 +1,17 @@
2009-09-03 Jie Zhang <jie.zhang@analog.com>
* config/bfin-defs.h (F_REG_ALL): Remove macro.
(F_REG_HIGH): Redefine.
(F_REG_NONE): New macro.
(F_REG_LOW): New macro.
(REG_CLASS): Enclose macro argument in parentheses when used.
(REG_EVEN): Likewise.
(IS_H): Use flags.
(IS_HCOMPL): Use flags.
* config/bfin-lex.l (SP.L, SP.H, FP.L, FP.H): Set flags.
(parse_reg): Set flags.
(parse_halfreg): Set flags.
2009-09-03 Jie Zhang <jie.zhang@analog.com>
* config/bfin-parse.y (gen_multi_instr_1): Check anomaly

View File

@ -82,8 +82,9 @@ typedef enum
#define T_NOGROUP 0xa0
/* Flags. */
#define F_REG_ALL 0x1000
#define F_REG_HIGH 0x2000 /* Half register: high half. */
#define F_REG_NONE 0
#define F_REG_HIGH 1
#define F_REG_LOW 2
enum machine_registers
{
@ -180,12 +181,12 @@ enum reg_class
#define REG_SAME(a, b) ((a).regno == (b).regno)
#define REG_EQUAL(a, b) (((a).regno & CODE_MASK) == ((b).regno & CODE_MASK))
#define REG_CLASS(a) ((a.regno) & 0xf0)
#define REG_CLASS(a) ((a).regno & 0xf0)
#define IS_A1(a) ((a).regno == REG_A1)
#define IS_H(a) ((a).regno & F_REG_HIGH ? 1: 0)
#define IS_EVEN(r) (r.regno % 2 == 0)
#define IS_H(a) ((a).flags & F_REG_HIGH ? 1: 0)
#define IS_EVEN(r) ((r).regno % 2 == 0)
#define IS_HCOMPL(a, b) (REG_EQUAL(a, b) && \
((a).regno & F_REG_HIGH) != ((b).regno & F_REG_HIGH))
((a).flags & F_REG_HIGH) != ((b).flags & F_REG_HIGH))
/* register type checking. */
#define _TYPECHECK(r, x) (((r).regno & CLASS_MASK) == T_REG_##x)

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@ -63,8 +63,8 @@ int yylex (void);
[sS][yY][sS][cC][fF][gG] _REG.regno = REG_SYSCFG; return REG;
[sS][tT][iI] return STI;
[sS][sS][yY][nN][cC] return SSYNC;
[sS][pP]"."[lL] _REG.regno = REG_SP; return HALF_REG;
[sS][pP]"."[hH] _REG.regno = REG_SP | F_REG_HIGH; return HALF_REG;
[sS][pP]"."[lL] _REG.regno = REG_SP; _REG.flags = F_REG_LOW; return HALF_REG;
[sS][pP]"."[hH] _REG.regno = REG_SP; _REG.flags = F_REG_HIGH; return HALF_REG;
[sS][pP] _REG.regno = REG_SP; return REG;
[sS][iI][gG][nN][bB][iI][tT][sS] return SIGNBITS;
[sS][iI][gG][nN] return SIGN;
@ -158,8 +158,8 @@ int yylex (void);
[gG][eE] return GE;
[fF][uU] yylval.value = M_FU; return MMOD;
[fF][pP] _REG.regno = REG_FP; return REG;
[fF][pP]"."[lL] _REG.regno = REG_FP; return HALF_REG;
[fF][pP]"."[hH] _REG.regno = REG_FP | F_REG_HIGH; return HALF_REG;
[fF][pP]"."[lL] _REG.regno = REG_FP; _REG.flags = F_REG_LOW; return HALF_REG;
[fF][pP]"."[hH] _REG.regno = REG_FP; _REG.flags = F_REG_HIGH; return HALF_REG;
[eE][xX][tT][rR][aA][cC][tT] return EXTRACT;
[eE][xX][pP][aA][dD][jJ] return EXPADJ;
@ -509,6 +509,7 @@ static long parse_int (char **end)
static int parse_reg (Register *r, int cl, char *rt)
{
r->regno = cl | (rt[1] - '0');
r->flags = F_REG_NONE;
return REG;
}
@ -524,11 +525,12 @@ static int parse_halfreg (Register *r, int cl, char *rt)
case 'l':
case 'L':
r->flags = F_REG_LOW;
break;
case 'h':
case 'H':
r->regno |= F_REG_HIGH;
r->flags = F_REG_HIGH;
break;
}