Rewrite prefix processing.

gas/testsuite/

2009-11-13  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/i386.exp: Run long-1, long-1-intel, x86-64-long-1,
	and x86-64-long-1-intel.

	* gas/i386/long-1-intel.d: New.
	* gas/i386/long-1.d: Likewise.
	* gas/i386/long-1.s: Likewise.
	* gas/i386/x86-64-long-1-intel.d: Likewise.
	* gas/i386/x86-64-long-1.d: Likewise.
	* gas/i386/x86-64-long-1.s: Likewise.

	* gas/i386/jump16.d: Updated for prefix processing.
	* gas/i386/naked.d: Likewise.
	* gas/i386/nops-1-core2.d: Likewise.
	* gas/i386/nops-1-i686.d: Likewise.
	* gas/i386/nops-3-i686.d: Likewise.
	* gas/i386/nops-4-i686.d: Likewise.
	* gas/i386/nops-5-i686.d: Likewise.
	* gas/i386/nops-5.d: Likewise.
	* gas/i386/prefix.d: Likewise.
	* gas/i386/rep.d: Likewise.
	* gas/i386/string-ok.d: Likewise.
	* gas/i386/x86-64-addr32-intel.d: Likewise.
	* gas/i386/x86-64-addr32.d: Likewise.
	* gas/i386/x86-64-cbw-intel.d: Likewise.
	* gas/i386/x86-64-cbw.d: Likewise.
	* gas/i386/x86-64-io-intel.d: Likewise.
	* gas/i386/x86-64-io-suffix.d: Likewise.
	* gas/i386/x86-64-io.d: Likewise.
	* gas/i386/x86-64-lwp.d: Likewise.
	* gas/i386/x86-64-nops-1-core2.d: Likewise.
	* gas/i386/x86-64-nops-1-nocona.d: Likewise.
	* gas/i386/x86-64-nops-1.d: Likewise.
	* gas/i386/x86-64-nops-2.d: Likewise.
	* gas/i386/x86-64-nops-3.d: Likewise.
	* gas/i386/x86-64-nops-4-core2.d: Likewise.
	* gas/i386/x86-64-nops-4.d: Likewise.
	* gas/i386/x86-64-nops-5-k8.d: Likewise.
	* gas/i386/x86-64-nops-5.d: Likewise.
	* gas/i386/x86-64-rep.d: Likewise.
	* gas/i386/x86-64-stack-intel.d: Likewise.
	* gas/i386/x86-64-stack-suffix.d: Likewise.
	* gas/i386/x86-64-stack.d: Likewise.

ld/testsuite/

2009-11-13  H.J. Lu  <hongjiu.lu@intel.com>

	* ld-x86-64/tlsbin.dd: Updated for prefix processing.
	* ld-x86-64/tlsgdesc.dd: Likewise.
	* ld-x86-64/tlsld1.dd: Likewise.
	* ld-x86-64/tlspic.dd: Likewise.

opcodes/

2009-11-13  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (ckprefix): Updated to return 0 if number of
	prefixes > 14 and record the last position for each prefix.
	(lock_prefix): Removed.
	(data_prefix): Likewise.
	(addr_prefix): Likewise.
	(repz_prefix): Likewise.
	(repnz_prefix): Likewise.
	(last_lock_prefix): New.
	(last_repz_prefix): Likewise.
	(last_repnz_prefix): Likewise.
	(last_data_prefix): Likewise.
	(last_addr_prefix): Likewise.
	(last_rex_prefix): Likewise.
	(last_seg_prefix): Likewise.
	(MAX_CODE_LENGTH): Likewise.
	(ADDR16_PREFIX): Likewise.
	(ADDR32_PREFIX): Likewise.
	(DATA16_PREFIX): Likewise.
	(DATA32_PREFIX): Likewise.
	(REP_PREFIX): Likewise.
	(seg_prefix): Likewise.
	(all_prefixes): Change size to MAX_CODE_LENGTH - 1.
	(prefix_name): Handle ADDR16_PREFIX, ADDR32_PREFIX,
	DATA16_PREFIX, DATA32_PREFIX and REP_PREFIX.
	(get_valid_dis386): Updated.
	(OP_C): Likewise.
	(OP_Monitor): Likewise.
	(REP_Fixup): Likewise.
	(print_insn): Display all prefixes.
	(putop): Set PREFIX_DATA on used_prefixes only if it is used.
	(intel_operand_size): Likewise.
	(OP_E_register): Likewise.
	(OP_G): Likewise.
	(OP_REG): Likewise.
	(OP_IMREG): Likewise.
	(OP_I): Likewise.
	(OP_I64): Likewise.
	(OP_sI): Likewise.
	(CRC32_Fixup): Likewise.
	(MOVBE_Fixup): Likewise.
	(OP_E_memory): Set REFIX_DATA on used_prefixes when it is used
	in 16bit mode.
	(OP_J): Set REX_W used if it is used. Set PREFIX_DATA on
	used_prefixes only if it is used.
This commit is contained in:
H.J. Lu 2009-11-13 20:42:10 +00:00
parent bdea3a92b7
commit f16cd0d502
47 changed files with 1265 additions and 959 deletions

View File

@ -1,3 +1,48 @@
2009-11-13 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/i386.exp: Run long-1, long-1-intel, x86-64-long-1,
and x86-64-long-1-intel.
* gas/i386/long-1-intel.d: New.
* gas/i386/long-1.d: Likewise.
* gas/i386/long-1.s: Likewise.
* gas/i386/x86-64-long-1-intel.d: Likewise.
* gas/i386/x86-64-long-1.d: Likewise.
* gas/i386/x86-64-long-1.s: Likewise.
* gas/i386/jump16.d: Updated for prefix processing.
* gas/i386/naked.d: Likewise.
* gas/i386/nops-1-core2.d: Likewise.
* gas/i386/nops-1-i686.d: Likewise.
* gas/i386/nops-3-i686.d: Likewise.
* gas/i386/nops-4-i686.d: Likewise.
* gas/i386/nops-5-i686.d: Likewise.
* gas/i386/nops-5.d: Likewise.
* gas/i386/prefix.d: Likewise.
* gas/i386/rep.d: Likewise.
* gas/i386/string-ok.d: Likewise.
* gas/i386/x86-64-addr32-intel.d: Likewise.
* gas/i386/x86-64-addr32.d: Likewise.
* gas/i386/x86-64-cbw-intel.d: Likewise.
* gas/i386/x86-64-cbw.d: Likewise.
* gas/i386/x86-64-io-intel.d: Likewise.
* gas/i386/x86-64-io-suffix.d: Likewise.
* gas/i386/x86-64-io.d: Likewise.
* gas/i386/x86-64-lwp.d: Likewise.
* gas/i386/x86-64-nops-1-core2.d: Likewise.
* gas/i386/x86-64-nops-1-nocona.d: Likewise.
* gas/i386/x86-64-nops-1.d: Likewise.
* gas/i386/x86-64-nops-2.d: Likewise.
* gas/i386/x86-64-nops-3.d: Likewise.
* gas/i386/x86-64-nops-4-core2.d: Likewise.
* gas/i386/x86-64-nops-4.d: Likewise.
* gas/i386/x86-64-nops-5-k8.d: Likewise.
* gas/i386/x86-64-nops-5.d: Likewise.
* gas/i386/x86-64-rep.d: Likewise.
* gas/i386/x86-64-stack-intel.d: Likewise.
* gas/i386/x86-64-stack-suffix.d: Likewise.
* gas/i386/x86-64-stack.d: Likewise.
2009-11-12 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/i386.exp: Run lock-1, lock-1-intel, lockbad-1,

View File

@ -66,6 +66,8 @@ if [expr ([istarget "i*86-*-*"] || [istarget "x86_64-*-*"]) && [gas_32_check]]
run_dump_test "lock-1"
run_dump_test "lock-1-intel"
run_list_test "lockbad-1" "-al"
run_dump_test "long-1"
run_dump_test "long-1-intel"
run_dump_test "fp"
run_dump_test "nops"
run_dump_test "nops16-1"
@ -257,6 +259,8 @@ if [expr ([istarget "i*86-*-*"] || [istarget "x86_64-*-*"]) && [gas_64_check]] t
run_dump_test "x86-64-lock-1"
run_dump_test "x86-64-lock-1-intel"
run_list_test "x86-64-lockbad-1" "-al"
run_dump_test "x86-64-long-1"
run_dump_test "x86-64-long-1-intel"
run_dump_test "x86-64-cbw"
run_dump_test "x86-64-cbw-intel"
run_dump_test "x86-64-io"

View File

@ -10,16 +10,16 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: e9 f(e|b) ff jmp (0x3|0 <.text>) 3: (R_386_PC)?(DISP)?16 xxx
[ ]*[a-f0-9]+: ff 26 00 00 jmp \*0x0 7: (R_386_)?16 xxx
[ ]*[a-f0-9]+: 66 ff e7 jmpl \*%edi
[ ]*[a-f0-9]+: 67 ff 27 addr32 jmp \*\(%edi\)
[ ]*[a-f0-9]+: 67 ff af 00 00 00 00 addr32 ljmp \*0x0\(%edi\) 12: (R_386_)?(dir)?32 xxx
[ ]*[a-f0-9]+: 67 ff 27 jmp \*\(%edi\)
[ ]*[a-f0-9]+: 67 ff af 00 00 00 00 ljmp \*0x0\(%edi\) 12: (R_386_)?(dir)?32 xxx
[ ]*[a-f0-9]+: ff 2e 00 00 ljmp \*0x0 18: (R_386_)?16 xxx
[ ]*[a-f0-9]+: ea 00 00 34 12 ljmp \$0x1234,\$0x0 1b: (R_386_)?16 xxx
[ ]*[a-f0-9]+: 66 e8 db ff ff ff calll (0x0|0 <.text>)
[ ]*[a-f0-9]+: 66 e8 (fc|d5) ff ff ff calll (0x27|0 <.text>) 27: (R_386_PC)?(DISP)?32 xxx
[ ]*[a-f0-9]+: 66 ff 16 00 00 calll \*0x0 2e: (R_386_)?16 xxx
[ ]*[a-f0-9]+: 66 ff d7 calll \*%edi
[ ]*[a-f0-9]+: 67 66 ff 17 addr32 calll \*\(%edi\)
[ ]*[a-f0-9]+: 67 66 ff 9f 00 00 00 00 addr32 lcalll \*0x0\(%edi\) 3b: (R_386_)?(dir)?32 xxx
[ ]*[a-f0-9]+: 67 66 ff 17 calll \*\(%edi\)
[ ]*[a-f0-9]+: 67 66 ff 9f 00 00 00 00 lcalll \*0x0\(%edi\) 3b: (R_386_)?(dir)?32 xxx
[ ]*[a-f0-9]+: 66 ff 1e 00 00 lcalll \*0x0 42: (R_386_)?16 xxx
[ ]*[a-f0-9]+: 66 9a 00 00 00 00 34 12 lcalll \$0x1234,\$0x0 46: (R_386_)?(dir)?32 xxx
[ ]*[a-f0-9]+: eb b2 jmp (0x0|0 <.text>)

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@ -0,0 +1,14 @@
#objdump: -dwMintel
#name: i386 long insns (Intel disassembly)
#source: long-1.s
.*: +file format .*
Disassembly of section .text:
0+ <foo>:
[ ]*[a-f0-9]+: f2 f0 f0 f0 f2 f2 f2 f2 f2 f2 f0 f0 66 0f 28 repnz lock lock lock repnz repnz repnz repnz repnz repnz lock lock \(bad\)
[ ]*[a-f0-9]+: 00 f2 add dl,dh
[ ]*[a-f0-9]+: f0 f0 f0 f2 f2 f2 f2 f0 f0 f0 f0 66 0f 28 00 lock lock lock repnz repnz repnz repnz lock lock lock lock movapd xmm0,XMMWORD PTR \[eax\]
#pass

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@ -0,0 +1,13 @@
#objdump: -dw
#name: i386 long insns
.*: +file format .*
Disassembly of section .text:
0+ <foo>:
[ ]*[a-f0-9]+: f2 f0 f0 f0 f2 f2 f2 f2 f2 f2 f0 f0 66 0f 28 repnz lock lock lock repnz repnz repnz repnz repnz repnz lock lock \(bad\)
[ ]*[a-f0-9]+: 00 f2 add %dh,%dl
[ ]*[a-f0-9]+: f0 f0 f0 f2 f2 f2 f2 f0 f0 f0 f0 66 0f 28 00 lock lock lock repnz repnz repnz repnz lock lock lock lock movapd \(%eax\),%xmm0
#pass

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@ -0,0 +1,30 @@
# Long Instructions
.text
foo:
.byte 0xf2
.byte 0xf0
.byte 0xf0
.byte 0xf0
.byte 0xf2
.byte 0xf2
.byte 0xf2
.byte 0xf2
.byte 0xf2
.byte 0xf2
.byte 0xf0
.byte 0xf0
movapd (%eax), %xmm0
.byte 0xf2
.byte 0xf0
.byte 0xf0
.byte 0xf0
.byte 0xf2
.byte 0xf2
.byte 0xf2
.byte 0xf2
.byte 0xf0
.byte 0xf0
.byte 0xf0
.byte 0xf0
movapd (%eax), %xmm0

View File

@ -18,7 +18,7 @@ Disassembly of section .text:
2e: 65 f3 a5 [ ]*rep movsl %gs:\(%esi\),%es:\(%edi\)
31: ec [ ]*in \(%dx\),%al
32: 66 ef [ ]*out %ax,\(%dx\)
34: 67 d2 14 [ ]*addr16 rclb %cl,\(%si\)
34: 67 d2 14[ ]*rclb[ ]+%cl,\(%si\)
37: 0f 20 d0 [ ]*mov %cr2,%eax
3a: 0f 72 d0 04 [ ]*psrld \$0x4,%mm0
3e: 66 47 [ ]*inc %di

View File

@ -5,152 +5,153 @@
.*: +file format .*
Disassembly of section .text:
0+ <nop15>:
[ ]*0:[ ]+90[ ]+nop[ ]*
[ ]*1:[ ]+66 66 66 66 66 66 2e 0f 1f 84 00 00 00 00 00[ ]+nopw[ ]+%cs:0x0\(%eax,%eax,1\)
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 66 66 66 66 66 66 2e 0f 1f 84 00 00 00 00 00 data32 data32 data32 data32 data32 nopw %cs:0x0\(%eax,%eax,1\)
0+10 <nop14>:
[ ]*10:[ ]+90[ ]+nop[ ]*
[ ]*11:[ ]+90[ ]+nop[ ]*
[ ]*12:[ ]+66 66 66 66 66 2e 0f 1f 84 00 00 00 00 00[ ]+nopw[ ]+%cs:0x0\(%eax,%eax,1\)
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 66 66 66 66 66 2e 0f 1f 84 00 00 00 00 00 data32 data32 data32 data32 nopw %cs:0x0\(%eax,%eax,1\)
0+20 <nop13>:
[ ]*20:[ ]+90[ ]+nop[ ]*
[ ]*21:[ ]+90[ ]+nop[ ]*
[ ]*22:[ ]+90[ ]+nop[ ]*
[ ]*23:[ ]+66 66 66 66 2e 0f 1f 84 00 00 00 00 00[ ]+nopw[ ]+%cs:0x0\(%eax,%eax,1\)
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 66 66 66 66 2e 0f 1f 84 00 00 00 00 00 data32 data32 data32 nopw %cs:0x0\(%eax,%eax,1\)
0+30 <nop12>:
[ ]*30:[ ]+90[ ]+nop[ ]*
[ ]*31:[ ]+90[ ]+nop[ ]*
[ ]*32:[ ]+90[ ]+nop[ ]*
[ ]*33:[ ]+90[ ]+nop[ ]*
[ ]*34:[ ]+66 66 66 2e 0f 1f 84 00 00 00 00 00[ ]+nopw[ ]+%cs:0x0\(%eax,%eax,1\)
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 66 66 66 2e 0f 1f 84 00 00 00 00 00 data32 data32 nopw %cs:0x0\(%eax,%eax,1\)
0+40 <nop11>:
[ ]*40:[ ]+90[ ]+nop[ ]*
[ ]*41:[ ]+90[ ]+nop[ ]*
[ ]*42:[ ]+90[ ]+nop[ ]*
[ ]*43:[ ]+90[ ]+nop[ ]*
[ ]*44:[ ]+90[ ]+nop[ ]*
[ ]*45:[ ]+66 66 2e 0f 1f 84 00 00 00 00 00[ ]+nopw[ ]+%cs:0x0\(%eax,%eax,1\)
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 66 66 2e 0f 1f 84 00 00 00 00 00 data32 nopw %cs:0x0\(%eax,%eax,1\)
0+50 <nop10>:
[ ]*50:[ ]+90[ ]+nop[ ]*
[ ]*51:[ ]+90[ ]+nop[ ]*
[ ]*52:[ ]+90[ ]+nop[ ]*
[ ]*53:[ ]+90[ ]+nop[ ]*
[ ]*54:[ ]+90[ ]+nop[ ]*
[ ]*55:[ ]+90[ ]+nop[ ]*
[ ]*56:[ ]+66 2e 0f 1f 84 00 00 00 00 00[ ]+nopw[ ]+%cs:0x0\(%eax,%eax,1\)
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 66 2e 0f 1f 84 00 00 00 00 00 nopw %cs:0x0\(%eax,%eax,1\)
0+60 <nop9>:
[ ]*60:[ ]+90[ ]+nop[ ]*
[ ]*61:[ ]+90[ ]+nop[ ]*
[ ]*62:[ ]+90[ ]+nop[ ]*
[ ]*63:[ ]+90[ ]+nop[ ]*
[ ]*64:[ ]+90[ ]+nop[ ]*
[ ]*65:[ ]+90[ ]+nop[ ]*
[ ]*66:[ ]+90[ ]+nop[ ]*
[ ]*67:[ ]+66 0f 1f 84 00 00 00 00 00[ ]+nopw[ ]+0x0\(%eax,%eax,1\)
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 66 0f 1f 84 00 00 00 00 00 nopw 0x0\(%eax,%eax,1\)
0+70 <nop8>:
[ ]*70:[ ]+90[ ]+nop[ ]*
[ ]*71:[ ]+90[ ]+nop[ ]*
[ ]*72:[ ]+90[ ]+nop[ ]*
[ ]*73:[ ]+90[ ]+nop[ ]*
[ ]*74:[ ]+90[ ]+nop[ ]*
[ ]*75:[ ]+90[ ]+nop[ ]*
[ ]*76:[ ]+90[ ]+nop[ ]*
[ ]*77:[ ]+90[ ]+nop[ ]*
[ ]*78:[ ]+0f 1f 84 00 00 00 00 00[ ]+nopl[ ]+0x0\(%eax,%eax,1\)
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 0f 1f 84 00 00 00 00 00 nopl 0x0\(%eax,%eax,1\)
0+80 <nop7>:
[ ]*80:[ ]+90[ ]+nop[ ]*
[ ]*81:[ ]+90[ ]+nop[ ]*
[ ]*82:[ ]+90[ ]+nop[ ]*
[ ]*83:[ ]+90[ ]+nop[ ]*
[ ]*84:[ ]+90[ ]+nop[ ]*
[ ]*85:[ ]+90[ ]+nop[ ]*
[ ]*86:[ ]+90[ ]+nop[ ]*
[ ]*87:[ ]+90[ ]+nop[ ]*
[ ]*88:[ ]+90[ ]+nop[ ]*
[ ]*89:[ ]+0f 1f 80 00 00 00 00[ ]+nopl[ ]+0x0\(%eax\)
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 0f 1f 80 00 00 00 00 nopl 0x0\(%eax\)
0+90 <nop6>:
[ ]*90:[ ]+90[ ]+nop[ ]*
[ ]*91:[ ]+90[ ]+nop[ ]*
[ ]*92:[ ]+90[ ]+nop[ ]*
[ ]*93:[ ]+90[ ]+nop[ ]*
[ ]*94:[ ]+90[ ]+nop[ ]*
[ ]*95:[ ]+90[ ]+nop[ ]*
[ ]*96:[ ]+90[ ]+nop[ ]*
[ ]*97:[ ]+90[ ]+nop[ ]*
[ ]*98:[ ]+90[ ]+nop[ ]*
[ ]*99:[ ]+90[ ]+nop[ ]*
[ ]*9a:[ ]+66 0f 1f 44 00 00[ ]+nopw[ ]+0x0\(%eax,%eax,1\)
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 66 0f 1f 44 00 00 nopw 0x0\(%eax,%eax,1\)
0+a0 <nop5>:
[ ]*a0:[ ]+90[ ]+nop[ ]*
[ ]*a1:[ ]+90[ ]+nop[ ]*
[ ]*a2:[ ]+90[ ]+nop[ ]*
[ ]*a3:[ ]+90[ ]+nop[ ]*
[ ]*a4:[ ]+90[ ]+nop[ ]*
[ ]*a5:[ ]+90[ ]+nop[ ]*
[ ]*a6:[ ]+90[ ]+nop[ ]*
[ ]*a7:[ ]+90[ ]+nop[ ]*
[ ]*a8:[ ]+90[ ]+nop[ ]*
[ ]*a9:[ ]+90[ ]+nop[ ]*
[ ]*aa:[ ]+90[ ]+nop[ ]*
[ ]*ab:[ ]+0f 1f 44 00 00[ ]+nopl[ ]+0x0\(%eax,%eax,1\)
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 0f 1f 44 00 00 nopl 0x0\(%eax,%eax,1\)
0+b0 <nop4>:
[ ]*b0:[ ]+90[ ]+nop[ ]*
[ ]*b1:[ ]+90[ ]+nop[ ]*
[ ]*b2:[ ]+90[ ]+nop[ ]*
[ ]*b3:[ ]+90[ ]+nop[ ]*
[ ]*b4:[ ]+90[ ]+nop[ ]*
[ ]*b5:[ ]+90[ ]+nop[ ]*
[ ]*b6:[ ]+90[ ]+nop[ ]*
[ ]*b7:[ ]+90[ ]+nop[ ]*
[ ]*b8:[ ]+90[ ]+nop[ ]*
[ ]*b9:[ ]+90[ ]+nop[ ]*
[ ]*ba:[ ]+90[ ]+nop[ ]*
[ ]*bb:[ ]+90[ ]+nop[ ]*
[ ]*bc:[ ]+0f 1f 40 00[ ]+nopl[ ]+0x0\(%eax\)
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 0f 1f 40 00 nopl 0x0\(%eax\)
0+c0 <nop3>:
[ ]*c0:[ ]+90[ ]+nop[ ]*
[ ]*c1:[ ]+90[ ]+nop[ ]*
[ ]*c2:[ ]+90[ ]+nop[ ]*
[ ]*c3:[ ]+90[ ]+nop[ ]*
[ ]*c4:[ ]+90[ ]+nop[ ]*
[ ]*c5:[ ]+90[ ]+nop[ ]*
[ ]*c6:[ ]+90[ ]+nop[ ]*
[ ]*c7:[ ]+90[ ]+nop[ ]*
[ ]*c8:[ ]+90[ ]+nop[ ]*
[ ]*c9:[ ]+90[ ]+nop[ ]*
[ ]*ca:[ ]+90[ ]+nop[ ]*
[ ]*cb:[ ]+90[ ]+nop[ ]*
[ ]*cc:[ ]+90[ ]+nop[ ]*
[ ]*cd:[ ]+0f 1f 00[ ]+nopl[ ]+\(%eax\)
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 0f 1f 00 nopl \(%eax\)
0+d0 <nop2>:
[ ]*d0:[ ]+90[ ]+nop[ ]*
[ ]*d1:[ ]+90[ ]+nop[ ]*
[ ]*d2:[ ]+90[ ]+nop[ ]*
[ ]*d3:[ ]+90[ ]+nop[ ]*
[ ]*d4:[ ]+90[ ]+nop[ ]*
[ ]*d5:[ ]+90[ ]+nop[ ]*
[ ]*d6:[ ]+90[ ]+nop[ ]*
[ ]*d7:[ ]+90[ ]+nop[ ]*
[ ]*d8:[ ]+90[ ]+nop[ ]*
[ ]*d9:[ ]+90[ ]+nop[ ]*
[ ]*da:[ ]+90[ ]+nop[ ]*
[ ]*db:[ ]+90[ ]+nop[ ]*
[ ]*dc:[ ]+90[ ]+nop[ ]*
[ ]*dd:[ ]+90[ ]+nop[ ]*
[ ]*de:[ ]+66 90[ ]+xchg[ ]+%ax,%ax
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 66 90 xchg %ax,%ax
#pass

View File

@ -5,29 +5,30 @@
.*: +file format .*
Disassembly of section .text:
0+ <nop15>:
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 66 66 66 66 66 66 2e 0f 1f 84 00 00 00 00 00 nopw %cs:0x0\(%eax,%eax,1\)
[ ]*[a-f0-9]+: 66 66 66 66 66 66 2e 0f 1f 84 00 00 00 00 00 data32 data32 data32 data32 data32 nopw %cs:0x0\(%eax,%eax,1\)
0+10 <nop14>:
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 66 66 66 66 66 2e 0f 1f 84 00 00 00 00 00 nopw %cs:0x0\(%eax,%eax,1\)
[ ]*[a-f0-9]+: 66 66 66 66 66 2e 0f 1f 84 00 00 00 00 00 data32 data32 data32 data32 nopw %cs:0x0\(%eax,%eax,1\)
0+20 <nop13>:
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 66 66 66 66 2e 0f 1f 84 00 00 00 00 00 nopw %cs:0x0\(%eax,%eax,1\)
[ ]*[a-f0-9]+: 66 66 66 66 2e 0f 1f 84 00 00 00 00 00 data32 data32 data32 nopw %cs:0x0\(%eax,%eax,1\)
0+30 <nop12>:
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 66 66 66 2e 0f 1f 84 00 00 00 00 00 nopw %cs:0x0\(%eax,%eax,1\)
[ ]*[a-f0-9]+: 66 66 66 2e 0f 1f 84 00 00 00 00 00 data32 data32 nopw %cs:0x0\(%eax,%eax,1\)
0+40 <nop11>:
[ ]*[a-f0-9]+: 90 nop
@ -35,7 +36,7 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 66 66 2e 0f 1f 84 00 00 00 00 00 nopw %cs:0x0\(%eax,%eax,1\)
[ ]*[a-f0-9]+: 66 66 2e 0f 1f 84 00 00 00 00 00 data32 nopw %cs:0x0\(%eax,%eax,1\)
0+50 <nop10>:
[ ]*[a-f0-9]+: 90 nop

View File

@ -10,8 +10,8 @@ Disassembly of section .text:
0+ <nop>:
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 66 66 66 66 66 66 2e 0f 1f 84 00 00 00 00 00 nopw %cs:0x0\(%eax,%eax,1\)
[ ]*[a-f0-9]+: 66 66 66 66 66 66 2e 0f 1f 84 00 00 00 00 00 nopw %cs:0x0\(%eax,%eax,1\)
[ ]*[a-f0-9]+: 66 66 66 66 66 66 2e 0f 1f 84 00 00 00 00 00 data32 data32 data32 data32 data32 nopw %cs:0x0\(%eax,%eax,1\)
[ ]*[a-f0-9]+: 66 66 66 66 66 66 2e 0f 1f 84 00 00 00 00 00 data32 data32 data32 data32 data32 nopw %cs:0x0\(%eax,%eax,1\)
[ ]*[a-f0-9]+: 89 c3 mov %eax,%ebx
[ ]*[a-f0-9]+: 66 66 66 66 66 2e 0f 1f 84 00 00 00 00 00 nopw %cs:0x0\(%eax,%eax,1\)
[ ]*[a-f0-9]+: 66 66 66 66 66 2e 0f 1f 84 00 00 00 00 00 data32 data32 data32 data32 nopw %cs:0x0\(%eax,%eax,1\)
#pass

View File

@ -10,29 +10,29 @@ Disassembly of section .text:
0+ <nop31>:
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 66 66 66 66 66 66 2e 0f 1f 84 00 00 00 00 00 nopw %cs:0x0\(%eax,%eax,1\)
[ ]*[a-f0-9]+: 66 66 66 66 66 66 2e 0f 1f 84 00 00 00 00 00 nopw %cs:0x0\(%eax,%eax,1\)
[ ]*[a-f0-9]+: 66 66 66 66 66 66 2e 0f 1f 84 00 00 00 00 00 data32 data32 data32 data32 data32 nopw %cs:0x0\(%eax,%eax,1\)
[ ]*[a-f0-9]+: 66 66 66 66 66 66 2e 0f 1f 84 00 00 00 00 00 data32 data32 data32 data32 data32 nopw %cs:0x0\(%eax,%eax,1\)
0+20 <nop30>:
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 66 66 66 66 66 66 2e 0f 1f 84 00 00 00 00 00 nopw %cs:0x0\(%eax,%eax,1\)
[ ]*[a-f0-9]+: 66 66 66 66 66 66 2e 0f 1f 84 00 00 00 00 00 nopw %cs:0x0\(%eax,%eax,1\)
[ ]*[a-f0-9]+: 66 66 66 66 66 66 2e 0f 1f 84 00 00 00 00 00 data32 data32 data32 data32 data32 nopw %cs:0x0\(%eax,%eax,1\)
[ ]*[a-f0-9]+: 66 66 66 66 66 66 2e 0f 1f 84 00 00 00 00 00 data32 data32 data32 data32 data32 nopw %cs:0x0\(%eax,%eax,1\)
0+40 <nop29>:
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 66 66 66 66 66 2e 0f 1f 84 00 00 00 00 00 nopw %cs:0x0\(%eax,%eax,1\)
[ ]*[a-f0-9]+: 66 66 66 66 66 66 2e 0f 1f 84 00 00 00 00 00 nopw %cs:0x0\(%eax,%eax,1\)
[ ]*[a-f0-9]+: 66 66 66 66 66 2e 0f 1f 84 00 00 00 00 00 data32 data32 data32 data32 nopw %cs:0x0\(%eax,%eax,1\)
[ ]*[a-f0-9]+: 66 66 66 66 66 66 2e 0f 1f 84 00 00 00 00 00 data32 data32 data32 data32 data32 nopw %cs:0x0\(%eax,%eax,1\)
0+60 <nop28>:
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 66 66 66 66 2e 0f 1f 84 00 00 00 00 00 nopw %cs:0x0\(%eax,%eax,1\)
[ ]*[a-f0-9]+: 66 66 66 66 66 66 2e 0f 1f 84 00 00 00 00 00 nopw %cs:0x0\(%eax,%eax,1\)
[ ]*[a-f0-9]+: 66 66 66 66 2e 0f 1f 84 00 00 00 00 00 data32 data32 data32 nopw %cs:0x0\(%eax,%eax,1\)
[ ]*[a-f0-9]+: 66 66 66 66 66 66 2e 0f 1f 84 00 00 00 00 00 data32 data32 data32 data32 data32 nopw %cs:0x0\(%eax,%eax,1\)
0+80 <nop27>:
[ ]*[a-f0-9]+: 90 nop
@ -40,8 +40,8 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 66 66 66 2e 0f 1f 84 00 00 00 00 00 nopw %cs:0x0\(%eax,%eax,1\)
[ ]*[a-f0-9]+: 66 66 66 66 66 66 2e 0f 1f 84 00 00 00 00 00 nopw %cs:0x0\(%eax,%eax,1\)
[ ]*[a-f0-9]+: 66 66 66 2e 0f 1f 84 00 00 00 00 00 data32 data32 nopw %cs:0x0\(%eax,%eax,1\)
[ ]*[a-f0-9]+: 66 66 66 66 66 66 2e 0f 1f 84 00 00 00 00 00 data32 data32 data32 data32 data32 nopw %cs:0x0\(%eax,%eax,1\)
0+a0 <nop26>:
[ ]*[a-f0-9]+: 90 nop
@ -50,8 +50,8 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 66 66 2e 0f 1f 84 00 00 00 00 00 nopw %cs:0x0\(%eax,%eax,1\)
[ ]*[a-f0-9]+: 66 66 66 66 66 66 2e 0f 1f 84 00 00 00 00 00 nopw %cs:0x0\(%eax,%eax,1\)
[ ]*[a-f0-9]+: 66 66 2e 0f 1f 84 00 00 00 00 00 data32 nopw %cs:0x0\(%eax,%eax,1\)
[ ]*[a-f0-9]+: 66 66 66 66 66 66 2e 0f 1f 84 00 00 00 00 00 data32 data32 data32 data32 data32 nopw %cs:0x0\(%eax,%eax,1\)
0+c0 <nop25>:
[ ]*[a-f0-9]+: 90 nop
@ -62,7 +62,7 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 66 2e 0f 1f 84 00 00 00 00 00 nopw %cs:0x0\(%eax,%eax,1\)
[ ]*[a-f0-9]+: 66 66 66 66 66 66 2e 0f 1f 84 00 00 00 00 00 nopw %cs:0x0\(%eax,%eax,1\)
[ ]*[a-f0-9]+: 66 66 66 66 66 66 2e 0f 1f 84 00 00 00 00 00 data32 data32 data32 data32 data32 nopw %cs:0x0\(%eax,%eax,1\)
0+e0 <nop24>:
[ ]*[a-f0-9]+: 90 nop
@ -74,7 +74,7 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 66 0f 1f 84 00 00 00 00 00 nopw 0x0\(%eax,%eax,1\)
[ ]*[a-f0-9]+: 66 66 66 66 66 66 2e 0f 1f 84 00 00 00 00 00 nopw %cs:0x0\(%eax,%eax,1\)
[ ]*[a-f0-9]+: 66 66 66 66 66 66 2e 0f 1f 84 00 00 00 00 00 data32 data32 data32 data32 data32 nopw %cs:0x0\(%eax,%eax,1\)
0+100 <nop23>:
[ ]*[a-f0-9]+: 90 nop
@ -87,7 +87,7 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 0f 1f 84 00 00 00 00 00 nopl 0x0\(%eax,%eax,1\)
[ ]*[a-f0-9]+: 66 66 66 66 66 66 2e 0f 1f 84 00 00 00 00 00 nopw %cs:0x0\(%eax,%eax,1\)
[ ]*[a-f0-9]+: 66 66 66 66 66 66 2e 0f 1f 84 00 00 00 00 00 data32 data32 data32 data32 data32 nopw %cs:0x0\(%eax,%eax,1\)
0+120 <nop22>:
[ ]*[a-f0-9]+: 90 nop
@ -101,7 +101,7 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 0f 1f 80 00 00 00 00 nopl 0x0\(%eax\)
[ ]*[a-f0-9]+: 66 66 66 66 66 66 2e 0f 1f 84 00 00 00 00 00 nopw %cs:0x0\(%eax,%eax,1\)
[ ]*[a-f0-9]+: 66 66 66 66 66 66 2e 0f 1f 84 00 00 00 00 00 data32 data32 data32 data32 data32 nopw %cs:0x0\(%eax,%eax,1\)
0+140 <nop21>:
[ ]*[a-f0-9]+: 90 nop
@ -116,7 +116,7 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 66 0f 1f 44 00 00 nopw 0x0\(%eax,%eax,1\)
[ ]*[a-f0-9]+: 66 66 66 66 66 66 2e 0f 1f 84 00 00 00 00 00 nopw %cs:0x0\(%eax,%eax,1\)
[ ]*[a-f0-9]+: 66 66 66 66 66 66 2e 0f 1f 84 00 00 00 00 00 data32 data32 data32 data32 data32 nopw %cs:0x0\(%eax,%eax,1\)
0+160 <nop20>:
[ ]*[a-f0-9]+: 90 nop
@ -132,7 +132,7 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 0f 1f 44 00 00 nopl 0x0\(%eax,%eax,1\)
[ ]*[a-f0-9]+: 66 66 66 66 66 66 2e 0f 1f 84 00 00 00 00 00 nopw %cs:0x0\(%eax,%eax,1\)
[ ]*[a-f0-9]+: 66 66 66 66 66 66 2e 0f 1f 84 00 00 00 00 00 data32 data32 data32 data32 data32 nopw %cs:0x0\(%eax,%eax,1\)
0+180 <nop19>:
[ ]*[a-f0-9]+: 90 nop
@ -149,7 +149,7 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 0f 1f 40 00 nopl 0x0\(%eax\)
[ ]*[a-f0-9]+: 66 66 66 66 66 66 2e 0f 1f 84 00 00 00 00 00 nopw %cs:0x0\(%eax,%eax,1\)
[ ]*[a-f0-9]+: 66 66 66 66 66 66 2e 0f 1f 84 00 00 00 00 00 data32 data32 data32 data32 data32 nopw %cs:0x0\(%eax,%eax,1\)
0+1a0 <nop18>:
[ ]*[a-f0-9]+: 90 nop
@ -167,7 +167,7 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 0f 1f 00 nopl \(%eax\)
[ ]*[a-f0-9]+: 66 66 66 66 66 66 2e 0f 1f 84 00 00 00 00 00 nopw %cs:0x0\(%eax,%eax,1\)
[ ]*[a-f0-9]+: 66 66 66 66 66 66 2e 0f 1f 84 00 00 00 00 00 data32 data32 data32 data32 data32 nopw %cs:0x0\(%eax,%eax,1\)
0+1c0 <nop17>:
[ ]*[a-f0-9]+: 90 nop
@ -186,7 +186,7 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 66 90 xchg %ax,%ax
[ ]*[a-f0-9]+: 66 66 66 66 66 66 2e 0f 1f 84 00 00 00 00 00 nopw %cs:0x0\(%eax,%eax,1\)
[ ]*[a-f0-9]+: 66 66 66 66 66 66 2e 0f 1f 84 00 00 00 00 00 data32 data32 data32 data32 data32 nopw %cs:0x0\(%eax,%eax,1\)
0+1e0 <nop16>:
[ ]*[a-f0-9]+: 90 nop
@ -206,5 +206,5 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 66 66 66 66 66 66 2e 0f 1f 84 00 00 00 00 00 nopw %cs:0x0\(%eax,%eax,1\)
[ ]*[a-f0-9]+: 66 66 66 66 66 66 2e 0f 1f 84 00 00 00 00 00 data32 data32 data32 data32 data32 nopw %cs:0x0\(%eax,%eax,1\)
#pass

View File

@ -24,23 +24,23 @@ Disassembly of section .text:
0+30 <i686>:
[ ]*[a-f0-9]+: 0f be f0 movsbl %al,%esi
[ ]*[a-f0-9]+: 66 66 66 66 2e 0f 1f 84 00 00 00 00 00 nopw %cs:0x0\(%eax,%eax,1\)
[ ]*[a-f0-9]+: 66 66 66 66 2e 0f 1f 84 00 00 00 00 00 data32 data32 data32 nopw %cs:0x0\(%eax,%eax,1\)
0+40 <pentium4>:
[ ]*[a-f0-9]+: 0f be f0 movsbl %al,%esi
[ ]*[a-f0-9]+: 66 66 66 66 2e 0f 1f 84 00 00 00 00 00 nopw %cs:0x0\(%eax,%eax,1\)
[ ]*[a-f0-9]+: 66 66 66 66 2e 0f 1f 84 00 00 00 00 00 data32 data32 data32 nopw %cs:0x0\(%eax,%eax,1\)
0+50 <nocona>:
[ ]*[a-f0-9]+: 0f be f0 movsbl %al,%esi
[ ]*[a-f0-9]+: 66 66 66 66 2e 0f 1f 84 00 00 00 00 00 nopw %cs:0x0\(%eax,%eax,1\)
[ ]*[a-f0-9]+: 66 66 66 66 2e 0f 1f 84 00 00 00 00 00 data32 data32 data32 nopw %cs:0x0\(%eax,%eax,1\)
0+60 <core>:
[ ]*[a-f0-9]+: 0f be f0 movsbl %al,%esi
[ ]*[a-f0-9]+: 66 66 66 66 2e 0f 1f 84 00 00 00 00 00 nopw %cs:0x0\(%eax,%eax,1\)
[ ]*[a-f0-9]+: 66 66 66 66 2e 0f 1f 84 00 00 00 00 00 data32 data32 data32 nopw %cs:0x0\(%eax,%eax,1\)
0+70 <core2>:
[ ]*[a-f0-9]+: 0f be f0 movsbl %al,%esi
[ ]*[a-f0-9]+: 66 66 66 66 2e 0f 1f 84 00 00 00 00 00 nopw %cs:0x0\(%eax,%eax,1\)
[ ]*[a-f0-9]+: 66 66 66 66 2e 0f 1f 84 00 00 00 00 00 data32 data32 data32 nopw %cs:0x0\(%eax,%eax,1\)
0+80 <k6>:
[ ]*[a-f0-9]+: 0f be f0 movsbl %al,%esi
@ -64,7 +64,7 @@ Disassembly of section .text:
0+c0 <generic64>:
[ ]*[a-f0-9]+: 0f be f0 movsbl %al,%esi
[ ]*[a-f0-9]+: 66 66 66 66 2e 0f 1f 84 00 00 00 00 00 nopw %cs:0x0\(%eax,%eax,1\)
[ ]*[a-f0-9]+: 66 66 66 66 2e 0f 1f 84 00 00 00 00 00 data32 data32 data32 nopw %cs:0x0\(%eax,%eax,1\)
0+d0 <amdfam10>:
[ ]*[a-f0-9]+: 0f be f0 movsbl %al,%esi

View File

@ -22,23 +22,23 @@ Disassembly of section .text:
0+30 <i686>:
[ ]*[a-f0-9]+: 0f be f0 movsbl %al,%esi
[ ]*[a-f0-9]+: 66 66 66 66 2e 0f 1f 84 00 00 00 00 00 nopw %cs:0x0\(%eax,%eax,1\)
[ ]*[a-f0-9]+: 66 66 66 66 2e 0f 1f 84 00 00 00 00 00 data32 data32 data32 nopw %cs:0x0\(%eax,%eax,1\)
0+40 <pentium4>:
[ ]*[a-f0-9]+: 0f be f0 movsbl %al,%esi
[ ]*[a-f0-9]+: 66 66 66 66 2e 0f 1f 84 00 00 00 00 00 nopw %cs:0x0\(%eax,%eax,1\)
[ ]*[a-f0-9]+: 66 66 66 66 2e 0f 1f 84 00 00 00 00 00 data32 data32 data32 nopw %cs:0x0\(%eax,%eax,1\)
0+50 <nocona>:
[ ]*[a-f0-9]+: 0f be f0 movsbl %al,%esi
[ ]*[a-f0-9]+: 66 66 66 66 2e 0f 1f 84 00 00 00 00 00 nopw %cs:0x0\(%eax,%eax,1\)
[ ]*[a-f0-9]+: 66 66 66 66 2e 0f 1f 84 00 00 00 00 00 data32 data32 data32 nopw %cs:0x0\(%eax,%eax,1\)
0+60 <core>:
[ ]*[a-f0-9]+: 0f be f0 movsbl %al,%esi
[ ]*[a-f0-9]+: 66 66 66 66 2e 0f 1f 84 00 00 00 00 00 nopw %cs:0x0\(%eax,%eax,1\)
[ ]*[a-f0-9]+: 66 66 66 66 2e 0f 1f 84 00 00 00 00 00 data32 data32 data32 nopw %cs:0x0\(%eax,%eax,1\)
0+70 <core2>:
[ ]*[a-f0-9]+: 0f be f0 movsbl %al,%esi
[ ]*[a-f0-9]+: 66 66 66 66 2e 0f 1f 84 00 00 00 00 00 nopw %cs:0x0\(%eax,%eax,1\)
[ ]*[a-f0-9]+: 66 66 66 66 2e 0f 1f 84 00 00 00 00 00 data32 data32 data32 nopw %cs:0x0\(%eax,%eax,1\)
0+80 <k6>:
[ ]*[a-f0-9]+: 0f be f0 movsbl %al,%esi
@ -62,7 +62,7 @@ Disassembly of section .text:
0+c0 <generic64>:
[ ]*[a-f0-9]+: 0f be f0 movsbl %al,%esi
[ ]*[a-f0-9]+: 66 66 66 66 2e 0f 1f 84 00 00 00 00 00 nopw %cs:0x0\(%eax,%eax,1\)
[ ]*[a-f0-9]+: 66 66 66 66 2e 0f 1f 84 00 00 00 00 00 data32 data32 data32 nopw %cs:0x0\(%eax,%eax,1\)
0+d0 <amdfam10>:
[ ]*[a-f0-9]+: 0f be f0 movsbl %al,%esi

View File

@ -6,9 +6,9 @@
Disassembly of section .text:
0+000 <foo>:
0: 9b 26 67 d9 3c [ ]*addr16 fstcw %es:\(%si\)
0: 9b 26 67 d9 3c[ ]+fstcw[ ]+%es:\(%si\)
5: 9b df e0 [ ]*fstsw %ax
8: 9b df e0 [ ]*fstsw %ax
b: 9b 67 df e0 [ ]*addr16 fstsw %ax
f: 36 67 66 f3 a7 [ ]*addr16 repz cmpsw %es:\(%di\),%ss:\(%si\)
f: 36 67 66 f3 a7 [ ]*repz cmpsw %es:\(%di\),%ss:\(%si\)
#pass

View File

@ -27,25 +27,25 @@ Disassembly of section .text:
2b: f3 ab[ ]+rep stos %eax,%es:\(%edi\)
2d: f3 a7[ ]+repz cmpsl %es:\(%edi\),%ds:\(%esi\)
2f: f3 af[ ]+repz scas %es:\(%edi\),%eax
31: 67 f3 6c[ ]+addr16 rep insb \(%dx\),%es:\(%di\)
34: 67 f3 6e[ ]+addr16 rep outsb %ds:\(%si\),\(%dx\)
37: 67 f3 a4[ ]+addr16 rep movsb %ds:\(%si\),%es:\(%di\)
3a: 67 f3 ac[ ]+addr16 rep lods %ds:\(%si\),%al
3d: 67 f3 aa[ ]+addr16 rep stos %al,%es:\(%di\)
40: 67 f3 a6[ ]+addr16 repz cmpsb %es:\(%di\),%ds:\(%si\)
43: 67 f3 ae[ ]+addr16 repz scas %es:\(%di\),%al
46: 67 66 f3 6d[ ]+addr16 rep insw \(%dx\),%es:\(%di\)
4a: 67 66 f3 6f[ ]+addr16 rep outsw %ds:\(%si\),\(%dx\)
4e: 67 66 f3 a5[ ]+addr16 rep movsw %ds:\(%si\),%es:\(%di\)
52: 67 66 f3 ad[ ]+addr16 rep lods %ds:\(%si\),%ax
56: 67 66 f3 ab[ ]+addr16 rep stos %ax,%es:\(%di\)
5a: 67 66 f3 a7[ ]+addr16 repz cmpsw %es:\(%di\),%ds:\(%si\)
5e: 67 66 f3 af[ ]+addr16 repz scas %es:\(%di\),%ax
62: 67 f3 6d[ ]+addr16 rep insl \(%dx\),%es:\(%di\)
65: 67 f3 6f[ ]+addr16 rep outsl %ds:\(%si\),\(%dx\)
68: 67 f3 a5[ ]+addr16 rep movsl %ds:\(%si\),%es:\(%di\)
6b: 67 f3 ad[ ]+addr16 rep lods %ds:\(%si\),%eax
6e: 67 f3 ab[ ]+addr16 rep stos %eax,%es:\(%di\)
71: 67 f3 a7[ ]+addr16 repz cmpsl %es:\(%di\),%ds:\(%si\)
74: 67 f3 af[ ]+addr16 repz scas %es:\(%di\),%eax
31: 67 f3 6c[ ]+rep insb \(%dx\),%es:\(%di\)
34: 67 f3 6e[ ]+rep outsb %ds:\(%si\),\(%dx\)
37: 67 f3 a4[ ]+rep movsb %ds:\(%si\),%es:\(%di\)
3a: 67 f3 ac[ ]+rep lods %ds:\(%si\),%al
3d: 67 f3 aa[ ]+rep stos %al,%es:\(%di\)
40: 67 f3 a6[ ]+repz cmpsb %es:\(%di\),%ds:\(%si\)
43: 67 f3 ae[ ]+repz scas %es:\(%di\),%al
46: 67 66 f3 6d[ ]+rep insw \(%dx\),%es:\(%di\)
4a: 67 66 f3 6f[ ]+rep outsw %ds:\(%si\),\(%dx\)
4e: 67 66 f3 a5[ ]+rep movsw %ds:\(%si\),%es:\(%di\)
52: 67 66 f3 ad[ ]+rep lods %ds:\(%si\),%ax
56: 67 66 f3 ab[ ]+rep stos %ax,%es:\(%di\)
5a: 67 66 f3 a7[ ]+repz cmpsw %es:\(%di\),%ds:\(%si\)
5e: 67 66 f3 af[ ]+repz scas %es:\(%di\),%ax
62: 67 f3 6d[ ]+rep insl \(%dx\),%es:\(%di\)
65: 67 f3 6f[ ]+rep outsl %ds:\(%si\),\(%dx\)
68: 67 f3 a5[ ]+rep movsl %ds:\(%si\),%es:\(%di\)
6b: 67 f3 ad[ ]+rep lods %ds:\(%si\),%eax
6e: 67 f3 ab[ ]+rep stos %eax,%es:\(%di\)
71: 67 f3 a7[ ]+repz cmpsl %es:\(%di\),%ds:\(%si\)
74: 67 f3 af[ ]+repz scas %es:\(%di\),%eax
...

View File

@ -9,7 +9,7 @@ Disassembly of section .text:
0+ <.*start32>:
[ ]+[0-9a-f]+: 2e a6[ ]+cmpsb (%es:)?\(%edi\),%cs:\(%esi\)
[ ]+[0-9a-f]+: a6[ ]+cmpsb (%es:)?\(%edi\),(%ds:)?\(%esi\)
[ ]+[0-9a-f]+: 67 a6[ ]+(addr16 )?cmpsb (%es:)?\(%di\),(%ds:)?\(%si\)
[ ]+[0-9a-f]+: 67 a6[ ]+cmpsb (%es:)?\(%di\),(%ds:)?\(%si\)
[ ]+[0-9a-f]+: a6[ ]+cmpsb (%es:)?\(%edi\),(%ds:)?\(%esi\)
[ ]+[0-9a-f]+: 6c[ ]+insb \(%dx\),(%es:)?\(%edi\)
[ ]+[0-9a-f]+: 6c[ ]+insb \(%dx\),(%es:)?\(%edi\)
@ -17,7 +17,7 @@ Disassembly of section .text:
[ ]+[0-9a-f]+: ac[ ]+lods (%ds:)?\(%esi\),%al
[ ]+[0-9a-f]+: 2e a4[ ]+movsb %cs:\(%esi\),(%es:)?\(%edi\)
[ ]+[0-9a-f]+: a4[ ]+movsb (%ds:)?\(%esi\),(%es:)?\(%edi\)
[ ]+[0-9a-f]+: 67 a4[ ]+(addr16 )?movsb (%ds:)?\(%si\),(%es:)?\(%di\)
[ ]+[0-9a-f]+: 67 a4[ ]+movsb (%ds:)?\(%si\),(%es:)?\(%di\)
[ ]+[0-9a-f]+: a4[ ]+movsb (%ds:)?\(%esi\),(%es:)?\(%edi\)
[ ]+[0-9a-f]+: a4[ ]+movsb (%ds:)?\(%esi\),(%es:)?\(%edi\)
[ ]+[0-9a-f]+: 2e 6e[ ]+outsb %cs:\(%esi\),\(%dx\)
@ -35,17 +35,17 @@ Disassembly of section .text:
[0-9a-f]+ <.*start16>:
[ ]+[0-9a-f]+: a6[ ]+cmpsb (%es:)?\(%edi\),(%ds:)?\(%esi\)
[ ]+[0-9a-f]+: 67 a4[ ]+(addr16 )?movsb (%ds:)?\(%si\),(%es:)?\(%di\)
[ ]+[0-9a-f]+: 67 a4[ ]+movsb (%ds:)?\(%si\),(%es:)?\(%di\)
[0-9a-f]+ <.*start64>:
[ ]+[0-9a-f]+: a6[ ]+cmpsb (%es:)?\(%edi\),(%ds:)?\(%esi\)
[ ]+[0-9a-f]+: 67 a4[ ]+(addr16 )?movsb (%ds:)?\(%si\),(%es:)?\(%di\)
[ ]+[0-9a-f]+: 67 a4[ ]+movsb (%ds:)?\(%si\),(%es:)?\(%di\)
[0-9a-f]+ <.*intel32>:
[ ]+[0-9a-f]+: 2e a6[ ]+cmpsb (%es:)?\(%edi\),%cs:\(%esi\)
[ ]+[0-9a-f]+: a6[ ]+cmpsb (%es:)?\(%edi\),(%ds:)?\(%esi\)
[ ]+[0-9a-f]+: a6[ ]+cmpsb (%es:)?\(%edi\),(%ds:)?\(%esi\)
[ ]+[0-9a-f]+: 67 a6[ ]+(addr16 )?cmpsb (%es:)?\(%di\),(%ds:)?\(%si\)
[ ]+[0-9a-f]+: 67 a6[ ]+cmpsb (%es:)?\(%di\),(%ds:)?\(%si\)
[ ]+[0-9a-f]+: a6[ ]+cmpsb (%es:)?\(%edi\),(%ds:)?\(%esi\)
[ ]+[0-9a-f]+: 6c[ ]+insb \(%dx\),(%es:)?\(%edi\)
[ ]+[0-9a-f]+: 6c[ ]+insb \(%dx\),(%es:)?\(%edi\)
@ -54,7 +54,7 @@ Disassembly of section .text:
[ ]+[0-9a-f]+: 2e a4[ ]+movsb %cs:\(%esi\),(%es:)?\(%edi\)
[ ]+[0-9a-f]+: a4[ ]+movsb (%ds:)?\(%esi\),(%es:)?\(%edi\)
[ ]+[0-9a-f]+: a4[ ]+movsb (%ds:)?\(%esi\),(%es:)?\(%edi\)
[ ]+[0-9a-f]+: 67 a4[ ]+(addr16 )?movsb (%ds:)?\(%si\),(%es:)?\(%di\)
[ ]+[0-9a-f]+: 67 a4[ ]+movsb (%ds:)?\(%si\),(%es:)?\(%di\)
[ ]+[0-9a-f]+: a4[ ]+movsb (%ds:)?\(%esi\),(%es:)?\(%edi\)
[ ]+[0-9a-f]+: a4[ ]+movsb (%ds:)?\(%esi\),(%es:)?\(%edi\)
[ ]+[0-9a-f]+: 2e 6e[ ]+outsb %cs:\(%esi\),\(%dx\)
@ -72,9 +72,9 @@ Disassembly of section .text:
[0-9a-f]+ <.*intel16>:
[ ]+[0-9a-f]+: a6[ ]+cmpsb (%es:)?\(%edi\),(%ds:)?\(%esi\)
[ ]+[0-9a-f]+: 67 a4[ ]+(addr16 )?movsb (%ds:)?\(%si\),(%es:)?\(%di\)
[ ]+[0-9a-f]+: 67 a4[ ]+movsb (%ds:)?\(%si\),(%es:)?\(%di\)
[0-9a-f]+ <.*intel64>:
[ ]+[0-9a-f]+: a6[ ]+cmpsb (%es:)?\(%edi\),(%ds:)?\(%esi\)
[ ]+[0-9a-f]+: 67 a4[ ]+(addr16 )?movsb (%ds:)?\(%si\),(%es:)?\(%di\)
[ ]+[0-9a-f]+: 67 a4[ ]+movsb (%ds:)?\(%si\),(%es:)?\(%di\)
#pass

View File

@ -8,9 +8,9 @@
Disassembly of section .text:
0+ <.text>:
[ ]*[a-f0-9]+: 67 48 8d 80 00 00 00 00 addr32 lea rax,\[eax\+0x0\].*
[ ]*[a-f0-9]+: 67 49 8d 80 00 00 00 00 addr32 lea rax,\[r8d\+0x0\].*
[ ]*[a-f0-9]+: 67 48 8d 05 00 00 00 00 addr32 lea rax,\[eip\+0x0\].*
[ ]*[a-f0-9]+: 67 48 8d 80 00 00 00 00[ ]+lea[ ]+rax,\[eax\+0x0\].*
[ ]*[a-f0-9]+: 67 49 8d 80 00 00 00 00[ ]+lea[ ]+rax,\[r8d\+0x0\].*
[ ]*[a-f0-9]+: 67 48 8d 05 00 00 00 00[ ]+lea[ ]+rax,\[eip\+0x0\].*
[ ]*[a-f0-9]+: 67 48 8d 04 25 00 00 00 00 addr32 lea rax,ds:0x0.*
[ ]*[a-f0-9]+: 67 a0 98 08 60 00 addr32 mov al,ds:0x600898
[ ]*[a-f0-9]+: 67 66 a1 98 08 60 00 addr32 mov ax,ds:0x600898

View File

@ -7,10 +7,10 @@
Disassembly of section .text:
0+ <.text>:
[ ]*[a-f0-9]+: 67 48 8d 80 00 00 00 00 addr32 lea 0x0\(%eax\),%rax.*
[ ]*[a-f0-9]+: 67 49 8d 80 00 00 00 00 addr32 lea 0x0\(%r8d\),%rax.*
[ ]*[a-f0-9]+: 67 48 8d 05 00 00 00 00 addr32 lea 0x0\(%eip\),%rax.*
[ ]*[a-f0-9]+: 67 48 8d 04 25 00 00 00 00 addr32 lea 0x0,%rax.*
[ ]*[a-f0-9]+: 67 48 8d 80 00 00 00 00[ ]+lea[ ]+0x0\(%eax\),%rax.*
[ ]*[a-f0-9]+: 67 49 8d 80 00 00 00 00[ ]+lea[ ]+0x0\(%r8d\),%rax.*
[ ]*[a-f0-9]+: 67 48 8d 05 00 00 00 00[ ]+lea[ ]+0x0\(%eip\),%rax.*
[ ]*[a-f0-9]+: 67 48 8d 04 25 00 00 00 00[ ]+addr32 lea[ ]+0x0,%rax.*
[ ]*[a-f0-9]+: 67 a0 98 08 60 00 addr32 mov 0x600898,%al
[ ]*[a-f0-9]+: 67 66 a1 98 08 60 00 addr32 mov 0x600898,%ax
[ ]*[a-f0-9]+: 67 a1 98 08 60 00 addr32 mov 0x600898,%eax

View File

@ -10,17 +10,15 @@ Disassembly of section .text:
0: 66 98 cbw
2: 98 cwde
3: 48 98 cdqe
5: 66 40 98 rex cbw
8: 40 98 rex cwde
a: 66 data16
b: 48 98 cdqe
5: 66 40 98 rex cbw
8: 40 98 rex cwde
a: 66 48 98 data32 cdqe
0+00d <_cwd>:
d: 66 99 cwd
f: 99 cdq
10: 48 99 cqo
12: 66 40 99 rex cwd
15: 40 99 rex cdq
17: 66 data16
18: 48 99 cqo
12: 66 40 99 rex cwd
15: 40 99 rex cdq
17: 66 48 99 data32 cqo
#pass

View File

@ -9,17 +9,15 @@ Disassembly of section .text:
0: 66 98 cbtw
2: 98 cwtl
3: 48 98 cltq
5: 66 40 98 rex cbtw
8: 40 98 rex cwtl
a: 66 data16
b: 48 98 cltq
5: 66 40 98 rex cbtw
8: 40 98 rex cwtl
a: 66 48 98 data32 cltq
0+00d <_cwd>:
d: 66 99 cwtd
f: 99 cltd
10: 48 99 cqto
12: 66 40 99 rex cwtd
15: 40 99 rex cltd
17: 66 data16
18: 48 99 cqto
12: 66 40 99 rex cwtd
15: 40 99 rex cltd
17: 66 48 99 data32 cqto
#pass

View File

@ -7,22 +7,18 @@
Disassembly of section .text:
0+000 <_in>:
0: 48 ed rex.W in eax,dx
2: 66 data16
3: 48 ed rex.W in eax,dx
0: 48 ed rex.W in eax,dx
2: 66 48 ed data32 rex.W in eax,dx
0+005 <_out>:
5: 48 ef rex.W out dx,eax
7: 66 data16
8: 48 ef rex.W out dx,eax
5: 48 ef rex.W out dx,eax
7: 66 48 ef data32 rex.W out dx,eax
0+00a <_ins>:
a: 48 6d rex.W ins DWORD PTR es:\[rdi\],dx
c: 66 data16
d: 48 6d rex.W ins DWORD PTR es:\[rdi\],dx
a: 48 6d rex.W ins DWORD PTR es:\[rdi\],dx
c: 66 48 6d data32 rex.W ins DWORD PTR es:\[rdi\],dx
0+00f <_outs>:
f: 48 6f rex.W outs dx,DWORD PTR ds:\[rsi\]
11: 66 data16
12: 48 6f rex.W outs dx,DWORD PTR ds:\[rsi\]
f: 48 6f rex.W outs dx,DWORD PTR ds:\[rsi\]
11: 66 48 6f data32 rex.W outs dx,DWORD PTR ds:\[rsi\]
#pass

View File

@ -7,22 +7,18 @@
Disassembly of section .text:
0+000 <_in>:
0: 48 ed rex.W inl \(%dx\),%eax
2: 66 data16
3: 48 ed rex.W inl \(%dx\),%eax
0: 48 ed rex.W inl \(%dx\),%eax
2: 66 48 ed data32 rex.W inl \(%dx\),%eax
0+005 <_out>:
5: 48 ef rex.W outl %eax,\(%dx\)
7: 66 data16
8: 48 ef rex.W outl %eax,\(%dx\)
5: 48 ef rex.W outl %eax,\(%dx\)
7: 66 48 ef data32 rex.W outl %eax,\(%dx\)
0+00a <_ins>:
a: 48 6d rex.W insl \(%dx\),%es:\(%rdi\)
c: 66 data16
d: 48 6d rex.W insl \(%dx\),%es:\(%rdi\)
a: 48 6d rex.W insl \(%dx\),%es:\(%rdi\)
c: 66 48 6d data32 rex.W insl \(%dx\),%es:\(%rdi\)
0+00f <_outs>:
f: 48 6f rex.W outsl %ds:\(%rsi\),\(%dx\)
11: 66 data16
12: 48 6f rex.W outsl %ds:\(%rsi\),\(%dx\)
f: 48 6f rex.W outsl %ds:\(%rsi\),\(%dx\)
11: 66 48 6f data32 rex.W outsl %ds:\(%rsi\),\(%dx\)
#pass

View File

@ -6,22 +6,18 @@
Disassembly of section .text:
0+000 <_in>:
0: 48 ed rex.W in \(%dx\),%eax
2: 66 data16
3: 48 ed rex.W in \(%dx\),%eax
0: 48 ed rex.W in \(%dx\),%eax
2: 66 48 ed data32 rex.W in \(%dx\),%eax
0+005 <_out>:
5: 48 ef rex.W out %eax,\(%dx\)
7: 66 data16
8: 48 ef rex.W out %eax,\(%dx\)
5: 48 ef rex.W out %eax,\(%dx\)
7: 66 48 ef data32 rex.W out %eax,\(%dx\)
0+00a <_ins>:
a: 48 6d rex.W insl \(%dx\),%es:\(%rdi\)
c: 66 data16
d: 48 6d rex.W insl \(%dx\),%es:\(%rdi\)
a: 48 6d rex.W insl \(%dx\),%es:\(%rdi\)
c: 66 48 6d data32 rex.W insl \(%dx\),%es:\(%rdi\)
0+00f <_outs>:
f: 48 6f rex.W outsl %ds:\(%rsi\),\(%dx\)
11: 66 data16
12: 48 6f rex.W outsl %ds:\(%rsi\),\(%dx\)
f: 48 6f rex.W outsl %ds:\(%rsi\),\(%dx\)
11: 66 48 6f data32 rex.W outsl %ds:\(%rsi\),\(%dx\)
#pass

View File

@ -0,0 +1,14 @@
#objdump: -dwMintel
#name: x86-64 long insns (Intel disassembly)
#source: x86-64-long-1.s
.*: +file format .*
Disassembly of section .text:
0+ <foo>:
[ ]*[a-f0-9]+: f2 f0 f0 f0 f2 f2 f2 f2 f2 f2 f0 f0 66 0f 28 repnz lock lock lock repnz repnz repnz repnz repnz repnz lock lock \(bad\)
[ ]*[a-f0-9]+: 00 f2 add dl,dh
[ ]*[a-f0-9]+: f0 f0 f0 f2 f2 f2 f2 f0 f0 f0 f0 66 0f 28 00 lock lock lock repnz repnz repnz repnz lock lock lock lock movapd xmm0,XMMWORD PTR \[rax\]
#pass

View File

@ -0,0 +1,13 @@
#objdump: -dw
#name: x86-64 long insns
.*: +file format .*
Disassembly of section .text:
0+ <foo>:
[ ]*[a-f0-9]+: f2 f0 f0 f0 f2 f2 f2 f2 f2 f2 f0 f0 66 0f 28 repnz lock lock lock repnz repnz repnz repnz repnz repnz lock lock \(bad\)
[ ]*[a-f0-9]+: 00 f2 add %dh,%dl
[ ]*[a-f0-9]+: f0 f0 f0 f2 f2 f2 f2 f0 f0 f0 f0 66 0f 28 00 lock lock lock repnz repnz repnz repnz lock lock lock lock movapd \(%rax\),%xmm0
#pass

View File

@ -0,0 +1,30 @@
# 64bit long Instructions
.text
foo:
.byte 0xf2
.byte 0xf0
.byte 0xf0
.byte 0xf0
.byte 0xf2
.byte 0xf2
.byte 0xf2
.byte 0xf2
.byte 0xf2
.byte 0xf2
.byte 0xf0
.byte 0xf0
movapd (%rax), %xmm0
.byte 0xf2
.byte 0xf0
.byte 0xf0
.byte 0xf0
.byte 0xf2
.byte 0xf2
.byte 0xf2
.byte 0xf2
.byte 0xf0
.byte 0xf0
.byte 0xf0
.byte 0xf0
movapd (%rax), %xmm0

View File

@ -198,196 +198,196 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: 8f ea 90 12 cd 78 56 34 12[ ]+lwpval \$0x12345678,%ebp,%r13
[ ]*[a-f0-9]+: 8f ea 88 12 ce 78 56 34 12[ ]+lwpval \$0x12345678,%esi,%r14
[ ]*[a-f0-9]+: 8f ea 80 12 cf 78 56 34 12[ ]+lwpval \$0x12345678,%edi,%r15
[ ]*[a-f0-9]+: 67 8f ea 78 12 00 34 12[ ]+addr32 lwpins \$0x1234,\(%eax\),%ax
[ ]*[a-f0-9]+: 67 8f ea 70 12 01 34 12[ ]+addr32 lwpins \$0x1234,\(%ecx\),%cx
[ ]*[a-f0-9]+: 67 8f ea 68 12 02 34 12[ ]+addr32 lwpins \$0x1234,\(%edx\),%dx
[ ]*[a-f0-9]+: 67 8f ea 60 12 03 34 12[ ]+addr32 lwpins \$0x1234,\(%ebx\),%bx
[ ]*[a-f0-9]+: 67 8f ea 58 12 04 24 34 12[ ]+addr32 lwpins \$0x1234,\(%esp\),%sp
[ ]*[a-f0-9]+: 67 8f ea 50 12 45 00 34 12[ ]+addr32 lwpins \$0x1234,0x0\(%ebp\),%bp
[ ]*[a-f0-9]+: 67 8f ea 48 12 06 34 12[ ]+addr32 lwpins \$0x1234,\(%esi\),%si
[ ]*[a-f0-9]+: 67 8f ea 40 12 07 34 12[ ]+addr32 lwpins \$0x1234,\(%edi\),%di
[ ]*[a-f0-9]+: 67 8f ca 38 12 00 34 12[ ]+addr32 lwpins \$0x1234,\(%r8d\),%r8w
[ ]*[a-f0-9]+: 67 8f ca 30 12 01 34 12[ ]+addr32 lwpins \$0x1234,\(%r9d\),%r9w
[ ]*[a-f0-9]+: 67 8f ca 28 12 02 34 12[ ]+addr32 lwpins \$0x1234,\(%r10d\),%r10w
[ ]*[a-f0-9]+: 67 8f ca 20 12 03 34 12[ ]+addr32 lwpins \$0x1234,\(%r11d\),%r11w
[ ]*[a-f0-9]+: 67 8f ca 18 12 04 24 34 12[ ]+addr32 lwpins \$0x1234,\(%r12d\),%r12w
[ ]*[a-f0-9]+: 67 8f ca 10 12 45 00 34 12[ ]+addr32 lwpins \$0x1234,0x0\(%r13d\),%r13w
[ ]*[a-f0-9]+: 67 8f ca 08 12 06 34 12[ ]+addr32 lwpins \$0x1234,\(%r14d\),%r14w
[ ]*[a-f0-9]+: 67 8f ca 00 12 07 34 12[ ]+addr32 lwpins \$0x1234,\(%r15d\),%r15w
[ ]*[a-f0-9]+: 67 8f ca 7c 12 07 78 56 34 12[ ]+addr32 lwpins \$0x12345678,\(%r15d\),%eax
[ ]*[a-f0-9]+: 67 8f ca 74 12 06 78 56 34 12[ ]+addr32 lwpins \$0x12345678,\(%r14d\),%ecx
[ ]*[a-f0-9]+: 67 8f ca 6c 12 45 00 78 56 34 12[ ]+addr32 lwpins \$0x12345678,0x0\(%r13d\),%edx
[ ]*[a-f0-9]+: 67 8f ca 64 12 04 24 78 56 34 12[ ]+addr32 lwpins \$0x12345678,\(%r12d\),%ebx
[ ]*[a-f0-9]+: 67 8f ca 5c 12 03 78 56 34 12[ ]+addr32 lwpins \$0x12345678,\(%r11d\),%esp
[ ]*[a-f0-9]+: 67 8f ca 54 12 02 78 56 34 12[ ]+addr32 lwpins \$0x12345678,\(%r10d\),%ebp
[ ]*[a-f0-9]+: 67 8f ca 4c 12 01 78 56 34 12[ ]+addr32 lwpins \$0x12345678,\(%r9d\),%esi
[ ]*[a-f0-9]+: 67 8f ca 44 12 00 78 56 34 12[ ]+addr32 lwpins \$0x12345678,\(%r8d\),%edi
[ ]*[a-f0-9]+: 67 8f ea 3c 12 07 78 56 34 12[ ]+addr32 lwpins \$0x12345678,\(%edi\),%r8d
[ ]*[a-f0-9]+: 67 8f ea 34 12 06 78 56 34 12[ ]+addr32 lwpins \$0x12345678,\(%esi\),%r9d
[ ]*[a-f0-9]+: 67 8f ea 2c 12 45 00 78 56 34 12[ ]+addr32 lwpins \$0x12345678,0x0\(%ebp\),%r10d
[ ]*[a-f0-9]+: 67 8f ea 24 12 04 24 78 56 34 12[ ]+addr32 lwpins \$0x12345678,\(%esp\),%r11d
[ ]*[a-f0-9]+: 67 8f ea 1c 12 03 78 56 34 12[ ]+addr32 lwpins \$0x12345678,\(%ebx\),%r12d
[ ]*[a-f0-9]+: 67 8f ea 14 12 02 78 56 34 12[ ]+addr32 lwpins \$0x12345678,\(%edx\),%r13d
[ ]*[a-f0-9]+: 67 8f ea 0c 12 01 78 56 34 12[ ]+addr32 lwpins \$0x12345678,\(%ecx\),%r14d
[ ]*[a-f0-9]+: 67 8f ea 04 12 00 78 56 34 12[ ]+addr32 lwpins \$0x12345678,\(%eax\),%r15d
[ ]*[a-f0-9]+: 67 8f ca f8 12 07 78 56 34 12[ ]+addr32 lwpins \$0x12345678,\(%r15d\),%rax
[ ]*[a-f0-9]+: 67 8f ca f0 12 06 78 56 34 12[ ]+addr32 lwpins \$0x12345678,\(%r14d\),%rcx
[ ]*[a-f0-9]+: 67 8f ca e8 12 45 00 78 56 34 12[ ]+addr32 lwpins \$0x12345678,0x0\(%r13d\),%rdx
[ ]*[a-f0-9]+: 67 8f ca e0 12 04 24 78 56 34 12[ ]+addr32 lwpins \$0x12345678,\(%r12d\),%rbx
[ ]*[a-f0-9]+: 67 8f ca d8 12 03 78 56 34 12[ ]+addr32 lwpins \$0x12345678,\(%r11d\),%rsp
[ ]*[a-f0-9]+: 67 8f ca d0 12 02 78 56 34 12[ ]+addr32 lwpins \$0x12345678,\(%r10d\),%rbp
[ ]*[a-f0-9]+: 67 8f ca c8 12 01 78 56 34 12[ ]+addr32 lwpins \$0x12345678,\(%r9d\),%rsi
[ ]*[a-f0-9]+: 67 8f ca c0 12 00 78 56 34 12[ ]+addr32 lwpins \$0x12345678,\(%r8d\),%rdi
[ ]*[a-f0-9]+: 67 8f ea b8 12 00 78 56 34 12[ ]+addr32 lwpins \$0x12345678,\(%eax\),%r8
[ ]*[a-f0-9]+: 67 8f ea b0 12 01 78 56 34 12[ ]+addr32 lwpins \$0x12345678,\(%ecx\),%r9
[ ]*[a-f0-9]+: 67 8f ea a8 12 02 78 56 34 12[ ]+addr32 lwpins \$0x12345678,\(%edx\),%r10
[ ]*[a-f0-9]+: 67 8f ea a0 12 03 78 56 34 12[ ]+addr32 lwpins \$0x12345678,\(%ebx\),%r11
[ ]*[a-f0-9]+: 67 8f ea 98 12 04 24 78 56 34 12[ ]+addr32 lwpins \$0x12345678,\(%esp\),%r12
[ ]*[a-f0-9]+: 67 8f ea 90 12 45 00 78 56 34 12[ ]+addr32 lwpins \$0x12345678,0x0\(%ebp\),%r13
[ ]*[a-f0-9]+: 67 8f ea 88 12 06 78 56 34 12[ ]+addr32 lwpins \$0x12345678,\(%esi\),%r14
[ ]*[a-f0-9]+: 67 8f ea 80 12 07 78 56 34 12[ ]+addr32 lwpins \$0x12345678,\(%edi\),%r15
[ ]*[a-f0-9]+: 67 8f ea 78 12 08 34 12[ ]+addr32 lwpval \$0x1234,\(%eax\),%ax
[ ]*[a-f0-9]+: 67 8f ea 70 12 09 34 12[ ]+addr32 lwpval \$0x1234,\(%ecx\),%cx
[ ]*[a-f0-9]+: 67 8f ea 68 12 0a 34 12[ ]+addr32 lwpval \$0x1234,\(%edx\),%dx
[ ]*[a-f0-9]+: 67 8f ea 60 12 0b 34 12[ ]+addr32 lwpval \$0x1234,\(%ebx\),%bx
[ ]*[a-f0-9]+: 67 8f ea 58 12 0c 24 34 12[ ]+addr32 lwpval \$0x1234,\(%esp\),%sp
[ ]*[a-f0-9]+: 67 8f ea 50 12 4d 00 34 12[ ]+addr32 lwpval \$0x1234,0x0\(%ebp\),%bp
[ ]*[a-f0-9]+: 67 8f ea 48 12 0e 34 12[ ]+addr32 lwpval \$0x1234,\(%esi\),%si
[ ]*[a-f0-9]+: 67 8f ea 40 12 0f 34 12[ ]+addr32 lwpval \$0x1234,\(%edi\),%di
[ ]*[a-f0-9]+: 67 8f ca 38 12 08 34 12[ ]+addr32 lwpval \$0x1234,\(%r8d\),%r8w
[ ]*[a-f0-9]+: 67 8f ca 30 12 09 34 12[ ]+addr32 lwpval \$0x1234,\(%r9d\),%r9w
[ ]*[a-f0-9]+: 67 8f ca 28 12 0a 34 12[ ]+addr32 lwpval \$0x1234,\(%r10d\),%r10w
[ ]*[a-f0-9]+: 67 8f ca 20 12 0b 34 12[ ]+addr32 lwpval \$0x1234,\(%r11d\),%r11w
[ ]*[a-f0-9]+: 67 8f ca 18 12 0c 24 34 12[ ]+addr32 lwpval \$0x1234,\(%r12d\),%r12w
[ ]*[a-f0-9]+: 67 8f ca 10 12 4d 00 34 12[ ]+addr32 lwpval \$0x1234,0x0\(%r13d\),%r13w
[ ]*[a-f0-9]+: 67 8f ca 08 12 0e 34 12[ ]+addr32 lwpval \$0x1234,\(%r14d\),%r14w
[ ]*[a-f0-9]+: 67 8f ca 00 12 0f 34 12[ ]+addr32 lwpval \$0x1234,\(%r15d\),%r15w
[ ]*[a-f0-9]+: 67 8f ca 7c 12 0f 78 56 34 12[ ]+addr32 lwpval \$0x12345678,\(%r15d\),%eax
[ ]*[a-f0-9]+: 67 8f ca 74 12 0e 78 56 34 12[ ]+addr32 lwpval \$0x12345678,\(%r14d\),%ecx
[ ]*[a-f0-9]+: 67 8f ca 6c 12 4d 00 78 56 34 12[ ]+addr32 lwpval \$0x12345678,0x0\(%r13d\),%edx
[ ]*[a-f0-9]+: 67 8f ca 64 12 0c 24 78 56 34 12[ ]+addr32 lwpval \$0x12345678,\(%r12d\),%ebx
[ ]*[a-f0-9]+: 67 8f ca 5c 12 0b 78 56 34 12[ ]+addr32 lwpval \$0x12345678,\(%r11d\),%esp
[ ]*[a-f0-9]+: 67 8f ca 54 12 0a 78 56 34 12[ ]+addr32 lwpval \$0x12345678,\(%r10d\),%ebp
[ ]*[a-f0-9]+: 67 8f ca 4c 12 09 78 56 34 12[ ]+addr32 lwpval \$0x12345678,\(%r9d\),%esi
[ ]*[a-f0-9]+: 67 8f ca 44 12 08 78 56 34 12[ ]+addr32 lwpval \$0x12345678,\(%r8d\),%edi
[ ]*[a-f0-9]+: 67 8f ea 3c 12 0f 78 56 34 12[ ]+addr32 lwpval \$0x12345678,\(%edi\),%r8d
[ ]*[a-f0-9]+: 67 8f ea 34 12 0e 78 56 34 12[ ]+addr32 lwpval \$0x12345678,\(%esi\),%r9d
[ ]*[a-f0-9]+: 67 8f ea 2c 12 4d 00 78 56 34 12[ ]+addr32 lwpval \$0x12345678,0x0\(%ebp\),%r10d
[ ]*[a-f0-9]+: 67 8f ea 24 12 0c 24 78 56 34 12[ ]+addr32 lwpval \$0x12345678,\(%esp\),%r11d
[ ]*[a-f0-9]+: 67 8f ea 1c 12 0b 78 56 34 12[ ]+addr32 lwpval \$0x12345678,\(%ebx\),%r12d
[ ]*[a-f0-9]+: 67 8f ea 14 12 0a 78 56 34 12[ ]+addr32 lwpval \$0x12345678,\(%edx\),%r13d
[ ]*[a-f0-9]+: 67 8f ea 0c 12 09 78 56 34 12[ ]+addr32 lwpval \$0x12345678,\(%ecx\),%r14d
[ ]*[a-f0-9]+: 67 8f ea 04 12 08 78 56 34 12[ ]+addr32 lwpval \$0x12345678,\(%eax\),%r15d
[ ]*[a-f0-9]+: 67 8f ca f8 12 0f 78 56 34 12[ ]+addr32 lwpval \$0x12345678,\(%r15d\),%rax
[ ]*[a-f0-9]+: 67 8f ca f0 12 0e 78 56 34 12[ ]+addr32 lwpval \$0x12345678,\(%r14d\),%rcx
[ ]*[a-f0-9]+: 67 8f ca e8 12 4d 00 78 56 34 12[ ]+addr32 lwpval \$0x12345678,0x0\(%r13d\),%rdx
[ ]*[a-f0-9]+: 67 8f ca e0 12 0c 24 78 56 34 12[ ]+addr32 lwpval \$0x12345678,\(%r12d\),%rbx
[ ]*[a-f0-9]+: 67 8f ca d8 12 0b 78 56 34 12[ ]+addr32 lwpval \$0x12345678,\(%r11d\),%rsp
[ ]*[a-f0-9]+: 67 8f ca d0 12 0a 78 56 34 12[ ]+addr32 lwpval \$0x12345678,\(%r10d\),%rbp
[ ]*[a-f0-9]+: 67 8f ca c8 12 09 78 56 34 12[ ]+addr32 lwpval \$0x12345678,\(%r9d\),%rsi
[ ]*[a-f0-9]+: 67 8f ca c0 12 08 78 56 34 12[ ]+addr32 lwpval \$0x12345678,\(%r8d\),%rdi
[ ]*[a-f0-9]+: 67 8f ea b8 12 08 78 56 34 12[ ]+addr32 lwpval \$0x12345678,\(%eax\),%r8
[ ]*[a-f0-9]+: 67 8f ea b0 12 09 78 56 34 12[ ]+addr32 lwpval \$0x12345678,\(%ecx\),%r9
[ ]*[a-f0-9]+: 67 8f ea a8 12 0a 78 56 34 12[ ]+addr32 lwpval \$0x12345678,\(%edx\),%r10
[ ]*[a-f0-9]+: 67 8f ea a0 12 0b 78 56 34 12[ ]+addr32 lwpval \$0x12345678,\(%ebx\),%r11
[ ]*[a-f0-9]+: 67 8f ea 98 12 0c 24 78 56 34 12[ ]+addr32 lwpval \$0x12345678,\(%esp\),%r12
[ ]*[a-f0-9]+: 67 8f ea 90 12 4d 00 78 56 34 12[ ]+addr32 lwpval \$0x12345678,0x0\(%ebp\),%r13
[ ]*[a-f0-9]+: 67 8f ea 88 12 0e 78 56 34 12[ ]+addr32 lwpval \$0x12345678,\(%esi\),%r14
[ ]*[a-f0-9]+: 67 8f ea 80 12 0f 78 56 34 12[ ]+addr32 lwpval \$0x12345678,\(%edi\),%r15
[ ]*[a-f0-9]+: 67 8f ea 78 12 80 fe ca 00 00 34 12[ ]+addr32 lwpins \$0x1234,0xcafe\(%eax\),%ax
[ ]*[a-f0-9]+: 67 8f ea 70 12 81 fe ca 00 00 34 12[ ]+addr32 lwpins \$0x1234,0xcafe\(%ecx\),%cx
[ ]*[a-f0-9]+: 67 8f ea 68 12 82 fe ca 00 00 34 12[ ]+addr32 lwpins \$0x1234,0xcafe\(%edx\),%dx
[ ]*[a-f0-9]+: 67 8f ea 60 12 83 fe ca 00 00 34 12[ ]+addr32 lwpins \$0x1234,0xcafe\(%ebx\),%bx
[ ]*[a-f0-9]+: 67 8f ea 58 12 84 24 fe ca 00 00 34 12[ ]+addr32 lwpins \$0x1234,0xcafe\(%esp\),%sp
[ ]*[a-f0-9]+: 67 8f ea 50 12 85 fe ca 00 00 34 12[ ]+addr32 lwpins \$0x1234,0xcafe\(%ebp\),%bp
[ ]*[a-f0-9]+: 67 8f ea 48 12 86 fe ca 00 00 34 12[ ]+addr32 lwpins \$0x1234,0xcafe\(%esi\),%si
[ ]*[a-f0-9]+: 67 8f ea 40 12 87 fe ca 00 00 34 12[ ]+addr32 lwpins \$0x1234,0xcafe\(%edi\),%di
[ ]*[a-f0-9]+: 67 8f ca 38 12 80 fe ca 00 00 34 12[ ]+addr32 lwpins \$0x1234,0xcafe\(%r8d\),%r8w
[ ]*[a-f0-9]+: 67 8f ca 30 12 81 fe ca 00 00 34 12[ ]+addr32 lwpins \$0x1234,0xcafe\(%r9d\),%r9w
[ ]*[a-f0-9]+: 67 8f ca 28 12 82 fe ca 00 00 34 12[ ]+addr32 lwpins \$0x1234,0xcafe\(%r10d\),%r10w
[ ]*[a-f0-9]+: 67 8f ca 20 12 83 fe ca 00 00 34 12[ ]+addr32 lwpins \$0x1234,0xcafe\(%r11d\),%r11w
[ ]*[a-f0-9]+: 67 8f ca 18 12 84 24 fe ca 00 00 34 12[ ]+addr32 lwpins \$0x1234,0xcafe\(%r12d\),%r12w
[ ]*[a-f0-9]+: 67 8f ca 10 12 85 fe ca 00 00 34 12[ ]+addr32 lwpins \$0x1234,0xcafe\(%r13d\),%r13w
[ ]*[a-f0-9]+: 67 8f ca 08 12 86 fe ca 00 00 34 12[ ]+addr32 lwpins \$0x1234,0xcafe\(%r14d\),%r14w
[ ]*[a-f0-9]+: 67 8f ca 00 12 87 fe ca 00 00 34 12[ ]+addr32 lwpins \$0x1234,0xcafe\(%r15d\),%r15w
[ ]*[a-f0-9]+: 67 8f ca 7c 12 87 fe ca 00 00 78 56 34 12[ ]+addr32 lwpins \$0x12345678,0xcafe\(%r15d\),%eax
[ ]*[a-f0-9]+: 67 8f ca 74 12 86 fe ca 00 00 78 56 34 12[ ]+addr32 lwpins \$0x12345678,0xcafe\(%r14d\),%ecx
[ ]*[a-f0-9]+: 67 8f ca 6c 12 85 fe ca 00 00 78 56 34 12[ ]+addr32 lwpins \$0x12345678,0xcafe\(%r13d\),%edx
[ ]*[a-f0-9]+: 67 8f ca 64 12 84 24 fe ca 00 00 78 56 34 12[ ]+addr32 lwpins \$0x12345678,0xcafe\(%r12d\),%ebx
[ ]*[a-f0-9]+: 67 8f ca 5c 12 83 fe ca 00 00 78 56 34 12[ ]+addr32 lwpins \$0x12345678,0xcafe\(%r11d\),%esp
[ ]*[a-f0-9]+: 67 8f ca 54 12 82 fe ca 00 00 78 56 34 12[ ]+addr32 lwpins \$0x12345678,0xcafe\(%r10d\),%ebp
[ ]*[a-f0-9]+: 67 8f ca 4c 12 81 fe ca 00 00 78 56 34 12[ ]+addr32 lwpins \$0x12345678,0xcafe\(%r9d\),%esi
[ ]*[a-f0-9]+: 67 8f ca 44 12 80 fe ca 00 00 78 56 34 12[ ]+addr32 lwpins \$0x12345678,0xcafe\(%r8d\),%edi
[ ]*[a-f0-9]+: 67 8f ea 3c 12 87 fe ca 00 00 78 56 34 12[ ]+addr32 lwpins \$0x12345678,0xcafe\(%edi\),%r8d
[ ]*[a-f0-9]+: 67 8f ea 34 12 86 fe ca 00 00 78 56 34 12[ ]+addr32 lwpins \$0x12345678,0xcafe\(%esi\),%r9d
[ ]*[a-f0-9]+: 67 8f ea 2c 12 85 fe ca 00 00 78 56 34 12[ ]+addr32 lwpins \$0x12345678,0xcafe\(%ebp\),%r10d
[ ]*[a-f0-9]+: 67 8f ea 24 12 84 24 fe ca 00 00 78 56 34 12[ ]+addr32 lwpins \$0x12345678,0xcafe\(%esp\),%r11d
[ ]*[a-f0-9]+: 67 8f ea 1c 12 83 fe ca 00 00 78 56 34 12[ ]+addr32 lwpins \$0x12345678,0xcafe\(%ebx\),%r12d
[ ]*[a-f0-9]+: 67 8f ea 14 12 82 fe ca 00 00 78 56 34 12[ ]+addr32 lwpins \$0x12345678,0xcafe\(%edx\),%r13d
[ ]*[a-f0-9]+: 67 8f ea 0c 12 81 fe ca 00 00 78 56 34 12[ ]+addr32 lwpins \$0x12345678,0xcafe\(%ecx\),%r14d
[ ]*[a-f0-9]+: 67 8f ea 04 12 80 fe ca 00 00 78 56 34 12[ ]+addr32 lwpins \$0x12345678,0xcafe\(%eax\),%r15d
[ ]*[a-f0-9]+: 67 8f ca f8 12 87 fe ca 00 00 78 56 34 12[ ]+addr32 lwpins \$0x12345678,0xcafe\(%r15d\),%rax
[ ]*[a-f0-9]+: 67 8f ca f0 12 86 fe ca 00 00 78 56 34 12[ ]+addr32 lwpins \$0x12345678,0xcafe\(%r14d\),%rcx
[ ]*[a-f0-9]+: 67 8f ca e8 12 85 fe ca 00 00 78 56 34 12[ ]+addr32 lwpins \$0x12345678,0xcafe\(%r13d\),%rdx
[ ]*[a-f0-9]+: 67 8f ca e0 12 84 24 fe ca 00 00 78 56 34 12[ ]+addr32 lwpins \$0x12345678,0xcafe\(%r12d\),%rbx
[ ]*[a-f0-9]+: 67 8f ca d8 12 83 fe ca 00 00 78 56 34 12[ ]+addr32 lwpins \$0x12345678,0xcafe\(%r11d\),%rsp
[ ]*[a-f0-9]+: 67 8f ca d0 12 82 fe ca 00 00 78 56 34 12[ ]+addr32 lwpins \$0x12345678,0xcafe\(%r10d\),%rbp
[ ]*[a-f0-9]+: 67 8f ca c8 12 81 fe ca 00 00 78 56 34 12[ ]+addr32 lwpins \$0x12345678,0xcafe\(%r9d\),%rsi
[ ]*[a-f0-9]+: 67 8f ca c0 12 80 fe ca 00 00 78 56 34 12[ ]+addr32 lwpins \$0x12345678,0xcafe\(%r8d\),%rdi
[ ]*[a-f0-9]+: 67 8f ea b8 12 80 fe ca 00 00 78 56 34 12[ ]+addr32 lwpins \$0x12345678,0xcafe\(%eax\),%r8
[ ]*[a-f0-9]+: 67 8f ea b0 12 81 fe ca 00 00 78 56 34 12[ ]+addr32 lwpins \$0x12345678,0xcafe\(%ecx\),%r9
[ ]*[a-f0-9]+: 67 8f ea a8 12 82 fe ca 00 00 78 56 34 12[ ]+addr32 lwpins \$0x12345678,0xcafe\(%edx\),%r10
[ ]*[a-f0-9]+: 67 8f ea a0 12 83 fe ca 00 00 78 56 34 12[ ]+addr32 lwpins \$0x12345678,0xcafe\(%ebx\),%r11
[ ]*[a-f0-9]+: 67 8f ea 98 12 84 24 fe ca 00 00 78 56 34 12[ ]+addr32 lwpins \$0x12345678,0xcafe\(%esp\),%r12
[ ]*[a-f0-9]+: 67 8f ea 90 12 85 fe ca 00 00 78 56 34 12[ ]+addr32 lwpins \$0x12345678,0xcafe\(%ebp\),%r13
[ ]*[a-f0-9]+: 67 8f ea 88 12 86 fe ca 00 00 78 56 34 12[ ]+addr32 lwpins \$0x12345678,0xcafe\(%esi\),%r14
[ ]*[a-f0-9]+: 67 8f ea 80 12 87 fe ca 00 00 78 56 34 12[ ]+addr32 lwpins \$0x12345678,0xcafe\(%edi\),%r15
[ ]*[a-f0-9]+: 67 8f ea 78 12 88 fe ca 00 00 34 12[ ]+addr32 lwpval \$0x1234,0xcafe\(%eax\),%ax
[ ]*[a-f0-9]+: 67 8f ea 70 12 89 fe ca 00 00 34 12[ ]+addr32 lwpval \$0x1234,0xcafe\(%ecx\),%cx
[ ]*[a-f0-9]+: 67 8f ea 68 12 8a fe ca 00 00 34 12[ ]+addr32 lwpval \$0x1234,0xcafe\(%edx\),%dx
[ ]*[a-f0-9]+: 67 8f ea 60 12 8b fe ca 00 00 34 12[ ]+addr32 lwpval \$0x1234,0xcafe\(%ebx\),%bx
[ ]*[a-f0-9]+: 67 8f ea 58 12 8c 24 fe ca 00 00 34 12[ ]+addr32 lwpval \$0x1234,0xcafe\(%esp\),%sp
[ ]*[a-f0-9]+: 67 8f ea 50 12 8d fe ca 00 00 34 12[ ]+addr32 lwpval \$0x1234,0xcafe\(%ebp\),%bp
[ ]*[a-f0-9]+: 67 8f ea 48 12 8e fe ca 00 00 34 12[ ]+addr32 lwpval \$0x1234,0xcafe\(%esi\),%si
[ ]*[a-f0-9]+: 67 8f ea 40 12 8f fe ca 00 00 34 12[ ]+addr32 lwpval \$0x1234,0xcafe\(%edi\),%di
[ ]*[a-f0-9]+: 67 8f ca 38 12 88 fe ca 00 00 34 12[ ]+addr32 lwpval \$0x1234,0xcafe\(%r8d\),%r8w
[ ]*[a-f0-9]+: 67 8f ca 30 12 89 fe ca 00 00 34 12[ ]+addr32 lwpval \$0x1234,0xcafe\(%r9d\),%r9w
[ ]*[a-f0-9]+: 67 8f ca 28 12 8a fe ca 00 00 34 12[ ]+addr32 lwpval \$0x1234,0xcafe\(%r10d\),%r10w
[ ]*[a-f0-9]+: 67 8f ca 20 12 8b fe ca 00 00 34 12[ ]+addr32 lwpval \$0x1234,0xcafe\(%r11d\),%r11w
[ ]*[a-f0-9]+: 67 8f ca 18 12 8c 24 fe ca 00 00 34 12[ ]+addr32 lwpval \$0x1234,0xcafe\(%r12d\),%r12w
[ ]*[a-f0-9]+: 67 8f ca 10 12 8d fe ca 00 00 34 12[ ]+addr32 lwpval \$0x1234,0xcafe\(%r13d\),%r13w
[ ]*[a-f0-9]+: 67 8f ca 08 12 8e fe ca 00 00 34 12[ ]+addr32 lwpval \$0x1234,0xcafe\(%r14d\),%r14w
[ ]*[a-f0-9]+: 67 8f ca 00 12 8f fe ca 00 00 34 12[ ]+addr32 lwpval \$0x1234,0xcafe\(%r15d\),%r15w
[ ]*[a-f0-9]+: 67 8f ca 7c 12 8f fe ca 00 00 78 56 34 12[ ]+addr32 lwpval \$0x12345678,0xcafe\(%r15d\),%eax
[ ]*[a-f0-9]+: 67 8f ca 74 12 8e fe ca 00 00 78 56 34 12[ ]+addr32 lwpval \$0x12345678,0xcafe\(%r14d\),%ecx
[ ]*[a-f0-9]+: 67 8f ca 6c 12 8d fe ca 00 00 78 56 34 12[ ]+addr32 lwpval \$0x12345678,0xcafe\(%r13d\),%edx
[ ]*[a-f0-9]+: 67 8f ca 64 12 8c 24 fe ca 00 00 78 56 34 12[ ]+addr32 lwpval \$0x12345678,0xcafe\(%r12d\),%ebx
[ ]*[a-f0-9]+: 67 8f ca 5c 12 8b fe ca 00 00 78 56 34 12[ ]+addr32 lwpval \$0x12345678,0xcafe\(%r11d\),%esp
[ ]*[a-f0-9]+: 67 8f ca 54 12 8a fe ca 00 00 78 56 34 12[ ]+addr32 lwpval \$0x12345678,0xcafe\(%r10d\),%ebp
[ ]*[a-f0-9]+: 67 8f ca 4c 12 89 fe ca 00 00 78 56 34 12[ ]+addr32 lwpval \$0x12345678,0xcafe\(%r9d\),%esi
[ ]*[a-f0-9]+: 67 8f ca 44 12 88 fe ca 00 00 78 56 34 12[ ]+addr32 lwpval \$0x12345678,0xcafe\(%r8d\),%edi
[ ]*[a-f0-9]+: 67 8f ea 3c 12 8f fe ca 00 00 78 56 34 12[ ]+addr32 lwpval \$0x12345678,0xcafe\(%edi\),%r8d
[ ]*[a-f0-9]+: 67 8f ea 34 12 8e fe ca 00 00 78 56 34 12[ ]+addr32 lwpval \$0x12345678,0xcafe\(%esi\),%r9d
[ ]*[a-f0-9]+: 67 8f ea 2c 12 8d fe ca 00 00 78 56 34 12[ ]+addr32 lwpval \$0x12345678,0xcafe\(%ebp\),%r10d
[ ]*[a-f0-9]+: 67 8f ea 24 12 8c 24 fe ca 00 00 78 56 34 12[ ]+addr32 lwpval \$0x12345678,0xcafe\(%esp\),%r11d
[ ]*[a-f0-9]+: 67 8f ea 1c 12 8b fe ca 00 00 78 56 34 12[ ]+addr32 lwpval \$0x12345678,0xcafe\(%ebx\),%r12d
[ ]*[a-f0-9]+: 67 8f ea 14 12 8a fe ca 00 00 78 56 34 12[ ]+addr32 lwpval \$0x12345678,0xcafe\(%edx\),%r13d
[ ]*[a-f0-9]+: 67 8f ea 0c 12 89 fe ca 00 00 78 56 34 12[ ]+addr32 lwpval \$0x12345678,0xcafe\(%ecx\),%r14d
[ ]*[a-f0-9]+: 67 8f ea 04 12 88 fe ca 00 00 78 56 34 12[ ]+addr32 lwpval \$0x12345678,0xcafe\(%eax\),%r15d
[ ]*[a-f0-9]+: 67 8f ca f8 12 8f fe ca 00 00 78 56 34 12[ ]+addr32 lwpval \$0x12345678,0xcafe\(%r15d\),%rax
[ ]*[a-f0-9]+: 67 8f ca f0 12 8e fe ca 00 00 78 56 34 12[ ]+addr32 lwpval \$0x12345678,0xcafe\(%r14d\),%rcx
[ ]*[a-f0-9]+: 67 8f ca e8 12 8d fe ca 00 00 78 56 34 12[ ]+addr32 lwpval \$0x12345678,0xcafe\(%r13d\),%rdx
[ ]*[a-f0-9]+: 67 8f ca e0 12 8c 24 fe ca 00 00 78 56 34 12[ ]+addr32 lwpval \$0x12345678,0xcafe\(%r12d\),%rbx
[ ]*[a-f0-9]+: 67 8f ca d8 12 8b fe ca 00 00 78 56 34 12[ ]+addr32 lwpval \$0x12345678,0xcafe\(%r11d\),%rsp
[ ]*[a-f0-9]+: 67 8f ca d0 12 8a fe ca 00 00 78 56 34 12[ ]+addr32 lwpval \$0x12345678,0xcafe\(%r10d\),%rbp
[ ]*[a-f0-9]+: 67 8f ca c8 12 89 fe ca 00 00 78 56 34 12[ ]+addr32 lwpval \$0x12345678,0xcafe\(%r9d\),%rsi
[ ]*[a-f0-9]+: 67 8f ca c0 12 88 fe ca 00 00 78 56 34 12[ ]+addr32 lwpval \$0x12345678,0xcafe\(%r8d\),%rdi
[ ]*[a-f0-9]+: 67 8f ea b8 12 88 fe ca 00 00 78 56 34 12[ ]+addr32 lwpval \$0x12345678,0xcafe\(%eax\),%r8
[ ]*[a-f0-9]+: 67 8f ea b0 12 89 fe ca 00 00 78 56 34 12[ ]+addr32 lwpval \$0x12345678,0xcafe\(%ecx\),%r9
[ ]*[a-f0-9]+: 67 8f ea a8 12 8a fe ca 00 00 78 56 34 12[ ]+addr32 lwpval \$0x12345678,0xcafe\(%edx\),%r10
[ ]*[a-f0-9]+: 67 8f ea a0 12 8b fe ca 00 00 78 56 34 12[ ]+addr32 lwpval \$0x12345678,0xcafe\(%ebx\),%r11
[ ]*[a-f0-9]+: 67 8f ea 98 12 8c 24 fe ca 00 00 78 56 34 12[ ]+addr32 lwpval \$0x12345678,0xcafe\(%esp\),%r12
[ ]*[a-f0-9]+: 67 8f ea 90 12 8d fe ca 00 00 78 56 34 12[ ]+addr32 lwpval \$0x12345678,0xcafe\(%ebp\),%r13
[ ]*[a-f0-9]+: 67 8f ea 88 12 8e fe ca 00 00 78 56 34 12[ ]+addr32 lwpval \$0x12345678,0xcafe\(%esi\),%r14
[ ]*[a-f0-9]+: 67 8f ea 80 12 8f fe ca 00 00 78 56 34 12[ ]+addr32 lwpval \$0x12345678,0xcafe\(%edi\),%r15
[ ]*[a-f0-9]+: 67 8f ea 78 12 00 34 12[ ]+lwpins \$0x1234,\(%eax\),%ax
[ ]*[a-f0-9]+: 67 8f ea 70 12 01 34 12[ ]+lwpins \$0x1234,\(%ecx\),%cx
[ ]*[a-f0-9]+: 67 8f ea 68 12 02 34 12[ ]+lwpins \$0x1234,\(%edx\),%dx
[ ]*[a-f0-9]+: 67 8f ea 60 12 03 34 12[ ]+lwpins \$0x1234,\(%ebx\),%bx
[ ]*[a-f0-9]+: 67 8f ea 58 12 04 24 34 12[ ]+lwpins \$0x1234,\(%esp\),%sp
[ ]*[a-f0-9]+: 67 8f ea 50 12 45 00 34 12[ ]+lwpins \$0x1234,0x0\(%ebp\),%bp
[ ]*[a-f0-9]+: 67 8f ea 48 12 06 34 12[ ]+lwpins \$0x1234,\(%esi\),%si
[ ]*[a-f0-9]+: 67 8f ea 40 12 07 34 12[ ]+lwpins \$0x1234,\(%edi\),%di
[ ]*[a-f0-9]+: 67 8f ca 38 12 00 34 12[ ]+lwpins \$0x1234,\(%r8d\),%r8w
[ ]*[a-f0-9]+: 67 8f ca 30 12 01 34 12[ ]+lwpins \$0x1234,\(%r9d\),%r9w
[ ]*[a-f0-9]+: 67 8f ca 28 12 02 34 12[ ]+lwpins \$0x1234,\(%r10d\),%r10w
[ ]*[a-f0-9]+: 67 8f ca 20 12 03 34 12[ ]+lwpins \$0x1234,\(%r11d\),%r11w
[ ]*[a-f0-9]+: 67 8f ca 18 12 04 24 34 12[ ]+lwpins \$0x1234,\(%r12d\),%r12w
[ ]*[a-f0-9]+: 67 8f ca 10 12 45 00 34 12[ ]+lwpins \$0x1234,0x0\(%r13d\),%r13w
[ ]*[a-f0-9]+: 67 8f ca 08 12 06 34 12[ ]+lwpins \$0x1234,\(%r14d\),%r14w
[ ]*[a-f0-9]+: 67 8f ca 00 12 07 34 12[ ]+lwpins \$0x1234,\(%r15d\),%r15w
[ ]*[a-f0-9]+: 67 8f ca 7c 12 07 78 56 34 12[ ]+lwpins \$0x12345678,\(%r15d\),%eax
[ ]*[a-f0-9]+: 67 8f ca 74 12 06 78 56 34 12[ ]+lwpins \$0x12345678,\(%r14d\),%ecx
[ ]*[a-f0-9]+: 67 8f ca 6c 12 45 00 78 56 34 12[ ]+lwpins \$0x12345678,0x0\(%r13d\),%edx
[ ]*[a-f0-9]+: 67 8f ca 64 12 04 24 78 56 34 12[ ]+lwpins \$0x12345678,\(%r12d\),%ebx
[ ]*[a-f0-9]+: 67 8f ca 5c 12 03 78 56 34 12[ ]+lwpins \$0x12345678,\(%r11d\),%esp
[ ]*[a-f0-9]+: 67 8f ca 54 12 02 78 56 34 12[ ]+lwpins \$0x12345678,\(%r10d\),%ebp
[ ]*[a-f0-9]+: 67 8f ca 4c 12 01 78 56 34 12[ ]+lwpins \$0x12345678,\(%r9d\),%esi
[ ]*[a-f0-9]+: 67 8f ca 44 12 00 78 56 34 12[ ]+lwpins \$0x12345678,\(%r8d\),%edi
[ ]*[a-f0-9]+: 67 8f ea 3c 12 07 78 56 34 12[ ]+lwpins \$0x12345678,\(%edi\),%r8d
[ ]*[a-f0-9]+: 67 8f ea 34 12 06 78 56 34 12[ ]+lwpins \$0x12345678,\(%esi\),%r9d
[ ]*[a-f0-9]+: 67 8f ea 2c 12 45 00 78 56 34 12[ ]+lwpins \$0x12345678,0x0\(%ebp\),%r10d
[ ]*[a-f0-9]+: 67 8f ea 24 12 04 24 78 56 34 12[ ]+lwpins \$0x12345678,\(%esp\),%r11d
[ ]*[a-f0-9]+: 67 8f ea 1c 12 03 78 56 34 12[ ]+lwpins \$0x12345678,\(%ebx\),%r12d
[ ]*[a-f0-9]+: 67 8f ea 14 12 02 78 56 34 12[ ]+lwpins \$0x12345678,\(%edx\),%r13d
[ ]*[a-f0-9]+: 67 8f ea 0c 12 01 78 56 34 12[ ]+lwpins \$0x12345678,\(%ecx\),%r14d
[ ]*[a-f0-9]+: 67 8f ea 04 12 00 78 56 34 12[ ]+lwpins \$0x12345678,\(%eax\),%r15d
[ ]*[a-f0-9]+: 67 8f ca f8 12 07 78 56 34 12[ ]+lwpins \$0x12345678,\(%r15d\),%rax
[ ]*[a-f0-9]+: 67 8f ca f0 12 06 78 56 34 12[ ]+lwpins \$0x12345678,\(%r14d\),%rcx
[ ]*[a-f0-9]+: 67 8f ca e8 12 45 00 78 56 34 12[ ]+lwpins \$0x12345678,0x0\(%r13d\),%rdx
[ ]*[a-f0-9]+: 67 8f ca e0 12 04 24 78 56 34 12[ ]+lwpins \$0x12345678,\(%r12d\),%rbx
[ ]*[a-f0-9]+: 67 8f ca d8 12 03 78 56 34 12[ ]+lwpins \$0x12345678,\(%r11d\),%rsp
[ ]*[a-f0-9]+: 67 8f ca d0 12 02 78 56 34 12[ ]+lwpins \$0x12345678,\(%r10d\),%rbp
[ ]*[a-f0-9]+: 67 8f ca c8 12 01 78 56 34 12[ ]+lwpins \$0x12345678,\(%r9d\),%rsi
[ ]*[a-f0-9]+: 67 8f ca c0 12 00 78 56 34 12[ ]+lwpins \$0x12345678,\(%r8d\),%rdi
[ ]*[a-f0-9]+: 67 8f ea b8 12 00 78 56 34 12[ ]+lwpins \$0x12345678,\(%eax\),%r8
[ ]*[a-f0-9]+: 67 8f ea b0 12 01 78 56 34 12[ ]+lwpins \$0x12345678,\(%ecx\),%r9
[ ]*[a-f0-9]+: 67 8f ea a8 12 02 78 56 34 12[ ]+lwpins \$0x12345678,\(%edx\),%r10
[ ]*[a-f0-9]+: 67 8f ea a0 12 03 78 56 34 12[ ]+lwpins \$0x12345678,\(%ebx\),%r11
[ ]*[a-f0-9]+: 67 8f ea 98 12 04 24 78 56 34 12[ ]+lwpins \$0x12345678,\(%esp\),%r12
[ ]*[a-f0-9]+: 67 8f ea 90 12 45 00 78 56 34 12[ ]+lwpins \$0x12345678,0x0\(%ebp\),%r13
[ ]*[a-f0-9]+: 67 8f ea 88 12 06 78 56 34 12[ ]+lwpins \$0x12345678,\(%esi\),%r14
[ ]*[a-f0-9]+: 67 8f ea 80 12 07 78 56 34 12[ ]+lwpins \$0x12345678,\(%edi\),%r15
[ ]*[a-f0-9]+: 67 8f ea 78 12 08 34 12[ ]+lwpval \$0x1234,\(%eax\),%ax
[ ]*[a-f0-9]+: 67 8f ea 70 12 09 34 12[ ]+lwpval \$0x1234,\(%ecx\),%cx
[ ]*[a-f0-9]+: 67 8f ea 68 12 0a 34 12[ ]+lwpval \$0x1234,\(%edx\),%dx
[ ]*[a-f0-9]+: 67 8f ea 60 12 0b 34 12[ ]+lwpval \$0x1234,\(%ebx\),%bx
[ ]*[a-f0-9]+: 67 8f ea 58 12 0c 24 34 12[ ]+lwpval \$0x1234,\(%esp\),%sp
[ ]*[a-f0-9]+: 67 8f ea 50 12 4d 00 34 12[ ]+lwpval \$0x1234,0x0\(%ebp\),%bp
[ ]*[a-f0-9]+: 67 8f ea 48 12 0e 34 12[ ]+lwpval \$0x1234,\(%esi\),%si
[ ]*[a-f0-9]+: 67 8f ea 40 12 0f 34 12[ ]+lwpval \$0x1234,\(%edi\),%di
[ ]*[a-f0-9]+: 67 8f ca 38 12 08 34 12[ ]+lwpval \$0x1234,\(%r8d\),%r8w
[ ]*[a-f0-9]+: 67 8f ca 30 12 09 34 12[ ]+lwpval \$0x1234,\(%r9d\),%r9w
[ ]*[a-f0-9]+: 67 8f ca 28 12 0a 34 12[ ]+lwpval \$0x1234,\(%r10d\),%r10w
[ ]*[a-f0-9]+: 67 8f ca 20 12 0b 34 12[ ]+lwpval \$0x1234,\(%r11d\),%r11w
[ ]*[a-f0-9]+: 67 8f ca 18 12 0c 24 34 12[ ]+lwpval \$0x1234,\(%r12d\),%r12w
[ ]*[a-f0-9]+: 67 8f ca 10 12 4d 00 34 12[ ]+lwpval \$0x1234,0x0\(%r13d\),%r13w
[ ]*[a-f0-9]+: 67 8f ca 08 12 0e 34 12[ ]+lwpval \$0x1234,\(%r14d\),%r14w
[ ]*[a-f0-9]+: 67 8f ca 00 12 0f 34 12[ ]+lwpval \$0x1234,\(%r15d\),%r15w
[ ]*[a-f0-9]+: 67 8f ca 7c 12 0f 78 56 34 12[ ]+lwpval \$0x12345678,\(%r15d\),%eax
[ ]*[a-f0-9]+: 67 8f ca 74 12 0e 78 56 34 12[ ]+lwpval \$0x12345678,\(%r14d\),%ecx
[ ]*[a-f0-9]+: 67 8f ca 6c 12 4d 00 78 56 34 12[ ]+lwpval \$0x12345678,0x0\(%r13d\),%edx
[ ]*[a-f0-9]+: 67 8f ca 64 12 0c 24 78 56 34 12[ ]+lwpval \$0x12345678,\(%r12d\),%ebx
[ ]*[a-f0-9]+: 67 8f ca 5c 12 0b 78 56 34 12[ ]+lwpval \$0x12345678,\(%r11d\),%esp
[ ]*[a-f0-9]+: 67 8f ca 54 12 0a 78 56 34 12[ ]+lwpval \$0x12345678,\(%r10d\),%ebp
[ ]*[a-f0-9]+: 67 8f ca 4c 12 09 78 56 34 12[ ]+lwpval \$0x12345678,\(%r9d\),%esi
[ ]*[a-f0-9]+: 67 8f ca 44 12 08 78 56 34 12[ ]+lwpval \$0x12345678,\(%r8d\),%edi
[ ]*[a-f0-9]+: 67 8f ea 3c 12 0f 78 56 34 12[ ]+lwpval \$0x12345678,\(%edi\),%r8d
[ ]*[a-f0-9]+: 67 8f ea 34 12 0e 78 56 34 12[ ]+lwpval \$0x12345678,\(%esi\),%r9d
[ ]*[a-f0-9]+: 67 8f ea 2c 12 4d 00 78 56 34 12[ ]+lwpval \$0x12345678,0x0\(%ebp\),%r10d
[ ]*[a-f0-9]+: 67 8f ea 24 12 0c 24 78 56 34 12[ ]+lwpval \$0x12345678,\(%esp\),%r11d
[ ]*[a-f0-9]+: 67 8f ea 1c 12 0b 78 56 34 12[ ]+lwpval \$0x12345678,\(%ebx\),%r12d
[ ]*[a-f0-9]+: 67 8f ea 14 12 0a 78 56 34 12[ ]+lwpval \$0x12345678,\(%edx\),%r13d
[ ]*[a-f0-9]+: 67 8f ea 0c 12 09 78 56 34 12[ ]+lwpval \$0x12345678,\(%ecx\),%r14d
[ ]*[a-f0-9]+: 67 8f ea 04 12 08 78 56 34 12[ ]+lwpval \$0x12345678,\(%eax\),%r15d
[ ]*[a-f0-9]+: 67 8f ca f8 12 0f 78 56 34 12[ ]+lwpval \$0x12345678,\(%r15d\),%rax
[ ]*[a-f0-9]+: 67 8f ca f0 12 0e 78 56 34 12[ ]+lwpval \$0x12345678,\(%r14d\),%rcx
[ ]*[a-f0-9]+: 67 8f ca e8 12 4d 00 78 56 34 12[ ]+lwpval \$0x12345678,0x0\(%r13d\),%rdx
[ ]*[a-f0-9]+: 67 8f ca e0 12 0c 24 78 56 34 12[ ]+lwpval \$0x12345678,\(%r12d\),%rbx
[ ]*[a-f0-9]+: 67 8f ca d8 12 0b 78 56 34 12[ ]+lwpval \$0x12345678,\(%r11d\),%rsp
[ ]*[a-f0-9]+: 67 8f ca d0 12 0a 78 56 34 12[ ]+lwpval \$0x12345678,\(%r10d\),%rbp
[ ]*[a-f0-9]+: 67 8f ca c8 12 09 78 56 34 12[ ]+lwpval \$0x12345678,\(%r9d\),%rsi
[ ]*[a-f0-9]+: 67 8f ca c0 12 08 78 56 34 12[ ]+lwpval \$0x12345678,\(%r8d\),%rdi
[ ]*[a-f0-9]+: 67 8f ea b8 12 08 78 56 34 12[ ]+lwpval \$0x12345678,\(%eax\),%r8
[ ]*[a-f0-9]+: 67 8f ea b0 12 09 78 56 34 12[ ]+lwpval \$0x12345678,\(%ecx\),%r9
[ ]*[a-f0-9]+: 67 8f ea a8 12 0a 78 56 34 12[ ]+lwpval \$0x12345678,\(%edx\),%r10
[ ]*[a-f0-9]+: 67 8f ea a0 12 0b 78 56 34 12[ ]+lwpval \$0x12345678,\(%ebx\),%r11
[ ]*[a-f0-9]+: 67 8f ea 98 12 0c 24 78 56 34 12[ ]+lwpval \$0x12345678,\(%esp\),%r12
[ ]*[a-f0-9]+: 67 8f ea 90 12 4d 00 78 56 34 12[ ]+lwpval \$0x12345678,0x0\(%ebp\),%r13
[ ]*[a-f0-9]+: 67 8f ea 88 12 0e 78 56 34 12[ ]+lwpval \$0x12345678,\(%esi\),%r14
[ ]*[a-f0-9]+: 67 8f ea 80 12 0f 78 56 34 12[ ]+lwpval \$0x12345678,\(%edi\),%r15
[ ]*[a-f0-9]+: 67 8f ea 78 12 80 fe ca 00 00 34 12[ ]+lwpins \$0x1234,0xcafe\(%eax\),%ax
[ ]*[a-f0-9]+: 67 8f ea 70 12 81 fe ca 00 00 34 12[ ]+lwpins \$0x1234,0xcafe\(%ecx\),%cx
[ ]*[a-f0-9]+: 67 8f ea 68 12 82 fe ca 00 00 34 12[ ]+lwpins \$0x1234,0xcafe\(%edx\),%dx
[ ]*[a-f0-9]+: 67 8f ea 60 12 83 fe ca 00 00 34 12[ ]+lwpins \$0x1234,0xcafe\(%ebx\),%bx
[ ]*[a-f0-9]+: 67 8f ea 58 12 84 24 fe ca 00 00 34 12[ ]+lwpins \$0x1234,0xcafe\(%esp\),%sp
[ ]*[a-f0-9]+: 67 8f ea 50 12 85 fe ca 00 00 34 12[ ]+lwpins \$0x1234,0xcafe\(%ebp\),%bp
[ ]*[a-f0-9]+: 67 8f ea 48 12 86 fe ca 00 00 34 12[ ]+lwpins \$0x1234,0xcafe\(%esi\),%si
[ ]*[a-f0-9]+: 67 8f ea 40 12 87 fe ca 00 00 34 12[ ]+lwpins \$0x1234,0xcafe\(%edi\),%di
[ ]*[a-f0-9]+: 67 8f ca 38 12 80 fe ca 00 00 34 12[ ]+lwpins \$0x1234,0xcafe\(%r8d\),%r8w
[ ]*[a-f0-9]+: 67 8f ca 30 12 81 fe ca 00 00 34 12[ ]+lwpins \$0x1234,0xcafe\(%r9d\),%r9w
[ ]*[a-f0-9]+: 67 8f ca 28 12 82 fe ca 00 00 34 12[ ]+lwpins \$0x1234,0xcafe\(%r10d\),%r10w
[ ]*[a-f0-9]+: 67 8f ca 20 12 83 fe ca 00 00 34 12[ ]+lwpins \$0x1234,0xcafe\(%r11d\),%r11w
[ ]*[a-f0-9]+: 67 8f ca 18 12 84 24 fe ca 00 00 34 12[ ]+lwpins \$0x1234,0xcafe\(%r12d\),%r12w
[ ]*[a-f0-9]+: 67 8f ca 10 12 85 fe ca 00 00 34 12[ ]+lwpins \$0x1234,0xcafe\(%r13d\),%r13w
[ ]*[a-f0-9]+: 67 8f ca 08 12 86 fe ca 00 00 34 12[ ]+lwpins \$0x1234,0xcafe\(%r14d\),%r14w
[ ]*[a-f0-9]+: 67 8f ca 00 12 87 fe ca 00 00 34 12[ ]+lwpins \$0x1234,0xcafe\(%r15d\),%r15w
[ ]*[a-f0-9]+: 67 8f ca 7c 12 87 fe ca 00 00 78 56 34 12[ ]+lwpins \$0x12345678,0xcafe\(%r15d\),%eax
[ ]*[a-f0-9]+: 67 8f ca 74 12 86 fe ca 00 00 78 56 34 12[ ]+lwpins \$0x12345678,0xcafe\(%r14d\),%ecx
[ ]*[a-f0-9]+: 67 8f ca 6c 12 85 fe ca 00 00 78 56 34 12[ ]+lwpins \$0x12345678,0xcafe\(%r13d\),%edx
[ ]*[a-f0-9]+: 67 8f ca 64 12 84 24 fe ca 00 00 78 56 34 12[ ]+lwpins \$0x12345678,0xcafe\(%r12d\),%ebx
[ ]*[a-f0-9]+: 67 8f ca 5c 12 83 fe ca 00 00 78 56 34 12[ ]+lwpins \$0x12345678,0xcafe\(%r11d\),%esp
[ ]*[a-f0-9]+: 67 8f ca 54 12 82 fe ca 00 00 78 56 34 12[ ]+lwpins \$0x12345678,0xcafe\(%r10d\),%ebp
[ ]*[a-f0-9]+: 67 8f ca 4c 12 81 fe ca 00 00 78 56 34 12[ ]+lwpins \$0x12345678,0xcafe\(%r9d\),%esi
[ ]*[a-f0-9]+: 67 8f ca 44 12 80 fe ca 00 00 78 56 34 12[ ]+lwpins \$0x12345678,0xcafe\(%r8d\),%edi
[ ]*[a-f0-9]+: 67 8f ea 3c 12 87 fe ca 00 00 78 56 34 12[ ]+lwpins \$0x12345678,0xcafe\(%edi\),%r8d
[ ]*[a-f0-9]+: 67 8f ea 34 12 86 fe ca 00 00 78 56 34 12[ ]+lwpins \$0x12345678,0xcafe\(%esi\),%r9d
[ ]*[a-f0-9]+: 67 8f ea 2c 12 85 fe ca 00 00 78 56 34 12[ ]+lwpins \$0x12345678,0xcafe\(%ebp\),%r10d
[ ]*[a-f0-9]+: 67 8f ea 24 12 84 24 fe ca 00 00 78 56 34 12[ ]+lwpins \$0x12345678,0xcafe\(%esp\),%r11d
[ ]*[a-f0-9]+: 67 8f ea 1c 12 83 fe ca 00 00 78 56 34 12[ ]+lwpins \$0x12345678,0xcafe\(%ebx\),%r12d
[ ]*[a-f0-9]+: 67 8f ea 14 12 82 fe ca 00 00 78 56 34 12[ ]+lwpins \$0x12345678,0xcafe\(%edx\),%r13d
[ ]*[a-f0-9]+: 67 8f ea 0c 12 81 fe ca 00 00 78 56 34 12[ ]+lwpins \$0x12345678,0xcafe\(%ecx\),%r14d
[ ]*[a-f0-9]+: 67 8f ea 04 12 80 fe ca 00 00 78 56 34 12[ ]+lwpins \$0x12345678,0xcafe\(%eax\),%r15d
[ ]*[a-f0-9]+: 67 8f ca f8 12 87 fe ca 00 00 78 56 34 12[ ]+lwpins \$0x12345678,0xcafe\(%r15d\),%rax
[ ]*[a-f0-9]+: 67 8f ca f0 12 86 fe ca 00 00 78 56 34 12[ ]+lwpins \$0x12345678,0xcafe\(%r14d\),%rcx
[ ]*[a-f0-9]+: 67 8f ca e8 12 85 fe ca 00 00 78 56 34 12[ ]+lwpins \$0x12345678,0xcafe\(%r13d\),%rdx
[ ]*[a-f0-9]+: 67 8f ca e0 12 84 24 fe ca 00 00 78 56 34 12[ ]+lwpins \$0x12345678,0xcafe\(%r12d\),%rbx
[ ]*[a-f0-9]+: 67 8f ca d8 12 83 fe ca 00 00 78 56 34 12[ ]+lwpins \$0x12345678,0xcafe\(%r11d\),%rsp
[ ]*[a-f0-9]+: 67 8f ca d0 12 82 fe ca 00 00 78 56 34 12[ ]+lwpins \$0x12345678,0xcafe\(%r10d\),%rbp
[ ]*[a-f0-9]+: 67 8f ca c8 12 81 fe ca 00 00 78 56 34 12[ ]+lwpins \$0x12345678,0xcafe\(%r9d\),%rsi
[ ]*[a-f0-9]+: 67 8f ca c0 12 80 fe ca 00 00 78 56 34 12[ ]+lwpins \$0x12345678,0xcafe\(%r8d\),%rdi
[ ]*[a-f0-9]+: 67 8f ea b8 12 80 fe ca 00 00 78 56 34 12[ ]+lwpins \$0x12345678,0xcafe\(%eax\),%r8
[ ]*[a-f0-9]+: 67 8f ea b0 12 81 fe ca 00 00 78 56 34 12[ ]+lwpins \$0x12345678,0xcafe\(%ecx\),%r9
[ ]*[a-f0-9]+: 67 8f ea a8 12 82 fe ca 00 00 78 56 34 12[ ]+lwpins \$0x12345678,0xcafe\(%edx\),%r10
[ ]*[a-f0-9]+: 67 8f ea a0 12 83 fe ca 00 00 78 56 34 12[ ]+lwpins \$0x12345678,0xcafe\(%ebx\),%r11
[ ]*[a-f0-9]+: 67 8f ea 98 12 84 24 fe ca 00 00 78 56 34 12[ ]+lwpins \$0x12345678,0xcafe\(%esp\),%r12
[ ]*[a-f0-9]+: 67 8f ea 90 12 85 fe ca 00 00 78 56 34 12[ ]+lwpins \$0x12345678,0xcafe\(%ebp\),%r13
[ ]*[a-f0-9]+: 67 8f ea 88 12 86 fe ca 00 00 78 56 34 12[ ]+lwpins \$0x12345678,0xcafe\(%esi\),%r14
[ ]*[a-f0-9]+: 67 8f ea 80 12 87 fe ca 00 00 78 56 34 12[ ]+lwpins \$0x12345678,0xcafe\(%edi\),%r15
[ ]*[a-f0-9]+: 67 8f ea 78 12 88 fe ca 00 00 34 12[ ]+lwpval \$0x1234,0xcafe\(%eax\),%ax
[ ]*[a-f0-9]+: 67 8f ea 70 12 89 fe ca 00 00 34 12[ ]+lwpval \$0x1234,0xcafe\(%ecx\),%cx
[ ]*[a-f0-9]+: 67 8f ea 68 12 8a fe ca 00 00 34 12[ ]+lwpval \$0x1234,0xcafe\(%edx\),%dx
[ ]*[a-f0-9]+: 67 8f ea 60 12 8b fe ca 00 00 34 12[ ]+lwpval \$0x1234,0xcafe\(%ebx\),%bx
[ ]*[a-f0-9]+: 67 8f ea 58 12 8c 24 fe ca 00 00 34 12[ ]+lwpval \$0x1234,0xcafe\(%esp\),%sp
[ ]*[a-f0-9]+: 67 8f ea 50 12 8d fe ca 00 00 34 12[ ]+lwpval \$0x1234,0xcafe\(%ebp\),%bp
[ ]*[a-f0-9]+: 67 8f ea 48 12 8e fe ca 00 00 34 12[ ]+lwpval \$0x1234,0xcafe\(%esi\),%si
[ ]*[a-f0-9]+: 67 8f ea 40 12 8f fe ca 00 00 34 12[ ]+lwpval \$0x1234,0xcafe\(%edi\),%di
[ ]*[a-f0-9]+: 67 8f ca 38 12 88 fe ca 00 00 34 12[ ]+lwpval \$0x1234,0xcafe\(%r8d\),%r8w
[ ]*[a-f0-9]+: 67 8f ca 30 12 89 fe ca 00 00 34 12[ ]+lwpval \$0x1234,0xcafe\(%r9d\),%r9w
[ ]*[a-f0-9]+: 67 8f ca 28 12 8a fe ca 00 00 34 12[ ]+lwpval \$0x1234,0xcafe\(%r10d\),%r10w
[ ]*[a-f0-9]+: 67 8f ca 20 12 8b fe ca 00 00 34 12[ ]+lwpval \$0x1234,0xcafe\(%r11d\),%r11w
[ ]*[a-f0-9]+: 67 8f ca 18 12 8c 24 fe ca 00 00 34 12[ ]+lwpval \$0x1234,0xcafe\(%r12d\),%r12w
[ ]*[a-f0-9]+: 67 8f ca 10 12 8d fe ca 00 00 34 12[ ]+lwpval \$0x1234,0xcafe\(%r13d\),%r13w
[ ]*[a-f0-9]+: 67 8f ca 08 12 8e fe ca 00 00 34 12[ ]+lwpval \$0x1234,0xcafe\(%r14d\),%r14w
[ ]*[a-f0-9]+: 67 8f ca 00 12 8f fe ca 00 00 34 12[ ]+lwpval \$0x1234,0xcafe\(%r15d\),%r15w
[ ]*[a-f0-9]+: 67 8f ca 7c 12 8f fe ca 00 00 78 56 34 12[ ]+lwpval \$0x12345678,0xcafe\(%r15d\),%eax
[ ]*[a-f0-9]+: 67 8f ca 74 12 8e fe ca 00 00 78 56 34 12[ ]+lwpval \$0x12345678,0xcafe\(%r14d\),%ecx
[ ]*[a-f0-9]+: 67 8f ca 6c 12 8d fe ca 00 00 78 56 34 12[ ]+lwpval \$0x12345678,0xcafe\(%r13d\),%edx
[ ]*[a-f0-9]+: 67 8f ca 64 12 8c 24 fe ca 00 00 78 56 34 12[ ]+lwpval \$0x12345678,0xcafe\(%r12d\),%ebx
[ ]*[a-f0-9]+: 67 8f ca 5c 12 8b fe ca 00 00 78 56 34 12[ ]+lwpval \$0x12345678,0xcafe\(%r11d\),%esp
[ ]*[a-f0-9]+: 67 8f ca 54 12 8a fe ca 00 00 78 56 34 12[ ]+lwpval \$0x12345678,0xcafe\(%r10d\),%ebp
[ ]*[a-f0-9]+: 67 8f ca 4c 12 89 fe ca 00 00 78 56 34 12[ ]+lwpval \$0x12345678,0xcafe\(%r9d\),%esi
[ ]*[a-f0-9]+: 67 8f ca 44 12 88 fe ca 00 00 78 56 34 12[ ]+lwpval \$0x12345678,0xcafe\(%r8d\),%edi
[ ]*[a-f0-9]+: 67 8f ea 3c 12 8f fe ca 00 00 78 56 34 12[ ]+lwpval \$0x12345678,0xcafe\(%edi\),%r8d
[ ]*[a-f0-9]+: 67 8f ea 34 12 8e fe ca 00 00 78 56 34 12[ ]+lwpval \$0x12345678,0xcafe\(%esi\),%r9d
[ ]*[a-f0-9]+: 67 8f ea 2c 12 8d fe ca 00 00 78 56 34 12[ ]+lwpval \$0x12345678,0xcafe\(%ebp\),%r10d
[ ]*[a-f0-9]+: 67 8f ea 24 12 8c 24 fe ca 00 00 78 56 34 12[ ]+lwpval \$0x12345678,0xcafe\(%esp\),%r11d
[ ]*[a-f0-9]+: 67 8f ea 1c 12 8b fe ca 00 00 78 56 34 12[ ]+lwpval \$0x12345678,0xcafe\(%ebx\),%r12d
[ ]*[a-f0-9]+: 67 8f ea 14 12 8a fe ca 00 00 78 56 34 12[ ]+lwpval \$0x12345678,0xcafe\(%edx\),%r13d
[ ]*[a-f0-9]+: 67 8f ea 0c 12 89 fe ca 00 00 78 56 34 12[ ]+lwpval \$0x12345678,0xcafe\(%ecx\),%r14d
[ ]*[a-f0-9]+: 67 8f ea 04 12 88 fe ca 00 00 78 56 34 12[ ]+lwpval \$0x12345678,0xcafe\(%eax\),%r15d
[ ]*[a-f0-9]+: 67 8f ca f8 12 8f fe ca 00 00 78 56 34 12[ ]+lwpval \$0x12345678,0xcafe\(%r15d\),%rax
[ ]*[a-f0-9]+: 67 8f ca f0 12 8e fe ca 00 00 78 56 34 12[ ]+lwpval \$0x12345678,0xcafe\(%r14d\),%rcx
[ ]*[a-f0-9]+: 67 8f ca e8 12 8d fe ca 00 00 78 56 34 12[ ]+lwpval \$0x12345678,0xcafe\(%r13d\),%rdx
[ ]*[a-f0-9]+: 67 8f ca e0 12 8c 24 fe ca 00 00 78 56 34 12[ ]+lwpval \$0x12345678,0xcafe\(%r12d\),%rbx
[ ]*[a-f0-9]+: 67 8f ca d8 12 8b fe ca 00 00 78 56 34 12[ ]+lwpval \$0x12345678,0xcafe\(%r11d\),%rsp
[ ]*[a-f0-9]+: 67 8f ca d0 12 8a fe ca 00 00 78 56 34 12[ ]+lwpval \$0x12345678,0xcafe\(%r10d\),%rbp
[ ]*[a-f0-9]+: 67 8f ca c8 12 89 fe ca 00 00 78 56 34 12[ ]+lwpval \$0x12345678,0xcafe\(%r9d\),%rsi
[ ]*[a-f0-9]+: 67 8f ca c0 12 88 fe ca 00 00 78 56 34 12[ ]+lwpval \$0x12345678,0xcafe\(%r8d\),%rdi
[ ]*[a-f0-9]+: 67 8f ea b8 12 88 fe ca 00 00 78 56 34 12[ ]+lwpval \$0x12345678,0xcafe\(%eax\),%r8
[ ]*[a-f0-9]+: 67 8f ea b0 12 89 fe ca 00 00 78 56 34 12[ ]+lwpval \$0x12345678,0xcafe\(%ecx\),%r9
[ ]*[a-f0-9]+: 67 8f ea a8 12 8a fe ca 00 00 78 56 34 12[ ]+lwpval \$0x12345678,0xcafe\(%edx\),%r10
[ ]*[a-f0-9]+: 67 8f ea a0 12 8b fe ca 00 00 78 56 34 12[ ]+lwpval \$0x12345678,0xcafe\(%ebx\),%r11
[ ]*[a-f0-9]+: 67 8f ea 98 12 8c 24 fe ca 00 00 78 56 34 12[ ]+lwpval \$0x12345678,0xcafe\(%esp\),%r12
[ ]*[a-f0-9]+: 67 8f ea 90 12 8d fe ca 00 00 78 56 34 12[ ]+lwpval \$0x12345678,0xcafe\(%ebp\),%r13
[ ]*[a-f0-9]+: 67 8f ea 88 12 8e fe ca 00 00 78 56 34 12[ ]+lwpval \$0x12345678,0xcafe\(%esi\),%r14
[ ]*[a-f0-9]+: 67 8f ea 80 12 8f fe ca 00 00 78 56 34 12[ ]+lwpval \$0x12345678,0xcafe\(%edi\),%r15
#pass

View File

@ -5,152 +5,153 @@
.*: +file format .*
Disassembly of section .text:
0+ <nop15>:
[ ]*0:[ ]+90[ ]+nop[ ]*
[ ]*1:[ ]+66 66 66 66 66 66 2e 0f 1f 84 00 00 00 00 00[ ]+nopw[ ]+%cs:0x0\(%rax,%rax,1\)
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 66 66 66 66 66 66 2e 0f 1f 84 00 00 00 00 00 data32 data32 data32 data32 data32 nopw %cs:0x0\(%rax,%rax,1\)
0+10 <nop14>:
[ ]*10:[ ]+90[ ]+nop[ ]*
[ ]*11:[ ]+90[ ]+nop[ ]*
[ ]*12:[ ]+66 66 66 66 66 2e 0f 1f 84 00 00 00 00 00[ ]+nopw[ ]+%cs:0x0\(%rax,%rax,1\)
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 66 66 66 66 66 2e 0f 1f 84 00 00 00 00 00 data32 data32 data32 data32 nopw %cs:0x0\(%rax,%rax,1\)
0+20 <nop13>:
[ ]*20:[ ]+90[ ]+nop[ ]*
[ ]*21:[ ]+90[ ]+nop[ ]*
[ ]*22:[ ]+90[ ]+nop[ ]*
[ ]*23:[ ]+66 66 66 66 2e 0f 1f 84 00 00 00 00 00[ ]+nopw[ ]+%cs:0x0\(%rax,%rax,1\)
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 66 66 66 66 2e 0f 1f 84 00 00 00 00 00 data32 data32 data32 nopw %cs:0x0\(%rax,%rax,1\)
0+30 <nop12>:
[ ]*30:[ ]+90[ ]+nop[ ]*
[ ]*31:[ ]+90[ ]+nop[ ]*
[ ]*32:[ ]+90[ ]+nop[ ]*
[ ]*33:[ ]+90[ ]+nop[ ]*
[ ]*34:[ ]+66 66 66 2e 0f 1f 84 00 00 00 00 00[ ]+nopw[ ]+%cs:0x0\(%rax,%rax,1\)
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 66 66 66 2e 0f 1f 84 00 00 00 00 00 data32 data32 nopw %cs:0x0\(%rax,%rax,1\)
0+40 <nop11>:
[ ]*40:[ ]+90[ ]+nop[ ]*
[ ]*41:[ ]+90[ ]+nop[ ]*
[ ]*42:[ ]+90[ ]+nop[ ]*
[ ]*43:[ ]+90[ ]+nop[ ]*
[ ]*44:[ ]+90[ ]+nop[ ]*
[ ]*45:[ ]+66 66 2e 0f 1f 84 00 00 00 00 00[ ]+nopw[ ]+%cs:0x0\(%rax,%rax,1\)
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 66 66 2e 0f 1f 84 00 00 00 00 00 data32 nopw %cs:0x0\(%rax,%rax,1\)
0+50 <nop10>:
[ ]*50:[ ]+90[ ]+nop[ ]*
[ ]*51:[ ]+90[ ]+nop[ ]*
[ ]*52:[ ]+90[ ]+nop[ ]*
[ ]*53:[ ]+90[ ]+nop[ ]*
[ ]*54:[ ]+90[ ]+nop[ ]*
[ ]*55:[ ]+90[ ]+nop[ ]*
[ ]*56:[ ]+66 2e 0f 1f 84 00 00 00 00 00[ ]+nopw[ ]+%cs:0x0\(%rax,%rax,1\)
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 66 2e 0f 1f 84 00 00 00 00 00 nopw %cs:0x0\(%rax,%rax,1\)
0+60 <nop9>:
[ ]*60:[ ]+90[ ]+nop[ ]*
[ ]*61:[ ]+90[ ]+nop[ ]*
[ ]*62:[ ]+90[ ]+nop[ ]*
[ ]*63:[ ]+90[ ]+nop[ ]*
[ ]*64:[ ]+90[ ]+nop[ ]*
[ ]*65:[ ]+90[ ]+nop[ ]*
[ ]*66:[ ]+90[ ]+nop[ ]*
[ ]*67:[ ]+66 0f 1f 84 00 00 00 00 00[ ]+nopw[ ]+0x0\(%rax,%rax,1\)
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 66 0f 1f 84 00 00 00 00 00 nopw 0x0\(%rax,%rax,1\)
0+70 <nop8>:
[ ]*70:[ ]+90[ ]+nop[ ]*
[ ]*71:[ ]+90[ ]+nop[ ]*
[ ]*72:[ ]+90[ ]+nop[ ]*
[ ]*73:[ ]+90[ ]+nop[ ]*
[ ]*74:[ ]+90[ ]+nop[ ]*
[ ]*75:[ ]+90[ ]+nop[ ]*
[ ]*76:[ ]+90[ ]+nop[ ]*
[ ]*77:[ ]+90[ ]+nop[ ]*
[ ]*78:[ ]+0f 1f 84 00 00 00 00 00[ ]+nopl[ ]+0x0\(%rax,%rax,1\)
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 0f 1f 84 00 00 00 00 00 nopl 0x0\(%rax,%rax,1\)
0+80 <nop7>:
[ ]*80:[ ]+90[ ]+nop[ ]*
[ ]*81:[ ]+90[ ]+nop[ ]*
[ ]*82:[ ]+90[ ]+nop[ ]*
[ ]*83:[ ]+90[ ]+nop[ ]*
[ ]*84:[ ]+90[ ]+nop[ ]*
[ ]*85:[ ]+90[ ]+nop[ ]*
[ ]*86:[ ]+90[ ]+nop[ ]*
[ ]*87:[ ]+90[ ]+nop[ ]*
[ ]*88:[ ]+90[ ]+nop[ ]*
[ ]*89:[ ]+0f 1f 80 00 00 00 00[ ]+nopl[ ]+0x0\(%rax\)
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 0f 1f 80 00 00 00 00 nopl 0x0\(%rax\)
0+90 <nop6>:
[ ]*90:[ ]+90[ ]+nop[ ]*
[ ]*91:[ ]+90[ ]+nop[ ]*
[ ]*92:[ ]+90[ ]+nop[ ]*
[ ]*93:[ ]+90[ ]+nop[ ]*
[ ]*94:[ ]+90[ ]+nop[ ]*
[ ]*95:[ ]+90[ ]+nop[ ]*
[ ]*96:[ ]+90[ ]+nop[ ]*
[ ]*97:[ ]+90[ ]+nop[ ]*
[ ]*98:[ ]+90[ ]+nop[ ]*
[ ]*99:[ ]+90[ ]+nop[ ]*
[ ]*9a:[ ]+66 0f 1f 44 00 00[ ]+nopw[ ]+0x0\(%rax,%rax,1\)
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 66 0f 1f 44 00 00 nopw 0x0\(%rax,%rax,1\)
0+a0 <nop5>:
[ ]*a0:[ ]+90[ ]+nop[ ]*
[ ]*a1:[ ]+90[ ]+nop[ ]*
[ ]*a2:[ ]+90[ ]+nop[ ]*
[ ]*a3:[ ]+90[ ]+nop[ ]*
[ ]*a4:[ ]+90[ ]+nop[ ]*
[ ]*a5:[ ]+90[ ]+nop[ ]*
[ ]*a6:[ ]+90[ ]+nop[ ]*
[ ]*a7:[ ]+90[ ]+nop[ ]*
[ ]*a8:[ ]+90[ ]+nop[ ]*
[ ]*a9:[ ]+90[ ]+nop[ ]*
[ ]*aa:[ ]+90[ ]+nop[ ]*
[ ]*ab:[ ]+0f 1f 44 00 00[ ]+nopl[ ]+0x0\(%rax,%rax,1\)
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 0f 1f 44 00 00 nopl 0x0\(%rax,%rax,1\)
0+b0 <nop4>:
[ ]*b0:[ ]+90[ ]+nop[ ]*
[ ]*b1:[ ]+90[ ]+nop[ ]*
[ ]*b2:[ ]+90[ ]+nop[ ]*
[ ]*b3:[ ]+90[ ]+nop[ ]*
[ ]*b4:[ ]+90[ ]+nop[ ]*
[ ]*b5:[ ]+90[ ]+nop[ ]*
[ ]*b6:[ ]+90[ ]+nop[ ]*
[ ]*b7:[ ]+90[ ]+nop[ ]*
[ ]*b8:[ ]+90[ ]+nop[ ]*
[ ]*b9:[ ]+90[ ]+nop[ ]*
[ ]*ba:[ ]+90[ ]+nop[ ]*
[ ]*bb:[ ]+90[ ]+nop[ ]*
[ ]*bc:[ ]+0f 1f 40 00[ ]+nopl[ ]+0x0\(%rax\)
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 0f 1f 40 00 nopl 0x0\(%rax\)
0+c0 <nop3>:
[ ]*c0:[ ]+90[ ]+nop[ ]*
[ ]*c1:[ ]+90[ ]+nop[ ]*
[ ]*c2:[ ]+90[ ]+nop[ ]*
[ ]*c3:[ ]+90[ ]+nop[ ]*
[ ]*c4:[ ]+90[ ]+nop[ ]*
[ ]*c5:[ ]+90[ ]+nop[ ]*
[ ]*c6:[ ]+90[ ]+nop[ ]*
[ ]*c7:[ ]+90[ ]+nop[ ]*
[ ]*c8:[ ]+90[ ]+nop[ ]*
[ ]*c9:[ ]+90[ ]+nop[ ]*
[ ]*ca:[ ]+90[ ]+nop[ ]*
[ ]*cb:[ ]+90[ ]+nop[ ]*
[ ]*cc:[ ]+90[ ]+nop[ ]*
[ ]*cd:[ ]+0f 1f 00[ ]+nopl[ ]+\(%rax\)
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 0f 1f 00 nopl \(%rax\)
0+d0 <nop2>:
[ ]*d0:[ ]+90[ ]+nop[ ]*
[ ]*d1:[ ]+90[ ]+nop[ ]*
[ ]*d2:[ ]+90[ ]+nop[ ]*
[ ]*d3:[ ]+90[ ]+nop[ ]*
[ ]*d4:[ ]+90[ ]+nop[ ]*
[ ]*d5:[ ]+90[ ]+nop[ ]*
[ ]*d6:[ ]+90[ ]+nop[ ]*
[ ]*d7:[ ]+90[ ]+nop[ ]*
[ ]*d8:[ ]+90[ ]+nop[ ]*
[ ]*d9:[ ]+90[ ]+nop[ ]*
[ ]*da:[ ]+90[ ]+nop[ ]*
[ ]*db:[ ]+90[ ]+nop[ ]*
[ ]*dc:[ ]+90[ ]+nop[ ]*
[ ]*dd:[ ]+90[ ]+nop[ ]*
[ ]*de:[ ]+66 90[ ]+xchg[ ]+%ax,%ax
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 66 90 xchg %ax,%ax
#pass

View File

@ -9,25 +9,25 @@ Disassembly of section .text:
0+ <nop15>:
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 66 66 66 66 66 66 2e 0f 1f 84 00 00 00 00 00 nopw %cs:0x0\(%rax,%rax,1\)
[ ]*[a-f0-9]+: 66 66 66 66 66 66 2e 0f 1f 84 00 00 00 00 00 data32 data32 data32 data32 data32 nopw %cs:0x0\(%rax,%rax,1\)
0+10 <nop14>:
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 66 66 66 66 66 2e 0f 1f 84 00 00 00 00 00 nopw %cs:0x0\(%rax,%rax,1\)
[ ]*[a-f0-9]+: 66 66 66 66 66 2e 0f 1f 84 00 00 00 00 00 data32 data32 data32 data32 nopw %cs:0x0\(%rax,%rax,1\)
0+20 <nop13>:
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 66 66 66 66 2e 0f 1f 84 00 00 00 00 00 nopw %cs:0x0\(%rax,%rax,1\)
[ ]*[a-f0-9]+: 66 66 66 66 2e 0f 1f 84 00 00 00 00 00 data32 data32 data32 nopw %cs:0x0\(%rax,%rax,1\)
0+30 <nop12>:
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 66 66 66 2e 0f 1f 84 00 00 00 00 00 nopw %cs:0x0\(%rax,%rax,1\)
[ ]*[a-f0-9]+: 66 66 66 2e 0f 1f 84 00 00 00 00 00 data32 data32 nopw %cs:0x0\(%rax,%rax,1\)
0+40 <nop11>:
[ ]*[a-f0-9]+: 90 nop
@ -35,7 +35,7 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 66 66 2e 0f 1f 84 00 00 00 00 00 nopw %cs:0x0\(%rax,%rax,1\)
[ ]*[a-f0-9]+: 66 66 2e 0f 1f 84 00 00 00 00 00 data32 nopw %cs:0x0\(%rax,%rax,1\)
0+50 <nop10>:
[ ]*[a-f0-9]+: 90 nop

View File

@ -5,29 +5,30 @@
.*: +file format .*
Disassembly of section .text:
0+ <nop15>:
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 66 66 66 66 66 66 2e 0f 1f 84 00 00 00 00 00 nopw %cs:0x0\(%rax,%rax,1\)
[ ]*[a-f0-9]+: 66 66 66 66 66 66 2e 0f 1f 84 00 00 00 00 00 data32 data32 data32 data32 data32 nopw %cs:0x0\(%rax,%rax,1\)
0+10 <nop14>:
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 66 66 66 66 66 2e 0f 1f 84 00 00 00 00 00 nopw %cs:0x0\(%rax,%rax,1\)
[ ]*[a-f0-9]+: 66 66 66 66 66 2e 0f 1f 84 00 00 00 00 00 data32 data32 data32 data32 nopw %cs:0x0\(%rax,%rax,1\)
0+20 <nop13>:
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 66 66 66 66 2e 0f 1f 84 00 00 00 00 00 nopw %cs:0x0\(%rax,%rax,1\)
[ ]*[a-f0-9]+: 66 66 66 66 2e 0f 1f 84 00 00 00 00 00 data32 data32 data32 nopw %cs:0x0\(%rax,%rax,1\)
0+30 <nop12>:
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 66 66 66 2e 0f 1f 84 00 00 00 00 00 nopw %cs:0x0\(%rax,%rax,1\)
[ ]*[a-f0-9]+: 66 66 66 2e 0f 1f 84 00 00 00 00 00 data32 data32 nopw %cs:0x0\(%rax,%rax,1\)
0+40 <nop11>:
[ ]*[a-f0-9]+: 90 nop
@ -35,7 +36,7 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 66 66 2e 0f 1f 84 00 00 00 00 00 nopw %cs:0x0\(%rax,%rax,1\)
[ ]*[a-f0-9]+: 66 66 2e 0f 1f 84 00 00 00 00 00 data32 nopw %cs:0x0\(%rax,%rax,1\)
0+50 <nop10>:
[ ]*[a-f0-9]+: 90 nop

View File

@ -5,33 +5,34 @@
.*: +file format .*
Disassembly of section .text:
0+ <nop>:
[ ]*[a-f0-9]+: 0f be f0 movsbl %al,%esi
[ ]*[a-f0-9]+: 66 66 66 66 2e 0f 1f 84 00 00 00 00 00 nopw %cs:0x0\(%rax,%rax,1\)
[ ]*[a-f0-9]+: 66 66 66 66 2e 0f 1f 84 00 00 00 00 00 data32 data32 data32 nopw %cs:0x0\(%rax,%rax,1\)
0+10 <nop15>:
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 66 66 66 66 66 66 2e 0f 1f 84 00 00 00 00 00 nopw %cs:0x0\(%rax,%rax,1\)
[ ]*[a-f0-9]+: 66 66 66 66 66 66 2e 0f 1f 84 00 00 00 00 00 data32 data32 data32 data32 data32 nopw %cs:0x0\(%rax,%rax,1\)
0+20 <nop14>:
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 66 66 66 66 66 2e 0f 1f 84 00 00 00 00 00 nopw %cs:0x0\(%rax,%rax,1\)
[ ]*[a-f0-9]+: 66 66 66 66 66 2e 0f 1f 84 00 00 00 00 00 data32 data32 data32 data32 nopw %cs:0x0\(%rax,%rax,1\)
0+30 <nop13>:
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 66 66 66 66 2e 0f 1f 84 00 00 00 00 00 nopw %cs:0x0\(%rax,%rax,1\)
[ ]*[a-f0-9]+: 66 66 66 66 2e 0f 1f 84 00 00 00 00 00 data32 data32 data32 nopw %cs:0x0\(%rax,%rax,1\)
0+40 <nop12>:
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 66 66 66 2e 0f 1f 84 00 00 00 00 00 nopw %cs:0x0\(%rax,%rax,1\)
[ ]*[a-f0-9]+: 66 66 66 2e 0f 1f 84 00 00 00 00 00 data32 data32 nopw %cs:0x0\(%rax,%rax,1\)
0+50 <nop11>:
[ ]*[a-f0-9]+: 90 nop
@ -39,7 +40,7 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 66 66 2e 0f 1f 84 00 00 00 00 00 nopw %cs:0x0\(%rax,%rax,1\)
[ ]*[a-f0-9]+: 66 66 2e 0f 1f 84 00 00 00 00 00 data32 nopw %cs:0x0\(%rax,%rax,1\)
0+60 <nop10>:
[ ]*[a-f0-9]+: 90 nop

View File

@ -5,13 +5,14 @@
.*: +file format .*
Disassembly of section .text:
0+ <nop>:
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 66 66 66 66 66 66 2e 0f 1f 84 00 00 00 00 00 nopw %cs:0x0\(%rax,%rax,1\)
[ ]*[a-f0-9]+: 66 66 66 66 66 66 2e 0f 1f 84 00 00 00 00 00 nopw %cs:0x0\(%rax,%rax,1\)
[ ]*[a-f0-9]+: 66 66 66 66 66 66 2e 0f 1f 84 00 00 00 00 00 data32 data32 data32 data32 data32 nopw %cs:0x0\(%rax,%rax,1\)
[ ]*[a-f0-9]+: 66 66 66 66 66 66 2e 0f 1f 84 00 00 00 00 00 data32 data32 data32 data32 data32 nopw %cs:0x0\(%rax,%rax,1\)
[ ]*[a-f0-9]+: 89 c3 mov %eax,%ebx
[ ]*[a-f0-9]+: 66 66 66 66 66 2e 0f 1f 84 00 00 00 00 00 nopw %cs:0x0\(%rax,%rax,1\)
[ ]*[a-f0-9]+: 66 66 66 66 66 2e 0f 1f 84 00 00 00 00 00 data32 data32 data32 data32 nopw %cs:0x0\(%rax,%rax,1\)
#pass

View File

@ -5,34 +5,35 @@
.*: +file format .*
Disassembly of section .text:
0+ <nop31>:
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 66 66 66 66 66 66 2e 0f 1f 84 00 00 00 00 00 nopw %cs:0x0\(%rax,%rax,1\)
[ ]*[a-f0-9]+: 66 66 66 66 66 66 2e 0f 1f 84 00 00 00 00 00 nopw %cs:0x0\(%rax,%rax,1\)
[ ]*[a-f0-9]+: 66 66 66 66 66 66 2e 0f 1f 84 00 00 00 00 00 data32 data32 data32 data32 data32 nopw %cs:0x0\(%rax,%rax,1\)
[ ]*[a-f0-9]+: 66 66 66 66 66 66 2e 0f 1f 84 00 00 00 00 00 data32 data32 data32 data32 data32 nopw %cs:0x0\(%rax,%rax,1\)
0+20 <nop30>:
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 66 66 66 66 66 66 2e 0f 1f 84 00 00 00 00 00 nopw %cs:0x0\(%rax,%rax,1\)
[ ]*[a-f0-9]+: 66 66 66 66 66 66 2e 0f 1f 84 00 00 00 00 00 nopw %cs:0x0\(%rax,%rax,1\)
[ ]*[a-f0-9]+: 66 66 66 66 66 66 2e 0f 1f 84 00 00 00 00 00 data32 data32 data32 data32 data32 nopw %cs:0x0\(%rax,%rax,1\)
[ ]*[a-f0-9]+: 66 66 66 66 66 66 2e 0f 1f 84 00 00 00 00 00 data32 data32 data32 data32 data32 nopw %cs:0x0\(%rax,%rax,1\)
0+40 <nop29>:
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 66 66 66 66 66 2e 0f 1f 84 00 00 00 00 00 nopw %cs:0x0\(%rax,%rax,1\)
[ ]*[a-f0-9]+: 66 66 66 66 66 66 2e 0f 1f 84 00 00 00 00 00 nopw %cs:0x0\(%rax,%rax,1\)
[ ]*[a-f0-9]+: 66 66 66 66 66 2e 0f 1f 84 00 00 00 00 00 data32 data32 data32 data32 nopw %cs:0x0\(%rax,%rax,1\)
[ ]*[a-f0-9]+: 66 66 66 66 66 66 2e 0f 1f 84 00 00 00 00 00 data32 data32 data32 data32 data32 nopw %cs:0x0\(%rax,%rax,1\)
0+60 <nop28>:
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 66 66 66 66 2e 0f 1f 84 00 00 00 00 00 nopw %cs:0x0\(%rax,%rax,1\)
[ ]*[a-f0-9]+: 66 66 66 66 66 66 2e 0f 1f 84 00 00 00 00 00 nopw %cs:0x0\(%rax,%rax,1\)
[ ]*[a-f0-9]+: 66 66 66 66 2e 0f 1f 84 00 00 00 00 00 data32 data32 data32 nopw %cs:0x0\(%rax,%rax,1\)
[ ]*[a-f0-9]+: 66 66 66 66 66 66 2e 0f 1f 84 00 00 00 00 00 data32 data32 data32 data32 data32 nopw %cs:0x0\(%rax,%rax,1\)
0+80 <nop27>:
[ ]*[a-f0-9]+: 90 nop
@ -40,8 +41,8 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 66 66 66 2e 0f 1f 84 00 00 00 00 00 nopw %cs:0x0\(%rax,%rax,1\)
[ ]*[a-f0-9]+: 66 66 66 66 66 66 2e 0f 1f 84 00 00 00 00 00 nopw %cs:0x0\(%rax,%rax,1\)
[ ]*[a-f0-9]+: 66 66 66 2e 0f 1f 84 00 00 00 00 00 data32 data32 nopw %cs:0x0\(%rax,%rax,1\)
[ ]*[a-f0-9]+: 66 66 66 66 66 66 2e 0f 1f 84 00 00 00 00 00 data32 data32 data32 data32 data32 nopw %cs:0x0\(%rax,%rax,1\)
0+a0 <nop26>:
[ ]*[a-f0-9]+: 90 nop
@ -50,8 +51,8 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 66 66 2e 0f 1f 84 00 00 00 00 00 nopw %cs:0x0\(%rax,%rax,1\)
[ ]*[a-f0-9]+: 66 66 66 66 66 66 2e 0f 1f 84 00 00 00 00 00 nopw %cs:0x0\(%rax,%rax,1\)
[ ]*[a-f0-9]+: 66 66 2e 0f 1f 84 00 00 00 00 00 data32 nopw %cs:0x0\(%rax,%rax,1\)
[ ]*[a-f0-9]+: 66 66 66 66 66 66 2e 0f 1f 84 00 00 00 00 00 data32 data32 data32 data32 data32 nopw %cs:0x0\(%rax,%rax,1\)
0+c0 <nop25>:
[ ]*[a-f0-9]+: 90 nop
@ -62,7 +63,7 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 66 2e 0f 1f 84 00 00 00 00 00 nopw %cs:0x0\(%rax,%rax,1\)
[ ]*[a-f0-9]+: 66 66 66 66 66 66 2e 0f 1f 84 00 00 00 00 00 nopw %cs:0x0\(%rax,%rax,1\)
[ ]*[a-f0-9]+: 66 66 66 66 66 66 2e 0f 1f 84 00 00 00 00 00 data32 data32 data32 data32 data32 nopw %cs:0x0\(%rax,%rax,1\)
0+e0 <nop24>:
[ ]*[a-f0-9]+: 90 nop
@ -74,7 +75,7 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 66 0f 1f 84 00 00 00 00 00 nopw 0x0\(%rax,%rax,1\)
[ ]*[a-f0-9]+: 66 66 66 66 66 66 2e 0f 1f 84 00 00 00 00 00 nopw %cs:0x0\(%rax,%rax,1\)
[ ]*[a-f0-9]+: 66 66 66 66 66 66 2e 0f 1f 84 00 00 00 00 00 data32 data32 data32 data32 data32 nopw %cs:0x0\(%rax,%rax,1\)
0+100 <nop23>:
[ ]*[a-f0-9]+: 90 nop
@ -87,7 +88,7 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 0f 1f 84 00 00 00 00 00 nopl 0x0\(%rax,%rax,1\)
[ ]*[a-f0-9]+: 66 66 66 66 66 66 2e 0f 1f 84 00 00 00 00 00 nopw %cs:0x0\(%rax,%rax,1\)
[ ]*[a-f0-9]+: 66 66 66 66 66 66 2e 0f 1f 84 00 00 00 00 00 data32 data32 data32 data32 data32 nopw %cs:0x0\(%rax,%rax,1\)
0+120 <nop22>:
[ ]*[a-f0-9]+: 90 nop
@ -101,7 +102,7 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 0f 1f 80 00 00 00 00 nopl 0x0\(%rax\)
[ ]*[a-f0-9]+: 66 66 66 66 66 66 2e 0f 1f 84 00 00 00 00 00 nopw %cs:0x0\(%rax,%rax,1\)
[ ]*[a-f0-9]+: 66 66 66 66 66 66 2e 0f 1f 84 00 00 00 00 00 data32 data32 data32 data32 data32 nopw %cs:0x0\(%rax,%rax,1\)
0+140 <nop21>:
[ ]*[a-f0-9]+: 90 nop
@ -116,7 +117,7 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 66 0f 1f 44 00 00 nopw 0x0\(%rax,%rax,1\)
[ ]*[a-f0-9]+: 66 66 66 66 66 66 2e 0f 1f 84 00 00 00 00 00 nopw %cs:0x0\(%rax,%rax,1\)
[ ]*[a-f0-9]+: 66 66 66 66 66 66 2e 0f 1f 84 00 00 00 00 00 data32 data32 data32 data32 data32 nopw %cs:0x0\(%rax,%rax,1\)
0+160 <nop20>:
[ ]*[a-f0-9]+: 90 nop
@ -132,7 +133,7 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 0f 1f 44 00 00 nopl 0x0\(%rax,%rax,1\)
[ ]*[a-f0-9]+: 66 66 66 66 66 66 2e 0f 1f 84 00 00 00 00 00 nopw %cs:0x0\(%rax,%rax,1\)
[ ]*[a-f0-9]+: 66 66 66 66 66 66 2e 0f 1f 84 00 00 00 00 00 data32 data32 data32 data32 data32 nopw %cs:0x0\(%rax,%rax,1\)
0+180 <nop19>:
[ ]*[a-f0-9]+: 90 nop
@ -149,7 +150,7 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 0f 1f 40 00 nopl 0x0\(%rax\)
[ ]*[a-f0-9]+: 66 66 66 66 66 66 2e 0f 1f 84 00 00 00 00 00 nopw %cs:0x0\(%rax,%rax,1\)
[ ]*[a-f0-9]+: 66 66 66 66 66 66 2e 0f 1f 84 00 00 00 00 00 data32 data32 data32 data32 data32 nopw %cs:0x0\(%rax,%rax,1\)
0+1a0 <nop18>:
[ ]*[a-f0-9]+: 90 nop
@ -167,7 +168,7 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 0f 1f 00 nopl \(%rax\)
[ ]*[a-f0-9]+: 66 66 66 66 66 66 2e 0f 1f 84 00 00 00 00 00 nopw %cs:0x0\(%rax,%rax,1\)
[ ]*[a-f0-9]+: 66 66 66 66 66 66 2e 0f 1f 84 00 00 00 00 00 data32 data32 data32 data32 data32 nopw %cs:0x0\(%rax,%rax,1\)
0+1c0 <nop17>:
[ ]*[a-f0-9]+: 90 nop
@ -186,7 +187,7 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 66 90 xchg %ax,%ax
[ ]*[a-f0-9]+: 66 66 66 66 66 66 2e 0f 1f 84 00 00 00 00 00 nopw %cs:0x0\(%rax,%rax,1\)
[ ]*[a-f0-9]+: 66 66 66 66 66 66 2e 0f 1f 84 00 00 00 00 00 data32 data32 data32 data32 data32 nopw %cs:0x0\(%rax,%rax,1\)
0+1e0 <nop16>:
[ ]*[a-f0-9]+: 90 nop
@ -206,5 +207,5 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 66 66 66 66 66 66 2e 0f 1f 84 00 00 00 00 00 nopw %cs:0x0\(%rax,%rax,1\)
[ ]*[a-f0-9]+: 66 66 66 66 66 66 2e 0f 1f 84 00 00 00 00 00 data32 data32 data32 data32 data32 nopw %cs:0x0\(%rax,%rax,1\)
#pass

View File

@ -5,34 +5,35 @@
.*: +file format .*
Disassembly of section .text:
0+ <nop31>:
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 66 66 66 66 66 66 2e 0f 1f 84 00 00 00 00 00 nopw %cs:0x0\(%rax,%rax,1\)
[ ]*[a-f0-9]+: 66 66 66 66 66 66 2e 0f 1f 84 00 00 00 00 00 nopw %cs:0x0\(%rax,%rax,1\)
[ ]*[a-f0-9]+: 66 66 66 66 66 66 2e 0f 1f 84 00 00 00 00 00 data32 data32 data32 data32 data32 nopw %cs:0x0\(%rax,%rax,1\)
[ ]*[a-f0-9]+: 66 66 66 66 66 66 2e 0f 1f 84 00 00 00 00 00 data32 data32 data32 data32 data32 nopw %cs:0x0\(%rax,%rax,1\)
0+20 <nop30>:
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 66 66 66 66 66 66 2e 0f 1f 84 00 00 00 00 00 nopw %cs:0x0\(%rax,%rax,1\)
[ ]*[a-f0-9]+: 66 66 66 66 66 66 2e 0f 1f 84 00 00 00 00 00 nopw %cs:0x0\(%rax,%rax,1\)
[ ]*[a-f0-9]+: 66 66 66 66 66 66 2e 0f 1f 84 00 00 00 00 00 data32 data32 data32 data32 data32 nopw %cs:0x0\(%rax,%rax,1\)
[ ]*[a-f0-9]+: 66 66 66 66 66 66 2e 0f 1f 84 00 00 00 00 00 data32 data32 data32 data32 data32 nopw %cs:0x0\(%rax,%rax,1\)
0+40 <nop29>:
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 66 66 66 66 66 2e 0f 1f 84 00 00 00 00 00 nopw %cs:0x0\(%rax,%rax,1\)
[ ]*[a-f0-9]+: 66 66 66 66 66 66 2e 0f 1f 84 00 00 00 00 00 nopw %cs:0x0\(%rax,%rax,1\)
[ ]*[a-f0-9]+: 66 66 66 66 66 2e 0f 1f 84 00 00 00 00 00 data32 data32 data32 data32 nopw %cs:0x0\(%rax,%rax,1\)
[ ]*[a-f0-9]+: 66 66 66 66 66 66 2e 0f 1f 84 00 00 00 00 00 data32 data32 data32 data32 data32 nopw %cs:0x0\(%rax,%rax,1\)
0+60 <nop28>:
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 66 66 66 66 2e 0f 1f 84 00 00 00 00 00 nopw %cs:0x0\(%rax,%rax,1\)
[ ]*[a-f0-9]+: 66 66 66 66 66 66 2e 0f 1f 84 00 00 00 00 00 nopw %cs:0x0\(%rax,%rax,1\)
[ ]*[a-f0-9]+: 66 66 66 66 2e 0f 1f 84 00 00 00 00 00 data32 data32 data32 nopw %cs:0x0\(%rax,%rax,1\)
[ ]*[a-f0-9]+: 66 66 66 66 66 66 2e 0f 1f 84 00 00 00 00 00 data32 data32 data32 data32 data32 nopw %cs:0x0\(%rax,%rax,1\)
0+80 <nop27>:
[ ]*[a-f0-9]+: 90 nop
@ -40,8 +41,8 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 66 66 66 2e 0f 1f 84 00 00 00 00 00 nopw %cs:0x0\(%rax,%rax,1\)
[ ]*[a-f0-9]+: 66 66 66 66 66 66 2e 0f 1f 84 00 00 00 00 00 nopw %cs:0x0\(%rax,%rax,1\)
[ ]*[a-f0-9]+: 66 66 66 2e 0f 1f 84 00 00 00 00 00 data32 data32 nopw %cs:0x0\(%rax,%rax,1\)
[ ]*[a-f0-9]+: 66 66 66 66 66 66 2e 0f 1f 84 00 00 00 00 00 data32 data32 data32 data32 data32 nopw %cs:0x0\(%rax,%rax,1\)
0+a0 <nop26>:
[ ]*[a-f0-9]+: 90 nop
@ -50,8 +51,8 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 66 66 2e 0f 1f 84 00 00 00 00 00 nopw %cs:0x0\(%rax,%rax,1\)
[ ]*[a-f0-9]+: 66 66 66 66 66 66 2e 0f 1f 84 00 00 00 00 00 nopw %cs:0x0\(%rax,%rax,1\)
[ ]*[a-f0-9]+: 66 66 2e 0f 1f 84 00 00 00 00 00 data32 nopw %cs:0x0\(%rax,%rax,1\)
[ ]*[a-f0-9]+: 66 66 66 66 66 66 2e 0f 1f 84 00 00 00 00 00 data32 data32 data32 data32 data32 nopw %cs:0x0\(%rax,%rax,1\)
0+c0 <nop25>:
[ ]*[a-f0-9]+: 90 nop
@ -62,7 +63,7 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 66 2e 0f 1f 84 00 00 00 00 00 nopw %cs:0x0\(%rax,%rax,1\)
[ ]*[a-f0-9]+: 66 66 66 66 66 66 2e 0f 1f 84 00 00 00 00 00 nopw %cs:0x0\(%rax,%rax,1\)
[ ]*[a-f0-9]+: 66 66 66 66 66 66 2e 0f 1f 84 00 00 00 00 00 data32 data32 data32 data32 data32 nopw %cs:0x0\(%rax,%rax,1\)
0+e0 <nop24>:
[ ]*[a-f0-9]+: 90 nop
@ -74,7 +75,7 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 66 0f 1f 84 00 00 00 00 00 nopw 0x0\(%rax,%rax,1\)
[ ]*[a-f0-9]+: 66 66 66 66 66 66 2e 0f 1f 84 00 00 00 00 00 nopw %cs:0x0\(%rax,%rax,1\)
[ ]*[a-f0-9]+: 66 66 66 66 66 66 2e 0f 1f 84 00 00 00 00 00 data32 data32 data32 data32 data32 nopw %cs:0x0\(%rax,%rax,1\)
0+100 <nop23>:
[ ]*[a-f0-9]+: 90 nop
@ -87,7 +88,7 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 0f 1f 84 00 00 00 00 00 nopl 0x0\(%rax,%rax,1\)
[ ]*[a-f0-9]+: 66 66 66 66 66 66 2e 0f 1f 84 00 00 00 00 00 nopw %cs:0x0\(%rax,%rax,1\)
[ ]*[a-f0-9]+: 66 66 66 66 66 66 2e 0f 1f 84 00 00 00 00 00 data32 data32 data32 data32 data32 nopw %cs:0x0\(%rax,%rax,1\)
0+120 <nop22>:
[ ]*[a-f0-9]+: 90 nop
@ -101,7 +102,7 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 0f 1f 80 00 00 00 00 nopl 0x0\(%rax\)
[ ]*[a-f0-9]+: 66 66 66 66 66 66 2e 0f 1f 84 00 00 00 00 00 nopw %cs:0x0\(%rax,%rax,1\)
[ ]*[a-f0-9]+: 66 66 66 66 66 66 2e 0f 1f 84 00 00 00 00 00 data32 data32 data32 data32 data32 nopw %cs:0x0\(%rax,%rax,1\)
0+140 <nop21>:
[ ]*[a-f0-9]+: 90 nop
@ -116,7 +117,7 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 66 0f 1f 44 00 00 nopw 0x0\(%rax,%rax,1\)
[ ]*[a-f0-9]+: 66 66 66 66 66 66 2e 0f 1f 84 00 00 00 00 00 nopw %cs:0x0\(%rax,%rax,1\)
[ ]*[a-f0-9]+: 66 66 66 66 66 66 2e 0f 1f 84 00 00 00 00 00 data32 data32 data32 data32 data32 nopw %cs:0x0\(%rax,%rax,1\)
0+160 <nop20>:
[ ]*[a-f0-9]+: 90 nop
@ -132,7 +133,7 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 0f 1f 44 00 00 nopl 0x0\(%rax,%rax,1\)
[ ]*[a-f0-9]+: 66 66 66 66 66 66 2e 0f 1f 84 00 00 00 00 00 nopw %cs:0x0\(%rax,%rax,1\)
[ ]*[a-f0-9]+: 66 66 66 66 66 66 2e 0f 1f 84 00 00 00 00 00 data32 data32 data32 data32 data32 nopw %cs:0x0\(%rax,%rax,1\)
0+180 <nop19>:
[ ]*[a-f0-9]+: 90 nop
@ -149,7 +150,7 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 0f 1f 40 00 nopl 0x0\(%rax\)
[ ]*[a-f0-9]+: 66 66 66 66 66 66 2e 0f 1f 84 00 00 00 00 00 nopw %cs:0x0\(%rax,%rax,1\)
[ ]*[a-f0-9]+: 66 66 66 66 66 66 2e 0f 1f 84 00 00 00 00 00 data32 data32 data32 data32 data32 nopw %cs:0x0\(%rax,%rax,1\)
0+1a0 <nop18>:
[ ]*[a-f0-9]+: 90 nop
@ -167,7 +168,7 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 0f 1f 00 nopl \(%rax\)
[ ]*[a-f0-9]+: 66 66 66 66 66 66 2e 0f 1f 84 00 00 00 00 00 nopw %cs:0x0\(%rax,%rax,1\)
[ ]*[a-f0-9]+: 66 66 66 66 66 66 2e 0f 1f 84 00 00 00 00 00 data32 data32 data32 data32 data32 nopw %cs:0x0\(%rax,%rax,1\)
0+1c0 <nop17>:
[ ]*[a-f0-9]+: 90 nop
@ -186,7 +187,7 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 66 90 xchg %ax,%ax
[ ]*[a-f0-9]+: 66 66 66 66 66 66 2e 0f 1f 84 00 00 00 00 00 nopw %cs:0x0\(%rax,%rax,1\)
[ ]*[a-f0-9]+: 66 66 66 66 66 66 2e 0f 1f 84 00 00 00 00 00 data32 data32 data32 data32 data32 nopw %cs:0x0\(%rax,%rax,1\)
0+1e0 <nop16>:
[ ]*[a-f0-9]+: 90 nop
@ -206,5 +207,5 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 66 66 66 66 66 66 2e 0f 1f 84 00 00 00 00 00 nopw %cs:0x0\(%rax,%rax,1\)
[ ]*[a-f0-9]+: 66 66 66 66 66 66 2e 0f 1f 84 00 00 00 00 00 data32 data32 data32 data32 data32 nopw %cs:0x0\(%rax,%rax,1\)
#pass

View File

@ -5,6 +5,7 @@
.*: +file format .*
Disassembly of section .text:
0+ <i386>:
@ -24,23 +25,23 @@ Disassembly of section .text:
0+30 <i686>:
[ ]*[a-f0-9]+: 0f be f0 movsbl %al,%esi
[ ]*[a-f0-9]+: 66 66 66 66 2e 0f 1f 84 00 00 00 00 00 nopw %cs:0x0\(%rax,%rax,1\)
[ ]*[a-f0-9]+: 66 66 66 66 2e 0f 1f 84 00 00 00 00 00 data32 data32 data32 nopw %cs:0x0\(%rax,%rax,1\)
0+40 <pentium4>:
[ ]*[a-f0-9]+: 0f be f0 movsbl %al,%esi
[ ]*[a-f0-9]+: 66 66 66 66 2e 0f 1f 84 00 00 00 00 00 nopw %cs:0x0\(%rax,%rax,1\)
[ ]*[a-f0-9]+: 66 66 66 66 2e 0f 1f 84 00 00 00 00 00 data32 data32 data32 nopw %cs:0x0\(%rax,%rax,1\)
0+50 <nocona>:
[ ]*[a-f0-9]+: 0f be f0 movsbl %al,%esi
[ ]*[a-f0-9]+: 66 66 66 66 2e 0f 1f 84 00 00 00 00 00 nopw %cs:0x0\(%rax,%rax,1\)
[ ]*[a-f0-9]+: 66 66 66 66 2e 0f 1f 84 00 00 00 00 00 data32 data32 data32 nopw %cs:0x0\(%rax,%rax,1\)
0+60 <core>:
[ ]*[a-f0-9]+: 0f be f0 movsbl %al,%esi
[ ]*[a-f0-9]+: 66 66 66 66 2e 0f 1f 84 00 00 00 00 00 nopw %cs:0x0\(%rax,%rax,1\)
[ ]*[a-f0-9]+: 66 66 66 66 2e 0f 1f 84 00 00 00 00 00 data32 data32 data32 nopw %cs:0x0\(%rax,%rax,1\)
0+70 <core2>:
[ ]*[a-f0-9]+: 0f be f0 movsbl %al,%esi
[ ]*[a-f0-9]+: 66 66 66 66 2e 0f 1f 84 00 00 00 00 00 nopw %cs:0x0\(%rax,%rax,1\)
[ ]*[a-f0-9]+: 66 66 66 66 2e 0f 1f 84 00 00 00 00 00 data32 data32 data32 nopw %cs:0x0\(%rax,%rax,1\)
0+80 <k6>:
[ ]*[a-f0-9]+: 0f be f0 movsbl %al,%esi
@ -64,7 +65,7 @@ Disassembly of section .text:
0+c0 <generic64>:
[ ]*[a-f0-9]+: 0f be f0 movsbl %al,%esi
[ ]*[a-f0-9]+: 66 66 66 66 2e 0f 1f 84 00 00 00 00 00 nopw %cs:0x0\(%rax,%rax,1\)
[ ]*[a-f0-9]+: 66 66 66 66 2e 0f 1f 84 00 00 00 00 00 data32 data32 data32 nopw %cs:0x0\(%rax,%rax,1\)
0+d0 <amdfam10>:
[ ]*[a-f0-9]+: 0f be f0 movsbl %al,%esi

View File

@ -4,6 +4,7 @@
.*: +file format .*
Disassembly of section .text:
0+ <i386>:
@ -23,23 +24,23 @@ Disassembly of section .text:
0+30 <i686>:
[ ]*[a-f0-9]+: 0f be f0 movsbl %al,%esi
[ ]*[a-f0-9]+: 66 66 66 66 2e 0f 1f 84 00 00 00 00 00 nopw %cs:0x0\(%rax,%rax,1\)
[ ]*[a-f0-9]+: 66 66 66 66 2e 0f 1f 84 00 00 00 00 00 data32 data32 data32 nopw %cs:0x0\(%rax,%rax,1\)
0+40 <pentium4>:
[ ]*[a-f0-9]+: 0f be f0 movsbl %al,%esi
[ ]*[a-f0-9]+: 66 66 66 66 2e 0f 1f 84 00 00 00 00 00 nopw %cs:0x0\(%rax,%rax,1\)
[ ]*[a-f0-9]+: 66 66 66 66 2e 0f 1f 84 00 00 00 00 00 data32 data32 data32 nopw %cs:0x0\(%rax,%rax,1\)
0+50 <nocona>:
[ ]*[a-f0-9]+: 0f be f0 movsbl %al,%esi
[ ]*[a-f0-9]+: 66 66 66 66 2e 0f 1f 84 00 00 00 00 00 nopw %cs:0x0\(%rax,%rax,1\)
[ ]*[a-f0-9]+: 66 66 66 66 2e 0f 1f 84 00 00 00 00 00 data32 data32 data32 nopw %cs:0x0\(%rax,%rax,1\)
0+60 <core>:
[ ]*[a-f0-9]+: 0f be f0 movsbl %al,%esi
[ ]*[a-f0-9]+: 66 66 66 66 2e 0f 1f 84 00 00 00 00 00 nopw %cs:0x0\(%rax,%rax,1\)
[ ]*[a-f0-9]+: 66 66 66 66 2e 0f 1f 84 00 00 00 00 00 data32 data32 data32 nopw %cs:0x0\(%rax,%rax,1\)
0+70 <core2>:
[ ]*[a-f0-9]+: 0f be f0 movsbl %al,%esi
[ ]*[a-f0-9]+: 66 66 66 66 2e 0f 1f 84 00 00 00 00 00 nopw %cs:0x0\(%rax,%rax,1\)
[ ]*[a-f0-9]+: 66 66 66 66 2e 0f 1f 84 00 00 00 00 00 data32 data32 data32 nopw %cs:0x0\(%rax,%rax,1\)
0+80 <k6>:
[ ]*[a-f0-9]+: 0f be f0 movsbl %al,%esi
@ -63,7 +64,7 @@ Disassembly of section .text:
0+c0 <generic64>:
[ ]*[a-f0-9]+: 0f be f0 movsbl %al,%esi
[ ]*[a-f0-9]+: 66 66 66 66 2e 0f 1f 84 00 00 00 00 00 nopw %cs:0x0\(%rax,%rax,1\)
[ ]*[a-f0-9]+: 66 66 66 66 2e 0f 1f 84 00 00 00 00 00 data32 data32 data32 nopw %cs:0x0\(%rax,%rax,1\)
0+d0 <amdfam10>:
[ ]*[a-f0-9]+: 0f be f0 movsbl %al,%esi

View File

@ -32,30 +32,30 @@ Disassembly of section .text:
37: f3 48 ab[ ]+rep stos %rax,%es:\(%rdi\)
3a: f3 48 a7[ ]+repz cmpsq %es:\(%rdi\),%ds:\(%rsi\)
3d: f3 48 af[ ]+repz scas %es:\(%rdi\),%rax
40: 67 f3 6c[ ]+addr32 rep insb \(%dx\),%es:\(%edi\)
43: 67 f3 6e[ ]+addr32 rep outsb %ds:\(%esi\),\(%dx\)
46: 67 f3 a4[ ]+addr32 rep movsb %ds:\(%esi\),%es:\(%edi\)
49: 67 f3 ac[ ]+addr32 rep lods %ds:\(%esi\),%al
4c: 67 f3 aa[ ]+addr32 rep stos %al,%es:\(%edi\)
4f: 67 f3 a6[ ]+addr32 repz cmpsb %es:\(%edi\),%ds:\(%esi\)
52: 67 f3 ae[ ]+addr32 repz scas %es:\(%edi\),%al
55: 67 66 f3 6d[ ]+addr32 rep insw \(%dx\),%es:\(%edi\)
59: 67 66 f3 6f[ ]+addr32 rep outsw %ds:\(%esi\),\(%dx\)
5d: 67 66 f3 a5[ ]+addr32 rep movsw %ds:\(%esi\),%es:\(%edi\)
61: 67 66 f3 ad[ ]+addr32 rep lods %ds:\(%esi\),%ax
65: 67 66 f3 ab[ ]+addr32 rep stos %ax,%es:\(%edi\)
69: 67 66 f3 a7[ ]+addr32 repz cmpsw %es:\(%edi\),%ds:\(%esi\)
6d: 67 66 f3 af[ ]+addr32 repz scas %es:\(%edi\),%ax
71: 67 f3 6d[ ]+addr32 rep insl \(%dx\),%es:\(%edi\)
74: 67 f3 6f[ ]+addr32 rep outsl %ds:\(%esi\),\(%dx\)
77: 67 f3 a5[ ]+addr32 rep movsl %ds:\(%esi\),%es:\(%edi\)
7a: 67 f3 ad[ ]+addr32 rep lods %ds:\(%esi\),%eax
7d: 67 f3 ab[ ]+addr32 rep stos %eax,%es:\(%edi\)
80: 67 f3 a7[ ]+addr32 repz cmpsl %es:\(%edi\),%ds:\(%esi\)
83: 67 f3 af[ ]+addr32 repz scas %es:\(%edi\),%eax
86: 67 f3 48 a5[ ]+addr32 rep movsq %ds:\(%esi\),%es:\(%edi\)
8a: 67 f3 48 ad[ ]+addr32 rep lods %ds:\(%esi\),%rax
8e: 67 f3 48 ab[ ]+addr32 rep stos %rax,%es:\(%edi\)
92: 67 f3 48 a7[ ]+addr32 repz cmpsq %es:\(%edi\),%ds:\(%esi\)
96: 67 f3 48 af[ ]+addr32 repz scas %es:\(%edi\),%rax
40: 67 f3 6c[ ]+rep insb \(%dx\),%es:\(%edi\)
43: 67 f3 6e[ ]+rep outsb %ds:\(%esi\),\(%dx\)
46: 67 f3 a4[ ]+rep movsb %ds:\(%esi\),%es:\(%edi\)
49: 67 f3 ac[ ]+rep lods %ds:\(%esi\),%al
4c: 67 f3 aa[ ]+rep stos %al,%es:\(%edi\)
4f: 67 f3 a6[ ]+repz cmpsb %es:\(%edi\),%ds:\(%esi\)
52: 67 f3 ae[ ]+repz scas %es:\(%edi\),%al
55: 67 66 f3 6d[ ]+rep insw \(%dx\),%es:\(%edi\)
59: 67 66 f3 6f[ ]+rep outsw %ds:\(%esi\),\(%dx\)
5d: 67 66 f3 a5[ ]+rep movsw %ds:\(%esi\),%es:\(%edi\)
61: 67 66 f3 ad[ ]+rep lods %ds:\(%esi\),%ax
65: 67 66 f3 ab[ ]+rep stos %ax,%es:\(%edi\)
69: 67 66 f3 a7[ ]+repz cmpsw %es:\(%edi\),%ds:\(%esi\)
6d: 67 66 f3 af[ ]+repz scas %es:\(%edi\),%ax
71: 67 f3 6d[ ]+rep insl \(%dx\),%es:\(%edi\)
74: 67 f3 6f[ ]+rep outsl %ds:\(%esi\),\(%dx\)
77: 67 f3 a5[ ]+rep movsl %ds:\(%esi\),%es:\(%edi\)
7a: 67 f3 ad[ ]+rep lods %ds:\(%esi\),%eax
7d: 67 f3 ab[ ]+rep stos %eax,%es:\(%edi\)
80: 67 f3 a7[ ]+repz cmpsl %es:\(%edi\),%ds:\(%esi\)
83: 67 f3 af[ ]+repz scas %es:\(%edi\),%eax
86: 67 f3 48 a5[ ]+rep movsq %ds:\(%esi\),%es:\(%edi\)
8a: 67 f3 48 ad[ ]+rep lods %ds:\(%esi\),%rax
8e: 67 f3 48 ab[ ]+rep stos %rax,%es:\(%edi\)
92: 67 f3 48 a7[ ]+repz cmpsq %es:\(%edi\),%ds:\(%esi\)
96: 67 f3 48 af[ ]+repz scas %es:\(%edi\),%rax
#pass

View File

@ -7,34 +7,34 @@
Disassembly of section .text:
0+ <_start>:
[ ]*[0-9a-f]+:[ ]+50[ ]+push[ ]+rax
[ ]*[0-9a-f]+:[ ]+66 50[ ]+push[ ]+ax
[ ]*[0-9a-f]+:[ ]+66 48 50[ ]+push[ ]+rax
[ ]*[0-9a-f]+:[ ]+58[ ]+pop[ ]+rax
[ ]*[0-9a-f]+:[ ]+66 58[ ]+pop[ ]+ax
[ ]*[0-9a-f]+:[ ]+66 48 58[ ]+pop[ ]+rax
[ ]*[0-9a-f]+:[ ]+8f c0[ ]+pop[ ]+rax
[ ]*[0-9a-f]+:[ ]+66 8f c0[ ]+pop[ ]+ax
[ ]*[0-9a-f]+:[ ]+66 48 8f c0[ ]+pop[ ]+rax
[ ]*[0-9a-f]+:[ ]+8f 00[ ]+pop[ ]+QWORD PTR \[rax\]
[ ]*[0-9a-f]+:[ ]+66 8f 00[ ]+pop[ ]+WORD PTR \[rax\]
[ ]*[0-9a-f]+:[ ]+66 48 8f 00[ ]+pop[ ]+QWORD PTR \[rax\]
[ ]*[0-9a-f]+:[ ]+ff d0[ ]+call[ ]+rax
[ ]*[0-9a-f]+:[ ]+66 ff d0[ ]+call[ ]+ax
[ ]*[0-9a-f]+:[ ]+66 48 ff d0[ ]+call[ ]+rax
[ ]*[0-9a-f]+:[ ]+ff 10[ ]+call[ ]+QWORD PTR \[rax\]
[ ]*[0-9a-f]+:[ ]+66 ff 10[ ]+call[ ]+WORD PTR \[rax\]
[ ]*[0-9a-f]+:[ ]+66 48 ff 10[ ]+call[ ]+QWORD PTR \[rax\]
[ ]*[0-9a-f]+:[ ]+ff e0[ ]+jmp[ ]+rax
[ ]*[0-9a-f]+:[ ]+66 ff e0[ ]+jmp[ ]+ax
[ ]*[0-9a-f]+:[ ]+66 48 ff e0[ ]+jmp[ ]+rax
[ ]*[0-9a-f]+:[ ]+ff 20[ ]+jmp[ ]+QWORD PTR \[rax\]
[ ]*[0-9a-f]+:[ ]+66 ff 20[ ]+jmp[ ]+WORD PTR \[rax\]
[ ]*[0-9a-f]+:[ ]+66 48 ff 20[ ]+jmp[ ]+QWORD PTR \[rax\]
[ ]*[0-9a-f]+:[ ]+ff f0[ ]+push[ ]+rax
[ ]*[0-9a-f]+:[ ]+66 ff f0[ ]+push[ ]+ax
[ ]*[0-9a-f]+:[ ]+66 48 ff f0[ ]+push[ ]+rax
[ ]*[0-9a-f]+:[ ]+ff 30[ ]+push[ ]+QWORD PTR \[rax\]
[ ]*[0-9a-f]+:[ ]+66 ff 30[ ]+push[ ]+WORD PTR \[rax\]
[ ]*[0-9a-f]+:[ ]+66 48 ff 30[ ]+push[ ]+QWORD PTR \[rax\]
[ ]*[a-f0-9]+: 50 push rax
[ ]*[a-f0-9]+: 66 50 push ax
[ ]*[a-f0-9]+: 66 48 50 data32 push rax
[ ]*[a-f0-9]+: 58 pop rax
[ ]*[a-f0-9]+: 66 58 pop ax
[ ]*[a-f0-9]+: 66 48 58 data32 pop rax
[ ]*[a-f0-9]+: 8f c0 pop rax
[ ]*[a-f0-9]+: 66 8f c0 pop ax
[ ]*[a-f0-9]+: 66 48 8f c0 data32 pop rax
[ ]*[a-f0-9]+: 8f 00 pop QWORD PTR \[rax\]
[ ]*[a-f0-9]+: 66 8f 00 pop WORD PTR \[rax\]
[ ]*[a-f0-9]+: 66 48 8f 00 data32 pop QWORD PTR \[rax\]
[ ]*[a-f0-9]+: ff d0 call rax
[ ]*[a-f0-9]+: 66 ff d0 call ax
[ ]*[a-f0-9]+: 66 48 ff d0 data32 call rax
[ ]*[a-f0-9]+: ff 10 call QWORD PTR \[rax\]
[ ]*[a-f0-9]+: 66 ff 10 call WORD PTR \[rax\]
[ ]*[a-f0-9]+: 66 48 ff 10 data32 call QWORD PTR \[rax\]
[ ]*[a-f0-9]+: ff e0 jmp rax
[ ]*[a-f0-9]+: 66 ff e0 jmp ax
[ ]*[a-f0-9]+: 66 48 ff e0 data32 jmp rax
[ ]*[a-f0-9]+: ff 20 jmp QWORD PTR \[rax\]
[ ]*[a-f0-9]+: 66 ff 20 jmp WORD PTR \[rax\]
[ ]*[a-f0-9]+: 66 48 ff 20 data32 jmp QWORD PTR \[rax\]
[ ]*[a-f0-9]+: ff f0 push rax
[ ]*[a-f0-9]+: 66 ff f0 push ax
[ ]*[a-f0-9]+: 66 48 ff f0 data32 push rax
[ ]*[a-f0-9]+: ff 30 push QWORD PTR \[rax\]
[ ]*[a-f0-9]+: 66 ff 30 push WORD PTR \[rax\]
[ ]*[a-f0-9]+: 66 48 ff 30 data32 push QWORD PTR \[rax\]
#pass

View File

@ -7,34 +7,34 @@
Disassembly of section .text:
0+ <_start>:
[ ]*[0-9a-f]+:[ ]+50[ ]+pushq[ ]+%rax
[ ]*[0-9a-f]+:[ ]+66 50[ ]+pushw[ ]+%ax
[ ]*[0-9a-f]+:[ ]+66 48 50[ ]+pushq[ ]+%rax
[ ]*[0-9a-f]+:[ ]+58[ ]+popq[ ]+%rax
[ ]*[0-9a-f]+:[ ]+66 58[ ]+popw[ ]+%ax
[ ]*[0-9a-f]+:[ ]+66 48 58[ ]+popq[ ]+%rax
[ ]*[0-9a-f]+:[ ]+8f c0[ ]+popq[ ]+%rax
[ ]*[0-9a-f]+:[ ]+66 8f c0[ ]+popw[ ]+%ax
[ ]*[0-9a-f]+:[ ]+66 48 8f c0[ ]+popq[ ]+%rax
[ ]*[0-9a-f]+:[ ]+8f 00[ ]+popq[ ]+\(%rax\)
[ ]*[0-9a-f]+:[ ]+66 8f 00[ ]+popw[ ]+\(%rax\)
[ ]*[0-9a-f]+:[ ]+66 48 8f 00[ ]+popq[ ]+\(%rax\)
[ ]*[0-9a-f]+:[ ]+ff d0[ ]+callq[ ]+\*%rax
[ ]*[0-9a-f]+:[ ]+66 ff d0[ ]+callw[ ]+\*%ax
[ ]*[0-9a-f]+:[ ]+66 48 ff d0[ ]+callq[ ]+\*%rax
[ ]*[0-9a-f]+:[ ]+ff 10[ ]+callq[ ]+\*\(%rax\)
[ ]*[0-9a-f]+:[ ]+66 ff 10[ ]+callw[ ]+\*\(%rax\)
[ ]*[0-9a-f]+:[ ]+66 48 ff 10[ ]+callq[ ]+\*\(%rax\)
[ ]*[0-9a-f]+:[ ]+ff e0[ ]+jmpq[ ]+\*%rax
[ ]*[0-9a-f]+:[ ]+66 ff e0[ ]+jmpw[ ]+\*%ax
[ ]*[0-9a-f]+:[ ]+66 48 ff e0[ ]+jmpq[ ]+\*%rax
[ ]*[0-9a-f]+:[ ]+ff 20[ ]+jmpq[ ]+\*\(%rax\)
[ ]*[0-9a-f]+:[ ]+66 ff 20[ ]+jmpw[ ]+\*\(%rax\)
[ ]*[0-9a-f]+:[ ]+66 48 ff 20[ ]+jmpq[ ]+\*\(%rax\)
[ ]*[0-9a-f]+:[ ]+ff f0[ ]+pushq[ ]+%rax
[ ]*[0-9a-f]+:[ ]+66 ff f0[ ]+pushw[ ]+%ax
[ ]*[0-9a-f]+:[ ]+66 48 ff f0[ ]+pushq[ ]+%rax
[ ]*[0-9a-f]+:[ ]+ff 30[ ]+pushq[ ]+\(%rax\)
[ ]*[0-9a-f]+:[ ]+66 ff 30[ ]+pushw[ ]+\(%rax\)
[ ]*[0-9a-f]+:[ ]+66 48 ff 30[ ]+pushq[ ]+\(%rax\)
[ ]*[a-f0-9]+: 50 pushq %rax
[ ]*[a-f0-9]+: 66 50 pushw %ax
[ ]*[a-f0-9]+: 66 48 50 data32 pushq %rax
[ ]*[a-f0-9]+: 58 popq %rax
[ ]*[a-f0-9]+: 66 58 popw %ax
[ ]*[a-f0-9]+: 66 48 58 data32 popq %rax
[ ]*[a-f0-9]+: 8f c0 popq %rax
[ ]*[a-f0-9]+: 66 8f c0 popw %ax
[ ]*[a-f0-9]+: 66 48 8f c0 data32 popq %rax
[ ]*[a-f0-9]+: 8f 00 popq \(%rax\)
[ ]*[a-f0-9]+: 66 8f 00 popw \(%rax\)
[ ]*[a-f0-9]+: 66 48 8f 00 data32 popq \(%rax\)
[ ]*[a-f0-9]+: ff d0 callq \*%rax
[ ]*[a-f0-9]+: 66 ff d0 callw \*%ax
[ ]*[a-f0-9]+: 66 48 ff d0 data32 callq \*%rax
[ ]*[a-f0-9]+: ff 10 callq \*\(%rax\)
[ ]*[a-f0-9]+: 66 ff 10 callw \*\(%rax\)
[ ]*[a-f0-9]+: 66 48 ff 10 data32 callq \*\(%rax\)
[ ]*[a-f0-9]+: ff e0 jmpq \*%rax
[ ]*[a-f0-9]+: 66 ff e0 jmpw \*%ax
[ ]*[a-f0-9]+: 66 48 ff e0 data32 jmpq \*%rax
[ ]*[a-f0-9]+: ff 20 jmpq \*\(%rax\)
[ ]*[a-f0-9]+: 66 ff 20 jmpw \*\(%rax\)
[ ]*[a-f0-9]+: 66 48 ff 20 data32 jmpq \*\(%rax\)
[ ]*[a-f0-9]+: ff f0 pushq %rax
[ ]*[a-f0-9]+: 66 ff f0 pushw %ax
[ ]*[a-f0-9]+: 66 48 ff f0 data32 pushq %rax
[ ]*[a-f0-9]+: ff 30 pushq \(%rax\)
[ ]*[a-f0-9]+: 66 ff 30 pushw \(%rax\)
[ ]*[a-f0-9]+: 66 48 ff 30 data32 pushq \(%rax\)
#pass

View File

@ -6,34 +6,34 @@
Disassembly of section .text:
0+ <_start>:
[ ]*[0-9a-f]+:[ ]+50[ ]+pushq?[ ]+%rax
[ ]*[0-9a-f]+:[ ]+66 50[ ]+pushw?[ ]+%ax
[ ]*[0-9a-f]+:[ ]+66 48 50[ ]+pushq?[ ]+%rax
[ ]*[0-9a-f]+:[ ]+58[ ]+popq?[ ]+%rax
[ ]*[0-9a-f]+:[ ]+66 58[ ]+popw?[ ]+%ax
[ ]*[0-9a-f]+:[ ]+66 48 58[ ]+popq?[ ]+%rax
[ ]*[0-9a-f]+:[ ]+8f c0[ ]+popq?[ ]+%rax
[ ]*[0-9a-f]+:[ ]+66 8f c0[ ]+popw?[ ]+%ax
[ ]*[0-9a-f]+:[ ]+66 48 8f c0[ ]+popq?[ ]+%rax
[ ]*[0-9a-f]+:[ ]+8f 00[ ]+popq[ ]+\(%rax\)
[ ]*[0-9a-f]+:[ ]+66 8f 00[ ]+popw[ ]+\(%rax\)
[ ]*[0-9a-f]+:[ ]+66 48 8f 00[ ]+popq[ ]+\(%rax\)
[ ]*[0-9a-f]+:[ ]+ff d0[ ]+callq?[ ]+\*%rax
[ ]*[0-9a-f]+:[ ]+66 ff d0[ ]+callw?[ ]+\*%ax
[ ]*[0-9a-f]+:[ ]+66 48 ff d0[ ]+callq?[ ]+\*%rax
[ ]*[0-9a-f]+:[ ]+ff 10[ ]+callq[ ]+\*\(%rax\)
[ ]*[0-9a-f]+:[ ]+66 ff 10[ ]+callw[ ]+\*\(%rax\)
[ ]*[0-9a-f]+:[ ]+66 48 ff 10[ ]+callq[ ]+\*\(%rax\)
[ ]*[0-9a-f]+:[ ]+ff e0[ ]+jmpq?[ ]+\*%rax
[ ]*[0-9a-f]+:[ ]+66 ff e0[ ]+jmpw?[ ]+\*%ax
[ ]*[0-9a-f]+:[ ]+66 48 ff e0[ ]+jmpq?[ ]+\*%rax
[ ]*[0-9a-f]+:[ ]+ff 20[ ]+jmpq[ ]+\*\(%rax\)
[ ]*[0-9a-f]+:[ ]+66 ff 20[ ]+jmpw[ ]+\*\(%rax\)
[ ]*[0-9a-f]+:[ ]+66 48 ff 20[ ]+jmpq[ ]+\*\(%rax\)
[ ]*[0-9a-f]+:[ ]+ff f0[ ]+pushq?[ ]+%rax
[ ]*[0-9a-f]+:[ ]+66 ff f0[ ]+pushw?[ ]+%ax
[ ]*[0-9a-f]+:[ ]+66 48 ff f0[ ]+pushq?[ ]+%rax
[ ]*[0-9a-f]+:[ ]+ff 30[ ]+pushq[ ]+\(%rax\)
[ ]*[0-9a-f]+:[ ]+66 ff 30[ ]+pushw[ ]+\(%rax\)
[ ]*[0-9a-f]+:[ ]+66 48 ff 30[ ]+pushq[ ]+\(%rax\)
[ ]*[a-f0-9]+: 50 push %rax
[ ]*[a-f0-9]+: 66 50 push %ax
[ ]*[a-f0-9]+: 66 48 50 data32 push %rax
[ ]*[a-f0-9]+: 58 pop %rax
[ ]*[a-f0-9]+: 66 58 pop %ax
[ ]*[a-f0-9]+: 66 48 58 data32 pop %rax
[ ]*[a-f0-9]+: 8f c0 pop %rax
[ ]*[a-f0-9]+: 66 8f c0 pop %ax
[ ]*[a-f0-9]+: 66 48 8f c0 data32 pop %rax
[ ]*[a-f0-9]+: 8f 00 popq \(%rax\)
[ ]*[a-f0-9]+: 66 8f 00 popw \(%rax\)
[ ]*[a-f0-9]+: 66 48 8f 00 data32 popq \(%rax\)
[ ]*[a-f0-9]+: ff d0 callq \*%rax
[ ]*[a-f0-9]+: 66 ff d0 callw \*%ax
[ ]*[a-f0-9]+: 66 48 ff d0 data32 callq \*%rax
[ ]*[a-f0-9]+: ff 10 callq \*\(%rax\)
[ ]*[a-f0-9]+: 66 ff 10 callw \*\(%rax\)
[ ]*[a-f0-9]+: 66 48 ff 10 data32 callq \*\(%rax\)
[ ]*[a-f0-9]+: ff e0 jmpq \*%rax
[ ]*[a-f0-9]+: 66 ff e0 jmpw \*%ax
[ ]*[a-f0-9]+: 66 48 ff e0 data32 jmpq \*%rax
[ ]*[a-f0-9]+: ff 20 jmpq \*\(%rax\)
[ ]*[a-f0-9]+: 66 ff 20 jmpw \*\(%rax\)
[ ]*[a-f0-9]+: 66 48 ff 20 data32 jmpq \*\(%rax\)
[ ]*[a-f0-9]+: ff f0 push %rax
[ ]*[a-f0-9]+: 66 ff f0 push %ax
[ ]*[a-f0-9]+: 66 48 ff f0 data32 push %rax
[ ]*[a-f0-9]+: ff 30 pushq \(%rax\)
[ ]*[a-f0-9]+: 66 ff 30 pushw \(%rax\)
[ ]*[a-f0-9]+: 66 48 ff 30 data32 pushq \(%rax\)
#pass

View File

@ -1,3 +1,10 @@
2009-11-13 H.J. Lu <hongjiu.lu@intel.com>
* ld-x86-64/tlsbin.dd: Updated for prefix processing.
* ld-x86-64/tlsgdesc.dd: Likewise.
* ld-x86-64/tlsld1.dd: Likewise.
* ld-x86-64/tlspic.dd: Likewise.
2009-11-09 H.J. Lu <hongjiu.lu@intel.com>
PR ld/10911

View File

@ -68,7 +68,7 @@ Disassembly of section .text:
401066: 90[ ]+nop *
401067: 90[ ]+nop *
# LD -> LE
401068: 66 66 66 64 48 8b 04[ ]+mov %fs:0x0,%rax
401068: 66 66 66 64 48 8b 04[ ]+data32 data32 data32 mov %fs:0x0,%rax
40106f: 25 00 00 00 00 *
401074: 90[ ]+nop *
401075: 90[ ]+nop *
@ -83,7 +83,7 @@ Disassembly of section .text:
401088: 90[ ]+nop *
401089: 90[ ]+nop *
# LD -> LE against hidden variables
40108a: 66 66 66 64 48 8b 04[ ]+mov %fs:0x0,%rax
40108a: 66 66 66 64 48 8b 04[ ]+data32 data32 data32 mov %fs:0x0,%rax
401091: 25 00 00 00 00 *
401096: 90[ ]+nop *
401097: 90[ ]+nop *

View File

@ -38,10 +38,10 @@ Disassembly of section .text:
+[0-9a-f]+: 90[ ]+nop *
+[0-9a-f]+: 90[ ]+nop *
# GD, gd first
+[0-9a-f]+: 66 48 8d 3d 6c 02 20[ ]+lea 0x20026c\(%rip\),%rdi +# 200690 <.*>
+[0-9a-f]+: 66 48 8d 3d 6c 02 20[ ]+data32 lea 0x20026c\(%rip\),%rdi +# 200690 <.*>
+[0-9a-f]+: 00 *
# -> R_X86_64_DTPMOD64 sG1
+[0-9a-f]+: 66 66 48 e8 9c ff ff[ ]+callq [0-9a-f]+ <.*>
+[0-9a-f]+: 66 66 48 e8 9c ff ff[ ]+data32 data32 callq [0-9a-f]+ <.*>
+[0-9a-f]+: ff[ ]+
# -> R_X86_64_JUMP_SLOT __tls_get_addr
+[0-9a-f]+: 90[ ]+nop *
@ -63,10 +63,10 @@ Disassembly of section .text:
+[0-9a-f]+: 90[ ]+nop *
+[0-9a-f]+: 90[ ]+nop *
+[0-9a-f]+: 90[ ]+nop *
+[0-9a-f]+: 66 48 8d 3d 1e 02 20[ ]+lea 0x20021e\(%rip\),%rdi +# 200670 <.*>
+[0-9a-f]+: 66 48 8d 3d 1e 02 20[ ]+data32 lea 0x20021e\(%rip\),%rdi +# 200670 <.*>
+[0-9a-f]+: 00 *
# -> R_X86_64_DTPMOD64 sG2
+[0-9a-f]+: 66 66 48 e8 6e ff ff[ ]+callq [0-9a-f]+ <.*>
+[0-9a-f]+: 66 66 48 e8 6e ff ff[ ]+data32 data32 callq [0-9a-f]+ <.*>
+[0-9a-f]+: ff[ ]+
# -> R_X86_64_JUMP_SLOT __tls_get_addr
+[0-9a-f]+: 90[ ]+nop *

View File

@ -9,5 +9,5 @@
Disassembly of section .text:
[a-f0-9]+ <_start>:
[ ]*[a-f0-9]+: 66 66 66 64 48 8b 04 25 00 00 00 00 mov %fs:0x0,%rax
[ ]*[a-f0-9]+: 66 66 66 64 48 8b 04 25 00 00 00 00 data32 data32 data32 mov %fs:0x0,%rax
#pass

View File

@ -17,10 +17,10 @@ Disassembly of section .text:
+1006: 90[ ]+nop *
+1007: 90[ ]+nop *
# GD
+1008: 66 48 8d 3d 80 03 20[ ]+lea 0x200380\(%rip\),%rdi +# 201390 <.*>
+1008: 66 48 8d 3d 80 03 20[ ]+data32 lea 0x200380\(%rip\),%rdi +# 201390 <.*>
+100f: 00 *
# -> R_X86_64_DTPMOD64 sg1
+1010: 66 66 48 e8 [0-9a-f ]+callq [0-9a-f]+ <.*>
+1010: 66 66 48 e8 [0-9a-f ]+data32 data32 callq [0-9a-f]+ <.*>
# -> R_X86_64_JUMP_SLOT __tls_get_addr
+1017: [0-9a-f ]+
+1018: 90[ ]+nop *
@ -37,10 +37,10 @@ Disassembly of section .text:
+102e: 90[ ]+nop *
+102f: 90[ ]+nop *
# GD against local variable
+1030: 66 48 8d 3d 08 03 20[ ]+lea 0x200308\(%rip\),%rdi +# 201340 <.*>
+1030: 66 48 8d 3d 08 03 20[ ]+data32 lea 0x200308\(%rip\),%rdi +# 201340 <.*>
+1037: 00 *
# -> R_X86_64_DTPMOD64 [0 0x2000000000000000]
+1038: 66 66 48 e8 [0-9a-f ]+callq [0-9a-f]+ <.*>
+1038: 66 66 48 e8 [0-9a-f ]+data32 data32 callq [0-9a-f]+ <.*>
# -> R_X86_64_JUMP_SLOT __tls_get_addr
+103f: [0-9a-f ]+
+1040: 90[ ]+nop *
@ -57,10 +57,10 @@ Disassembly of section .text:
+1056: 90[ ]+nop *
+1057: 90[ ]+nop *
# GD against hidden and local variable
+1058: 66 48 8d 3d 58 03 20[ ]+lea 0x200358\(%rip\),%rdi +# 2013b8 <.*>
+1058: 66 48 8d 3d 58 03 20[ ]+data32 lea 0x200358\(%rip\),%rdi +# 2013b8 <.*>
+105f: 00 *
# -> R_X86_64_DTPMOD64 [0 0x4000000000000000]
+1060: 66 66 48 e8 [0-9a-f ]+callq [0-9a-f]+ <.*>
+1060: 66 66 48 e8 [0-9a-f ]+data32 data32 callq [0-9a-f]+ <.*>
# -> R_X86_64_JUMP_SLOT __tls_get_addr
+1067: [0-9a-f ]+
+1068: 90[ ]+nop *
@ -77,10 +77,10 @@ Disassembly of section .text:
+107e: 90[ ]+nop *
+107f: 90[ ]+nop *
# GD against hidden but not local variable
+1080: 66 48 8d 3d e8 02 20[ ]+lea 0x2002e8\(%rip\),%rdi +# 201370 <.*>
+1080: 66 48 8d 3d e8 02 20[ ]+data32 lea 0x2002e8\(%rip\),%rdi +# 201370 <.*>
+1087: 00 *
# -> R_X86_64_DTPMOD64 [0 0x6000000000000000]
+1088: 66 66 48 e8 [0-9a-f ]+callq [0-9a-f]+ <.*>
+1088: 66 66 48 e8 [0-9a-f ]+data32 data32 callq [0-9a-f]+ <.*>
# -> R_X86_64_JUMP_SLOT __tls_get_addr
+108f: [0-9a-f ]+
+1090: 90[ ]+nop *

View File

@ -1,3 +1,50 @@
2009-11-13 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c (ckprefix): Updated to return 0 if number of
prefixes > 14 and record the last position for each prefix.
(lock_prefix): Removed.
(data_prefix): Likewise.
(addr_prefix): Likewise.
(repz_prefix): Likewise.
(repnz_prefix): Likewise.
(last_lock_prefix): New.
(last_repz_prefix): Likewise.
(last_repnz_prefix): Likewise.
(last_data_prefix): Likewise.
(last_addr_prefix): Likewise.
(last_rex_prefix): Likewise.
(last_seg_prefix): Likewise.
(MAX_CODE_LENGTH): Likewise.
(ADDR16_PREFIX): Likewise.
(ADDR32_PREFIX): Likewise.
(DATA16_PREFIX): Likewise.
(DATA32_PREFIX): Likewise.
(REP_PREFIX): Likewise.
(seg_prefix): Likewise.
(all_prefixes): Change size to MAX_CODE_LENGTH - 1.
(prefix_name): Handle ADDR16_PREFIX, ADDR32_PREFIX,
DATA16_PREFIX, DATA32_PREFIX and REP_PREFIX.
(get_valid_dis386): Updated.
(OP_C): Likewise.
(OP_Monitor): Likewise.
(REP_Fixup): Likewise.
(print_insn): Display all prefixes.
(putop): Set PREFIX_DATA on used_prefixes only if it is used.
(intel_operand_size): Likewise.
(OP_E_register): Likewise.
(OP_G): Likewise.
(OP_REG): Likewise.
(OP_IMREG): Likewise.
(OP_I): Likewise.
(OP_I64): Likewise.
(OP_sI): Likewise.
(CRC32_Fixup): Likewise.
(MOVBE_Fixup): Likewise.
(OP_E_memory): Set REFIX_DATA on used_prefixes when it is used
in 16bit mode.
(OP_J): Set REX_W used if it is used. Set PREFIX_DATA on
used_prefixes only if it is used.
2009-11-12 H.J. Lu <hongjiu.lu@intel.com>
* i386-opc.tbl: Remove IsLockable from add, adc, and, dec, inc,

View File

@ -42,9 +42,6 @@
#include <setjmp.h>
static int fetch_data (struct disassemble_info *, bfd_byte *);
static void ckprefix (void);
static const char *prefix_name (int, int);
static int print_insn (bfd_vma, disassemble_info *);
static void dofloat (int);
static void OP_ST (int, int);
@ -1992,12 +1989,17 @@ static char scratchbuf[100];
static unsigned char *start_codep;
static unsigned char *insn_codep;
static unsigned char *codep;
static const char *lock_prefix;
static const char *data_prefix;
static const char *addr_prefix;
static const char *repz_prefix;
static const char *repnz_prefix;
static const char **all_prefixes[5];
static int last_lock_prefix;
static int last_repz_prefix;
static int last_repnz_prefix;
static int last_data_prefix;
static int last_addr_prefix;
static int last_rex_prefix;
static int last_seg_prefix;
#define MAX_CODE_LENGTH 15
/* We can up to 14 prefixes since the maximum instruction length is
15bytes. */
static int all_prefixes[MAX_CODE_LENGTH - 1];
static disassemble_info *the_info;
static struct
{
@ -9570,20 +9572,37 @@ static const struct dis386 rm_table[][8] = {
#define INTERNAL_DISASSEMBLER_ERROR _("<internal disassembler error>")
static void
/* We use the high bit to indicate different name for the same
prefix. */
#define ADDR16_PREFIX (0x67 | 0x100)
#define ADDR32_PREFIX (0x67 | 0x200)
#define DATA16_PREFIX (0x66 | 0x100)
#define DATA32_PREFIX (0x66 | 0x200)
#define REP_PREFIX (0xf3 | 0x100)
static int
ckprefix (void)
{
int newrex, i;
int newrex, i, length;
rex = 0;
rex_original = 0;
rex_ignored = 0;
prefixes = 0;
used_prefixes = 0;
rex_used = 0;
last_lock_prefix = -1;
last_repz_prefix = -1;
last_repnz_prefix = -1;
last_data_prefix = -1;
last_addr_prefix = -1;
last_rex_prefix = -1;
last_seg_prefix = -1;
for (i = 0; i < (int) ARRAY_SIZE (all_prefixes); i++)
all_prefixes[i] = 0;
i = 0;
while (1)
length = 0;
/* The maximum instruction length is 15bytes. */
while (length < MAX_CODE_LENGTH - 1)
{
FETCH_DATA (the_info, codep + 1);
newrex = 0;
@ -9606,68 +9625,55 @@ ckprefix (void)
case 0x4d:
case 0x4e:
case 0x4f:
if (address_mode == mode_64bit)
newrex = *codep;
else
return;
if (address_mode == mode_64bit)
newrex = *codep;
else
return 1;
last_rex_prefix = i;
break;
case 0xf3:
if ((prefixes & PREFIX_REPZ) == 0)
{
all_prefixes[i] = &repz_prefix;
i++;
}
prefixes |= PREFIX_REPZ;
last_repz_prefix = i;
break;
case 0xf2:
if ((prefixes & PREFIX_REPNZ) == 0)
{
all_prefixes[i] = &repnz_prefix;
i++;
}
prefixes |= PREFIX_REPNZ;
last_repnz_prefix = i;
break;
case 0xf0:
if ((prefixes & PREFIX_LOCK) == 0)
{
all_prefixes[i] = &lock_prefix;
i++;
}
prefixes |= PREFIX_LOCK;
last_lock_prefix = i;
break;
case 0x2e:
prefixes |= PREFIX_CS;
last_seg_prefix = i;
break;
case 0x36:
prefixes |= PREFIX_SS;
last_seg_prefix = i;
break;
case 0x3e:
prefixes |= PREFIX_DS;
last_seg_prefix = i;
break;
case 0x26:
prefixes |= PREFIX_ES;
last_seg_prefix = i;
break;
case 0x64:
prefixes |= PREFIX_FS;
last_seg_prefix = i;
break;
case 0x65:
prefixes |= PREFIX_GS;
last_seg_prefix = i;
break;
case 0x66:
if ((prefixes & PREFIX_DATA) == 0)
{
all_prefixes[i] = &data_prefix;
i++;
}
prefixes |= PREFIX_DATA;
last_data_prefix = i;
break;
case 0x67:
if ((prefixes & PREFIX_ADDR) == 0)
{
all_prefixes[i] = &addr_prefix;
i++;
}
prefixes |= PREFIX_ADDR;
last_addr_prefix = i;
break;
case FWAIT_OPCODE:
/* fwait is really an instruction. If there are prefixes
@ -9677,22 +9683,48 @@ ckprefix (void)
{
prefixes |= PREFIX_FWAIT;
codep++;
return;
return 1;
}
prefixes = PREFIX_FWAIT;
break;
default:
return;
return 1;
}
/* Rex is ignored when followed by another prefix. */
if (rex)
{
rex_used = rex;
return;
return 1;
}
if (*codep != FWAIT_OPCODE)
all_prefixes[i++] = *codep;
rex = newrex;
rex_original = rex;
codep++;
length++;
}
return 0;
}
static int
seg_prefix (int pref)
{
switch (pref)
{
case 0x2e:
return PREFIX_CS;
case 0x36:
return PREFIX_SS;
case 0x3e:
return PREFIX_DS;
case 0x26:
return PREFIX_ES;
case 0x64:
return PREFIX_FS;
case 0x65:
return PREFIX_GS;
default:
return 0;
}
}
@ -9769,6 +9801,16 @@ prefix_name (int pref, int sizeflag)
return (sizeflag & AFLAG) ? "addr16" : "addr32";
case FWAIT_OPCODE:
return "fwait";
case ADDR16_PREFIX:
return "addr16";
case ADDR32_PREFIX:
return "addr32";
case DATA16_PREFIX:
return "data16";
case DATA32_PREFIX:
return "data32";
case REP_PREFIX:
return "rep";
default:
return NULL;
}
@ -9903,7 +9945,7 @@ get_valid_dis386 (const struct dis386 *dp, disassemble_info *info)
if (prefixes & PREFIX_REPZ)
{
index = 1;
repz_prefix = NULL;
all_prefixes[last_repz_prefix] = 0;
}
else
{
@ -9913,7 +9955,7 @@ get_valid_dis386 (const struct dis386 *dp, disassemble_info *info)
if (prefixes & PREFIX_REPNZ)
{
index = 3;
repnz_prefix = NULL;
all_prefixes[last_repnz_prefix] = 0;
}
else
{
@ -9921,7 +9963,7 @@ get_valid_dis386 (const struct dis386 *dp, disassemble_info *info)
if (prefixes & PREFIX_DATA)
{
index = 2;
data_prefix = NULL;
all_prefixes[last_data_prefix] = 0;
}
}
}
@ -10142,8 +10184,8 @@ print_insn (bfd_vma pc, disassemble_info *info)
const char *p;
struct dis_private priv;
unsigned char op;
char prefix_obuf[32];
char *prefix_obufp;
int prefix_length;
int default_prefixes;
if (info->mach == bfd_mach_x86_64_intel_syntax
|| info->mach == bfd_mach_x86_64
@ -10315,26 +10357,28 @@ print_insn (bfd_vma pc, disassemble_info *info)
}
obufp = obuf;
ckprefix ();
sizeflag = priv.orig_sizeflag;
if (!ckprefix () || rex_used)
{
/* Too many prefixes or unused REX prefixes. */
for (i = 0;
all_prefixes[i] && i < (int) ARRAY_SIZE (all_prefixes);
i++)
(*info->fprintf_func) (info->stream, "%s",
prefix_name (all_prefixes[i], sizeflag));
return 1;
}
insn_codep = codep;
sizeflag = priv.orig_sizeflag;
FETCH_DATA (info, codep + 1);
two_source_ops = (*codep == 0x62) || (*codep == 0xc8);
if (((prefixes & PREFIX_FWAIT)
&& ((*codep < 0xd8) || (*codep > 0xdf)))
|| (rex && rex_used))
&& ((*codep < 0xd8) || (*codep > 0xdf))))
{
const char *name;
/* fwait not followed by floating point instruction, or rex followed
by other prefixes. Print the first prefix. */
name = prefix_name (priv.the_buffer[0], priv.orig_sizeflag);
if (name == NULL)
name = INTERNAL_DISASSEMBLER_ERROR;
(*info->fprintf_func) (info->stream, "%s", name);
(*info->fprintf_func) (info->stream, "fwait");
return 1;
}
@ -10357,44 +10401,26 @@ print_insn (bfd_vma pc, disassemble_info *info)
}
if ((prefixes & PREFIX_REPZ))
{
repz_prefix = "repz ";
used_prefixes |= PREFIX_REPZ;
}
else
repz_prefix = NULL;
used_prefixes |= PREFIX_REPZ;
if ((prefixes & PREFIX_REPNZ))
{
repnz_prefix = "repnz ";
used_prefixes |= PREFIX_REPNZ;
}
else
repnz_prefix = NULL;
used_prefixes |= PREFIX_REPNZ;
if ((prefixes & PREFIX_LOCK))
{
lock_prefix = "lock ";
used_prefixes |= PREFIX_LOCK;
}
else
lock_prefix = NULL;
used_prefixes |= PREFIX_LOCK;
addr_prefix = NULL;
default_prefixes = 0;
if (prefixes & PREFIX_ADDR)
{
sizeflag ^= AFLAG;
if (dp->op[2].bytemode != loop_jcxz_mode || intel_syntax)
{
if ((sizeflag & AFLAG) || address_mode == mode_64bit)
addr_prefix = "addr32 ";
all_prefixes[last_addr_prefix] = ADDR32_PREFIX;
else
addr_prefix = "addr16 ";
used_prefixes |= PREFIX_ADDR;
all_prefixes[last_addr_prefix] = ADDR16_PREFIX;
default_prefixes |= PREFIX_ADDR;
}
}
data_prefix = NULL;
if ((prefixes & PREFIX_DATA))
{
sizeflag ^= DFLAG;
@ -10403,10 +10429,15 @@ print_insn (bfd_vma pc, disassemble_info *info)
&& !intel_syntax)
{
if (sizeflag & DFLAG)
data_prefix = "data32 ";
all_prefixes[last_data_prefix] = DATA32_PREFIX;
else
data_prefix = "data16 ";
used_prefixes |= PREFIX_DATA;
all_prefixes[last_data_prefix] = DATA16_PREFIX;
default_prefixes |= PREFIX_DATA;
}
else if (rex & REX_W)
{
/* REX_W will override PREFIX_DATA. */
default_prefixes |= PREFIX_DATA;
}
}
@ -10445,36 +10476,62 @@ print_insn (bfd_vma pc, disassemble_info *info)
separately. If we don't do this, we'll wind up printing an
instruction stream which does not precisely correspond to the
bytes we are disassembling. */
if ((prefixes & ~used_prefixes) != 0)
if ((prefixes & ~(used_prefixes | default_prefixes)) != 0)
{
const char *name;
name = prefix_name (priv.the_buffer[0], priv.orig_sizeflag);
if (name == NULL)
name = INTERNAL_DISASSEMBLER_ERROR;
(*info->fprintf_func) (info->stream, "%s", name);
return 1;
}
if ((rex_original & ~rex_used) || rex_ignored)
{
const char *name;
name = prefix_name (rex_original, priv.orig_sizeflag);
if (name == NULL)
name = INTERNAL_DISASSEMBLER_ERROR;
(*info->fprintf_func) (info->stream, "%s ", name);
for (i = 0; i < (int) ARRAY_SIZE (all_prefixes); i++)
if (all_prefixes[i])
{
const char *name;
name = prefix_name (all_prefixes[i], priv.orig_sizeflag);
if (name == NULL)
name = INTERNAL_DISASSEMBLER_ERROR;
(*info->fprintf_func) (info->stream, "%s", name);
return 1;
}
}
prefix_obuf[0] = 0;
prefix_obufp = prefix_obuf;
/* Check if the REX prefix used. */
if ((rex ^ rex_used) == 0)
all_prefixes[last_rex_prefix] = 0;
/* Check if the SEG prefix used. */
if ((prefixes & (PREFIX_CS | PREFIX_SS | PREFIX_DS | PREFIX_ES
| PREFIX_FS | PREFIX_GS)) != 0
&& (used_prefixes
& seg_prefix (all_prefixes[last_seg_prefix])) != 0)
all_prefixes[last_seg_prefix] = 0;
/* Check if the ADDR prefix used. */
if ((prefixes & PREFIX_ADDR) != 0
&& (used_prefixes & PREFIX_ADDR) != 0)
all_prefixes[last_addr_prefix] = 0;
/* Check if the DATA prefix used. */
if ((prefixes & PREFIX_DATA) != 0
&& (used_prefixes & PREFIX_DATA) != 0)
all_prefixes[last_data_prefix] = 0;
prefix_length = 0;
for (i = 0; i < (int) ARRAY_SIZE (all_prefixes); i++)
if (all_prefixes[i] && *all_prefixes[i])
prefix_obufp = stpcpy (prefix_obufp, *all_prefixes[i]);
if (all_prefixes[i])
{
const char *name;
name = prefix_name (all_prefixes[i], sizeflag);
if (name == NULL)
abort ();
prefix_length += strlen (name) + 1;
(*info->fprintf_func) (info->stream, "%s ", name);
}
if (prefix_obuf[0] != 0)
(*info->fprintf_func) (info->stream, "%s", prefix_obuf);
/* Check maximum code length. */
if ((codep - start_codep) > MAX_CODE_LENGTH)
{
(*info->fprintf_func) (info->stream, "(bad)");
return MAX_CODE_LENGTH;
}
obufp = mnemonicendp;
for (i = strlen (obuf) + strlen (prefix_obuf); i < 6; i++)
for (i = strlen (obuf) + prefix_length; i < 6; i++)
oappend (" ");
oappend (" ");
(*info->fprintf_func) (info->stream, "%s", obuf);
@ -11013,11 +11070,14 @@ case_B:
{
if (rex & REX_W)
*obufp++ = 'q';
else if (sizeflag & DFLAG)
*obufp++ = intel_syntax ? 'd' : 'l';
else
*obufp++ = 'w';
used_prefixes |= (prefixes & PREFIX_DATA);
{
if (sizeflag & DFLAG)
*obufp++ = intel_syntax ? 'd' : 'l';
else
*obufp++ = 'w';
used_prefixes |= (prefixes & PREFIX_DATA);
}
}
else
*obufp++ = 'w';
@ -11152,8 +11212,8 @@ case_L:
*obufp++ = 'l';
else
*obufp++ = 'w';
used_prefixes |= (prefixes & PREFIX_DATA);
}
used_prefixes |= (prefixes & PREFIX_DATA);
}
break;
case 'U':
@ -11184,8 +11244,8 @@ case_Q:
*obufp++ = intel_syntax ? 'd' : 'l';
else
*obufp++ = 'w';
used_prefixes |= (prefixes & PREFIX_DATA);
}
used_prefixes |= (prefixes & PREFIX_DATA);
}
}
else
@ -11311,11 +11371,14 @@ case_S:
else
*obufp++ = 's';
}
else if (prefixes & PREFIX_DATA)
*obufp++ = 'd';
else
*obufp++ = 's';
used_prefixes |= (prefixes & PREFIX_DATA);
{
if (prefixes & PREFIX_DATA)
*obufp++ = 'd';
else
*obufp++ = 's';
used_prefixes |= (prefixes & PREFIX_DATA);
}
break;
case 'Y':
if (l == 0 && len == 1)
@ -11561,7 +11624,6 @@ intel_operand_size (int bytemode, int sizeflag)
if (address_mode == mode_64bit && (sizeflag & DFLAG))
{
oappend ("QWORD PTR ");
used_prefixes |= (prefixes & PREFIX_DATA);
break;
}
/* FALLTHRU */
@ -11571,11 +11633,14 @@ intel_operand_size (int bytemode, int sizeflag)
USED_REX (REX_W);
if (rex & REX_W)
oappend ("QWORD PTR ");
else if ((sizeflag & DFLAG) || bytemode == dq_mode)
oappend ("DWORD PTR ");
else
oappend ("WORD PTR ");
used_prefixes |= (prefixes & PREFIX_DATA);
{
if ((sizeflag & DFLAG) || bytemode == dq_mode)
oappend ("DWORD PTR ");
else
oappend ("WORD PTR ");
used_prefixes |= (prefixes & PREFIX_DATA);
}
break;
case z_mode:
if ((rex & REX_W) || (sizeflag & DFLAG))
@ -11727,7 +11792,6 @@ OP_E_register (int bytemode, int sizeflag)
if (address_mode == mode_64bit && (sizeflag & DFLAG))
{
names = names64;
used_prefixes |= (prefixes & PREFIX_DATA);
break;
}
bytemode = v_mode;
@ -11741,13 +11805,16 @@ OP_E_register (int bytemode, int sizeflag)
USED_REX (REX_W);
if (rex & REX_W)
names = names64;
else if ((sizeflag & DFLAG)
|| (bytemode != v_mode
&& bytemode != v_swap_mode))
names = names32;
else
names = names16;
used_prefixes |= (prefixes & PREFIX_DATA);
{
if ((sizeflag & DFLAG)
|| (bytemode != v_mode
&& bytemode != v_swap_mode))
names = names32;
else
names = names16;
used_prefixes |= (prefixes & PREFIX_DATA);
}
break;
case 0:
return;
@ -11936,7 +12003,9 @@ OP_E_memory (int bytemode, int sizeflag)
}
}
else
{ /* 16 bit address mode */
{
/* 16 bit address mode */
used_prefixes |= prefixes & PREFIX_ADDR;
switch (modrm.mod)
{
case 0:
@ -12063,11 +12132,14 @@ OP_G (int bytemode, int sizeflag)
USED_REX (REX_W);
if (rex & REX_W)
oappend (names64[modrm.reg + add]);
else if ((sizeflag & DFLAG) || bytemode != v_mode)
oappend (names32[modrm.reg + add]);
else
oappend (names16[modrm.reg + add]);
used_prefixes |= (prefixes & PREFIX_DATA);
{
if ((sizeflag & DFLAG) || bytemode != v_mode)
oappend (names32[modrm.reg + add]);
else
oappend (names16[modrm.reg + add]);
used_prefixes |= (prefixes & PREFIX_DATA);
}
break;
case m_mode:
if (address_mode == mode_64bit)
@ -12206,11 +12278,14 @@ OP_REG (int code, int sizeflag)
USED_REX (REX_W);
if (rex & REX_W)
s = names64[code - eAX_reg + add];
else if (sizeflag & DFLAG)
s = names32[code - eAX_reg + add];
else
s = names16[code - eAX_reg + add];
used_prefixes |= (prefixes & PREFIX_DATA);
{
if (sizeflag & DFLAG)
s = names32[code - eAX_reg + add];
else
s = names16[code - eAX_reg + add];
used_prefixes |= (prefixes & PREFIX_DATA);
}
break;
default:
s = INTERNAL_DISASSEMBLER_ERROR;
@ -12253,11 +12328,14 @@ OP_IMREG (int code, int sizeflag)
USED_REX (REX_W);
if (rex & REX_W)
s = names64[code - eAX_reg];
else if (sizeflag & DFLAG)
s = names32[code - eAX_reg];
else
s = names16[code - eAX_reg];
used_prefixes |= (prefixes & PREFIX_DATA);
{
if (sizeflag & DFLAG)
s = names32[code - eAX_reg];
else
s = names16[code - eAX_reg];
used_prefixes |= (prefixes & PREFIX_DATA);
}
break;
case z_mode_ax_reg:
if ((rex & REX_W) || (sizeflag & DFLAG))
@ -12298,17 +12376,20 @@ OP_I (int bytemode, int sizeflag)
USED_REX (REX_W);
if (rex & REX_W)
op = get32s ();
else if (sizeflag & DFLAG)
{
op = get32 ();
mask = 0xffffffff;
}
else
{
op = get16 ();
mask = 0xfffff;
if (sizeflag & DFLAG)
{
op = get32 ();
mask = 0xffffffff;
}
else
{
op = get16 ();
mask = 0xfffff;
}
used_prefixes |= (prefixes & PREFIX_DATA);
}
used_prefixes |= (prefixes & PREFIX_DATA);
break;
case w_mode:
mask = 0xfffff;
@ -12353,17 +12434,20 @@ OP_I64 (int bytemode, int sizeflag)
USED_REX (REX_W);
if (rex & REX_W)
op = get64 ();
else if (sizeflag & DFLAG)
{
op = get32 ();
mask = 0xffffffff;
}
else
{
op = get16 ();
mask = 0xfffff;
if (sizeflag & DFLAG)
{
op = get32 ();
mask = 0xffffffff;
}
else
{
op = get16 ();
mask = 0xfffff;
}
used_prefixes |= (prefixes & PREFIX_DATA);
}
used_prefixes |= (prefixes & PREFIX_DATA);
break;
case w_mode:
mask = 0xfffff;
@ -12400,19 +12484,22 @@ OP_sI (int bytemode, int sizeflag)
USED_REX (REX_W);
if (rex & REX_W)
op = get32s ();
else if (sizeflag & DFLAG)
{
op = get32s ();
mask = 0xffffffff;
}
else
{
mask = 0xffffffff;
op = get16 ();
if ((op & 0x8000) != 0)
op -= 0x10000;
if (sizeflag & DFLAG)
{
op = get32s ();
mask = 0xffffffff;
}
else
{
mask = 0xffffffff;
op = get16 ();
if ((op & 0x8000) != 0)
op -= 0x10000;
}
used_prefixes |= (prefixes & PREFIX_DATA);
}
used_prefixes |= (prefixes & PREFIX_DATA);
break;
case w_mode:
op = get16 ();
@ -12446,6 +12533,7 @@ OP_J (int bytemode, int sizeflag)
disp -= 0x100;
break;
case v_mode:
USED_REX (REX_W);
if ((sizeflag & DFLAG) || (rex & REX_W))
disp = get32s ();
else
@ -12462,7 +12550,8 @@ OP_J (int bytemode, int sizeflag)
segment = ((start_pc + codep - start_codep)
& ~((bfd_vma) 0xffff));
}
used_prefixes |= (prefixes & PREFIX_DATA);
if (!(rex & REX_W))
used_prefixes |= (prefixes & PREFIX_DATA);
break;
default:
oappend (INTERNAL_DISASSEMBLER_ERROR);
@ -12653,7 +12742,7 @@ OP_C (int dummy ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
}
else if (address_mode != mode_64bit && (prefixes & PREFIX_LOCK))
{
lock_prefix = NULL;
all_prefixes[last_lock_prefix] = 0;
used_prefixes |= PREFIX_LOCK;
add = 8;
}
@ -13092,7 +13181,7 @@ OP_Monitor (int bytemode ATTRIBUTE_UNUSED,
else
{
/* Remove "addr16/addr32". */
addr_prefix = NULL;
all_prefixes[last_addr_prefix] = 0;
op1_names = (address_mode != mode_32bit
? names32 : names16);
used_prefixes |= PREFIX_ADDR;
@ -13121,7 +13210,7 @@ REP_Fixup (int bytemode, int sizeflag)
/* The 0xf3 prefix should be displayed as "rep" for ins, outs, movs,
lods and stos. */
if (prefixes & PREFIX_REPZ)
repz_prefix = "rep ";
all_prefixes[last_repz_prefix] = REP_PREFIX;
switch (bytemode)
{
@ -13199,11 +13288,14 @@ CRC32_Fixup (int bytemode, int sizeflag)
USED_REX (REX_W);
if (rex & REX_W)
*p++ = 'q';
else if (sizeflag & DFLAG)
*p++ = 'l';
else
*p++ = 'w';
used_prefixes |= (prefixes & PREFIX_DATA);
else
{
if (sizeflag & DFLAG)
*p++ = 'l';
else
*p++ = 'w';
used_prefixes |= (prefixes & PREFIX_DATA);
}
break;
default:
oappend (INTERNAL_DISASSEMBLER_ERROR);
@ -13636,12 +13728,15 @@ MOVBE_Fixup (int bytemode, int sizeflag)
{
if (rex & REX_W)
*p++ = 'q';
else if (sizeflag & DFLAG)
*p++ = 'l';
else
*p++ = 'w';
{
if (sizeflag & DFLAG)
*p++ = 'l';
else
*p++ = 'w';
used_prefixes |= (prefixes & PREFIX_DATA);
}
}
used_prefixes |= (prefixes & PREFIX_DATA);
break;
default:
oappend (INTERNAL_DISASSEMBLER_ERROR);