mirror of
https://sourceware.org/git/binutils-gdb.git
synced 2025-01-18 14:04:24 +08:00
* ld-powerpc/powerpc.exp: Modify emulation option passed to ld
when little-endian. * ld-powerpc/apuinfo-nul.rd: Update for le output. * ld-powerpc/apuinfo.rd: Likewise. * ld-powerpc/plt1.d: Likewise. * ld-powerpc/relax.d: Likewise. * ld-powerpc/relaxr.d: Likewise. * ld-powerpc/sdadyn.d: Likewise. * ld-powerpc/tls.d: Likewise. * ld-powerpc/tls.g: Likewise. * ld-powerpc/tls.t: Likewise. * ld-powerpc/tls32.d: Likewise. * ld-powerpc/tls32.g: Likewise. * ld-powerpc/tls32.t: Likewise. * ld-powerpc/tlsexe.d: Likewise. * ld-powerpc/tlsexe.g: Likewise. * ld-powerpc/tlsexe.r: Likewise. * ld-powerpc/tlsexe.t: Likewise. * ld-powerpc/tlsexe32.d: Likewise. * ld-powerpc/tlsexe32.g: Likewise. * ld-powerpc/tlsexe32.r: Likewise. * ld-powerpc/tlsexe32.t: Likewise. * ld-powerpc/tlsexetoc.d: Likewise. * ld-powerpc/tlsexetoc.g: Likewise. * ld-powerpc/tlsexetoc.r: Likewise. * ld-powerpc/tlsexetoc.t: Likewise. * ld-powerpc/tlsmark.d: Likewise. * ld-powerpc/tlsmark32.d: Likewise. * ld-powerpc/tlsopt1.d: Likewise. * ld-powerpc/tlsopt1_32.d: Likewise. * ld-powerpc/tlsopt2.d: Likewise. * ld-powerpc/tlsopt2_32.d: Likewise. * ld-powerpc/tlsopt3.d: Likewise. * ld-powerpc/tlsopt3_32.d: Likewise. * ld-powerpc/tlsopt4.d: Likewise. * ld-powerpc/tlsopt4_32.d: Likewise. * ld-powerpc/tlsso.d: Likewise. * ld-powerpc/tlsso.g: Likewise. * ld-powerpc/tlsso.r: Likewise. * ld-powerpc/tlsso.t: Likewise. * ld-powerpc/tlsso32.d: Likewise. * ld-powerpc/tlsso32.g: Likewise. * ld-powerpc/tlsso32.r: Likewise. * ld-powerpc/tlsso32.t: Likewise. * ld-powerpc/tlstoc.d: Likewise. * ld-powerpc/tlstoc.g: Likewise. * ld-powerpc/tlstoc.t: Likewise. * ld-powerpc/tlstocso.d: Likewise. * ld-powerpc/tlstocso.g: Likewise. * ld-powerpc/tlstocso.t: Likewise. * ld-powerpc/tocopt.out: Likewise.
This commit is contained in:
Alan Modra
parent
ab1f5dd1e2
commit
ed6b7ef4bc
@ -1,3 +1,57 @@
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2012-10-29 Alan Modra <amodra@gmail.com>
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* ld-powerpc/powerpc.exp: Modify emulation option passed to ld
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when little-endian.
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* ld-powerpc/apuinfo-nul.rd: Update for le output.
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* ld-powerpc/apuinfo.rd: Likewise.
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* ld-powerpc/plt1.d: Likewise.
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* ld-powerpc/relax.d: Likewise.
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* ld-powerpc/relaxr.d: Likewise.
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* ld-powerpc/sdadyn.d: Likewise.
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* ld-powerpc/tls.d: Likewise.
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* ld-powerpc/tls.g: Likewise.
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* ld-powerpc/tls.t: Likewise.
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* ld-powerpc/tls32.d: Likewise.
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* ld-powerpc/tls32.g: Likewise.
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* ld-powerpc/tls32.t: Likewise.
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* ld-powerpc/tlsexe.d: Likewise.
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* ld-powerpc/tlsexe.g: Likewise.
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* ld-powerpc/tlsexe.r: Likewise.
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* ld-powerpc/tlsexe.t: Likewise.
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* ld-powerpc/tlsexe32.d: Likewise.
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* ld-powerpc/tlsexe32.g: Likewise.
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* ld-powerpc/tlsexe32.r: Likewise.
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* ld-powerpc/tlsexe32.t: Likewise.
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* ld-powerpc/tlsexetoc.d: Likewise.
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* ld-powerpc/tlsexetoc.g: Likewise.
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* ld-powerpc/tlsexetoc.r: Likewise.
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* ld-powerpc/tlsexetoc.t: Likewise.
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* ld-powerpc/tlsmark.d: Likewise.
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* ld-powerpc/tlsmark32.d: Likewise.
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* ld-powerpc/tlsopt1.d: Likewise.
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* ld-powerpc/tlsopt1_32.d: Likewise.
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* ld-powerpc/tlsopt2.d: Likewise.
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* ld-powerpc/tlsopt2_32.d: Likewise.
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* ld-powerpc/tlsopt3.d: Likewise.
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* ld-powerpc/tlsopt3_32.d: Likewise.
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* ld-powerpc/tlsopt4.d: Likewise.
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* ld-powerpc/tlsopt4_32.d: Likewise.
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* ld-powerpc/tlsso.d: Likewise.
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* ld-powerpc/tlsso.g: Likewise.
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* ld-powerpc/tlsso.r: Likewise.
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* ld-powerpc/tlsso.t: Likewise.
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* ld-powerpc/tlsso32.d: Likewise.
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* ld-powerpc/tlsso32.g: Likewise.
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* ld-powerpc/tlsso32.r: Likewise.
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* ld-powerpc/tlsso32.t: Likewise.
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* ld-powerpc/tlstoc.d: Likewise.
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* ld-powerpc/tlstoc.g: Likewise.
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* ld-powerpc/tlstoc.t: Likewise.
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* ld-powerpc/tlstocso.d: Likewise.
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* ld-powerpc/tlstocso.g: Likewise.
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* ld-powerpc/tlstocso.t: Likewise.
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* ld-powerpc/tocopt.out: Likewise.
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2012-10-25 H.J. Lu <hongjiu.lu@intel.com>
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* ld-elfvsb/main.c (main_visibility_checkcom): Remove address
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@ -5,5 +5,5 @@
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#target: powerpc-eabi*
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Hex dump of section '.PPC.EMB.apuinfo':
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0x00000000 00000008 00000000 00000002 41505569 ............APUi
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0x00000000 (00000008|08000000) 00000000 (00000002|02000000) 41505569 .*APUi
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0x00000010 6e666f00 nfo.
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@ -6,7 +6,7 @@
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#target: powerpc-eabi*
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Hex dump of section '.PPC.EMB.apuinfo':
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0x00000000 00000008 00000020 00000002 41505569 ....... ....APUi
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0x00000010 6e666f00 00420001 00430001 00410001 nfo..B...C...A..
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0x00000020 01020001 01010001 00400001 01040001 .........@......
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0x00000030 01000001 ....$
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0x00000000 (00000008|08000000) (00000020|20000000) (00000002|02000000) 41505569 .*APUi
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0x00000010 6e666f00 (00420001|01004200) (00430001|01004300) (00410001|01004100) nfo.*
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0x00000020 (01020001|01000201) (01010001|01000101) (00400001|01004000) (01040001|01000401) .*
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0x00000030 01000001 .*
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@ -3,18 +3,18 @@
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#objdump: -dr
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#target: powerpc*-*-*
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.*: file format elf32-powerpc
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.*
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Disassembly of section .text:
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0+ <_start>:
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0: 42 9f 00 05 bcl- 20,4\*cr7\+so,4 .*
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4: 7f c8 02 a6 mflr r30
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8: 3f de 00 00 addis r30,r30,0
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a: R_PPC_REL16_HA _GLOBAL_OFFSET_TABLE_\+0x6
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c: 3b de 00 0a addi r30,r30,10
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e: R_PPC_REL16_LO _GLOBAL_OFFSET_TABLE_\+0xa
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10: 48 00 00 01 bl 10 .*
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0: (42 9f 00 05|05 00 9f 42) bcl- 20,4\*cr7\+so,4 .*
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4: (7f c8 02 a6|a6 02 c8 7f) mflr r30
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8: (3f de 00 00|00 00 de 3f) addis r30,r30,0
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(a|8): R_PPC_REL16_HA _GLOBAL_OFFSET_TABLE_\+0x(6|4)
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c: (3b de 00 0.|0. 00 de 3b) addi r30,r30,.*
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(e|c): R_PPC_REL16_LO _GLOBAL_OFFSET_TABLE_\+0x(a|8)
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10: (48 00 00 01|01 00 00 48) bl 10 .*
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10: R_PPC_PLTREL24 _exit
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14: 48 00 00 00 b 14 .*
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14: (48 00 00 00|00 00 00 48) b 14 .*
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14: R_PPC_REL24 _start
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@ -242,6 +242,27 @@ set ppceabitests {
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{{objdump "-Mvle -d" vle-reloc-3.d}} "vle-reloc-3"}
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}
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if [istarget "powerpc*le*-*-*"] then {
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set options_regsub(ld) {-melf32ppc -melf32lppc}
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for {set i 0} {$i < [llength $ppcelftests]} {incr i} {
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set line [lindex $ppcelftests $i]
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set ld_options [lindex $line 1]
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regsub -all elf32ppc $ld_options elf32lppc ld_options
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set line [lreplace $line 1 1 $ld_options]
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set ppcelftests [lreplace $ppcelftests $i $i $line]
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}
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if [ supports_ppc64 ] then {
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for {set i 0} {$i < [llength $ppc64elftests]} {incr i} {
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set line [lindex $ppcelftests $i]
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set ld_options [lindex $line 1]
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regsub -all elf64ppc $ld_options elf64lppc ld_options
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set line [lreplace $line 1 1 $ld_options]
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set ppc64elftests [lreplace $ppc64elftests $i $i $line]
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}
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}
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}
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run_ld_link_tests $ppcelftests
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@ -4,12 +4,12 @@
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Disassembly of section .text:
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00000000 <_start>:
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0: 48 00 43 21 bl 4320 <near>
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4: 48 00 00 11 bl 14 <_start\+0x14>
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8: 48 00 43 19 bl 4320 <near>
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c: 48 00 00 09 bl 14 <_start\+0x14>
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10: 4b ff ff f0 b 0 <.*>
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14: 3d 80 80 00 lis r12,-32768
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18: 39 8c 12 34 addi r12,r12,4660
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1c: 7d 89 03 a6 mtctr r12
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20: 4e 80 04 20 bctr
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0: (48 00 43 21|21 43 00 48) bl 4320 <near>
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4: (48 00 00 11|11 00 00 48) bl 14 <_start\+0x14>
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8: (48 00 43 19|19 43 00 48) bl 4320 <near>
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c: (48 00 00 09|09 00 00 48) bl 14 <_start\+0x14>
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10: (4b ff ff f0|f0 ff ff 4b) b 0 <.*>
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14: (3d 80 80 00|00 80 80 3d) lis r12,-32768
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18: (39 8c 12 34|34 12 8c 39) addi r12,r12,4660
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1c: (7d 89 03 a6|a6 03 89 7d) mtctr r12
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20: (4e 80 04 20|20 04 80 4e) bctr
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@ -4,23 +4,23 @@
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Disassembly of section .text:
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00000000 <_start>:
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0: 48 00 00 15 bl 14 <_start\+0x14>
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4: 48 00 00 21 bl 24 <_start\+0x24>
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8: 48 00 00 0d bl 14 <_start\+0x14>
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0: (48 00 00 15|15 00 00 48) bl 14 <_start\+0x14>
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4: (48 00 00 21|21 00 00 48) bl 24 <_start\+0x24>
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8: (48 00 00 0d|0d 00 00 48) bl 14 <_start\+0x14>
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8: R_PPC_NONE \*ABS\*
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c: 48 00 00 19 bl 24 <_start\+0x24>
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c: (48 00 00 19|19 00 00 48) bl 24 <_start\+0x24>
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c: R_PPC_NONE \*ABS\*
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10: 48 00 00 00 b 10 <_start\+0x10>
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10: (48 00 00 00|00 00 00 48) b 10 <_start\+0x10>
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10: R_PPC_REL24 _start
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14: 3d 80 00 00 lis r12,0
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16: R_PPC_ADDR16_HA near
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18: 39 8c 00 00 addi r12,r12,0
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1a: R_PPC_ADDR16_LO near
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1c: 7d 89 03 a6 mtctr r12
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20: 4e 80 04 20 bctr
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24: 3d 80 00 00 lis r12,0
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26: R_PPC_ADDR16_HA far
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28: 39 8c 00 00 addi r12,r12,0
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2a: R_PPC_ADDR16_LO far
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2c: 7d 89 03 a6 mtctr r12
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30: 4e 80 04 20 bctr
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14: (3d 80 00 00|00 00 80 3d) lis r12,0
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1(6|4): R_PPC_ADDR16_HA near
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18: (39 8c 00 00|00 00 8c 39) addi r12,r12,0
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1(a|8): R_PPC_ADDR16_LO near
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1c: (7d 89 03 a6|a6 03 89 7d) mtctr r12
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20: (4e 80 04 20|20 04 80 4e) bctr
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24: (3d 80 00 00|00 00 80 3d) lis r12,0
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2(6|4): R_PPC_ADDR16_HA far
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28: (39 8c 00 00|00 00 8c 39) addi r12,r12,0
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2(a|8): R_PPC_ADDR16_LO far
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2c: (7d 89 03 a6|a6 03 89 7d) mtctr r12
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30: (4e 80 04 20|20 04 80 4e) bctr
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@ -1,5 +1,5 @@
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.*: +file format elf32-powerpc
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.*
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DYNAMIC RELOCATION RECORDS
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OFFSET TYPE VALUE
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@ -1,53 +1,53 @@
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#source: tls.s
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#source: tlslib.s
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#as: -a64
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#ld: -melf64ppc
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#ld:
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#objdump: -dr
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#target: powerpc64*-*-*
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.*: +file format elf64-powerpc
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.*
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Disassembly of section \.text:
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0+100000e8 <_start>:
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100000e8: 3c 6d 00 00 addis r3,r13,0
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100000ec: 60 00 00 00 nop
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100000f0: 38 63 90 78 addi r3,r3,-28552
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100000f4: 3c 6d 00 00 addis r3,r13,0
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100000f8: 60 00 00 00 nop
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100000fc: 38 63 10 00 addi r3,r3,4096
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10000100: 3c 6d 00 00 addis r3,r13,0
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10000104: 60 00 00 00 nop
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10000108: 38 63 90 40 addi r3,r3,-28608
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1000010c: 3c 6d 00 00 addis r3,r13,0
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10000110: 60 00 00 00 nop
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10000114: 38 63 10 00 addi r3,r3,4096
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10000118: 39 23 80 48 addi r9,r3,-32696
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1000011c: 3d 23 00 00 addis r9,r3,0
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10000120: 81 49 80 50 lwz r10,-32688\(r9\)
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10000124: e9 22 80 10 ld r9,-32752\(r2\)
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10000128: 7d 49 18 2a ldx r10,r9,r3
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1000012c: 3d 2d 00 00 addis r9,r13,0
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10000130: a1 49 90 60 lhz r10,-28576\(r9\)
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10000134: 89 4d 90 68 lbz r10,-28568\(r13\)
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10000138: 3d 2d 00 00 addis r9,r13,0
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1000013c: 99 49 90 70 stb r10,-28560\(r9\)
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10000140: 3c 6d 00 00 addis r3,r13,0
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10000144: 60 00 00 00 nop
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10000148: 38 63 90 00 addi r3,r3,-28672
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1000014c: 3c 6d 00 00 addis r3,r13,0
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10000150: 60 00 00 00 nop
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10000154: 38 63 10 00 addi r3,r3,4096
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10000158: f9 43 80 08 std r10,-32760\(r3\)
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1000015c: 3d 23 00 00 addis r9,r3,0
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10000160: 91 49 80 10 stw r10,-32752\(r9\)
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10000164: e9 22 80 08 ld r9,-32760\(r2\)
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10000168: 7d 49 19 2a stdx r10,r9,r3
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1000016c: 3d 2d 00 00 addis r9,r13,0
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||||
10000170: b1 49 90 60 sth r10,-28576\(r9\)
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||||
10000174: e9 4d 90 2a lwa r10,-28632\(r13\)
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||||
10000178: 3d 2d 00 00 addis r9,r13,0
|
||||
1000017c: a9 49 90 30 lha r10,-28624\(r9\)
|
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.*: (3c 6d 00 00|00 00 6d 3c) addis r3,r13,0
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||||
.*: (60 00 00 00|00 00 00 60) nop
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||||
.*: (38 63 90 78|78 90 63 38) addi r3,r3,-28552
|
||||
.*: (3c 6d 00 00|00 00 6d 3c) addis r3,r13,0
|
||||
.*: (60 00 00 00|00 00 00 60) nop
|
||||
.*: (38 63 10 00|00 10 63 38) addi r3,r3,4096
|
||||
.*: (3c 6d 00 00|00 00 6d 3c) addis r3,r13,0
|
||||
.*: (60 00 00 00|00 00 00 60) nop
|
||||
.*: (38 63 90 40|40 90 63 38) addi r3,r3,-28608
|
||||
.*: (3c 6d 00 00|00 00 6d 3c) addis r3,r13,0
|
||||
.*: (60 00 00 00|00 00 00 60) nop
|
||||
.*: (38 63 10 00|00 10 63 38) addi r3,r3,4096
|
||||
.*: (39 23 80 48|48 80 23 39) addi r9,r3,-32696
|
||||
.*: (3d 23 00 00|00 00 23 3d) addis r9,r3,0
|
||||
.*: (81 49 80 50|50 80 49 81) lwz r10,-32688\(r9\)
|
||||
.*: (e9 22 80 10|10 80 22 e9) ld r9,-32752\(r2\)
|
||||
.*: (7d 49 18 2a|2a 18 49 7d) ldx r10,r9,r3
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||||
.*: (3d 2d 00 00|00 00 2d 3d) addis r9,r13,0
|
||||
.*: (a1 49 90 60|60 90 49 a1) lhz r10,-28576\(r9\)
|
||||
.*: (89 4d 90 68|68 90 4d 89) lbz r10,-28568\(r13\)
|
||||
.*: (3d 2d 00 00|00 00 2d 3d) addis r9,r13,0
|
||||
.*: (99 49 90 70|70 90 49 99) stb r10,-28560\(r9\)
|
||||
.*: (3c 6d 00 00|00 00 6d 3c) addis r3,r13,0
|
||||
.*: (60 00 00 00|00 00 00 60) nop
|
||||
.*: (38 63 90 00|00 90 63 38) addi r3,r3,-28672
|
||||
.*: (3c 6d 00 00|00 00 6d 3c) addis r3,r13,0
|
||||
.*: (60 00 00 00|00 00 00 60) nop
|
||||
.*: (38 63 10 00|00 10 63 38) addi r3,r3,4096
|
||||
.*: (f9 43 80 08|08 80 43 f9) std r10,-32760\(r3\)
|
||||
.*: (3d 23 00 00|00 00 23 3d) addis r9,r3,0
|
||||
.*: (91 49 80 10|10 80 49 91) stw r10,-32752\(r9\)
|
||||
.*: (e9 22 80 08|08 80 22 e9) ld r9,-32760\(r2\)
|
||||
.*: (7d 49 19 2a|2a 19 49 7d) stdx r10,r9,r3
|
||||
.*: (3d 2d 00 00|00 00 2d 3d) addis r9,r13,0
|
||||
.*: (b1 49 90 60|60 90 49 b1) sth r10,-28576\(r9\)
|
||||
.*: (e9 4d 90 2a|2a 90 4d e9) lwa r10,-28632\(r13\)
|
||||
.*: (3d 2d 00 00|00 00 2d 3d) addis r9,r13,0
|
||||
.*: (a9 49 90 30|30 90 49 a9) lha r10,-28624\(r9\)
|
||||
|
||||
0+10000180 <\.__tls_get_addr>:
|
||||
10000180: 4e 80 00 20 blr
|
||||
.*: (4e 80 00 20|20 00 80 4e) blr
|
||||
|
||||
@ -1,12 +1,12 @@
|
||||
#source: tls.s
|
||||
#source: tlslib.s
|
||||
#as: -a64
|
||||
#ld: -melf64ppc
|
||||
#ld:
|
||||
#objdump: -sj.got
|
||||
#target: powerpc64*-*-*
|
||||
|
||||
.*: +file format elf64-powerpc
|
||||
.*
|
||||
|
||||
Contents of section \.got:
|
||||
100101e0 00000000 100181e0 ffffffff ffff8018 .*
|
||||
100101f0 ffffffff ffff8058 .*
|
||||
100101e0 (00000000|e0810110) (100181e0|00000000) (ffffffff|1880ffff) (ffff8018|ffffffff) .*
|
||||
100101f0 (ffffffff|5880ffff) (ffff8058|ffffffff) .*
|
||||
|
||||
@ -1,14 +1,14 @@
|
||||
#source: tls.s
|
||||
#source: tlslib.s
|
||||
#as: -a64
|
||||
#ld: -melf64ppc
|
||||
#ld:
|
||||
#objdump: -sj.tdata
|
||||
#target: powerpc64*-*-*
|
||||
|
||||
.*: +file format elf64-powerpc
|
||||
|
||||
Contents of section \.tdata:
|
||||
.* 12345678 9abcdef0 23456789 abcdef01 .*
|
||||
.* 3456789a bcdef012 456789ab cdef0123 .*
|
||||
.* 56789abc def01234 6789abcd ef012345 .*
|
||||
.* 789abcde f0123456 00c0ffee .*
|
||||
.* (12345678|f0debc9a) (9abcdef0|78563412) (23456789|01efcdab) (abcdef01|89674523) .*
|
||||
.* (3456789a|12f0debc) (bcdef012|9a785634) (456789ab|2301efcd) (cdef0123|ab896745) .*
|
||||
.* (56789abc|3412f0de) (def01234|bc9a7856) (6789abcd|452301ef) (ef012345|cdab8967) .*
|
||||
.* (789abcde|563412f0) (f0123456|debc9a78) (00c0ffee|eeffc000) .*
|
||||
|
||||
@ -1,50 +1,50 @@
|
||||
#source: tls32.s
|
||||
#source: tlslib32.s
|
||||
#as: -a32
|
||||
#ld: -melf32ppc
|
||||
#ld:
|
||||
#objdump: -dr
|
||||
#target: powerpc*-*-*
|
||||
|
||||
.*: +file format elf32-powerpc
|
||||
.*
|
||||
|
||||
Disassembly of section \.text:
|
||||
|
||||
0+1800094 <_start>:
|
||||
1800094: 3c 62 00 00 addis r3,r2,0
|
||||
1800098: 38 63 90 3c addi r3,r3,-28612
|
||||
180009c: 3c 62 00 00 addis r3,r2,0
|
||||
18000a0: 38 63 10 00 addi r3,r3,4096
|
||||
18000a4: 3c 62 00 00 addis r3,r2,0
|
||||
18000a8: 38 63 90 20 addi r3,r3,-28640
|
||||
18000ac: 3c 62 00 00 addis r3,r2,0
|
||||
18000b0: 38 63 10 00 addi r3,r3,4096
|
||||
18000b4: 39 23 80 24 addi r9,r3,-32732
|
||||
18000b8: 3d 23 00 00 addis r9,r3,0
|
||||
18000bc: 81 49 80 28 lwz r10,-32728\(r9\)
|
||||
18000c0: 3d 22 00 00 addis r9,r2,0
|
||||
18000c4: a1 49 90 30 lhz r10,-28624\(r9\)
|
||||
18000c8: 89 42 90 34 lbz r10,-28620\(r2\)
|
||||
18000cc: 3d 22 00 00 addis r9,r2,0
|
||||
18000d0: 99 49 90 38 stb r10,-28616\(r9\)
|
||||
18000d4: 3c 62 00 00 addis r3,r2,0
|
||||
18000d8: 38 63 90 00 addi r3,r3,-28672
|
||||
18000dc: 3c 62 00 00 addis r3,r2,0
|
||||
18000e0: 38 63 10 00 addi r3,r3,4096
|
||||
18000e4: 91 43 80 04 stw r10,-32764\(r3\)
|
||||
18000e8: 3d 23 00 00 addis r9,r3,0
|
||||
18000ec: 91 49 80 08 stw r10,-32760\(r9\)
|
||||
18000f0: 3d 22 00 00 addis r9,r2,0
|
||||
18000f4: b1 49 90 30 sth r10,-28624\(r9\)
|
||||
18000f8: a1 42 90 14 lhz r10,-28652\(r2\)
|
||||
18000fc: 3d 22 00 00 addis r9,r2,0
|
||||
1800100: a9 49 90 18 lha r10,-28648\(r9\)
|
||||
.*: (3c 62 00 00|00 00 62 3c) addis r3,r2,0
|
||||
.*: (38 63 90 3c|3c 90 63 38) addi r3,r3,-28612
|
||||
.*: (3c 62 00 00|00 00 62 3c) addis r3,r2,0
|
||||
.*: (38 63 10 00|00 10 63 38) addi r3,r3,4096
|
||||
.*: (3c 62 00 00|00 00 62 3c) addis r3,r2,0
|
||||
.*: (38 63 90 20|20 90 63 38) addi r3,r3,-28640
|
||||
.*: (3c 62 00 00|00 00 62 3c) addis r3,r2,0
|
||||
.*: (38 63 10 00|00 10 63 38) addi r3,r3,4096
|
||||
.*: (39 23 80 24|24 80 23 39) addi r9,r3,-32732
|
||||
.*: (3d 23 00 00|00 00 23 3d) addis r9,r3,0
|
||||
.*: (81 49 80 28|28 80 49 81) lwz r10,-32728\(r9\)
|
||||
.*: (3d 22 00 00|00 00 22 3d) addis r9,r2,0
|
||||
.*: (a1 49 90 30|30 90 49 a1) lhz r10,-28624\(r9\)
|
||||
.*: (89 42 90 34|34 90 42 89) lbz r10,-28620\(r2\)
|
||||
.*: (3d 22 00 00|00 00 22 3d) addis r9,r2,0
|
||||
.*: (99 49 90 38|38 90 49 99) stb r10,-28616\(r9\)
|
||||
.*: (3c 62 00 00|00 00 62 3c) addis r3,r2,0
|
||||
.*: (38 63 90 00|00 90 63 38) addi r3,r3,-28672
|
||||
.*: (3c 62 00 00|00 00 62 3c) addis r3,r2,0
|
||||
.*: (38 63 10 00|00 10 63 38) addi r3,r3,4096
|
||||
.*: (91 43 80 04|04 80 43 91) stw r10,-32764\(r3\)
|
||||
.*: (3d 23 00 00|00 00 23 3d) addis r9,r3,0
|
||||
.*: (91 49 80 08|08 80 49 91) stw r10,-32760\(r9\)
|
||||
.*: (3d 22 00 00|00 00 22 3d) addis r9,r2,0
|
||||
.*: (b1 49 90 30|30 90 49 b1) sth r10,-28624\(r9\)
|
||||
.*: (a1 42 90 14|14 90 42 a1) lhz r10,-28652\(r2\)
|
||||
.*: (3d 22 00 00|00 00 22 3d) addis r9,r2,0
|
||||
.*: (a9 49 90 18|18 90 49 a9) lha r10,-28648\(r9\)
|
||||
|
||||
0+1800104 <__tls_get_addr>:
|
||||
1800104: 4e 80 00 20 blr
|
||||
.*: (4e 80 00 20|20 00 80 4e) blr
|
||||
Disassembly of section \.got:
|
||||
|
||||
0+1810128 <_GLOBAL_OFFSET_TABLE_-0x4>:
|
||||
1810128: 4e 80 00 21 blrl
|
||||
.*: (4e 80 00 21|21 00 80 4e) blrl
|
||||
|
||||
0+181012c <_GLOBAL_OFFSET_TABLE_>:
|
||||
\.\.\.
|
||||
|
||||
@ -1,11 +1,11 @@
|
||||
#source: tls32.s
|
||||
#source: tlslib32.s
|
||||
#as: -a32
|
||||
#ld: -melf32ppc
|
||||
#ld:
|
||||
#objdump: -sj.got
|
||||
#target: powerpc*-*-*
|
||||
|
||||
.*: +file format elf32-powerpc
|
||||
.*
|
||||
|
||||
Contents of section \.got:
|
||||
1810128 4e800021 00000000 00000000 00000000 .*
|
||||
1810128 (4e800021|2100804e) 00000000 00000000 00000000 .*
|
||||
|
||||
@ -1,12 +1,12 @@
|
||||
#source: tls32.s
|
||||
#source: tlslib32.s
|
||||
#as: -a32
|
||||
#ld: -melf32ppc
|
||||
#ld:
|
||||
#objdump: -sj.tdata
|
||||
#target: powerpc*-*-*
|
||||
|
||||
.*: +file format elf32-powerpc
|
||||
.*
|
||||
|
||||
Contents of section \.tdata:
|
||||
1810108 12345678 23456789 3456789a 456789ab .*
|
||||
1810118 56789abc 6789abcd 789abcde 00c0ffee .*
|
||||
1810108 (12345678|78563412) (23456789|89674523) (3456789a|9a785634) (456789ab|ab896745) .*
|
||||
1810118 (56789abc|bc9a7856) (6789abcd|cdab8967) (789abcde|debc9a78) (00c0ffee|eeffc000) .*
|
||||
|
||||
@ -1,88 +1,88 @@
|
||||
#source: tls.s
|
||||
#as: -a64
|
||||
#ld: -melf64ppc tmpdir/libtlslib.so
|
||||
#ld: tmpdir/libtlslib.so
|
||||
#objdump: -dr
|
||||
#target: powerpc64*-*-*
|
||||
|
||||
.*: +file format elf64-powerpc
|
||||
.*
|
||||
|
||||
Disassembly of section \.text:
|
||||
|
||||
.* <00000010\.plt_call\.__tls_get_addr(|_opt)\+0>:
|
||||
.* e9 63 00 00 ld r11,0\(r3\)
|
||||
.* e9 83 00 08 ld r12,8\(r3\)
|
||||
.* 7c 60 1b 78 mr r0,r3
|
||||
.* 2c 2b 00 00 cmpdi r11,0
|
||||
.* 7c 6c 6a 14 add r3,r12,r13
|
||||
.* 4d 82 00 20 beqlr
|
||||
.* 7c 03 03 78 mr r3,r0
|
||||
.* 7d 68 02 a6 mflr r11
|
||||
.* f9 61 00 20 std r11,32\(r1\)
|
||||
.* f8 41 00 28 std r2,40\(r1\)
|
||||
.* e9 62 80 48 ld r11,-32696\(r2\)
|
||||
.* 7d 69 03 a6 mtctr r11
|
||||
.* e8 42 80 50 ld r2,-32688\(r2\)
|
||||
.* 4e 80 04 21 bctrl
|
||||
.* e9 61 00 20 ld r11,32\(r1\)
|
||||
.* e8 41 00 28 ld r2,40\(r1\)
|
||||
.* 7d 68 03 a6 mtlr r11
|
||||
.* 4e 80 00 20 blr
|
||||
.* (e9 63 00 00|00 00 63 e9) ld r11,0\(r3\)
|
||||
.* (e9 83 00 08|08 00 83 e9) ld r12,8\(r3\)
|
||||
.* (7c 60 1b 78|78 1b 60 7c) mr r0,r3
|
||||
.* (2c 2b 00 00|00 00 2b 2c) cmpdi r11,0
|
||||
.* (7c 6c 6a 14|14 6a 6c 7c) add r3,r12,r13
|
||||
.* (4d 82 00 20|20 00 82 4d) beqlr
|
||||
.* (7c 03 03 78|78 03 03 7c) mr r3,r0
|
||||
.* (7d 68 02 a6|a6 02 68 7d) mflr r11
|
||||
.* (f9 61 00 20|20 00 61 f9) std r11,32\(r1\)
|
||||
.* (f8 41 00 28|28 00 41 f8) std r2,40\(r1\)
|
||||
.* (e9 62 80 48|48 80 62 e9) ld r11,-32696\(r2\)
|
||||
.* (7d 69 03 a6|a6 03 69 7d) mtctr r11
|
||||
.* (e8 42 80 50|50 80 42 e8) ld r2,-32688\(r2\)
|
||||
.* (4e 80 04 21|21 04 80 4e) bctrl
|
||||
.* (e9 61 00 20|20 00 61 e9) ld r11,32\(r1\)
|
||||
.* (e8 41 00 28|28 00 41 e8) ld r2,40\(r1\)
|
||||
.* (7d 68 03 a6|a6 03 68 7d) mtlr r11
|
||||
.* (4e 80 00 20|20 00 80 4e) blr
|
||||
|
||||
.* <_start>:
|
||||
.* e8 62 80 10 ld r3,-32752\(r2\)
|
||||
.* 60 00 00 00 nop
|
||||
.* 7c 63 6a 14 add r3,r3,r13
|
||||
.* 38 62 80 18 addi r3,r2,-32744
|
||||
.* 4b ff ff a9 bl .*
|
||||
.* 60 00 00 00 nop
|
||||
.* 3c 6d 00 00 addis r3,r13,0
|
||||
.* 60 00 00 00 nop
|
||||
.* 38 63 90 38 addi r3,r3,-28616
|
||||
.* 3c 6d 00 00 addis r3,r13,0
|
||||
.* 60 00 00 00 nop
|
||||
.* 38 63 10 00 addi r3,r3,4096
|
||||
.* 39 23 80 40 addi r9,r3,-32704
|
||||
.* 3d 23 00 00 addis r9,r3,0
|
||||
.* 81 49 80 48 lwz r10,-32696\(r9\)
|
||||
.* e9 22 80 28 ld r9,-32728\(r2\)
|
||||
.* 7d 49 18 2a ldx r10,r9,r3
|
||||
.* 3d 2d 00 00 addis r9,r13,0
|
||||
.* a1 49 90 58 lhz r10,-28584\(r9\)
|
||||
.* 89 4d 90 60 lbz r10,-28576\(r13\)
|
||||
.* 3d 2d 00 00 addis r9,r13,0
|
||||
.* 99 49 90 68 stb r10,-28568\(r9\)
|
||||
.* 3c 6d 00 00 addis r3,r13,0
|
||||
.* 60 00 00 00 nop
|
||||
.* 38 63 90 00 addi r3,r3,-28672
|
||||
.* 3c 6d 00 00 addis r3,r13,0
|
||||
.* 60 00 00 00 nop
|
||||
.* 38 63 10 00 addi r3,r3,4096
|
||||
.* f9 43 80 08 std r10,-32760\(r3\)
|
||||
.* 3d 23 00 00 addis r9,r3,0
|
||||
.* 91 49 80 10 stw r10,-32752\(r9\)
|
||||
.* e9 22 80 08 ld r9,-32760\(r2\)
|
||||
.* 7d 49 19 2a stdx r10,r9,r3
|
||||
.* 3d 2d 00 00 addis r9,r13,0
|
||||
.* b1 49 90 58 sth r10,-28584\(r9\)
|
||||
.* e9 4d 90 2a lwa r10,-28632\(r13\)
|
||||
.* 3d 2d 00 00 addis r9,r13,0
|
||||
.* a9 49 90 30 lha r10,-28624\(r9\)
|
||||
.* 00 00 00 00 .*
|
||||
.* 00 01 02 00 .*
|
||||
.* (e8 62 80 10|10 80 62 e8) ld r3,-32752\(r2\)
|
||||
.* (60 00 00 00|00 00 00 60) nop
|
||||
.* (7c 63 6a 14|14 6a 63 7c) add r3,r3,r13
|
||||
.* (38 62 80 18|18 80 62 38) addi r3,r2,-32744
|
||||
.* (4b ff ff a9|a9 ff ff 4b) bl .*
|
||||
.* (60 00 00 00|00 00 00 60) nop
|
||||
.* (3c 6d 00 00|00 00 6d 3c) addis r3,r13,0
|
||||
.* (60 00 00 00|00 00 00 60) nop
|
||||
.* (38 63 90 38|38 90 63 38) addi r3,r3,-28616
|
||||
.* (3c 6d 00 00|00 00 6d 3c) addis r3,r13,0
|
||||
.* (60 00 00 00|00 00 00 60) nop
|
||||
.* (38 63 10 00|00 10 63 38) addi r3,r3,4096
|
||||
.* (39 23 80 40|40 80 23 39) addi r9,r3,-32704
|
||||
.* (3d 23 00 00|00 00 23 3d) addis r9,r3,0
|
||||
.* (81 49 80 48|48 80 49 81) lwz r10,-32696\(r9\)
|
||||
.* (e9 22 80 28|28 80 22 e9) ld r9,-32728\(r2\)
|
||||
.* (7d 49 18 2a|2a 18 49 7d) ldx r10,r9,r3
|
||||
.* (3d 2d 00 00|00 00 2d 3d) addis r9,r13,0
|
||||
.* (a1 49 90 58|58 90 49 a1) lhz r10,-28584\(r9\)
|
||||
.* (89 4d 90 60|60 90 4d 89) lbz r10,-28576\(r13\)
|
||||
.* (3d 2d 00 00|00 00 2d 3d) addis r9,r13,0
|
||||
.* (99 49 90 68|68 90 49 99) stb r10,-28568\(r9\)
|
||||
.* (3c 6d 00 00|00 00 6d 3c) addis r3,r13,0
|
||||
.* (60 00 00 00|00 00 00 60) nop
|
||||
.* (38 63 90 00|00 90 63 38) addi r3,r3,-28672
|
||||
.* (3c 6d 00 00|00 00 6d 3c) addis r3,r13,0
|
||||
.* (60 00 00 00|00 00 00 60) nop
|
||||
.* (38 63 10 00|00 10 63 38) addi r3,r3,4096
|
||||
.* (f9 43 80 08|08 80 43 f9) std r10,-32760\(r3\)
|
||||
.* (3d 23 00 00|00 00 23 3d) addis r9,r3,0
|
||||
.* (91 49 80 10|10 80 49 91) stw r10,-32752\(r9\)
|
||||
.* (e9 22 80 08|08 80 22 e9) ld r9,-32760\(r2\)
|
||||
.* (7d 49 19 2a|2a 19 49 7d) stdx r10,r9,r3
|
||||
.* (3d 2d 00 00|00 00 2d 3d) addis r9,r13,0
|
||||
.* (b1 49 90 58|58 90 49 b1) sth r10,-28584\(r9\)
|
||||
.* (e9 4d 90 2a|2a 90 4d e9) lwa r10,-28632\(r13\)
|
||||
.* (3d 2d 00 00|00 00 2d 3d) addis r9,r13,0
|
||||
.* (a9 49 90 30|30 90 49 a9) lha r10,-28624\(r9\)
|
||||
.* (00 00 00 00|00 02 01 00) .*
|
||||
.* (00 01 02 00|00 00 00 00) .*
|
||||
.* <__glink_PLTresolve>:
|
||||
.* 7d 88 02 a6 mflr r12
|
||||
.* 42 9f 00 05 bcl- 20,4\*cr7\+so,.*
|
||||
.* 7d 68 02 a6 mflr r11
|
||||
.* e8 4b ff f0 ld r2,-16\(r11\)
|
||||
.* 7d 88 03 a6 mtlr r12
|
||||
.* 7d 82 5a 14 add r12,r2,r11
|
||||
.* e9 6c 00 00 ld r11,0\(r12\)
|
||||
.* e8 4c 00 08 ld r2,8\(r12\)
|
||||
.* 7d 69 03 a6 mtctr r11
|
||||
.* e9 6c 00 10 ld r11,16\(r12\)
|
||||
.* 4e 80 04 20 bctr
|
||||
.* 60 00 00 00 nop
|
||||
.* 60 00 00 00 nop
|
||||
.* 60 00 00 00 nop
|
||||
.* 38 00 00 00 li r0,0
|
||||
.* 4b ff ff c4 b .*
|
||||
.* (7d 88 02 a6|a6 02 88 7d) mflr r12
|
||||
.* (42 9f 00 05|05 00 9f 42) bcl- 20,4\*cr7\+so,.*
|
||||
.* (7d 68 02 a6|a6 02 68 7d) mflr r11
|
||||
.* (e8 4b ff f0|f0 ff 4b e8) ld r2,-16\(r11\)
|
||||
.* (7d 88 03 a6|a6 03 88 7d) mtlr r12
|
||||
.* (7d 82 5a 14|14 5a 82 7d) add r12,r2,r11
|
||||
.* (e9 6c 00 00|00 00 6c e9) ld r11,0\(r12\)
|
||||
.* (e8 4c 00 08|08 00 4c e8) ld r2,8\(r12\)
|
||||
.* (7d 69 03 a6|a6 03 69 7d) mtctr r11
|
||||
.* (e9 6c 00 10|10 00 6c e9) ld r11,16\(r12\)
|
||||
.* (4e 80 04 20|20 04 80 4e) bctr
|
||||
.* (60 00 00 00|00 00 00 60) nop
|
||||
.* (60 00 00 00|00 00 00 60) nop
|
||||
.* (60 00 00 00|00 00 00 60) nop
|
||||
.* (38 00 00 00|00 00 00 38) li r0,0
|
||||
.* (4b ff ff c4|c4 ff ff 4b) b .*
|
||||
|
||||
@ -1,12 +1,12 @@
|
||||
#source: tls.s
|
||||
#as: -a64
|
||||
#ld: -melf64ppc tmpdir/libtlslib.so
|
||||
#ld: tmpdir/libtlslib.so
|
||||
#objdump: -sj.got
|
||||
#target: powerpc64*-*-*
|
||||
|
||||
.*: +file format elf64-powerpc
|
||||
.*
|
||||
|
||||
Contents of section \.got:
|
||||
.* 00000000 10018620 ffffffff ffff8018 .*
|
||||
.* (00000000|20860110) (10018620|00000000) (ffffffff|1880ffff) (ffff8018|ffffffff) .*
|
||||
.* 00000000 00000000 00000000 00000000 .*
|
||||
.* 00000000 00000000 00000000 00000000 .*
|
||||
|
||||
@ -1,7 +1,7 @@
|
||||
#source: tls.s
|
||||
#source: tlslib.s
|
||||
#as: -a64
|
||||
#ld: -melf64ppc
|
||||
#ld:
|
||||
#readelf: -WSsrl
|
||||
#target: powerpc64*-*-*
|
||||
|
||||
|
||||
@ -1,13 +1,13 @@
|
||||
#source: tls.s
|
||||
#as: -a64
|
||||
#ld: -melf64ppc tmpdir/libtlslib.so
|
||||
#ld: tmpdir/libtlslib.so
|
||||
#objdump: -sj.tdata
|
||||
#target: powerpc64*-*-*
|
||||
|
||||
.*: +file format elf64-powerpc
|
||||
.*
|
||||
|
||||
Contents of section \.tdata:
|
||||
.* 12345678 9abcdef0 23456789 abcdef01 .*
|
||||
.* 3456789a bcdef012 456789ab cdef0123 .*
|
||||
.* 56789abc def01234 6789abcd ef012345 .*
|
||||
.* 789abcde f0123456 .*
|
||||
.* (12345678|f0debc9a) (9abcdef0|78563412) (23456789|01efcdab) (abcdef01|89674523) .*
|
||||
.* (3456789a|12f0debc) (bcdef012|9a785634) (456789ab|2301efcd) (cdef0123|ab896745) .*
|
||||
.* (56789abc|3412f0de) (def01234|bc9a7856) (6789abcd|452301ef) (ef012345|cdab8967) .*
|
||||
.* (789abcde|563412f0) (f0123456|debc9a78) .*
|
||||
|
||||
@ -1,47 +1,47 @@
|
||||
#source: tls32.s
|
||||
#as: -a32
|
||||
#ld: -melf32ppc tmpdir/libtlslib32.so
|
||||
#ld: tmpdir/libtlslib32.so
|
||||
#objdump: -dr
|
||||
#target: powerpc*-*-*
|
||||
|
||||
.*: +file format elf32-powerpc
|
||||
.*
|
||||
|
||||
Disassembly of section \.text:
|
||||
|
||||
.* <_start>:
|
||||
.*: 80 7f ff f0 lwz r3,-16\(r31\)
|
||||
.*: 7c 63 12 14 add r3,r3,r2
|
||||
.*: 38 7f ff f4 addi r3,r31,-12
|
||||
.*: 48 01 01 85 bl .*<__tls_get_addr_opt@plt>
|
||||
.*: 3c 62 00 00 addis r3,r2,0
|
||||
.*: 38 63 90 1c addi r3,r3,-28644
|
||||
.*: 3c 62 00 00 addis r3,r2,0
|
||||
.*: 38 63 10 00 addi r3,r3,4096
|
||||
.*: 39 23 80 20 addi r9,r3,-32736
|
||||
.*: 3d 23 00 00 addis r9,r3,0
|
||||
.*: 81 49 80 24 lwz r10,-32732\(r9\)
|
||||
.*: 3d 22 00 00 addis r9,r2,0
|
||||
.*: a1 49 90 2c lhz r10,-28628\(r9\)
|
||||
.*: 89 42 90 30 lbz r10,-28624\(r2\)
|
||||
.*: 3d 22 00 00 addis r9,r2,0
|
||||
.*: 99 49 90 34 stb r10,-28620\(r9\)
|
||||
.*: 3c 62 00 00 addis r3,r2,0
|
||||
.*: 38 63 90 00 addi r3,r3,-28672
|
||||
.*: 3c 62 00 00 addis r3,r2,0
|
||||
.*: 38 63 10 00 addi r3,r3,4096
|
||||
.*: 91 43 80 04 stw r10,-32764\(r3\)
|
||||
.*: 3d 23 00 00 addis r9,r3,0
|
||||
.*: 91 49 80 08 stw r10,-32760\(r9\)
|
||||
.*: 3d 22 00 00 addis r9,r2,0
|
||||
.*: b1 49 90 2c sth r10,-28628\(r9\)
|
||||
.*: a1 42 90 14 lhz r10,-28652\(r2\)
|
||||
.*: 3d 22 00 00 addis r9,r2,0
|
||||
.*: a9 49 90 18 lha r10,-28648\(r9\)
|
||||
.*: (80 7f ff f0|f0 ff 7f 80) lwz r3,-16\(r31\)
|
||||
.*: (7c 63 12 14|14 12 63 7c) add r3,r3,r2
|
||||
.*: (38 7f ff f4|f4 ff 7f 38) addi r3,r31,-12
|
||||
.*: (48 01 01 85|85 01 01 48) bl .*<__tls_get_addr_opt@plt>
|
||||
.*: (3c 62 00 00|00 00 62 3c) addis r3,r2,0
|
||||
.*: (38 63 90 1c|1c 90 63 38) addi r3,r3,-28644
|
||||
.*: (3c 62 00 00|00 00 62 3c) addis r3,r2,0
|
||||
.*: (38 63 10 00|00 10 63 38) addi r3,r3,4096
|
||||
.*: (39 23 80 20|20 80 23 39) addi r9,r3,-32736
|
||||
.*: (3d 23 00 00|00 00 23 3d) addis r9,r3,0
|
||||
.*: (81 49 80 24|24 80 49 81) lwz r10,-32732\(r9\)
|
||||
.*: (3d 22 00 00|00 00 22 3d) addis r9,r2,0
|
||||
.*: (a1 49 90 2c|2c 90 49 a1) lhz r10,-28628\(r9\)
|
||||
.*: (89 42 90 30|30 90 42 89) lbz r10,-28624\(r2\)
|
||||
.*: (3d 22 00 00|00 00 22 3d) addis r9,r2,0
|
||||
.*: (99 49 90 34|34 90 49 99) stb r10,-28620\(r9\)
|
||||
.*: (3c 62 00 00|00 00 62 3c) addis r3,r2,0
|
||||
.*: (38 63 90 00|00 90 63 38) addi r3,r3,-28672
|
||||
.*: (3c 62 00 00|00 00 62 3c) addis r3,r2,0
|
||||
.*: (38 63 10 00|00 10 63 38) addi r3,r3,4096
|
||||
.*: (91 43 80 04|04 80 43 91) stw r10,-32764\(r3\)
|
||||
.*: (3d 23 00 00|00 00 23 3d) addis r9,r3,0
|
||||
.*: (91 49 80 08|08 80 49 91) stw r10,-32760\(r9\)
|
||||
.*: (3d 22 00 00|00 00 22 3d) addis r9,r2,0
|
||||
.*: (b1 49 90 2c|2c 90 49 b1) sth r10,-28628\(r9\)
|
||||
.*: (a1 42 90 14|14 90 42 a1) lhz r10,-28652\(r2\)
|
||||
.*: (3d 22 00 00|00 00 22 3d) addis r9,r2,0
|
||||
.*: (a9 49 90 18|18 90 49 a9) lha r10,-28648\(r9\)
|
||||
Disassembly of section \.got:
|
||||
|
||||
.* <_GLOBAL_OFFSET_TABLE_-0x10>:
|
||||
\.\.\.
|
||||
.*: 4e 80 00 21 blrl
|
||||
.*: (4e 80 00 21|21 00 80 4e) blrl
|
||||
|
||||
.* <_GLOBAL_OFFSET_TABLE_>:
|
||||
.*: 01 81 02 b8 00 00 00 00 00 00 00 00 .*
|
||||
.*: (01 81 02 b8|b8 02 81 01) 00 00 00 00 00 00 00 00 .*
|
||||
|
||||
@ -1,11 +1,11 @@
|
||||
#source: tls32.s
|
||||
#as: -a32
|
||||
#ld: -melf32ppc tmpdir/libtlslib32.so
|
||||
#ld: tmpdir/libtlslib32.so
|
||||
#objdump: -sj.got
|
||||
#target: powerpc*-*-*
|
||||
|
||||
.*: +file format elf32-powerpc
|
||||
.*
|
||||
|
||||
Contents of section \.got:
|
||||
.* 00000000 00000000 00000000 4e800021 .*
|
||||
.* 018102b8 00000000 00000000 .*
|
||||
.* 00000000 00000000 00000000 (4e800021|2100804e) .*
|
||||
.* (018102b8|b8028101) 00000000 00000000 .*
|
||||
|
||||
@ -1,7 +1,7 @@
|
||||
#source: tls32.s
|
||||
#source: tlslib32.s
|
||||
#as: -a32
|
||||
#ld: -melf32ppc
|
||||
#ld:
|
||||
#readelf: -WSsrl
|
||||
#target: powerpc*-*-*
|
||||
|
||||
|
||||
@ -1,11 +1,11 @@
|
||||
#source: tls32.s
|
||||
#as: -a32
|
||||
#ld: -melf32ppc tmpdir/libtlslib32.so
|
||||
#ld: tmpdir/libtlslib32.so
|
||||
#objdump: -sj.tdata
|
||||
#target: powerpc*-*-*
|
||||
|
||||
.*: +file format elf32-powerpc
|
||||
.*
|
||||
|
||||
Contents of section \.tdata:
|
||||
.* 12345678 23456789 3456789a 456789ab .*
|
||||
.* 56789abc 6789abcd 789abcde .*
|
||||
.* (12345678|78563412) (23456789|89674523) (3456789a|9a785634) (456789ab|ab896745) .*
|
||||
.* (56789abc|bc9a7856) (6789abcd|cdab8967) (789abcde|debc9a78) .*
|
||||
|
||||
@ -1,72 +1,72 @@
|
||||
#source: tlstoc.s
|
||||
#as: -a64
|
||||
#ld: -melf64ppc tmpdir/libtlslib.so
|
||||
#ld: tmpdir/libtlslib.so
|
||||
#objdump: -dr
|
||||
#target: powerpc64*-*-*
|
||||
|
||||
.*: +file format elf64-powerpc
|
||||
.*
|
||||
|
||||
Disassembly of section \.text:
|
||||
|
||||
.* <00000010\.plt_call\.__tls_get_addr(|_opt)\+0>:
|
||||
.* e9 63 00 00 ld r11,0\(r3\)
|
||||
.* e9 83 00 08 ld r12,8\(r3\)
|
||||
.* 7c 60 1b 78 mr r0,r3
|
||||
.* 2c 2b 00 00 cmpdi r11,0
|
||||
.* 7c 6c 6a 14 add r3,r12,r13
|
||||
.* 4d 82 00 20 beqlr
|
||||
.* 7c 03 03 78 mr r3,r0
|
||||
.* 7d 68 02 a6 mflr r11
|
||||
.* f9 61 00 20 std r11,32\(r1\)
|
||||
.* f8 41 00 28 std r2,40\(r1\)
|
||||
.* e9 62 80 70 ld r11,-32656\(r2\)
|
||||
.* 7d 69 03 a6 mtctr r11
|
||||
.* e8 42 80 78 ld r2,-32648\(r2\)
|
||||
.* 4e 80 04 21 bctrl
|
||||
.* e9 61 00 20 ld r11,32\(r1\)
|
||||
.* e8 41 00 28 ld r2,40\(r1\)
|
||||
.* 7d 68 03 a6 mtlr r11
|
||||
.* 4e 80 00 20 blr
|
||||
.* (e9 63 00 00|00 00 63 e9) ld r11,0\(r3\)
|
||||
.* (e9 83 00 08|08 00 83 e9) ld r12,8\(r3\)
|
||||
.* (7c 60 1b 78|78 1b 60 7c) mr r0,r3
|
||||
.* (2c 2b 00 00|00 00 2b 2c) cmpdi r11,0
|
||||
.* (7c 6c 6a 14|14 6a 6c 7c) add r3,r12,r13
|
||||
.* (4d 82 00 20|20 00 82 4d) beqlr
|
||||
.* (7c 03 03 78|78 03 03 7c) mr r3,r0
|
||||
.* (7d 68 02 a6|a6 02 68 7d) mflr r11
|
||||
.* (f9 61 00 20|20 00 61 f9) std r11,32\(r1\)
|
||||
.* (f8 41 00 28|28 00 41 f8) std r2,40\(r1\)
|
||||
.* (e9 62 80 70|70 80 62 e9) ld r11,-32656\(r2\)
|
||||
.* (7d 69 03 a6|a6 03 69 7d) mtctr r11
|
||||
.* (e8 42 80 78|78 80 42 e8) ld r2,-32648\(r2\)
|
||||
.* (4e 80 04 21|21 04 80 4e) bctrl
|
||||
.* (e9 61 00 20|20 00 61 e9) ld r11,32\(r1\)
|
||||
.* (e8 41 00 28|28 00 41 e8) ld r2,40\(r1\)
|
||||
.* (7d 68 03 a6|a6 03 68 7d) mtlr r11
|
||||
.* (4e 80 00 20|20 00 80 4e) blr
|
||||
|
||||
.* <_start>:
|
||||
.* 38 62 80 08 addi r3,r2,-32760
|
||||
.* 4b ff ff b5 bl .*
|
||||
.* 60 00 00 00 nop
|
||||
.* 38 62 80 18 addi r3,r2,-32744
|
||||
.* 4b ff ff a9 bl .*
|
||||
.* 60 00 00 00 nop
|
||||
.* 3c 6d 00 00 addis r3,r13,0
|
||||
.* 60 00 00 00 nop
|
||||
.* 38 63 90 38 addi r3,r3,-28616
|
||||
.* 3c 6d 00 00 addis r3,r13,0
|
||||
.* 60 00 00 00 nop
|
||||
.* 38 63 10 00 addi r3,r3,4096
|
||||
.* 39 23 80 40 addi r9,r3,-32704
|
||||
.* 3d 23 00 00 addis r9,r3,0
|
||||
.* 81 49 80 48 lwz r10,-32696\(r9\)
|
||||
.* e9 22 80 48 ld r9,-32696\(r2\)
|
||||
.* 7d 49 18 2a ldx r10,r9,r3
|
||||
.* 3d 2d 00 00 addis r9,r13,0
|
||||
.* a1 49 90 58 lhz r10,-28584\(r9\)
|
||||
.* 89 4d 90 60 lbz r10,-28576\(r13\)
|
||||
.* 3d 2d 00 00 addis r9,r13,0
|
||||
.* 99 49 90 68 stb r10,-28568\(r9\)
|
||||
.* 00 00 00 00 .*
|
||||
.* 00 01 02 28 .*
|
||||
.* (38 62 80 08|08 80 62 38) addi r3,r2,-32760
|
||||
.* (4b ff ff b5|b5 ff ff 4b) bl .*
|
||||
.* (60 00 00 00|00 00 00 60) nop
|
||||
.* (38 62 80 18|18 80 62 38) addi r3,r2,-32744
|
||||
.* (4b ff ff a9|a9 ff ff 4b) bl .*
|
||||
.* (60 00 00 00|00 00 00 60) nop
|
||||
.* (3c 6d 00 00|00 00 6d 3c) addis r3,r13,0
|
||||
.* (60 00 00 00|00 00 00 60) nop
|
||||
.* (38 63 90 38|38 90 63 38) addi r3,r3,-28616
|
||||
.* (3c 6d 00 00|00 00 6d 3c) addis r3,r13,0
|
||||
.* (60 00 00 00|00 00 00 60) nop
|
||||
.* (38 63 10 00|00 10 63 38) addi r3,r3,4096
|
||||
.* (39 23 80 40|40 80 23 39) addi r9,r3,-32704
|
||||
.* (3d 23 00 00|00 00 23 3d) addis r9,r3,0
|
||||
.* (81 49 80 48|48 80 49 81) lwz r10,-32696\(r9\)
|
||||
.* (e9 22 80 48|48 80 22 e9) ld r9,-32696\(r2\)
|
||||
.* (7d 49 18 2a|2a 18 49 7d) ldx r10,r9,r3
|
||||
.* (3d 2d 00 00|00 00 2d 3d) addis r9,r13,0
|
||||
.* (a1 49 90 58|58 90 49 a1) lhz r10,-28584\(r9\)
|
||||
.* (89 4d 90 60|60 90 4d 89) lbz r10,-28576\(r13\)
|
||||
.* (3d 2d 00 00|00 00 2d 3d) addis r9,r13,0
|
||||
.* (99 49 90 68|68 90 49 99) stb r10,-28568\(r9\)
|
||||
.* (00 00 00 00|28 02 01 00) .*
|
||||
.* (00 01 02 28|00 00 00 00) .*
|
||||
.* <__glink_PLTresolve>:
|
||||
.* 7d 88 02 a6 mflr r12
|
||||
.* 42 9f 00 05 bcl- 20,4\*cr7\+so,.*
|
||||
.* 7d 68 02 a6 mflr r11
|
||||
.* e8 4b ff f0 ld r2,-16\(r11\)
|
||||
.* 7d 88 03 a6 mtlr r12
|
||||
.* 7d 82 5a 14 add r12,r2,r11
|
||||
.* e9 6c 00 00 ld r11,0\(r12\)
|
||||
.* e8 4c 00 08 ld r2,8\(r12\)
|
||||
.* 7d 69 03 a6 mtctr r11
|
||||
.* e9 6c 00 10 ld r11,16\(r12\)
|
||||
.* 4e 80 04 20 bctr
|
||||
.* 60 00 00 00 nop
|
||||
.* 60 00 00 00 nop
|
||||
.* 60 00 00 00 nop
|
||||
.* 38 00 00 00 li r0,0
|
||||
.* 4b ff ff c4 b .*
|
||||
.* (7d 88 02 a6|a6 02 88 7d) mflr r12
|
||||
.* (42 9f 00 05|05 00 9f 42) bcl- 20,4\*cr7\+so,.*
|
||||
.* (7d 68 02 a6|a6 02 68 7d) mflr r11
|
||||
.* (e8 4b ff f0|f0 ff 4b e8) ld r2,-16\(r11\)
|
||||
.* (7d 88 03 a6|a6 03 88 7d) mtlr r12
|
||||
.* (7d 82 5a 14|14 5a 82 7d) add r12,r2,r11
|
||||
.* (e9 6c 00 00|00 00 6c e9) ld r11,0\(r12\)
|
||||
.* (e8 4c 00 08|08 00 4c e8) ld r2,8\(r12\)
|
||||
.* (7d 69 03 a6|a6 03 69 7d) mtctr r11
|
||||
.* (e9 6c 00 10|10 00 6c e9) ld r11,16\(r12\)
|
||||
.* (4e 80 04 20|20 04 80 4e) bctr
|
||||
.* (60 00 00 00|00 00 00 60) nop
|
||||
.* (60 00 00 00|00 00 00 60) nop
|
||||
.* (60 00 00 00|00 00 00 60) nop
|
||||
.* (38 00 00 00|00 00 00 38) li r0,0
|
||||
.* (4b ff ff c4|c4 ff ff 4b) b .*
|
||||
|
||||
@ -1,15 +1,15 @@
|
||||
#source: tlstoc.s
|
||||
#as: -a64
|
||||
#ld: -melf64ppc tmpdir/libtlslib.so
|
||||
#ld: tmpdir/libtlslib.so
|
||||
#objdump: -sj.got
|
||||
#target: powerpc64*-*-*
|
||||
|
||||
.*: +file format elf64-powerpc
|
||||
|
||||
Contents of section \.got:
|
||||
.* 00000000 100185c0 00000000 00000000 .*
|
||||
.* (00000000|c0850110) (100185c0|00000000) 00000000 00000000 .*
|
||||
.* 00000000 00000000 00000000 00000000 .*
|
||||
.* 00000000 00000000 00000000 00000001 .*
|
||||
.* 00000000 00000000 00000000 00000001 .*
|
||||
.* 00000000 00000000 ffffffff ffff8050 .*
|
||||
.* 00000000 00000000 (00000000|01000000) (00000001|00000000) .*
|
||||
.* 00000000 00000000 (00000000|01000000) (00000001|00000000) .*
|
||||
.* 00000000 00000000 (ffffffff|5080ffff) (ffff8050|ffffffff) .*
|
||||
.* 00000000 00000000 .*
|
||||
|
||||
@ -1,7 +1,7 @@
|
||||
#source: tlslib.s
|
||||
#source: tlstoc.s
|
||||
#as: -a64
|
||||
#ld: -melf64ppc
|
||||
#ld:
|
||||
#readelf: -WSsrl
|
||||
#target: powerpc64*-*-*
|
||||
|
||||
|
||||
@ -1,13 +1,13 @@
|
||||
#source: tlstoc.s
|
||||
#as: -a64
|
||||
#ld: -melf64ppc tmpdir/libtlslib.so
|
||||
#ld: tmpdir/libtlslib.so
|
||||
#objdump: -sj.tdata
|
||||
#target: powerpc64*-*-*
|
||||
|
||||
.*: +file format elf64-powerpc
|
||||
.*
|
||||
|
||||
Contents of section \.tdata:
|
||||
.* 12345678 9abcdef0 23456789 abcdef01 .*
|
||||
.* 3456789a bcdef012 456789ab cdef0123 .*
|
||||
.* 56789abc def01234 6789abcd ef012345 .*
|
||||
.* 789abcde f0123456 .*
|
||||
.* (12345678|f0debc9a) (9abcdef0|78563412) (23456789|01efcdab) (abcdef01|89674523) .*
|
||||
.* (3456789a|12f0debc) (bcdef012|9a785634) (456789ab|2301efcd) (cdef0123|ab896745) .*
|
||||
.* (56789abc|3412f0de) (def01234|bc9a7856) (6789abcd|452301ef) (ef012345|cdab8967) .*
|
||||
.* (789abcde|563412f0) (f0123456|debc9a78) .*
|
||||
|
||||
@ -1,37 +1,37 @@
|
||||
#source: tlsmark.s
|
||||
#source: tlslib.s
|
||||
#as: -a64
|
||||
#ld: -melf64ppc
|
||||
#ld:
|
||||
#objdump: -dr
|
||||
#target: powerpc64*-*-*
|
||||
|
||||
.*: +file format elf64-powerpc
|
||||
.*
|
||||
|
||||
Disassembly of section \.text:
|
||||
|
||||
0+100000e8 <_start>:
|
||||
100000e8: 48 00 00 18 b 10000100 <_start\+0x18>
|
||||
100000ec: 60 00 00 00 nop
|
||||
100000f0: 38 63 90 00 addi r3,r3,-28672
|
||||
100000f4: e8 83 00 00 ld r4,0\(r3\)
|
||||
100000f8: 3c 6d 00 00 addis r3,r13,0
|
||||
100000fc: 48 00 00 0c b 10000108 <_start\+0x20>
|
||||
10000100: 3c 6d 00 00 addis r3,r13,0
|
||||
10000104: 4b ff ff e8 b 100000ec <_start\+0x4>
|
||||
10000108: 60 00 00 00 nop
|
||||
1000010c: 38 63 10 00 addi r3,r3,4096
|
||||
10000110: e8 83 80 00 ld r4,-32768\(r3\)
|
||||
10000114: 3c 6d 00 00 addis r3,r13,0
|
||||
10000118: 48 00 00 0c b 10000124 <_start\+0x3c>
|
||||
1000011c: 3c 6d 00 00 addis r3,r13,0
|
||||
10000120: 48 00 00 14 b 10000134 <_start\+0x4c>
|
||||
10000124: 60 00 00 00 nop
|
||||
10000128: 38 63 90 04 addi r3,r3,-28668
|
||||
1000012c: e8 a3 00 00 ld r5,0\(r3\)
|
||||
10000130: 4b ff ff ec b 1000011c <_start\+0x34>
|
||||
10000134: 60 00 00 00 nop
|
||||
10000138: 38 63 10 00 addi r3,r3,4096
|
||||
1000013c: e8 a3 80 04 ld r5,-32764\(r3\)
|
||||
.*: (48 00 00 18|18 00 00 48) b 10000100 <_start\+0x18>
|
||||
.*: (60 00 00 00|00 00 00 60) nop
|
||||
.*: (38 63 90 00|00 90 63 38) addi r3,r3,-28672
|
||||
.*: (e8 83 00 00|00 00 83 e8) ld r4,0\(r3\)
|
||||
.*: (3c 6d 00 00|00 00 6d 3c) addis r3,r13,0
|
||||
.*: (48 00 00 0c|0c 00 00 48) b 10000108 <_start\+0x20>
|
||||
.*: (3c 6d 00 00|00 00 6d 3c) addis r3,r13,0
|
||||
.*: (4b ff ff e8|e8 ff ff 4b) b 100000ec <_start\+0x4>
|
||||
.*: (60 00 00 00|00 00 00 60) nop
|
||||
.*: (38 63 10 00|00 10 63 38) addi r3,r3,4096
|
||||
.*: (e8 83 80 00|00 80 83 e8) ld r4,-32768\(r3\)
|
||||
.*: (3c 6d 00 00|00 00 6d 3c) addis r3,r13,0
|
||||
.*: (48 00 00 0c|0c 00 00 48) b 10000124 <_start\+0x3c>
|
||||
.*: (3c 6d 00 00|00 00 6d 3c) addis r3,r13,0
|
||||
.*: (48 00 00 14|14 00 00 48) b 10000134 <_start\+0x4c>
|
||||
.*: (60 00 00 00|00 00 00 60) nop
|
||||
.*: (38 63 90 04|04 90 63 38) addi r3,r3,-28668
|
||||
.*: (e8 a3 00 00|00 00 a3 e8) ld r5,0\(r3\)
|
||||
.*: (4b ff ff ec|ec ff ff 4b) b 1000011c <_start\+0x34>
|
||||
.*: (60 00 00 00|00 00 00 60) nop
|
||||
.*: (38 63 10 00|00 10 63 38) addi r3,r3,4096
|
||||
.*: (e8 a3 80 04|04 80 a3 e8) ld r5,-32764\(r3\)
|
||||
|
||||
0+10000140 <\.__tls_get_addr>:
|
||||
10000140: 4e 80 00 20 blr
|
||||
.*: (4e 80 00 20|20 00 80 4e) blr
|
||||
|
||||
@ -1,25 +1,25 @@
|
||||
#source: tlsmark32.s
|
||||
#source: tlslib32.s
|
||||
#as: -a32
|
||||
#ld: -melf32ppc
|
||||
#ld:
|
||||
#objdump: -dr
|
||||
#target: powerpc*-*-*
|
||||
|
||||
.*: file format elf32-powerpc
|
||||
.*
|
||||
|
||||
Disassembly of section \.text:
|
||||
|
||||
0+1800094 <_start>:
|
||||
1800094: 48 00 00 14 b 18000a8 <_start\+0x14>
|
||||
1800098: 38 63 90 00 addi r3,r3,-28672
|
||||
180009c: 80 83 00 00 lwz r4,0\(r3\)
|
||||
18000a0: 3c 62 00 00 addis r3,r2,0
|
||||
18000a4: 48 00 00 0c b 18000b0 <_start\+0x1c>
|
||||
18000a8: 3c 62 00 00 addis r3,r2,0
|
||||
18000ac: 4b ff ff ec b 1800098 <_start\+0x4>
|
||||
18000b0: 38 63 10 00 addi r3,r3,4096
|
||||
18000b4: 80 83 80 00 lwz r4,-32768\(r3\)
|
||||
.*: (48 00 00 14|14 00 00 48) b 18000a8 <_start\+0x14>
|
||||
.*: (38 63 90 00|00 90 63 38) addi r3,r3,-28672
|
||||
.*: (80 83 00 00|00 00 83 80) lwz r4,0\(r3\)
|
||||
.*: (3c 62 00 00|00 00 62 3c) addis r3,r2,0
|
||||
.*: (48 00 00 0c|0c 00 00 48) b 18000b0 <_start\+0x1c>
|
||||
.*: (3c 62 00 00|00 00 62 3c) addis r3,r2,0
|
||||
.*: (4b ff ff ec|ec ff ff 4b) b 1800098 <_start\+0x4>
|
||||
.*: (38 63 10 00|00 10 63 38) addi r3,r3,4096
|
||||
.*: (80 83 80 00|00 80 83 80) lwz r4,-32768\(r3\)
|
||||
|
||||
0+18000b8 <__tls_get_addr>:
|
||||
18000b8: 4e 80 00 20 blr
|
||||
.*: (4e 80 00 20|20 00 80 4e) blr
|
||||
#pass
|
||||
@ -1,25 +1,25 @@
|
||||
#source: tlsopt1.s
|
||||
#source: tlslib.s
|
||||
#as: -a64
|
||||
#ld: -melf64ppc
|
||||
#ld:
|
||||
#objdump: -dr
|
||||
#target: powerpc64*-*-*
|
||||
|
||||
.*: +file format elf64-powerpc
|
||||
.*
|
||||
|
||||
Disassembly of section \.text:
|
||||
|
||||
0+100000e8 <\.__tls_get_addr>:
|
||||
100000e8: 4e 80 00 20 blr
|
||||
.*: (4e 80 00 20|20 00 80 4e) blr
|
||||
|
||||
Disassembly of section \.no_opt1:
|
||||
|
||||
0+100000ec <\.no_opt1>:
|
||||
100000ec: 38 62 80 08 addi r3,r2,-32760
|
||||
100000f0: 2c 24 00 00 cmpdi r4,0
|
||||
100000f4: 41 82 00 10 beq- .*
|
||||
100000f8: 4b ff ff f1 bl 100000e8 <\.__tls_get_addr>
|
||||
100000fc: 60 00 00 00 nop
|
||||
10000100: 48 00 00 0c b .*
|
||||
10000104: 4b ff ff e5 bl 100000e8 <\.__tls_get_addr>
|
||||
10000108: 60 00 00 00 nop
|
||||
.*: (38 62 80 08|08 80 62 38) addi r3,r2,-32760
|
||||
.*: (2c 24 00 00|00 00 24 2c) cmpdi r4,0
|
||||
.*: (41 82 00 10|10 00 82 41) beq- .*
|
||||
.*: (4b ff ff f1|f1 ff ff 4b) bl 100000e8 <\.__tls_get_addr>
|
||||
.*: (60 00 00 00|00 00 00 60) nop
|
||||
.*: (48 00 00 0c|0c 00 00 48) b .*
|
||||
.*: (4b ff ff e5|e5 ff ff 4b) bl 100000e8 <\.__tls_get_addr>
|
||||
.*: (60 00 00 00|00 00 00 60) nop
|
||||
|
||||
@ -1,24 +1,24 @@
|
||||
#source: tlsopt1_32.s
|
||||
#source: tlslib32.s
|
||||
#as: -a32
|
||||
#ld: -melf32ppc
|
||||
#ld:
|
||||
#objdump: -dr
|
||||
#target: powerpc*-*-*
|
||||
|
||||
.*: +file format elf32-powerpc
|
||||
.*
|
||||
|
||||
Disassembly of section \.text:
|
||||
|
||||
0+1800094 <__tls_get_addr>:
|
||||
1800094: 4e 80 00 20 blr
|
||||
.*: (4e 80 00 20|20 00 80 4e) blr
|
||||
|
||||
Disassembly of section \.no_opt1:
|
||||
|
||||
0+1800098 <\.no_opt1>:
|
||||
1800098: 38 6d ff f4 addi r3,r13,-12
|
||||
180009c: 2c 04 00 00 cmpwi r4,0
|
||||
18000a0: 41 82 00 0c beq- .*
|
||||
18000a4: 4b ff ff f1 bl 1800094 <__tls_get_addr>
|
||||
18000a8: 48 00 00 08 b .*
|
||||
18000ac: 4b ff ff e9 bl 1800094 <__tls_get_addr>
|
||||
.*: (38 6d ff f4|f4 ff 6d 38) addi r3,r13,-12
|
||||
.*: (2c 04 00 00|00 00 04 2c) cmpwi r4,0
|
||||
.*: (41 82 00 0c|0c 00 82 41) beq- .*
|
||||
.*: (4b ff ff f1|f1 ff ff 4b) bl 1800094 <__tls_get_addr>
|
||||
.*: (48 00 00 08|08 00 00 48) b .*
|
||||
.*: (4b ff ff e9|e9 ff ff 4b) bl 1800094 <__tls_get_addr>
|
||||
#pass
|
||||
|
||||
@ -1,23 +1,23 @@
|
||||
#source: tlsopt2.s
|
||||
#source: tlslib.s
|
||||
#as: -a64
|
||||
#ld: -melf64ppc
|
||||
#ld:
|
||||
#objdump: -dr
|
||||
#target: powerpc64*-*-*
|
||||
|
||||
.*: +file format elf64-powerpc
|
||||
.*
|
||||
|
||||
Disassembly of section \.text:
|
||||
|
||||
0+100000e8 <\.__tls_get_addr>:
|
||||
100000e8: 4e 80 00 20 blr
|
||||
.*: (4e 80 00 20|20 00 80 4e) blr
|
||||
|
||||
Disassembly of section \.no_opt2:
|
||||
|
||||
0+100000ec <\.no_opt2>:
|
||||
100000ec: 38 62 80 08 addi r3,r2,-32760
|
||||
100000f0: 2c 24 00 00 cmpdi r4,0
|
||||
100000f4: 41 82 00 08 beq- .*
|
||||
100000f8: 38 62 80 08 addi r3,r2,-32760
|
||||
100000fc: 4b ff ff ed bl 100000e8 <\.__tls_get_addr>
|
||||
10000100: 60 00 00 00 nop
|
||||
.*: (38 62 80 08|08 80 62 38) addi r3,r2,-32760
|
||||
.*: (2c 24 00 00|00 00 24 2c) cmpdi r4,0
|
||||
.*: (41 82 00 08|08 00 82 41) beq- .*
|
||||
.*: (38 62 80 08|08 80 62 38) addi r3,r2,-32760
|
||||
.*: (4b ff ff ed|ed ff ff 4b) bl 100000e8 <\.__tls_get_addr>
|
||||
.*: (60 00 00 00|00 00 00 60) nop
|
||||
|
||||
@ -1,23 +1,23 @@
|
||||
#source: tlsopt2_32.s
|
||||
#source: tlslib32.s
|
||||
#as: -a32
|
||||
#ld: -melf32ppc
|
||||
#ld:
|
||||
#objdump: -dr
|
||||
#target: powerpc*-*-*
|
||||
|
||||
.*: +file format elf32-powerpc
|
||||
.*
|
||||
|
||||
Disassembly of section \.text:
|
||||
|
||||
0+1800094 <__tls_get_addr>:
|
||||
1800094: 4e 80 00 20 blr
|
||||
.*: (4e 80 00 20|20 00 80 4e) blr
|
||||
|
||||
Disassembly of section \.no_opt2:
|
||||
|
||||
0+1800098 <\.no_opt2>:
|
||||
1800098: 38 6d ff f4 addi r3,r13,-12
|
||||
180009c: 2c 04 00 00 cmpwi r4,0
|
||||
18000a0: 41 82 00 08 beq- .*
|
||||
18000a4: 38 6d ff f4 addi r3,r13,-12
|
||||
18000a8: 4b ff ff ed bl 1800094 <__tls_get_addr>
|
||||
.*: (38 6d ff f4|f4 ff 6d 38) addi r3,r13,-12
|
||||
.*: (2c 04 00 00|00 00 04 2c) cmpwi r4,0
|
||||
.*: (41 82 00 08|08 00 82 41) beq- .*
|
||||
.*: (38 6d ff f4|f4 ff 6d 38) addi r3,r13,-12
|
||||
.*: (4b ff ff ed|ed ff ff 4b) bl 1800094 <__tls_get_addr>
|
||||
#pass
|
||||
|
||||
@ -1,26 +1,26 @@
|
||||
#source: tlsopt3.s
|
||||
#source: tlslib.s
|
||||
#as: -a64
|
||||
#ld: -melf64ppc
|
||||
#ld:
|
||||
#objdump: -dr
|
||||
#target: powerpc64*-*-*
|
||||
|
||||
.*: +file format elf64-powerpc
|
||||
.*
|
||||
|
||||
Disassembly of section \.text:
|
||||
|
||||
00000000100000e8 <\.__tls_get_addr>:
|
||||
100000e8: 4e 80 00 20 blr
|
||||
.*: (4e 80 00 20|20 00 80 4e) blr
|
||||
|
||||
Disassembly of section \.no_opt3:
|
||||
|
||||
00000000100000ec <\.no_opt3>:
|
||||
100000ec: 38 62 80 08 addi r3,r2,-32760
|
||||
100000f0: 48 00 00 0c b .*
|
||||
100000f4: 38 62 80 18 addi r3,r2,-32744
|
||||
100000f8: 48 00 00 10 b .*
|
||||
100000fc: 4b ff ff ed bl 100000e8 <\.__tls_get_addr>
|
||||
10000100: 60 00 00 00 nop
|
||||
10000104: 48 00 00 0c b .*
|
||||
10000108: 4b ff ff e1 bl 100000e8 <\.__tls_get_addr>
|
||||
1000010c: 60 00 00 00 nop
|
||||
.*: (38 62 80 08|08 80 62 38) addi r3,r2,-32760
|
||||
.*: (48 00 00 0c|0c 00 00 48) b .*
|
||||
.*: (38 62 80 18|18 80 62 38) addi r3,r2,-32744
|
||||
.*: (48 00 00 10|10 00 00 48) b .*
|
||||
.*: (4b ff ff ed|ed ff ff 4b) bl 100000e8 <\.__tls_get_addr>
|
||||
.*: (60 00 00 00|00 00 00 60) nop
|
||||
.*: (48 00 00 0c|0c 00 00 48) b .*
|
||||
.*: (4b ff ff e1|e1 ff ff 4b) bl 100000e8 <\.__tls_get_addr>
|
||||
.*: (60 00 00 00|00 00 00 60) nop
|
||||
|
||||
@ -1,25 +1,25 @@
|
||||
#source: tlsopt3_32.s
|
||||
#source: tlslib32.s
|
||||
#as: -a32
|
||||
#ld: -melf32ppc
|
||||
#ld:
|
||||
#objdump: -dr
|
||||
#target: powerpc*-*-*
|
||||
|
||||
.*: +file format elf32-powerpc
|
||||
.*
|
||||
|
||||
Disassembly of section \.text:
|
||||
|
||||
0+1800094 <__tls_get_addr>:
|
||||
1800094: 4e 80 00 20 blr
|
||||
.*: (4e 80 00 20|20 00 80 4e) blr
|
||||
|
||||
Disassembly of section \.no_opt3:
|
||||
|
||||
0+1800098 <\.no_opt3>:
|
||||
1800098: 38 6d ff ec addi r3,r13,-20
|
||||
180009c: 48 00 00 0c b .*
|
||||
18000a0: 38 6d ff f4 addi r3,r13,-12
|
||||
18000a4: 48 00 00 0c b .*
|
||||
18000a8: 4b ff ff ed bl 1800094 <__tls_get_addr>
|
||||
18000ac: 48 00 00 08 b .*
|
||||
18000b0: 4b ff ff e5 bl 1800094 <__tls_get_addr>
|
||||
.*: (38 6d ff ec|ec ff 6d 38) addi r3,r13,-20
|
||||
.*: (48 00 00 0c|0c 00 00 48) b .*
|
||||
.*: (38 6d ff f4|f4 ff 6d 38) addi r3,r13,-12
|
||||
.*: (48 00 00 0c|0c 00 00 48) b .*
|
||||
.*: (4b ff ff ed|ed ff ff 4b) bl 1800094 <__tls_get_addr>
|
||||
.*: (48 00 00 08|08 00 00 48) b .*
|
||||
.*: (4b ff ff e5|e5 ff ff 4b) bl 1800094 <__tls_get_addr>
|
||||
#pass
|
||||
|
||||
@ -1,48 +1,48 @@
|
||||
#source: tlsopt4.s
|
||||
#source: tlslib.s
|
||||
#as: -a64
|
||||
#ld: -melf64ppc
|
||||
#ld:
|
||||
#objdump: -dr
|
||||
#target: powerpc64*-*-*
|
||||
|
||||
.*: +file format elf64-powerpc
|
||||
.*
|
||||
|
||||
Disassembly of section \.text:
|
||||
|
||||
0+100000e8 <\.__tls_get_addr>:
|
||||
100000e8: 4e 80 00 20 blr
|
||||
.*: (4e 80 00 20|20 00 80 4e) blr
|
||||
|
||||
Disassembly of section \.opt1:
|
||||
|
||||
0+100000ec <\.opt1>:
|
||||
100000ec: 3c 6d 00 00 addis r3,r13,0
|
||||
100000f0: 2c 24 00 00 cmpdi r4,0
|
||||
100000f4: 41 82 00 10 beq- .*
|
||||
100000f8: 60 00 00 00 nop
|
||||
100000fc: 38 63 90 10 addi r3,r3,-28656
|
||||
10000100: 48 00 00 0c b .*
|
||||
10000104: 60 00 00 00 nop
|
||||
10000108: 38 63 90 10 addi r3,r3,-28656
|
||||
.*: (3c 6d 00 00|00 00 6d 3c) addis r3,r13,0
|
||||
.*: (2c 24 00 00|00 00 24 2c) cmpdi r4,0
|
||||
.*: (41 82 00 10|10 00 82 41) beq- .*
|
||||
.*: (60 00 00 00|00 00 00 60) nop
|
||||
.*: (38 63 90 10|10 90 63 38) addi r3,r3,-28656
|
||||
.*: (48 00 00 0c|0c 00 00 48) b .*
|
||||
.*: (60 00 00 00|00 00 00 60) nop
|
||||
.*: (38 63 90 10|10 90 63 38) addi r3,r3,-28656
|
||||
|
||||
Disassembly of section \.opt2:
|
||||
|
||||
0+1000010c <\.opt2>:
|
||||
1000010c: 3c 6d 00 00 addis r3,r13,0
|
||||
10000110: 2c 24 00 00 cmpdi r4,0
|
||||
10000114: 41 82 00 08 beq- .*
|
||||
10000118: 3c 6d 00 00 addis r3,r13,0
|
||||
1000011c: 60 00 00 00 nop
|
||||
10000120: 38 63 90 10 addi r3,r3,-28656
|
||||
.*: (3c 6d 00 00|00 00 6d 3c) addis r3,r13,0
|
||||
.*: (2c 24 00 00|00 00 24 2c) cmpdi r4,0
|
||||
.*: (41 82 00 08|08 00 82 41) beq- .*
|
||||
.*: (3c 6d 00 00|00 00 6d 3c) addis r3,r13,0
|
||||
.*: (60 00 00 00|00 00 00 60) nop
|
||||
.*: (38 63 90 10|10 90 63 38) addi r3,r3,-28656
|
||||
|
||||
Disassembly of section \.opt3:
|
||||
|
||||
0+10000124 <\.opt3>:
|
||||
10000124: 3c 6d 00 00 addis r3,r13,0
|
||||
10000128: 48 00 00 0c b .*
|
||||
1000012c: 3c 6d 00 00 addis r3,r13,0
|
||||
10000130: 48 00 00 10 b .*
|
||||
10000134: 60 00 00 00 nop
|
||||
10000138: 38 63 90 10 addi r3,r3,-28656
|
||||
1000013c: 48 00 00 0c b .*
|
||||
10000140: 60 00 00 00 nop
|
||||
10000144: 38 63 90 08 addi r3,r3,-28664
|
||||
.*: (3c 6d 00 00|00 00 6d 3c) addis r3,r13,0
|
||||
.*: (48 00 00 0c|0c 00 00 48) b .*
|
||||
.*: (3c 6d 00 00|00 00 6d 3c) addis r3,r13,0
|
||||
.*: (48 00 00 10|10 00 00 48) b .*
|
||||
.*: (60 00 00 00|00 00 00 60) nop
|
||||
.*: (38 63 90 10|10 90 63 38) addi r3,r3,-28656
|
||||
.*: (48 00 00 0c|0c 00 00 48) b .*
|
||||
.*: (60 00 00 00|00 00 00 60) nop
|
||||
.*: (38 63 90 08|08 90 63 38) addi r3,r3,-28664
|
||||
|
||||
@ -1,44 +1,44 @@
|
||||
#source: tlsopt4_32.s
|
||||
#source: tlslib32.s
|
||||
#as: -a32
|
||||
#ld: -melf32ppc
|
||||
#ld:
|
||||
#objdump: -dr
|
||||
#target: powerpc*-*-*
|
||||
|
||||
.*: +file format elf32-powerpc
|
||||
.*
|
||||
|
||||
Disassembly of section \.text:
|
||||
|
||||
0+1800094 <__tls_get_addr>:
|
||||
1800094: 4e 80 00 20 blr
|
||||
.*: (4e 80 00 20|20 00 80 4e) blr
|
||||
|
||||
Disassembly of section \.opt1:
|
||||
|
||||
0+1800098 <\.opt1>:
|
||||
1800098: 3c 62 00 00 addis r3,r2,0
|
||||
180009c: 2c 04 00 00 cmpwi r4,0
|
||||
18000a0: 41 82 00 0c beq- .*
|
||||
18000a4: 38 63 90 10 addi r3,r3,-28656
|
||||
18000a8: 48 00 00 08 b .*
|
||||
18000ac: 38 63 90 10 addi r3,r3,-28656
|
||||
.*: (3c 62 00 00|00 00 62 3c) addis r3,r2,0
|
||||
.*: (2c 04 00 00|00 00 04 2c) cmpwi r4,0
|
||||
.*: (41 82 00 0c|0c 00 82 41) beq- .*
|
||||
.*: (38 63 90 10|10 90 63 38) addi r3,r3,-28656
|
||||
.*: (48 00 00 08|08 00 00 48) b .*
|
||||
.*: (38 63 90 10|10 90 63 38) addi r3,r3,-28656
|
||||
|
||||
Disassembly of section \.opt2:
|
||||
|
||||
0+18000b0 <\.opt2>:
|
||||
18000b0: 3c 62 00 00 addis r3,r2,0
|
||||
18000b4: 2c 04 00 00 cmpwi r4,0
|
||||
18000b8: 41 82 00 08 beq- .*
|
||||
18000bc: 3c 62 00 00 addis r3,r2,0
|
||||
18000c0: 38 63 90 10 addi r3,r3,-28656
|
||||
.*: (3c 62 00 00|00 00 62 3c) addis r3,r2,0
|
||||
.*: (2c 04 00 00|00 00 04 2c) cmpwi r4,0
|
||||
.*: (41 82 00 08|08 00 82 41) beq- .*
|
||||
.*: (3c 62 00 00|00 00 62 3c) addis r3,r2,0
|
||||
.*: (38 63 90 10|10 90 63 38) addi r3,r3,-28656
|
||||
|
||||
Disassembly of section \.opt3:
|
||||
|
||||
0+18000c4 <\.opt3>:
|
||||
18000c4: 3c 62 00 00 addis r3,r2,0
|
||||
18000c8: 48 00 00 0c b .*
|
||||
18000cc: 3c 62 00 00 addis r3,r2,0
|
||||
18000d0: 48 00 00 0c b .*
|
||||
18000d4: 38 63 90 10 addi r3,r3,-28656
|
||||
18000d8: 48 00 00 08 b .*
|
||||
18000dc: 38 63 90 08 addi r3,r3,-28664
|
||||
.*: (3c 62 00 00|00 00 62 3c) addis r3,r2,0
|
||||
.*: (48 00 00 0c|0c 00 00 48) b .*
|
||||
.*: (3c 62 00 00|00 00 62 3c) addis r3,r2,0
|
||||
.*: (48 00 00 0c|0c 00 00 48) b .*
|
||||
.*: (38 63 90 10|10 90 63 38) addi r3,r3,-28656
|
||||
.*: (48 00 00 08|08 00 00 48) b .*
|
||||
.*: (38 63 90 08|08 90 63 38) addi r3,r3,-28664
|
||||
#pass
|
||||
|
||||
@ -1,6 +1,6 @@
|
||||
#source: tls.s
|
||||
#as: -a64
|
||||
#ld: -shared -melf64ppc
|
||||
#ld: -shared
|
||||
#objdump: -dr
|
||||
#target: powerpc64*-*-*
|
||||
|
||||
@ -9,68 +9,68 @@
|
||||
Disassembly of section \.text:
|
||||
|
||||
.* <00000010\.plt_call\.__tls_get_addr(|_opt)\+0>:
|
||||
.* f8 41 00 28 std r2,40\(r1\)
|
||||
.* e9 62 80 78 ld r11,-32648\(r2\)
|
||||
.* 7d 69 03 a6 mtctr r11
|
||||
.* e8 42 80 80 ld r2,-32640\(r2\)
|
||||
.* 4e 80 04 20 bctr
|
||||
.* (f8 41 00 28|28 00 41 f8) std r2,40\(r1\)
|
||||
.* (e9 62 80 78|78 80 62 e9) ld r11,-32648\(r2\)
|
||||
.* (7d 69 03 a6|a6 03 69 7d) mtctr r11
|
||||
.* (e8 42 80 80|80 80 42 e8) ld r2,-32640\(r2\)
|
||||
.* (4e 80 04 20|20 04 80 4e) bctr
|
||||
|
||||
.* <_start>:
|
||||
.* 38 62 80 20 addi r3,r2,-32736
|
||||
.* 4b ff ff e9 bl .*
|
||||
.* e8 41 00 28 ld r2,40\(r1\)
|
||||
.* 38 62 80 50 addi r3,r2,-32688
|
||||
.* 4b ff ff dd bl .*
|
||||
.* e8 41 00 28 ld r2,40\(r1\)
|
||||
.* 38 62 80 38 addi r3,r2,-32712
|
||||
.* 4b ff ff d1 bl .*
|
||||
.* e8 41 00 28 ld r2,40\(r1\)
|
||||
.* 38 62 80 50 addi r3,r2,-32688
|
||||
.* 4b ff ff c5 bl .*
|
||||
.* e8 41 00 28 ld r2,40\(r1\)
|
||||
.* 39 23 80 40 addi r9,r3,-32704
|
||||
.* 3d 23 00 00 addis r9,r3,0
|
||||
.* 81 49 80 48 lwz r10,-32696\(r9\)
|
||||
.* e9 22 80 30 ld r9,-32720\(r2\)
|
||||
.* 7d 49 18 2a ldx r10,r9,r3
|
||||
.* e9 22 80 48 ld r9,-32696\(r2\)
|
||||
.* 7d 49 6a 2e lhzx r10,r9,r13
|
||||
.* 89 4d 00 00 lbz r10,0\(r13\)
|
||||
.* 3d 2d 00 00 addis r9,r13,0
|
||||
.* 99 49 00 00 stb r10,0\(r9\)
|
||||
.* 38 62 80 08 addi r3,r2,-32760
|
||||
.* 4b ff ff 91 bl .*
|
||||
.* e8 41 00 28 ld r2,40\(r1\)
|
||||
.* 38 62 80 50 addi r3,r2,-32688
|
||||
.* 4b ff ff 85 bl .*
|
||||
.* e8 41 00 28 ld r2,40\(r1\)
|
||||
.* f9 43 80 08 std r10,-32760\(r3\)
|
||||
.* 3d 23 00 00 addis r9,r3,0
|
||||
.* 91 49 80 10 stw r10,-32752\(r9\)
|
||||
.* e9 22 80 18 ld r9,-32744\(r2\)
|
||||
.* 7d 49 19 2a stdx r10,r9,r3
|
||||
.* e9 22 80 48 ld r9,-32696\(r2\)
|
||||
.* 7d 49 6b 2e sthx r10,r9,r13
|
||||
.* e9 4d 00 02 lwa r10,0\(r13\)
|
||||
.* 3d 2d 00 00 addis r9,r13,0
|
||||
.* a9 49 00 00 lha r10,0\(r9\)
|
||||
.* 60 00 00 00 nop
|
||||
.* 00 00 00 00 .*
|
||||
.* 00 01 02 20 .*
|
||||
.* (38 62 80 20|20 80 62 38) addi r3,r2,-32736
|
||||
.* (4b ff ff e9|e9 ff ff 4b) bl .*
|
||||
.* (e8 41 00 28|28 00 41 e8) ld r2,40\(r1\)
|
||||
.* (38 62 80 50|50 80 62 38) addi r3,r2,-32688
|
||||
.* (4b ff ff dd|dd ff ff 4b) bl .*
|
||||
.* (e8 41 00 28|28 00 41 e8) ld r2,40\(r1\)
|
||||
.* (38 62 80 38|38 80 62 38) addi r3,r2,-32712
|
||||
.* (4b ff ff d1|d1 ff ff 4b) bl .*
|
||||
.* (e8 41 00 28|28 00 41 e8) ld r2,40\(r1\)
|
||||
.* (38 62 80 50|50 80 62 38) addi r3,r2,-32688
|
||||
.* (4b ff ff c5|c5 ff ff 4b) bl .*
|
||||
.* (e8 41 00 28|28 00 41 e8) ld r2,40\(r1\)
|
||||
.* (39 23 80 40|40 80 23 39) addi r9,r3,-32704
|
||||
.* (3d 23 00 00|00 00 23 3d) addis r9,r3,0
|
||||
.* (81 49 80 48|48 80 49 81) lwz r10,-32696\(r9\)
|
||||
.* (e9 22 80 30|30 80 22 e9) ld r9,-32720\(r2\)
|
||||
.* (7d 49 18 2a|2a 18 49 7d) ldx r10,r9,r3
|
||||
.* (e9 22 80 48|48 80 22 e9) ld r9,-32696\(r2\)
|
||||
.* (7d 49 6a 2e|2e 6a 49 7d) lhzx r10,r9,r13
|
||||
.* (89 4d 00 00|00 00 4d 89) lbz r10,0\(r13\)
|
||||
.* (3d 2d 00 00|00 00 2d 3d) addis r9,r13,0
|
||||
.* (99 49 00 00|00 00 49 99) stb r10,0\(r9\)
|
||||
.* (38 62 80 08|08 80 62 38) addi r3,r2,-32760
|
||||
.* (4b ff ff 91|91 ff ff 4b) bl .*
|
||||
.* (e8 41 00 28|28 00 41 e8) ld r2,40\(r1\)
|
||||
.* (38 62 80 50|50 80 62 38) addi r3,r2,-32688
|
||||
.* (4b ff ff 85|85 ff ff 4b) bl .*
|
||||
.* (e8 41 00 28|28 00 41 e8) ld r2,40\(r1\)
|
||||
.* (f9 43 80 08|08 80 43 f9) std r10,-32760\(r3\)
|
||||
.* (3d 23 00 00|00 00 23 3d) addis r9,r3,0
|
||||
.* (91 49 80 10|10 80 49 91) stw r10,-32752\(r9\)
|
||||
.* (e9 22 80 18|18 80 22 e9) ld r9,-32744\(r2\)
|
||||
.* (7d 49 19 2a|2a 19 49 7d) stdx r10,r9,r3
|
||||
.* (e9 22 80 48|48 80 22 e9) ld r9,-32696\(r2\)
|
||||
.* (7d 49 6b 2e|2e 6b 49 7d) sthx r10,r9,r13
|
||||
.* (e9 4d 00 02|02 00 4d e9) lwa r10,0\(r13\)
|
||||
.* (3d 2d 00 00|00 00 2d 3d) addis r9,r13,0
|
||||
.* (a9 49 00 00|00 00 49 a9) lha r10,0\(r9\)
|
||||
.* (60 00 00 00|00 00 00 60) nop
|
||||
.* (00 00 00 00|20 02 01 00) .*
|
||||
.* (00 01 02 20|00 00 00 00) .*
|
||||
.* <__glink_PLTresolve>:
|
||||
.* 7d 88 02 a6 mflr r12
|
||||
.* 42 9f 00 05 bcl- 20,4\*cr7\+so,.*
|
||||
.* 7d 68 02 a6 mflr r11
|
||||
.* e8 4b ff f0 ld r2,-16\(r11\)
|
||||
.* 7d 88 03 a6 mtlr r12
|
||||
.* 7d 82 5a 14 add r12,r2,r11
|
||||
.* e9 6c 00 00 ld r11,0\(r12\)
|
||||
.* e8 4c 00 08 ld r2,8\(r12\)
|
||||
.* 7d 69 03 a6 mtctr r11
|
||||
.* e9 6c 00 10 ld r11,16\(r12\)
|
||||
.* 4e 80 04 20 bctr
|
||||
.* 60 00 00 00 nop
|
||||
.* 60 00 00 00 nop
|
||||
.* 60 00 00 00 nop
|
||||
.* 38 00 00 00 li r0,0
|
||||
.* 4b ff ff c4 b .*
|
||||
.* (7d 88 02 a6|a6 02 88 7d) mflr r12
|
||||
.* (42 9f 00 05|05 00 9f 42) bcl- 20,4\*cr7\+so,.*
|
||||
.* (7d 68 02 a6|a6 02 68 7d) mflr r11
|
||||
.* (e8 4b ff f0|f0 ff 4b e8) ld r2,-16\(r11\)
|
||||
.* (7d 88 03 a6|a6 03 88 7d) mtlr r12
|
||||
.* (7d 82 5a 14|14 5a 82 7d) add r12,r2,r11
|
||||
.* (e9 6c 00 00|00 00 6c e9) ld r11,0\(r12\)
|
||||
.* (e8 4c 00 08|08 00 4c e8) ld r2,8\(r12\)
|
||||
.* (7d 69 03 a6|a6 03 69 7d) mtctr r11
|
||||
.* (e9 6c 00 10|10 00 6c e9) ld r11,16\(r12\)
|
||||
.* (4e 80 04 20|20 04 80 4e) bctr
|
||||
.* (60 00 00 00|00 00 00 60) nop
|
||||
.* (60 00 00 00|00 00 00 60) nop
|
||||
.* (60 00 00 00|00 00 00 60) nop
|
||||
.* (38 00 00 00|00 00 00 38) li r0,0
|
||||
.* (4b ff ff c4|c4 ff ff 4b) b .*
|
||||
|
||||
@ -1,13 +1,13 @@
|
||||
#source: tls.s
|
||||
#as: -a64
|
||||
#ld: -shared -melf64ppc
|
||||
#ld: -shared
|
||||
#objdump: -sj.got
|
||||
#target: powerpc64*-*-*
|
||||
|
||||
.*: +file format elf64-powerpc
|
||||
|
||||
Contents of section \.got:
|
||||
.* 00000000 00018780 00000000 00000000 .*
|
||||
.* (00000000|80870100) (00018780|00000000) 00000000 00000000 .*
|
||||
.* 00000000 00000000 00000000 00000000 .*
|
||||
.* 00000000 00000000 00000000 00000000 .*
|
||||
.* 00000000 00000000 00000000 00000000 .*
|
||||
|
||||
@ -1,6 +1,6 @@
|
||||
#source: tls.s
|
||||
#as: -a64
|
||||
#ld: -shared -melf64ppc
|
||||
#ld: -shared
|
||||
#readelf: -WSsrl
|
||||
#target: powerpc64*-*-*
|
||||
|
||||
|
||||
@ -1,13 +1,13 @@
|
||||
#source: tls.s
|
||||
#as: -a64
|
||||
#ld: -shared -melf64ppc
|
||||
#ld: -shared
|
||||
#objdump: -sj.tdata
|
||||
#target: powerpc64*-*-*
|
||||
|
||||
.*: +file format elf64-powerpc
|
||||
.*
|
||||
|
||||
Contents of section \.tdata:
|
||||
.* 12345678 9abcdef0 23456789 abcdef01 .*
|
||||
.* 3456789a bcdef012 456789ab cdef0123 .*
|
||||
.* 56789abc def01234 6789abcd ef012345 .*
|
||||
.* 789abcde f0123456 .*
|
||||
.* (12345678|f0debc9a) (9abcdef0|78563412) (23456789|01efcdab) (abcdef01|89674523) .*
|
||||
.* (3456789a|12f0debc) (bcdef012|9a785634) (456789ab|2301efcd) (cdef0123|ab896745) .*
|
||||
.* (56789abc|3412f0de) (def01234|bc9a7856) (6789abcd|452301ef) (ef012345|cdab8967) .*
|
||||
.* (789abcde|563412f0) (f0123456|debc9a78) .*
|
||||
|
||||
@ -1,47 +1,47 @@
|
||||
#source: tls32.s
|
||||
#as: -a32
|
||||
#ld: -shared -melf32ppc
|
||||
#ld: -shared
|
||||
#objdump: -dr
|
||||
#target: powerpc*-*-*
|
||||
|
||||
.*: +file format elf32-powerpc
|
||||
.*
|
||||
|
||||
Disassembly of section \.text:
|
||||
|
||||
.* <_start>:
|
||||
.*: 38 7f ff e0 addi r3,r31,-32
|
||||
.*: 48 00 00 01 bl .*
|
||||
.*: 38 7f ff f4 addi r3,r31,-12
|
||||
.*: 48 00 00 01 bl .*
|
||||
.*: 38 7f ff e8 addi r3,r31,-24
|
||||
.*: 48 01 01 95 bl .*<__tls_get_addr@plt>
|
||||
.*: 38 7f ff f4 addi r3,r31,-12
|
||||
.*: 48 01 01 8d bl .*<__tls_get_addr@plt>
|
||||
.*: 39 23 80 20 addi r9,r3,-32736
|
||||
.*: 3d 23 00 00 addis r9,r3,0
|
||||
.*: 81 49 80 24 lwz r10,-32732\(r9\)
|
||||
.*: 81 3f ff f0 lwz r9,-16\(r31\)
|
||||
.*: 7d 49 12 2e lhzx r10,r9,r2
|
||||
.*: 89 42 00 00 lbz r10,0\(r2\)
|
||||
.*: 3d 22 00 00 addis r9,r2,0
|
||||
.*: 99 49 00 00 stb r10,0\(r9\)
|
||||
.*: 38 7e ff d8 addi r3,r30,-40
|
||||
.*: 48 00 00 01 bl .*
|
||||
.*: 38 7e ff f4 addi r3,r30,-12
|
||||
.*: 48 00 00 01 bl .*
|
||||
.*: 91 43 80 04 stw r10,-32764\(r3\)
|
||||
.*: 3d 23 00 00 addis r9,r3,0
|
||||
.*: 91 49 80 08 stw r10,-32760\(r9\)
|
||||
.*: 81 3e ff f0 lwz r9,-16\(r30\)
|
||||
.*: 7d 49 13 2e sthx r10,r9,r2
|
||||
.*: a1 42 00 00 lhz r10,0\(r2\)
|
||||
.*: 3d 22 00 00 addis r9,r2,0
|
||||
.*: a9 49 00 00 lha r10,0\(r9\)
|
||||
.*: (38 7f ff e0|e0 ff 7f 38) addi r3,r31,-32
|
||||
.*: (48 00 00 01|01 00 00 48) bl .*
|
||||
.*: (38 7f ff f4|f4 ff 7f 38) addi r3,r31,-12
|
||||
.*: (48 00 00 01|01 00 00 48) bl .*
|
||||
.*: (38 7f ff e8|e8 ff 7f 38) addi r3,r31,-24
|
||||
.*: (48 01 01 95|95 01 01 48) bl .*<__tls_get_addr@plt>
|
||||
.*: (38 7f ff f4|f4 ff 7f 38) addi r3,r31,-12
|
||||
.*: (48 01 01 8d|8d 01 01 48) bl .*<__tls_get_addr@plt>
|
||||
.*: (39 23 80 20|20 80 23 39) addi r9,r3,-32736
|
||||
.*: (3d 23 00 00|00 00 23 3d) addis r9,r3,0
|
||||
.*: (81 49 80 24|24 80 49 81) lwz r10,-32732\(r9\)
|
||||
.*: (81 3f ff f0|f0 ff 3f 81) lwz r9,-16\(r31\)
|
||||
.*: (7d 49 12 2e|2e 12 49 7d) lhzx r10,r9,r2
|
||||
.*: (89 42 00 00|00 00 42 89) lbz r10,0\(r2\)
|
||||
.*: (3d 22 00 00|00 00 22 3d) addis r9,r2,0
|
||||
.*: (99 49 00 00|00 00 49 99) stb r10,0\(r9\)
|
||||
.*: (38 7e ff d8|d8 ff 7e 38) addi r3,r30,-40
|
||||
.*: (48 00 00 01|01 00 00 48) bl .*
|
||||
.*: (38 7e ff f4|f4 ff 7e 38) addi r3,r30,-12
|
||||
.*: (48 00 00 01|01 00 00 48) bl .*
|
||||
.*: (91 43 80 04|04 80 43 91) stw r10,-32764\(r3\)
|
||||
.*: (3d 23 00 00|00 00 23 3d) addis r9,r3,0
|
||||
.*: (91 49 80 08|08 80 49 91) stw r10,-32760\(r9\)
|
||||
.*: (81 3e ff f0|f0 ff 3e 81) lwz r9,-16\(r30\)
|
||||
.*: (7d 49 13 2e|2e 13 49 7d) sthx r10,r9,r2
|
||||
.*: (a1 42 00 00|00 00 42 a1) lhz r10,0\(r2\)
|
||||
.*: (3d 22 00 00|00 00 22 3d) addis r9,r2,0
|
||||
.*: (a9 49 00 00|00 00 49 a9) lha r10,0\(r9\)
|
||||
Disassembly of section \.got:
|
||||
|
||||
.* <_GLOBAL_OFFSET_TABLE_-0x28>:
|
||||
#...
|
||||
.*: 4e 80 00 21 blrl
|
||||
.*: (4e 80 00 21|21 00 80 4e) blrl
|
||||
.* <_GLOBAL_OFFSET_TABLE_>:
|
||||
.*: 00 01 03 ec .*
|
||||
.*: (00 01 03 ec|ec 03 01 00) .*
|
||||
#pass
|
||||
|
||||
@ -1,13 +1,13 @@
|
||||
#source: tls32.s
|
||||
#as: -a32
|
||||
#ld: -shared -melf32ppc
|
||||
#ld: -shared
|
||||
#objdump: -sj.got
|
||||
#target: powerpc*-*-*
|
||||
|
||||
.*: +file format elf32-powerpc
|
||||
.*
|
||||
|
||||
Contents of section \.got:
|
||||
.* 00000000 00000000 00000000 00000000 .*
|
||||
.* 00000000 00000000 00000000 00000000 .*
|
||||
.* 00000000 4e800021 000103ec 00000000 .*
|
||||
.* 00000000 (4e800021|2100804e) (000103ec|ec030100) 00000000 .*
|
||||
.* 00000000 .*
|
||||
|
||||
@ -1,6 +1,6 @@
|
||||
#source: tls32.s
|
||||
#as: -a32
|
||||
#ld: -shared -melf32ppc
|
||||
#ld: -shared
|
||||
#readelf: -WSsrl
|
||||
#target: powerpc*-*-*
|
||||
|
||||
|
||||
@ -1,11 +1,11 @@
|
||||
#source: tls32.s
|
||||
#as: -a32
|
||||
#ld: -shared -melf32ppc
|
||||
#ld: -shared
|
||||
#objdump: -sj.tdata
|
||||
#target: powerpc*-*-*
|
||||
|
||||
.*: +file format elf32-powerpc
|
||||
.*
|
||||
|
||||
Contents of section \.tdata:
|
||||
.* 12345678 23456789 3456789a 456789ab .*
|
||||
.* 56789abc 6789abcd 789abcde .*
|
||||
.* (12345678|78563412) (23456789|89674523) (3456789a|9a785634) (456789ab|ab896745) .*
|
||||
.* (56789abc|bc9a7856) (6789abcd|cdab8967) (789abcde|debc9a78) .*
|
||||
|
||||
@ -1,37 +1,37 @@
|
||||
#source: tlslib.s
|
||||
#source: tlstoc.s
|
||||
#as: -a64
|
||||
#ld: -melf64ppc
|
||||
#ld:
|
||||
#objdump: -dr
|
||||
#target: powerpc64*-*-*
|
||||
|
||||
.*: +file format elf64-powerpc
|
||||
.*
|
||||
|
||||
Disassembly of section \.text:
|
||||
|
||||
.* <\.__tls_get_addr>:
|
||||
.* 4e 80 00 20 blr
|
||||
.* (4e 80 00 20|20 00 80 4e) blr
|
||||
|
||||
.* <_start>:
|
||||
.* 3c 6d 00 00 addis r3,r13,0
|
||||
.* 60 00 00 00 nop
|
||||
.* 38 63 90 40 addi r3,r3,-28608
|
||||
.* 3c 6d 00 00 addis r3,r13,0
|
||||
.* 60 00 00 00 nop
|
||||
.* 38 63 10 00 addi r3,r3,4096
|
||||
.* 3c 6d 00 00 addis r3,r13,0
|
||||
.* 60 00 00 00 nop
|
||||
.* 38 63 90 48 addi r3,r3,-28600
|
||||
.* 3c 6d 00 00 addis r3,r13,0
|
||||
.* 60 00 00 00 nop
|
||||
.* 38 63 10 00 addi r3,r3,4096
|
||||
.* 39 23 80 50 addi r9,r3,-32688
|
||||
.* 3d 23 00 00 addis r9,r3,0
|
||||
.* 81 49 80 58 lwz r10,-32680\(r9\)
|
||||
.* e9 22 80 40 ld r9,-32704\(r2\)
|
||||
.* 7d 49 18 2a ldx r10,r9,r3
|
||||
.* 3d 2d 00 00 addis r9,r13,0
|
||||
.* a1 49 90 68 lhz r10,-28568\(r9\)
|
||||
.* 89 4d 90 70 lbz r10,-28560\(r13\)
|
||||
.* 3d 2d 00 00 addis r9,r13,0
|
||||
.* 99 49 90 78 stb r10,-28552\(r9\)
|
||||
.* (3c 6d 00 00|00 00 6d 3c) addis r3,r13,0
|
||||
.* (60 00 00 00|00 00 00 60) nop
|
||||
.* (38 63 90 40|40 90 63 38) addi r3,r3,-28608
|
||||
.* (3c 6d 00 00|00 00 6d 3c) addis r3,r13,0
|
||||
.* (60 00 00 00|00 00 00 60) nop
|
||||
.* (38 63 10 00|00 10 63 38) addi r3,r3,4096
|
||||
.* (3c 6d 00 00|00 00 6d 3c) addis r3,r13,0
|
||||
.* (60 00 00 00|00 00 00 60) nop
|
||||
.* (38 63 90 48|48 90 63 38) addi r3,r3,-28600
|
||||
.* (3c 6d 00 00|00 00 6d 3c) addis r3,r13,0
|
||||
.* (60 00 00 00|00 00 00 60) nop
|
||||
.* (38 63 10 00|00 10 63 38) addi r3,r3,4096
|
||||
.* (39 23 80 50|50 80 23 39) addi r9,r3,-32688
|
||||
.* (3d 23 00 00|00 00 23 3d) addis r9,r3,0
|
||||
.* (81 49 80 58|58 80 49 81) lwz r10,-32680\(r9\)
|
||||
.* (e9 22 80 40|40 80 22 e9) ld r9,-32704\(r2\)
|
||||
.* (7d 49 18 2a|2a 18 49 7d) ldx r10,r9,r3
|
||||
.* (3d 2d 00 00|00 00 2d 3d) addis r9,r13,0
|
||||
.* (a1 49 90 68|68 90 49 a1) lhz r10,-28568\(r9\)
|
||||
.* (89 4d 90 70|70 90 4d 89) lbz r10,-28560\(r13\)
|
||||
.* (3d 2d 00 00|00 00 2d 3d) addis r9,r13,0
|
||||
.* (99 49 90 78|78 90 49 99) stb r10,-28552\(r9\)
|
||||
|
||||
@ -1,15 +1,15 @@
|
||||
#source: tlslib.s
|
||||
#source: tlstoc.s
|
||||
#as: -a64
|
||||
#ld: -melf64ppc
|
||||
#ld:
|
||||
#objdump: -sj.got
|
||||
#target: powerpc64*-*-*
|
||||
|
||||
.*: +file format elf64-powerpc
|
||||
.*
|
||||
|
||||
Contents of section \.got:
|
||||
100101a0 00000000 00000001 00000000 00000000 .*
|
||||
100101b0 00000000 00000001 00000000 00000000 .*
|
||||
100101c0 00000000 00000001 00000000 00000000 .*
|
||||
100101d0 00000000 00000001 00000000 00000000 .*
|
||||
100101e0 ffffffff ffff8060 00000000 00000000 .*
|
||||
100101a0 (00000000|01000000) (00000001|00000000) 00000000 00000000 .*
|
||||
100101b0 (00000000|01000000) (00000001|00000000) 00000000 00000000 .*
|
||||
100101c0 (00000000|01000000) (00000001|00000000) 00000000 00000000 .*
|
||||
100101d0 (00000000|01000000) (00000001|00000000) 00000000 00000000 .*
|
||||
100101e0 (ffffffff|6080ffff) (ffff8060|ffffffff) 00000000 00000000 .*
|
||||
|
||||
@ -1,14 +1,14 @@
|
||||
#source: tlslib.s
|
||||
#source: tlstoc.s
|
||||
#as: -a64
|
||||
#ld: -melf64ppc
|
||||
#ld:
|
||||
#objdump: -sj.tdata
|
||||
#target: powerpc64*-*-*
|
||||
|
||||
.*: +file format elf64-powerpc
|
||||
.*
|
||||
|
||||
Contents of section \.tdata:
|
||||
10010148 00c0ffee 00000000 12345678 9abcdef0 .*
|
||||
10010158 23456789 abcdef01 3456789a bcdef012 .*
|
||||
10010168 456789ab cdef0123 56789abc def01234 .*
|
||||
10010178 6789abcd ef012345 789abcde f0123456 .*
|
||||
10010148 (00c0ffee|eeffc000) 00000000 (12345678|78563412) (9abcdef0|f0debc9a) .*
|
||||
10010158 (23456789|89674523) (abcdef01|01efcdab) (3456789a|9a785634) (bcdef012|12f0debc) .*
|
||||
10010168 (456789ab|ab896745) (cdef0123|2301efcd) (56789abc|bc9a7856) (def01234|3412f0de) .*
|
||||
10010178 (6789abcd|cdab8967) (ef012345|452301ef) (789abcde|debc9a78) (f0123456|563412f0) .*
|
||||
|
||||
@ -1,6 +1,6 @@
|
||||
#source: tlstoc.s
|
||||
#as: -a64
|
||||
#ld: -shared -melf64ppc
|
||||
#ld: -shared
|
||||
#objdump: -dr
|
||||
#target: powerpc64*-*-*
|
||||
|
||||
@ -9,52 +9,52 @@
|
||||
Disassembly of section \.text:
|
||||
|
||||
.* <00000010\.plt_call\.__tls_get_addr(|_opt)\+0>:
|
||||
.* f8 41 00 28 std r2,40\(r1\)
|
||||
.* e9 62 80 70 ld r11,-32656\(r2\)
|
||||
.* 7d 69 03 a6 mtctr r11
|
||||
.* e8 42 80 78 ld r2,-32648\(r2\)
|
||||
.* 4e 80 04 20 bctr
|
||||
.* (f8 41 00 28|28 00 41 f8) std r2,40\(r1\)
|
||||
.* (e9 62 80 70|70 80 62 e9) ld r11,-32656\(r2\)
|
||||
.* (7d 69 03 a6|a6 03 69 7d) mtctr r11
|
||||
.* (e8 42 80 78|78 80 42 e8) ld r2,-32648\(r2\)
|
||||
.* (4e 80 04 20|20 04 80 4e) bctr
|
||||
|
||||
.* <_start>:
|
||||
.* 38 62 80 08 addi r3,r2,-32760
|
||||
.* 4b ff ff e9 bl .*
|
||||
.* e8 41 00 28 ld r2,40\(r1\)
|
||||
.* 38 62 80 18 addi r3,r2,-32744
|
||||
.* 4b ff ff dd bl .*
|
||||
.* e8 41 00 28 ld r2,40\(r1\)
|
||||
.* 38 62 80 28 addi r3,r2,-32728
|
||||
.* 4b ff ff d1 bl .*
|
||||
.* e8 41 00 28 ld r2,40\(r1\)
|
||||
.* 38 62 80 38 addi r3,r2,-32712
|
||||
.* 4b ff ff c5 bl .*
|
||||
.* e8 41 00 28 ld r2,40\(r1\)
|
||||
.* 39 23 80 40 addi r9,r3,-32704
|
||||
.* 3d 23 00 00 addis r9,r3,0
|
||||
.* 81 49 80 48 lwz r10,-32696\(r9\)
|
||||
.* e9 22 80 48 ld r9,-32696\(r2\)
|
||||
.* 7d 49 18 2a ldx r10,r9,r3
|
||||
.* e9 22 80 50 ld r9,-32688\(r2\)
|
||||
.* 7d 49 6a 2e lhzx r10,r9,r13
|
||||
.* 89 4d 00 00 lbz r10,0\(r13\)
|
||||
.* 3d 2d 00 00 addis r9,r13,0
|
||||
.* 99 49 00 00 stb r10,0\(r9\)
|
||||
.* 60 00 00 00 nop
|
||||
.* 00 00 00 00 .*
|
||||
.* 00 01 02 18 .*
|
||||
.* (38 62 80 08|08 80 62 38) addi r3,r2,-32760
|
||||
.* (4b ff ff e9|e9 ff ff 4b) bl .*
|
||||
.* (e8 41 00 28|28 00 41 e8) ld r2,40\(r1\)
|
||||
.* (38 62 80 18|18 80 62 38) addi r3,r2,-32744
|
||||
.* (4b ff ff dd|dd ff ff 4b) bl .*
|
||||
.* (e8 41 00 28|28 00 41 e8) ld r2,40\(r1\)
|
||||
.* (38 62 80 28|28 80 62 38) addi r3,r2,-32728
|
||||
.* (4b ff ff d1|d1 ff ff 4b) bl .*
|
||||
.* (e8 41 00 28|28 00 41 e8) ld r2,40\(r1\)
|
||||
.* (38 62 80 38|38 80 62 38) addi r3,r2,-32712
|
||||
.* (4b ff ff c5|c5 ff ff 4b) bl .*
|
||||
.* (e8 41 00 28|28 00 41 e8) ld r2,40\(r1\)
|
||||
.* (39 23 80 40|40 80 23 39) addi r9,r3,-32704
|
||||
.* (3d 23 00 00|00 00 23 3d) addis r9,r3,0
|
||||
.* (81 49 80 48|48 80 49 81) lwz r10,-32696\(r9\)
|
||||
.* (e9 22 80 48|48 80 22 e9) ld r9,-32696\(r2\)
|
||||
.* (7d 49 18 2a|2a 18 49 7d) ldx r10,r9,r3
|
||||
.* (e9 22 80 50|50 80 22 e9) ld r9,-32688\(r2\)
|
||||
.* (7d 49 6a 2e|2e 6a 49 7d) lhzx r10,r9,r13
|
||||
.* (89 4d 00 00|00 00 4d 89) lbz r10,0\(r13\)
|
||||
.* (3d 2d 00 00|00 00 2d 3d) addis r9,r13,0
|
||||
.* (99 49 00 00|00 00 49 99) stb r10,0\(r9\)
|
||||
.* (60 00 00 00|00 00 00 60) nop
|
||||
.* (00 00 00 00|18 02 01 00) .*
|
||||
.* (00 01 02 18|00 00 00 00) .*
|
||||
.* <__glink_PLTresolve>:
|
||||
.* 7d 88 02 a6 mflr r12
|
||||
.* 42 9f 00 05 bcl- 20,4\*cr7\+so,.*
|
||||
.* 7d 68 02 a6 mflr r11
|
||||
.* e8 4b ff f0 ld r2,-16\(r11\)
|
||||
.* 7d 88 03 a6 mtlr r12
|
||||
.* 7d 82 5a 14 add r12,r2,r11
|
||||
.* e9 6c 00 00 ld r11,0\(r12\)
|
||||
.* e8 4c 00 08 ld r2,8\(r12\)
|
||||
.* 7d 69 03 a6 mtctr r11
|
||||
.* e9 6c 00 10 ld r11,16\(r12\)
|
||||
.* 4e 80 04 20 bctr
|
||||
.* 60 00 00 00 nop
|
||||
.* 60 00 00 00 nop
|
||||
.* 60 00 00 00 nop
|
||||
.* 38 00 00 00 li r0,0
|
||||
.* 4b ff ff c4 b .*
|
||||
.* (7d 88 02 a6|a6 02 88 7d) mflr r12
|
||||
.* (42 9f 00 05|05 00 9f 42) bcl- 20,4\*cr7\+so,.*
|
||||
.* (7d 68 02 a6|a6 02 68 7d) mflr r11
|
||||
.* (e8 4b ff f0|f0 ff 4b e8) ld r2,-16\(r11\)
|
||||
.* (7d 88 03 a6|a6 03 88 7d) mtlr r12
|
||||
.* (7d 82 5a 14|14 5a 82 7d) add r12,r2,r11
|
||||
.* (e9 6c 00 00|00 00 6c e9) ld r11,0\(r12\)
|
||||
.* (e8 4c 00 08|08 00 4c e8) ld r2,8\(r12\)
|
||||
.* (7d 69 03 a6|a6 03 69 7d) mtctr r11
|
||||
.* (e9 6c 00 10|10 00 6c e9) ld r11,16\(r12\)
|
||||
.* (4e 80 04 20|20 04 80 4e) bctr
|
||||
.* (60 00 00 00|00 00 00 60) nop
|
||||
.* (60 00 00 00|00 00 00 60) nop
|
||||
.* (60 00 00 00|00 00 00 60) nop
|
||||
.* (38 00 00 00|00 00 00 38) li r0,0
|
||||
.* (4b ff ff c4|c4 ff ff 4b) b .*
|
||||
|
||||
@ -1,13 +1,13 @@
|
||||
#source: tlstoc.s
|
||||
#as: -a64
|
||||
#ld: -shared -melf64ppc
|
||||
#ld: -shared
|
||||
#objdump: -sj.got
|
||||
#target: powerpc64*-*-*
|
||||
|
||||
.*: +file format elf64-powerpc
|
||||
.*
|
||||
|
||||
Contents of section \.got:
|
||||
.* 00000000 000186c0 00000000 00000000 .*
|
||||
.* 00000000 (000186c0|c0860100) 00000000 00000000 .*
|
||||
.* 00000000 00000000 00000000 00000000 .*
|
||||
.* 00000000 00000000 00000000 00000000 .*
|
||||
.* 00000000 00000000 00000000 00000000 .*
|
||||
|
||||
@ -1,13 +1,13 @@
|
||||
#source: tlstoc.s
|
||||
#as: -a64
|
||||
#ld: -shared -melf64ppc
|
||||
#ld: -shared
|
||||
#objdump: -sj.tdata
|
||||
#target: powerpc64*-*-*
|
||||
|
||||
.*: +file format elf64-powerpc
|
||||
.*
|
||||
|
||||
Contents of section \.tdata:
|
||||
.* 12345678 9abcdef0 23456789 abcdef01 .*
|
||||
.* 3456789a bcdef012 456789ab cdef0123 .*
|
||||
.* 56789abc def01234 6789abcd ef012345 .*
|
||||
.* 789abcde f0123456 .*
|
||||
.* (12345678|78563412) (9abcdef0|f0debc9a) (23456789|89674523) (abcdef01|01efcdab) .*
|
||||
.* (3456789a|9a785634) (bcdef012|12f0debc) (456789ab|ab896745) (cdef0123|2301efcd) .*
|
||||
.* (56789abc|bc9a7856) (def01234|3412f0de) (6789abcd|cdab8967) (ef012345|452301ef) .*
|
||||
.* (789abcde|debc9a78) (f0123456|563412f0) .*
|
||||
|
||||
@ -1,4 +1,4 @@
|
||||
.*
|
||||
\(\.text\+0x14\): .* 0x3fa00000 .*
|
||||
\(\.text\+0x14\): .*
|
||||
.*
|
||||
\(\.text\+0x34\): .* 0x3fa00010 .*
|
||||
\(\.text\+0x34\): .*
|
||||
|
||||
Loading…
Reference in New Issue
Block a user