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MIPS/LD/testsuite: Add microMIPS lazy binding stub tests
Adapt the existing regular MIPS lazy binding stub tests for microMIPS code verification. Check both regular and `--insn32' variants. Correct indentation issues in the conditional updated. ld/ * testsuite/ld-mips-elf/stub-dynsym-micromips-1-7fff.d: New test. * testsuite/ld-mips-elf/stub-dynsym-micromips-1-8000.d: New test. * testsuite/ld-mips-elf/stub-dynsym-micromips-1-fff0.d: New test. * testsuite/ld-mips-elf/stub-dynsym-micromips-1-10000.d: New test. * testsuite/ld-mips-elf/stub-dynsym-micromips-1-2fe80.d: New test. * testsuite/ld-mips-elf/stub-dynsym-micromips-insn32-1-7fff.d: New test. * testsuite/ld-mips-elf/stub-dynsym-micromips-insn32-1-8000.d: New test. * testsuite/ld-mips-elf/stub-dynsym-micromips-insn32-1-fff0.d: New test. * testsuite/ld-mips-elf/stub-dynsym-micromips-insn32-1-10000.d: New test. * testsuite/ld-mips-elf/stub-dynsym-micromips-insn32-1-2fe80.d: New test. * testsuite/ld-mips-elf/mips-elf.exp: Run the new tests. Fix indentation.
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ld/ChangeLog
25
ld/ChangeLog
@ -1,3 +1,28 @@
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2018-06-09 Maciej W. Rozycki <macro@mips.com>
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* testsuite/ld-mips-elf/stub-dynsym-micromips-1-7fff.d: New
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test.
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* testsuite/ld-mips-elf/stub-dynsym-micromips-1-8000.d: New
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test.
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* testsuite/ld-mips-elf/stub-dynsym-micromips-1-fff0.d: New
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test.
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* testsuite/ld-mips-elf/stub-dynsym-micromips-1-10000.d: New
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test.
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* testsuite/ld-mips-elf/stub-dynsym-micromips-1-2fe80.d: New
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test.
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* testsuite/ld-mips-elf/stub-dynsym-micromips-insn32-1-7fff.d:
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New test.
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* testsuite/ld-mips-elf/stub-dynsym-micromips-insn32-1-8000.d:
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New test.
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* testsuite/ld-mips-elf/stub-dynsym-micromips-insn32-1-fff0.d:
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New test.
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* testsuite/ld-mips-elf/stub-dynsym-micromips-insn32-1-10000.d:
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New test.
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* testsuite/ld-mips-elf/stub-dynsym-micromips-insn32-1-2fe80.d:
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New test.
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* testsuite/ld-mips-elf/mips-elf.exp: Run the new tests. Fix
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indentation.
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2018-06-09 Maciej W. Rozycki <macro@mips.com>
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* testsuite/ld-mips-elf/mips-elf.exp: Update symbol count in the
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@ -782,28 +782,35 @@ run_dump_test "hash1b"
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run_dump_test "hash1c"
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if {[istarget mips*-*-linux*]} {
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# The number of symbols that are always included in the symbol table
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# for these tests. The 2 are:
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#
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# the null symbol entry
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# the .MIPS.stubs section symbol
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set base_syms 2
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foreach dynsym { 7fff 8000 fff0 10000 2fe80 } {
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run_ld_link_tests \
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[list [list \
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"Stub for dynsym 0x$dynsym" \
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"-shared -melf32btsmip -T stub-dynsym-1.ld" "" \
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[concat \
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"-EB -march=mips1 -32 -KPIC" \
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"--defsym base_syms=$base_syms" \
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"--defsym dynsym=0x$dynsym"] \
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[list "stub-dynsym-1.s"] \
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[list [list \
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"objdump" "-dz" \
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"stub-dynsym-1-$dynsym.d"]] \
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"stub-dynsym-1-$dynsym"]]
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}
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}
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# The number of symbols that are always included in the symbol table
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# for these tests. The 2 are:
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#
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# the null symbol entry
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# the .MIPS.stubs section symbol
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set base_syms 2
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foreach { isa aflag lflag suffix } \
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{ MIPS -march=mips1 "" "" \
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microMIPS -mmicromips "" -micromips \
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"microMIPS insn32" "-mmicromips -minsn32" --insn32 \
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-micromips-insn32 } {
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foreach dynsym { 7fff 8000 fff0 10000 2fe80 } {
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run_ld_link_tests \
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[list [list \
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"Stub for dynsym 0x$dynsym ($isa)" \
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"-shared -melf32btsmip -T stub-dynsym-1.ld $lflag" \
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"" \
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[concat \
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"-EB $aflag -32 -KPIC" \
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"--defsym base_syms=$base_syms" \
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"--defsym dynsym=0x$dynsym"] \
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[list "stub-dynsym-1.s"] \
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[list [list \
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"objdump" "-dz" \
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"stub-dynsym$suffix-1-$dynsym.d"]] \
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"stub-dynsym$suffix-1-$dynsym"]]
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}
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}
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}
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# For tests which may involve multiple files, use run_ld_link_tests.
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17
ld/testsuite/ld-mips-elf/stub-dynsym-micromips-1-10000.d
Normal file
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ld/testsuite/ld-mips-elf/stub-dynsym-micromips-1-10000.d
Normal file
@ -0,0 +1,17 @@
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.*: +file format .*mips.*
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Disassembly of section \.MIPS\.stubs:
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.* <_MIPS_STUBS_>:
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.*: ff3c 8010 lw t9,-32752\(gp\)
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.*: 0dff move t7,ra
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.*: 41b8 0001 lui t8,0x1
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.*: 45d9 jalr t9
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.*: 5318 0000 ori t8,t8,0x0
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.*: 0000 0000 nop
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.*: 0000 0000 nop
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.*: 0000 0000 nop
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.*: 0000 0000 nop
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Disassembly of section \.text:
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#pass
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17
ld/testsuite/ld-mips-elf/stub-dynsym-micromips-1-2fe80.d
Normal file
17
ld/testsuite/ld-mips-elf/stub-dynsym-micromips-1-2fe80.d
Normal file
@ -0,0 +1,17 @@
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.*: +file format .*mips.*
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Disassembly of section \.MIPS\.stubs:
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.* <_MIPS_STUBS_>:
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.*: ff3c 8010 lw t9,-32752\(gp\)
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.*: 0dff move t7,ra
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.*: 41b8 0002 lui t8,0x2
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.*: 45d9 jalr t9
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.*: 5318 fe80 ori t8,t8,0xfe80
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.*: 0000 0000 nop
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.*: 0000 0000 nop
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.*: 0000 0000 nop
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.*: 0000 0000 nop
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Disassembly of section \.text:
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#pass
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15
ld/testsuite/ld-mips-elf/stub-dynsym-micromips-1-7fff.d
Normal file
15
ld/testsuite/ld-mips-elf/stub-dynsym-micromips-1-7fff.d
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@ -0,0 +1,15 @@
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.*: +file format .*mips.*
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Disassembly of section \.MIPS\.stubs:
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.* <_MIPS_STUBS_>:
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.*: ff3c 8010 lw t9,-32752\(gp\)
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.*: 0dff move t7,ra
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.*: 45d9 jalr t9
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.*: 3300 7fff li t8,32767
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.*: 0000 0000 nop
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.*: 0000 0000 nop
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.*: 0000 0000 nop
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Disassembly of section \.text:
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#pass
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15
ld/testsuite/ld-mips-elf/stub-dynsym-micromips-1-8000.d
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15
ld/testsuite/ld-mips-elf/stub-dynsym-micromips-1-8000.d
Normal file
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.*: +file format .*mips.*
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Disassembly of section \.MIPS\.stubs:
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.* <_MIPS_STUBS_>:
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.*: ff3c 8010 lw t9,-32752\(gp\)
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.*: 0dff move t7,ra
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.*: 45d9 jalr t9
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.*: 5300 8000 li t8,0x8000
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.*: 0000 0000 nop
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.*: 0000 0000 nop
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.*: 0000 0000 nop
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Disassembly of section \.text:
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#pass
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ld/testsuite/ld-mips-elf/stub-dynsym-micromips-1-fff0.d
Normal file
15
ld/testsuite/ld-mips-elf/stub-dynsym-micromips-1-fff0.d
Normal file
@ -0,0 +1,15 @@
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.*: +file format .*mips.*
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Disassembly of section \.MIPS\.stubs:
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.* <_MIPS_STUBS_>:
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.*: ff3c 8010 lw t9,-32752\(gp\)
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.*: 0dff move t7,ra
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.*: 45d9 jalr t9
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.*: 5300 fff0 li t8,0xfff0
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.*: 0000 0000 nop
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.*: 0000 0000 nop
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.*: 0000 0000 nop
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Disassembly of section \.text:
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#pass
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@ -0,0 +1,18 @@
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.*: +file format .*mips.*
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Disassembly of section \.MIPS\.stubs:
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.* <_MIPS_STUBS_>:
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.*: ff3c 8010 lw t9,-32752\(gp\)
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.*: 001f 7a90 move t7,ra
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.*: 41b8 0001 lui t8,0x1
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.*: 03f9 0f3c jalr t9
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.*: 5318 0000 ori t8,t8,0x0
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.*: 0000 0000 nop
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.*: 0000 0000 nop
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.*: 0000 0000 nop
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.*: 0000 0000 nop
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.*: 0000 0000 nop
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Disassembly of section \.text:
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#pass
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@ -0,0 +1,18 @@
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.*: +file format .*mips.*
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Disassembly of section \.MIPS\.stubs:
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.* <_MIPS_STUBS_>:
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.*: ff3c 8010 lw t9,-32752\(gp\)
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.*: 001f 7a90 move t7,ra
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.*: 41b8 0002 lui t8,0x2
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.*: 03f9 0f3c jalr t9
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.*: 5318 fe80 ori t8,t8,0xfe80
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.*: 0000 0000 nop
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.*: 0000 0000 nop
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.*: 0000 0000 nop
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.*: 0000 0000 nop
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.*: 0000 0000 nop
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Disassembly of section \.text:
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#pass
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@ -0,0 +1,16 @@
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.*: +file format .*mips.*
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Disassembly of section \.MIPS\.stubs:
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.* <_MIPS_STUBS_>:
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.*: ff3c 8010 lw t9,-32752\(gp\)
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.*: 001f 7a90 move t7,ra
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.*: 03f9 0f3c jalr t9
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.*: 3300 7fff li t8,32767
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.*: 0000 0000 nop
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.*: 0000 0000 nop
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.*: 0000 0000 nop
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.*: 0000 0000 nop
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Disassembly of section \.text:
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#pass
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@ -0,0 +1,16 @@
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.*: +file format .*mips.*
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Disassembly of section \.MIPS\.stubs:
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.* <_MIPS_STUBS_>:
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.*: ff3c 8010 lw t9,-32752\(gp\)
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.*: 001f 7a90 move t7,ra
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.*: 03f9 0f3c jalr t9
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.*: 5300 8000 li t8,0x8000
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.*: 0000 0000 nop
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.*: 0000 0000 nop
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.*: 0000 0000 nop
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.*: 0000 0000 nop
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Disassembly of section \.text:
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#pass
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@ -0,0 +1,16 @@
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.*: +file format .*mips.*
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Disassembly of section \.MIPS\.stubs:
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.* <_MIPS_STUBS_>:
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.*: ff3c 8010 lw t9,-32752\(gp\)
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.*: 001f 7a90 move t7,ra
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.*: 03f9 0f3c jalr t9
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.*: 5300 fff0 li t8,0xfff0
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.*: 0000 0000 nop
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.*: 0000 0000 nop
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.*: 0000 0000 nop
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.*: 0000 0000 nop
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Disassembly of section \.text:
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#pass
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