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[ARM] Purecode compatible long branch veneer for M-profile targets with MOVW.
2016-07-05 Andre Vieria <andre.simoesdiasvieira@arm.com> * elf32-arm.c (THUMB32_MOVT): New veneer macro. (THUMB32_MOVW): Likewise. (elf32_arm_stub_long_branch_thumb2_only_pure): New. (DEF_STUBS): Define long_branch_thumb2_only_pure. (arm_stub_is_thumb): Add new veneer stub. (arm_type_of_stub): Use new veneer. (arm_stub_required_alignment): Add new veneer. 2016-07-05 Andre Vieria <andre.simoesdiasvieira@arm.com> * testsuite/ld-arm/farcall-thumb2-purecode.d: New test result. * testsuite/ld-arm/farcall-thumb2-purecode.s: New test. * testsuite/ld-arm/arm-elf.exp: Run it.
This commit is contained in:
Andre Vieria
Richard Earnshaw
parent
f0728ee368
commit
d5a67c0290
@ -1,3 +1,13 @@
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2016-07-05 Andre Vieria <andre.simoesdiasvieira@arm.com>
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* elf32-arm.c (THUMB32_MOVT): New veneer macro.
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(THUMB32_MOVW): Likewise.
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(elf32_arm_stub_long_branch_thumb2_only_pure): New.
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(DEF_STUBS): Define long_branch_thumb2_only_pure.
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(arm_stub_is_thumb): Add new veneer stub.
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(arm_type_of_stub): Use new veneer.
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(arm_stub_required_alignment): Add new veneer.
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2016-07-05 Andre Vieria <andre.simoesdiasvieira@arm.com>
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* bfd-in2.h (SEC_ELF_NOREAD): Rename to ...
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@ -2360,6 +2360,8 @@ enum stub_insn_type
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is inserted in arm_build_one_stub(). */
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#define THUMB16_BCOND_INSN(X) {(X), THUMB16_TYPE, R_ARM_NONE, 1}
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#define THUMB32_INSN(X) {(X), THUMB32_TYPE, R_ARM_NONE, 0}
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#define THUMB32_MOVT(X) {(X), THUMB32_TYPE, R_ARM_THM_MOVT_ABS, 0}
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#define THUMB32_MOVW(X) {(X), THUMB32_TYPE, R_ARM_THM_MOVW_ABS_NC, 0}
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#define THUMB32_B_INSN(X, Z) {(X), THUMB32_TYPE, R_ARM_THM_JUMP24, (Z)}
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#define ARM_INSN(X) {(X), ARM_TYPE, R_ARM_NONE, 0}
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#define ARM_REL_INSN(X, Z) {(X), ARM_TYPE, R_ARM_JUMP24, (Z)}
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@ -2409,6 +2411,15 @@ static const insn_sequence elf32_arm_stub_long_branch_thumb2_only[] =
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DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(x) */
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};
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/* Thumb -> Thumb long branch stub. Used for PureCode sections on Thumb2
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M-profile architectures. */
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static const insn_sequence elf32_arm_stub_long_branch_thumb2_only_pure[] =
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{
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THUMB32_MOVW (0xf2400c00), /* mov.w ip, R_ARM_MOVW_ABS_NC */
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THUMB32_MOVT (0xf2c00c00), /* movt ip, R_ARM_MOVT_ABS << 16 */
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THUMB16_INSN (0x4760), /* bx ip */
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};
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/* V4T Thumb -> Thumb long branch stub. Using the stack is not
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allowed. */
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static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_thumb[] =
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@ -2634,6 +2645,7 @@ static const insn_sequence elf32_arm_stub_a8_veneer_blx[] =
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DEF_STUB(a8_veneer_bl) \
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DEF_STUB(a8_veneer_blx) \
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DEF_STUB(long_branch_thumb2_only) \
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DEF_STUB(long_branch_thumb2_only_pure)
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#define DEF_STUB(x) arm_stub_##x,
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enum elf32_arm_stub_type
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@ -3808,6 +3820,7 @@ arm_stub_is_thumb (enum elf32_arm_stub_type stub_type)
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{
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case arm_stub_long_branch_thumb_only:
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case arm_stub_long_branch_thumb2_only:
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case arm_stub_long_branch_thumb2_only_pure:
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case arm_stub_long_branch_v4t_thumb_arm:
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case arm_stub_short_branch_v4t_thumb_arm:
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case arm_stub_long_branch_v4t_thumb_arm_pic:
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@ -3847,6 +3860,8 @@ arm_type_of_stub (struct bfd_link_info *info,
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enum arm_st_branch_type branch_type = *actual_branch_type;
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union gotplt_union *root_plt;
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struct arm_plt_info *arm_plt;
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int arch;
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int thumb2_movw;
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if (branch_type == ST_BRANCH_LONG)
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return stub_type;
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@ -3859,6 +3874,11 @@ arm_type_of_stub (struct bfd_link_info *info,
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thumb2 = using_thumb2 (globals);
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thumb2_bl = using_thumb2_bl (globals);
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arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC, Tag_CPU_arch);
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/* True for architectures that implement the thumb2 movw instruction. */
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thumb2_movw = thumb2 || (arch == TAG_CPU_ARCH_V8M_BASE);
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/* Determine where the call point is. */
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location = (input_sec->output_offset
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+ input_sec->output_section->vma
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@ -3945,6 +3965,15 @@ arm_type_of_stub (struct bfd_link_info *info,
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/* Thumb to thumb. */
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if (!thumb_only)
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{
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if (input_sec->flags & SEC_ELF_PURECODE)
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(*_bfd_error_handler) (_("%B(%s): warning: long branch "
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" veneers used in section with "
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"SHF_ARM_PURECODE section "
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"attribute is only supported"
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" for M-profile targets that "
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"implement the movw "
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"instruction."));
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stub_type = (bfd_link_pic (info) | globals->pic_veneer)
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/* PIC stubs. */
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? ((globals->use_blx
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@ -3967,6 +3996,19 @@ arm_type_of_stub (struct bfd_link_info *info,
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}
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else
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{
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if (thumb2_movw && (input_sec->flags & SEC_ELF_PURECODE))
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stub_type = arm_stub_long_branch_thumb2_only_pure;
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else
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{
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if (input_sec->flags & SEC_ELF_PURECODE)
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(*_bfd_error_handler) (_("%B(%s): warning: long branch "
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" veneers used in section with "
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"SHF_ARM_PURECODE section "
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"attribute is only supported"
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" for M-profile targets that "
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"implement the movw "
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"instruction."));
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stub_type = (bfd_link_pic (info) | globals->pic_veneer)
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/* PIC stub. */
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? arm_stub_long_branch_thumb_only_pic
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@ -3975,8 +4017,18 @@ arm_type_of_stub (struct bfd_link_info *info,
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: arm_stub_long_branch_thumb_only);
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}
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}
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}
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else
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{
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if (input_sec->flags & SEC_ELF_PURECODE)
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(*_bfd_error_handler) (_("%B(%s): warning: long branch "
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" veneers used in section with "
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"SHF_ARM_PURECODE section "
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"attribute is only supported"
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" for M-profile targets that "
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"implement the movw "
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"instruction."));
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/* Thumb to arm. */
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if (sym_sec != NULL
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&& sym_sec->owner != NULL
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@ -4021,6 +4073,14 @@ arm_type_of_stub (struct bfd_link_info *info,
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|| r_type == R_ARM_PLT32
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|| r_type == R_ARM_TLS_CALL)
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{
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if (input_sec->flags & SEC_ELF_PURECODE)
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(*_bfd_error_handler) (_("%B(%s): warning: long branch "
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" veneers used in section with "
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"SHF_ARM_PURECODE section "
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"attribute is only supported"
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" for M-profile targets that "
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"implement the movw "
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"instruction."));
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if (branch_type == ST_BRANCH_TO_THUMB)
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{
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/* Arm to thumb. */
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@ -4446,6 +4506,7 @@ arm_stub_required_alignment (enum elf32_arm_stub_type stub_type)
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case arm_stub_long_branch_v4t_arm_thumb:
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case arm_stub_long_branch_thumb_only:
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case arm_stub_long_branch_thumb2_only:
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case arm_stub_long_branch_thumb2_only_pure:
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case arm_stub_long_branch_v4t_thumb_thumb:
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case arm_stub_long_branch_v4t_thumb_arm:
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case arm_stub_short_branch_v4t_thumb_arm:
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@ -1,3 +1,9 @@
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2016-07-05 Andre Vieria <andre.simoesdiasvieira@arm.com>
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* testsuite/ld-arm/farcall-thumb2-purecode.d: New test result.
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* testsuite/ld-arm/farcall-thumb2-purecode.s: New test.
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* testsuite/ld-arm/arm-elf.exp: Run it.
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2016-07-05 Andre Vieria <andre.simoesdiasvieira@arm.com>
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* testsuite/ld-arm/arm_noread.ld: Renamed to ...
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@ -505,6 +505,9 @@ set armeabitests_nonacl {
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{farcall-thumb-thumb-m-no-profile-a.s farcall-thumb-thumb-m-no-profile-b.s}
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{{objdump -d farcall-thumb-thumb-m-no-profile.d}}
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"farcall-thumb-thumb-m-no-profile"}
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{"Thumb2 purecode farcall" "-Ttext 0x1000 --section-start .foo=0x2001020" "" "" {farcall-thumb2-purecode.s}
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{{objdump -d farcall-thumb2-purecode.d}}
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"farcall-thumb2-purecode"}
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{"Thumb-ARM farcall" "-Ttext 0x1c01010 --section-start .foo=0x2001014" "" "-W" {farcall-thumb-arm.s}
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{{objdump -d farcall-thumb-arm.d}}
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22
ld/testsuite/ld-arm/farcall-thumb2-purecode.d
Normal file
22
ld/testsuite/ld-arm/farcall-thumb2-purecode.d
Normal file
@ -0,0 +1,22 @@
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.*: file format .*
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Disassembly of section .text:
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00001000 <bar>:
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1000: 4770 bx lr
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Disassembly of section .foo:
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02001020 <_start>:
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2001020: f000 f802 bl 2001028 <__bar_veneer>
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2001024: 0000 movs r0, r0
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\.\.\.
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02001028 <__bar_veneer>:
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2001028: f241 0c01 movw ip, #4097 ; 0x1001
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200102c: f2c0 0c00 movt ip, #0
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2001030: 4760 bx ip
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2001032: 0000 movs r0, r0
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2001034: 0000 movs r0, r0
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\.\.\.
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19
ld/testsuite/ld-arm/farcall-thumb2-purecode.s
Normal file
19
ld/testsuite/ld-arm/farcall-thumb2-purecode.s
Normal file
@ -0,0 +1,19 @@
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@ Test to ensure that a purecode Thumb2 call exceeding 4Mb generates a stub.
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.global _start
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.syntax unified
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.arch armv7-m
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.thumb
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.thumb_func
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@ We will place the section .text at 0x1000.
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.text
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bar:
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bx lr
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@ We will place the section .foo at 0x02001014.
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.section .foo, "0x20000006"
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_start:
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bl bar
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