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* coff-h8300.c (reloc_howto_type): Add howto entry for
R_PCRWORD_B. (rtype2howto): Handle R_PCRWORD_B. (h8300_reloc16_extra_cases): Handle R_PCRWORD_B. (h8300_reloc_16_estimate): Likewise. Try to turn a 16bit pc-relative branch (R_PCRWORD) into an 8bit pc-relative branch (R_PCWORD_B). So we can turn 16bit pcrel branches into 8bit pcrel branches on the H8/300H. HMSE.
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@ -1,3 +1,13 @@
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Fri May 3 13:07:35 1996 Jeffrey A Law (law@cygnus.com)
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* coff-h8300.c (reloc_howto_type): Add howto entry for
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R_PCRWORD_B.
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(rtype2howto): Handle R_PCRWORD_B.
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(h8300_reloc16_extra_cases): Handle R_PCRWORD_B.
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(h8300_reloc_16_estimate): Likewise. Try to turn a 16bit
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pc-relative branch (R_PCRWORD) into an 8bit pc-relative
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branch (R_PCWORD_B).
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Fri May 3 10:47:41 1996 Ian Lance Taylor <ian@cygnus.com>
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* aoutx.h (translate_from_native_sym_flags): Set the section for
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@ -177,7 +177,7 @@ h8300_coff_link_hash_table_create (abfd)
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bfd_alloc (abfd, sizeof (struct h8300_coff_link_hash_table)));
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if (ret == NULL)
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return NULL;
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if (!_bfd_link_hash_table_init (&ret->root.root, abfd, generic_link_hash_newfunc))
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if (!_bfd_link_hash_table_init (&ret->root.root, abfd, _bfd_generic_link_hash_newfunc))
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{
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bfd_release (abfd, ret);
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return NULL;
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@ -242,6 +242,9 @@ static reloc_howto_type howto_table[] =
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the function vector's entry in the jsr instruction. */
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HOWTO (R_MEM_INDIRECT, 0, 0, 8, false, 0, complain_overflow_bitfield, special, "8/indirect", false, 0x000000ff, 0x000000ff, false),
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/* Internal reloc for relaxing. This is created when a 16bit pc-relative
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branch is turned into an 8bit pc-relative branch. */
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HOWTO (R_PCRWORD_B, 0, 0, 8, true, 0, complain_overflow_bitfield, special, "pcrecl/16", false, 0x000000ff, 0x000000ff, false),
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};
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@ -326,6 +329,9 @@ rtype2howto (internal, dst)
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case R_MEM_INDIRECT:
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internal->howto = howto_table + 14;
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break;
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case R_PCRWORD_B:
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internal->howto = howto_table + 15;
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break;
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default:
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abort ();
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break;
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@ -400,6 +406,7 @@ h8300_reloc16_estimate(abfd, input_section, reloc, shrink, link_info)
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{
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case R_MOVB2:
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case R_JMP2:
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case R_PCRWORD_B:
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shrink+=2;
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break;
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@ -470,6 +477,34 @@ h8300_reloc16_estimate(abfd, input_section, reloc, shrink, link_info)
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reloc->howto = reloc->howto + 1;
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/* The place to relc moves back by one */
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/* This will be two bytes smaller in the long run */
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shrink +=2 ;
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bfd_perform_slip(abfd, 2, input_section, address);
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}
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break;
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case R_PCRWORD:
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value = bfd_coff_reloc16_get_value(reloc, link_info, input_section);
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dot = input_section->output_section->vma +
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input_section->output_offset + address - 2;
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/* See if the address we're looking at within 127 bytes of where
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we are, if so then we can use a small branch rather than the
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jump we were going to */
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gap = value - (dot - shrink);
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if (-120 < (long)gap && (long)gap < 120 )
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{
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/* Change the reloc type from 16bit, possible 8 to 8bit
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possible 16 */
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reloc->howto = howto_table + 15;
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/* The place to relc moves back by one */
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/* This will be two bytes smaller in the long run */
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shrink +=2 ;
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bfd_perform_slip(abfd, 2, input_section, address);
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@ -477,7 +512,6 @@ h8300_reloc16_estimate(abfd, input_section, reloc, shrink, link_info)
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break;
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}
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return shrink;
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}
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@ -490,6 +524,8 @@ h8300_reloc16_estimate(abfd, input_section, reloc, shrink, link_info)
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R_JMP1 R_JMP2 jmp or pcrel branch
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R_JMPL1 R_JMPL_B8 24jmp or pcrel branch
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R_MOVLB1 R_MOVLB2 24 or 8 bit reloc for mov.b
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R_PCRWORD R_PCRWORD_B 8 bit pcrel branch from 16bit pcrel
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branch.
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*/
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@ -644,7 +680,7 @@ h8300_reloc16_extra_cases (abfd, link_info, link_order, reloc, data, src_ptr,
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case R_JMP2:
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/* Speciial relaxed type */
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/* Special relaxed type */
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{
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bfd_vma dot = link_order->offset
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+ dst_address
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@ -678,6 +714,55 @@ h8300_reloc16_extra_cases (abfd, link_info, link_order, reloc, data, src_ptr,
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break;
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}
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break;
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case R_PCRWORD_B:
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/* Special relaxed type */
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{
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bfd_vma dot = link_order->offset
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+ dst_address
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+ link_order->u.indirect.section->output_section->vma - 2;
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int gap = (bfd_coff_reloc16_get_value (reloc, link_info, input_section)
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- dot - 1);
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if ((gap & ~0xff) != 0 && ((gap & 0xff00) != 0xff00))
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abort ();
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switch (data[dst_address - 2])
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{
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int tmp;
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case 0x58:
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/* bCC:16 -> bCC:8 */
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/* Get the condition code from the original insn. */
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tmp = data[dst_address - 1];
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tmp &= 0xf0;
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tmp >>= 4;
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/* Now or in the high nibble of the opcode. */
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tmp |= 0x40;
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/* Write it. */
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bfd_put_8 (abfd, tmp, data + dst_address - 2);
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break;
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default:
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abort ();
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}
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/* Output the target. */
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bfd_put_8 (abfd, gap, data + dst_address - 1);
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/* We don't advance dst_address -- the 8bit reloc is applied at
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dst_address - 1, so the next insn should begin at dst_address.
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src_address is advanced by two (original reloc was 16bits). */
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src_address += 2;
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break;
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}
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break;
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case R_JMPL_B8: /* 24 bit branch which is now 8 bits */
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