Enable Intel CLDEMOTE instruction.

gas/
	* config/tc-i386.c (cpu_arch): Add .cldemote.
	* doc/c-i386.texi: Document cldemote/.cldemote.
	* testsuite/gas/i386/cldemote-intel.d: New.
	* testsuite/gas/i386/cldemote.d: Likewise.
	* testsuite/gas/i386/cldemote.s: Likewise.
	* testsuite/gas/i386/i386.exp: Run new tests.
	* testsuite/gas/i386/x86-64-cldemote-intel.d: New.
	* testsuite/gas/i386/x86-64-cldemote.d: Likewise.
	* testsuite/gas/i386/x86-64-cldemote.s: Likewise.
	* testsuite/gas/i386/ilp32/x86-64-nops.d: Remove 0x0f1c
	NOP encoding that maps to cldemote.
	* testsuite/gas/i386/nops.d: Likewise.
	* testsuite/gas/i386/nops.s: Likewise.
	* testsuite/gas/i386/x86-64-nops.d: Likewise.
	* testsuite/gas/i386/x86-64-nops.s: Likewise.

opcode/
	* i386-dis.c: Add REG_0F1C_MOD_0, MOD_0F1C_PREFIX_0,
	PREFIX_0F1C.
	* i386-gen.c (cpu_flag_init): Add CPU_CLDEMOTE_FLAGS,
	(cpu_flags): Add CpuCLDEMOTE.
	* i386-init.h: Regenerate.
	* i386-opc.h (enum): Add CpuCLDEMOTE,
	(i386_cpu_flags): Add cpucldemote.
	* i386-opc.tbl: Add cldemote.
	* i386-tbl.h: Regenerate.
This commit is contained in:
Igor Tsimbalist 2018-04-16 23:09:01 +02:00
parent f954747f10
commit c48935d75f
22 changed files with 5410 additions and 5230 deletions

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@ -1,3 +1,21 @@
2018-04-17 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
* config/tc-i386.c (cpu_arch): Add .cldemote.
* doc/c-i386.texi: Document cldemote/.cldemote.
* testsuite/gas/i386/cldemote-intel.d: New.
* testsuite/gas/i386/cldemote.d: Likewise.
* testsuite/gas/i386/cldemote.s: Likewise.
* testsuite/gas/i386/i386.exp: Run new tests.
* testsuite/gas/i386/x86-64-cldemote-intel.d: New.
* testsuite/gas/i386/x86-64-cldemote.d: Likewise.
* testsuite/gas/i386/x86-64-cldemote.s: Likewise.
* testsuite/gas/i386/ilp32/x86-64-nops.d: Remove 0x0f1c
NOP encoding that maps to cldemote.
* testsuite/gas/i386/nops.d: Likewise.
* testsuite/gas/i386/nops.s: Likewise.
* testsuite/gas/i386/x86-64-nops.d: Likewise.
* testsuite/gas/i386/x86-64-nops.s: Likewise.
2018-04-16 Nick Clifton <nickc@redhat.com>
PR 23054

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@ -1027,6 +1027,8 @@ static const arch_entry cpu_arch[] =
CPU_PCONFIG_FLAGS, 0 },
{ STRING_COMMA_LEN (".waitpkg"), PROCESSOR_UNKNOWN,
CPU_WAITPKG_FLAGS, 0 },
{ STRING_COMMA_LEN (".cldemote"), PROCESSOR_UNKNOWN,
CPU_CLDEMOTE_FLAGS, 0 },
};
static const noarch_entry cpu_noarch[] =

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@ -232,6 +232,7 @@ accept various extension mnemonics. For example,
@code{wbnoinvd},
@code{pconfig},
@code{waitpkg},
@code{cldemote},
@code{lwp},
@code{fma4},
@code{xop},
@ -1273,7 +1274,7 @@ supported on the CPU specified. The choices for @var{cpu_type} are:
@item @samp{.avx512_vpopcntdq} @tab @samp{.avx512_vbmi2} @tab @samp{.avx512_vnni}
@item @samp{.avx512_bitalg}
@item @samp{.clwb} @tab @samp{.rdpid} @tab @samp{.ptwrite} @tab @item @samp{.ibt}
@item @samp{.wbnoinvd} @tab @samp{.pconfig} @tab @samp{.waitpkg}
@item @samp{.wbnoinvd} @tab @samp{.pconfig} @tab @samp{.waitpkg} @tab @samp{.cldemote}
@item @samp{.shstk} @tab @samp{.gfni} @tab @samp{.vaes} @tab @samp{.vpclmulqdq}
@item @samp{.3dnow} @tab @samp{.3dnowa} @tab @samp{.sse4a} @tab @samp{.sse5}
@item @samp{.syscall} @tab @samp{.rdtscp} @tab @samp{.svme} @tab @samp{.abm}

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@ -0,0 +1,16 @@
#as:
#objdump: -dw -Mintel
#name: i386 CLDEMOTE insns (Intel disassembly)
#source: cldemote.s
.*: +file format .*
Disassembly of section \.text:
00000000 <_start>:
[ ]*[a-f0-9]+:[ ]*0f 1c 01[ ]*cldemote BYTE PTR \[ecx\]
[ ]*[a-f0-9]+:[ ]*0f 1c 84 f4 c0 1d fe ff[ ]*cldemote BYTE PTR \[esp\+esi\*8-0x1e240\]
[ ]*[a-f0-9]+:[ ]*0f 1c 01[ ]*cldemote BYTE PTR \[ecx\]
[ ]*[a-f0-9]+:[ ]*0f 1c 84 f4 c0 1d fe ff[ ]*cldemote BYTE PTR \[esp\+esi\*8-0x1e240\]
#pass

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@ -0,0 +1,16 @@
#as:
#objdump: -dw
#name: i386 CLDEMOTE insns
#source: cldemote.s
.*: +file format .*
Disassembly of section \.text:
00000000 <_start>:
[ ]*[a-f0-9]+:[ ]*0f 1c 01[ ]*cldemote \(%ecx\)
[ ]*[a-f0-9]+:[ ]*0f 1c 84 f4 c0 1d fe ff[ ]*cldemote -0x1e240\(%esp,%esi,8\)
[ ]*[a-f0-9]+:[ ]*0f 1c 01[ ]*cldemote \(%ecx\)
[ ]*[a-f0-9]+:[ ]*0f 1c 84 f4 c0 1d fe ff[ ]*cldemote -0x1e240\(%esp,%esi,8\)
#pass

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@ -0,0 +1,12 @@
# Check 32bit CLDEMOTE instructions
.allow_index_reg
.text
_start:
cldemote (%ecx)
cldemote -123456(%esp,%esi,8)
.intel_syntax noprefix
cldemote BYTE PTR [ecx]
cldemote BYTE PTR [esp+esi*8-123456]

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@ -424,6 +424,8 @@ if [expr ([istarget "i*86-*-*"] || [istarget "x86_64-*-*"]) && [gas_32_check]]
run_dump_test "pconfig-intel"
run_dump_test "waitpkg"
run_dump_test "waitpkg-intel"
run_dump_test "cldemote"
run_dump_test "cldemote-intel"
run_list_test "avx512vl-1" "-al"
run_list_test "avx512vl-2" "-al"
run_list_test "avx512vl-plain" "-al"
@ -914,6 +916,8 @@ if [expr ([istarget "i*86-*-*"] || [istarget "x86_64-*-*"]) && [gas_64_check]] t
run_dump_test "x86-64-pconfig-intel"
run_dump_test "x86-64-waitpkg"
run_dump_test "x86-64-waitpkg-intel"
run_dump_test "x86-64-cldemote"
run_dump_test "x86-64-cldemote-intel"
run_dump_test "x86-64-fence-as-lock-add-yes"
run_dump_test "x86-64-fence-as-lock-add-no"
run_dump_test "x86-64-pr20141"

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@ -33,12 +33,10 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: 0f 1e 9c 1d 11 22 33 44 nopl 0x44332211\(%rbp,%rbx,1\)
[ ]*[a-f0-9]+: 0f 1f 9c 1d 11 22 33 44 nopl 0x44332211\(%rbp,%rbx,1\)
[ ]*[a-f0-9]+: 0f 19 04 60 nopl \(%rax,%riz,2\)
[ ]*[a-f0-9]+: 0f 1c 04 60 nopl \(%rax,%riz,2\)
[ ]*[a-f0-9]+: 0f 1d 04 60 nopl \(%rax,%riz,2\)
[ ]*[a-f0-9]+: 0f 1e 04 60 nopl \(%rax,%riz,2\)
[ ]*[a-f0-9]+: 0f 1f 04 60 nopl \(%rax,%riz,2\)
[ ]*[a-f0-9]+: 0f 19 04 59 nopl \(%rcx,%rbx,2\)
[ ]*[a-f0-9]+: 0f 1c 04 59 nopl \(%rcx,%rbx,2\)
[ ]*[a-f0-9]+: 0f 1d 04 59 nopl \(%rcx,%rbx,2\)
[ ]*[a-f0-9]+: 0f 1e 04 59 nopl \(%rcx,%rbx,2\)
[ ]*[a-f0-9]+: 0f 1f 04 59 nopl \(%rcx,%rbx,2\)

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@ -32,12 +32,10 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: 0f 1e 9c 1d 11 22 33 44 nopl 0x44332211\(%ebp,%ebx,1\)
[ ]*[a-f0-9]+: 0f 1f 9c 1d 11 22 33 44 nopl 0x44332211\(%ebp,%ebx,1\)
[ ]*[a-f0-9]+: 0f 19 04 60 nopl \(%eax,%eiz,2\)
[ ]*[a-f0-9]+: 0f 1c 04 60 nopl \(%eax,%eiz,2\)
[ ]*[a-f0-9]+: 0f 1d 04 60 nopl \(%eax,%eiz,2\)
[ ]*[a-f0-9]+: 0f 1e 04 60 nopl \(%eax,%eiz,2\)
[ ]*[a-f0-9]+: 0f 1f 04 60 nopl \(%eax,%eiz,2\)
[ ]*[a-f0-9]+: 0f 19 04 59 nopl \(%ecx,%ebx,2\)
[ ]*[a-f0-9]+: 0f 1c 04 59 nopl \(%ecx,%ebx,2\)
[ ]*[a-f0-9]+: 0f 1d 04 59 nopl \(%ecx,%ebx,2\)
[ ]*[a-f0-9]+: 0f 1e 04 59 nopl \(%ecx,%ebx,2\)
[ ]*[a-f0-9]+: 0f 1f 04 59 nopl \(%ecx,%ebx,2\)

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@ -33,13 +33,13 @@
.byte 0x0f, 0x1f, 0x9C, 0x1D, 0x11, 0x22, 0x33, 0x44
.byte 0x0f, 0x19, 0x04, 0x60
.byte 0x0f, 0x1c, 0x04, 0x60
# .byte 0x0f, 0x1c, 0x04, 0x60 Now it became cldemote (%eax,%eiz,2)
.byte 0x0f, 0x1d, 0x04, 0x60
.byte 0x0f, 0x1e, 0x04, 0x60
.byte 0x0f, 0x1f, 0x04, 0x60
.byte 0x0f, 0x19, 0x04, 0x59
.byte 0x0f, 0x1c, 0x04, 0x59
# .byte 0x0f, 0x1c, 0x04, 0x59 Now it became cldemote (%eax,%ebx,2)
.byte 0x0f, 0x1d, 0x04, 0x59
.byte 0x0f, 0x1e, 0x04, 0x59
.byte 0x0f, 0x1f, 0x04, 0x59

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@ -0,0 +1,16 @@
#as:
#objdump: -dw -Mintel
#name: x86_64 CLDEMOTE insns (Intel disassembly)
#source: x86-64-cldemote.s
.*: +file format .*
Disassembly of section \.text:
0+ <_start>:
[ ]*[a-f0-9]+:[ ]*0f 1c 01[ ]*cldemote BYTE PTR \[rcx\]
[ ]*[a-f0-9]+:[ ]*42 0f 1c 84 f0 23 01 00 00[ ]*cldemote BYTE PTR \[rax\+r14\*8\+0x123\]
[ ]*[a-f0-9]+:[ ]*0f 1c 01[ ]*cldemote BYTE PTR \[rcx\]
[ ]*[a-f0-9]+:[ ]*42 0f 1c 84 f0 34 12 00 00[ ]*cldemote BYTE PTR \[rax\+r14\*8\+0x1234\]
#pass

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@ -0,0 +1,16 @@
#as:
#objdump: -dw
#name: x86_64 CLDEMOTE insns
#source: x86-64-cldemote.s
.*: +file format .*
Disassembly of section \.text:
0+ <_start>:
[ ]*[a-f0-9]+:[ ]*0f 1c 01[ ]*cldemote \(%rcx\)
[ ]*[a-f0-9]+:[ ]*42 0f 1c 84 f0 23 01 00 00[ ]*cldemote 0x123\(%rax,%r14,8\)
[ ]*[a-f0-9]+:[ ]*0f 1c 01[ ]*cldemote \(%rcx\)
[ ]*[a-f0-9]+:[ ]*42 0f 1c 84 f0 34 12 00 00[ ]*cldemote 0x1234\(%rax,%r14,8\)
#pass

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@ -0,0 +1,12 @@
# Check 64bit CLDEMOTE instructions
.allow_index_reg
.text
_start:
cldemote (%rcx)
cldemote 0x123(%rax,%r14,8)
.intel_syntax noprefix
cldemote BYTE PTR [rcx]
cldemote BYTE PTR [rax+r14*8+0x1234]

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@ -32,12 +32,10 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: 0f 1e 9c 1d 11 22 33 44 nopl 0x44332211\(%rbp,%rbx,1\)
[ ]*[a-f0-9]+: 0f 1f 9c 1d 11 22 33 44 nopl 0x44332211\(%rbp,%rbx,1\)
[ ]*[a-f0-9]+: 0f 19 04 60 nopl \(%rax,%riz,2\)
[ ]*[a-f0-9]+: 0f 1c 04 60 nopl \(%rax,%riz,2\)
[ ]*[a-f0-9]+: 0f 1d 04 60 nopl \(%rax,%riz,2\)
[ ]*[a-f0-9]+: 0f 1e 04 60 nopl \(%rax,%riz,2\)
[ ]*[a-f0-9]+: 0f 1f 04 60 nopl \(%rax,%riz,2\)
[ ]*[a-f0-9]+: 0f 19 04 59 nopl \(%rcx,%rbx,2\)
[ ]*[a-f0-9]+: 0f 1c 04 59 nopl \(%rcx,%rbx,2\)
[ ]*[a-f0-9]+: 0f 1d 04 59 nopl \(%rcx,%rbx,2\)
[ ]*[a-f0-9]+: 0f 1e 04 59 nopl \(%rcx,%rbx,2\)
[ ]*[a-f0-9]+: 0f 1f 04 59 nopl \(%rcx,%rbx,2\)

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@ -33,13 +33,13 @@
.byte 0x0f, 0x1f, 0x9C, 0x1D, 0x11, 0x22, 0x33, 0x44
.byte 0x0f, 0x19, 0x04, 0x60
.byte 0x0f, 0x1c, 0x04, 0x60
# .byte 0x0f, 0x1c, 0x04, 0x60 Now it became cldemote (%rcx,%riz,2)
.byte 0x0f, 0x1d, 0x04, 0x60
.byte 0x0f, 0x1e, 0x04, 0x60
.byte 0x0f, 0x1f, 0x04, 0x60
.byte 0x0f, 0x19, 0x04, 0x59
.byte 0x0f, 0x1c, 0x04, 0x59
# .byte 0x0f, 0x1c, 0x04, 0x59 Now it became cldemote (%rcx,%rbx,2)
.byte 0x0f, 0x1d, 0x04, 0x59
.byte 0x0f, 0x1e, 0x04, 0x59
.byte 0x0f, 0x1f, 0x04, 0x59

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@ -1,3 +1,15 @@
2018-04-17 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
* i386-dis.c: Add REG_0F1C_MOD_0, MOD_0F1C_PREFIX_0,
PREFIX_0F1C.
* i386-gen.c (cpu_flag_init): Add CPU_CLDEMOTE_FLAGS,
(cpu_flags): Add CpuCLDEMOTE.
* i386-init.h: Regenerate.
* i386-opc.h (enum): Add CpuCLDEMOTE,
(i386_cpu_flags): Add cpucldemote.
* i386-opc.tbl: Add cldemote.
* i386-tbl.h: Regenerate.
2018-04-16 Alan Modra <amodra@gmail.com>
* Makefile.am: Remove sh5 and sh64 support.

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@ -738,6 +738,7 @@ enum
REG_0F01,
REG_0F0D,
REG_0F18,
REG_0F1C_MOD_0,
REG_0F1E_MOD_3,
REG_0F71,
REG_0F72,
@ -792,6 +793,7 @@ enum
MOD_0F1A_PREFIX_0,
MOD_0F1B_PREFIX_0,
MOD_0F1B_PREFIX_1,
MOD_0F1C_PREFIX_0,
MOD_0F1E_PREFIX_1,
MOD_0F24,
MOD_0F26,
@ -970,6 +972,7 @@ enum
PREFIX_0F16,
PREFIX_0F1A,
PREFIX_0F1B,
PREFIX_0F1C,
PREFIX_0F1E,
PREFIX_0F2A,
PREFIX_0F2B,
@ -2898,7 +2901,7 @@ static const struct dis386 dis386_twobyte[] = {
{ "nopQ", { Ev }, 0 },
{ PREFIX_TABLE (PREFIX_0F1A) },
{ PREFIX_TABLE (PREFIX_0F1B) },
{ "nopQ", { Ev }, 0 },
{ PREFIX_TABLE (PREFIX_0F1C) },
{ "nopQ", { Ev }, 0 },
{ PREFIX_TABLE (PREFIX_0F1E) },
{ "nopQ", { Ev }, 0 },
@ -3650,6 +3653,17 @@ static const struct dis386 reg_table[][8] = {
{ MOD_TABLE (MOD_0F18_REG_6) },
{ MOD_TABLE (MOD_0F18_REG_7) },
},
/* REG_0F1C_MOD_0 */
{
{ "cldemote", { Mb }, 0 },
{ "nopQ", { Ev }, 0 },
{ "nopQ", { Ev }, 0 },
{ "nopQ", { Ev }, 0 },
{ "nopQ", { Ev }, 0 },
{ "nopQ", { Ev }, 0 },
{ "nopQ", { Ev }, 0 },
{ "nopQ", { Ev }, 0 },
},
/* REG_0F1E_MOD_3 */
{
{ "nopQ", { Ev }, 0 },
@ -3901,6 +3915,14 @@ static const struct dis386 prefix_table[][4] = {
{ "bndcn", { Gbnd, Ev_bnd }, 0 },
},
/* PREFIX_0F1C */
{
{ MOD_TABLE (MOD_0F1C_PREFIX_0) },
{ "nopQ", { Ev }, PREFIX_OPCODE },
{ "nopQ", { Ev }, PREFIX_OPCODE },
{ "nopQ", { Ev }, PREFIX_OPCODE },
},
/* PREFIX_0F1E */
{
{ "nopQ", { Ev }, PREFIX_OPCODE },
@ -11620,6 +11642,11 @@ static const struct dis386 mod_table[][2] = {
{ "bndmk", { Gbnd, Ev_bnd }, 0 },
{ "nopQ", { Ev }, 0 },
},
{
/* MOD_0F1C_PREFIX_0 */
{ REG_TABLE (REG_0F1C_MOD_0) },
{ "nopQ", { Ev }, 0 },
},
{
/* MOD_0F1E_PREFIX_1 */
{ "nopQ", { Ev }, 0 },

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@ -285,6 +285,8 @@ static initializer cpu_flag_init[] =
"CpuPCONFIG" },
{ "CPU_WAITPKG_FLAGS",
"CpuWAITPKG" },
{ "CPU_CLDEMOTE_FLAGS",
"CpuCLDEMOTE" },
{ "CPU_ANY_X87_FLAGS",
"CPU_ANY_287_FLAGS|Cpu8087" },
{ "CPU_ANY_287_FLAGS",
@ -578,6 +580,7 @@ static bitfield cpu_flags[] =
BITFIELD (CpuWBNOINVD),
BITFIELD (CpuPCONFIG),
BITFIELD (CpuWAITPKG),
BITFIELD (CpuCLDEMOTE),
BITFIELD (CpuRegMMX),
BITFIELD (CpuRegXMM),
BITFIELD (CpuRegYMM),

File diff suppressed because it is too large Load Diff

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@ -229,6 +229,8 @@ enum
CpuPCONFIG,
/* WAITPKG instructions required */
CpuWAITPKG,
/* CLDEMOTE instruction required */
CpuCLDEMOTE,
/* MMX register support required */
CpuRegMMX,
/* XMM register support required */
@ -361,6 +363,7 @@ typedef union i386_cpu_flags
unsigned int cpuwbnoinvd:1;
unsigned int cpupconfig:1;
unsigned int cpuwaitpkg:1;
unsigned int cpucldemote:1;
unsigned int cpuregmmx:1;
unsigned int cpuregxmm:1;
unsigned int cpuregymm:1;

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@ -5909,3 +5909,9 @@ tpause, 1, 0x660fae, 0x6, 2, CpuWAITPKG, Modrm|No_bSuf|No_wSuf|No_lSuf|No_sSuf|N
umwait, 1, 0xf20fae, 0x6, 2, CpuWAITPKG, Modrm|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|NoRex64, { Reg32|Reg64 }
// WAITPKG instructions end.
// CLDEMOTE instructions.
cldemote, 1, 0x0f1c, 0x0, 2, CpuCLDEMOTE, Modrm|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Anysize|BaseIndex }
// CLDEMOTE instructions end.

File diff suppressed because it is too large Load Diff