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* bfd/elf32-arm.c (v8): New array.
(tag_cpu_arch_combine): Add support for ARMv8 attributes. (elf32_arm_merge_eabi_attributes): Likewise. (VFP_VERSION_COUNT): New define. * binutils/readelf.c (arm_attr_tag_CPU_arch): Update for ARMv8. (arm_attr_tag_FP_arch): Likewise. (arm_attr_tag_Advanced_SIMD_arch): Likewise. * gas/config/tc-arm.h (arm_ext_v8): New variable. (fpu_vfp_ext_armv8): Likewise. (fpu_neon_ext_armv8): Likewise. (fpu_crypto_ext_armv8): Likewise. (arm_archs): Add armv8-a. (arm_extensions): Add crypto, fp, and simd. (arm_fpus): Add fp-armv8, neon-fp-armv8, crypto-neon-fp-armv8. (cpu_arch_ver): Add support for ARMv8. (aeabi_set_public_sttributes): Likewise. * gas/doc/c-arm.texi (ARM Options): Document new architecture and extension options for ARMv8. * gas/testsuite/gas/arm/attr-march-all.d: Update for change in expected output. * gas/testsuite/gas/arm/attr-mfpu-vfpv4-d16.d: Likewise. * gas/testsuite/gas/arm/attr-mfpu-vfpv4.d: Likewise. * gas/testsuite/gas/arm/attr-march-armv8-a+crypto.d: New testcase. * gas/testsuite/gas/arm/attr-march-armv8-a+fp.d: Likewise. * gas/testsuite/gas/arm/attr-march-armv8-a+simd.d: Likewise. * gas/testsuite/gas/arm/attr-march-armv8-a.d: Likewise. * include/elf/arm.h (TAG_CPU_ARCH_V8): New define. (MAX_TAG_CPU_ARCH): Update. * include/opcode/arm.h (ARM_EXT_V8): New define. (FPU_VFP_EXT_ARMV8): Likewise. (FPU_NEON_EXT_ARMV8): Likewise. (FPU_CRYPTO_EXT_ARMV8): Likewise. (ARM_AEXT_V8A): Likewise. (FPU_VFP_ARMV8): Likwise. (FPU_NEON_ARMV8): Likewise. (FPU_CRYPTO_ARMV8): Likewise. (FPU_ARCH_VFP_ARMV8): Likewise. (FPU_ARCH_NEON_VFP_ARMV8): Likewise. (FPU_ARCH_CRYPTO_NEON_VFP_ARMV8): Likewise. (ARM_ARCH_V8A): Likwise. (ARM_ARCH_V8A_FP): Likewise. (ARM_ARCH_V8A_SIMD): Likewise. (ARM_ARCH_V8A_CRYPTO): Likewise. * ld/testsuite/ld-arm/arm-elf.exp: Add new testcases. * ld/testsuite/ld-arm/attr-merge-vfp-3.d: Update for change in expected output. * ld/testsuite/ld-arm/attr-merge-vfp-3r.d: Likewise. * ld/testsuite/ld-arm/attr-merge-vfp-4.d: Likewise. * ld/testsuite/ld-arm/attr-merge-vfp-4r.d: Likewise. * ld/testsuite/ld-arm/attr-merge-vfp-5.d: Likewise. * ld/testsuite/ld-arm/attr-merge-vfp-5r.d: Likewise. * ld/testsuite/ld-arm/attr-merge-vfp-7.d: New testcase. * ld/testsuite/ld-arm/attr-merge-vfp-7r.d: Likewise. * ld/testsuite/ld-arm/attr-merge-vfp-armv8-hard.s: Likewise. * ld/testsuite/ld-arm/attr-merge-vfp-armv8.s: Likewise.
This commit is contained in:
Matthew Gretton-Dann
parent
ecfb0d68c5
commit
bca3892142
@ -1,3 +1,10 @@
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2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
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* elf32-arm.c (v8): New array.
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(tag_cpu_arch_combine): Add support for ARMv8 attributes.
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(elf32_arm_merge_eabi_attributes): Likewise.
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(VFP_VERSION_COUNT): New define.
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2012-08-20 Tom Tromey <tromey@redhat.com>
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* vms-lib.c (_bfd_vms_lib_get_module): Use bfd_zmalloc for
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@ -11327,6 +11327,24 @@ tag_cpu_arch_combine (bfd *ibfd, int oldtag, int *secondary_compat_out,
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T(V7E_M), /* V6S_M. */
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T(V7E_M) /* V7E_M. */
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};
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const int v8[] =
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{
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T(V8), /* PRE_V4. */
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T(V8), /* V4. */
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T(V8), /* V4T. */
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T(V8), /* V5T. */
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T(V8), /* V5TE. */
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T(V8), /* V5TEJ. */
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T(V8), /* V6. */
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T(V8), /* V6KZ. */
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T(V8), /* V6T2. */
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T(V8), /* V6K. */
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T(V8), /* V7. */
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T(V8), /* V6_M. */
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T(V8), /* V6S_M. */
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T(V8), /* V7E_M. */
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T(V8) /* V8. */
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};
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const int v4t_plus_v6_m[] =
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{
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-1, /* PRE_V4. */
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@ -11343,6 +11361,7 @@ tag_cpu_arch_combine (bfd *ibfd, int oldtag, int *secondary_compat_out,
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T(V6_M), /* V6_M. */
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T(V6S_M), /* V6S_M. */
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T(V7E_M), /* V7E_M. */
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T(V8), /* V8. */
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T(V4T_PLUS_V6_M) /* V4T plus V6_M. */
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};
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const int *comb[] =
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@ -11353,6 +11372,7 @@ tag_cpu_arch_combine (bfd *ibfd, int oldtag, int *secondary_compat_out,
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v6_m,
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v6s_m,
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v7e_m,
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v8,
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/* Pseudo-architecture. */
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v4t_plus_v6_m
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};
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@ -11554,7 +11574,8 @@ elf32_arm_merge_eabi_attributes (bfd *ibfd, bfd *obfd)
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"ARM v6K",
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"ARM v7",
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"ARM v6-M",
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"ARM v6S-M"
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"ARM v6S-M",
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"ARM v8"
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};
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/* Merge Tag_CPU_arch and Tag_also_compatible_with. */
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@ -11699,11 +11720,12 @@ elf32_arm_merge_eabi_attributes (bfd *ibfd, bfd *obfd)
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when it's 0. It might mean absence of FP hardware if
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Tag_FP_arch is zero, otherwise it is effectively SP + DP. */
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#define VFP_VERSION_COUNT 8
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static const struct
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{
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int ver;
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int regs;
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} vfp_versions[7] =
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} vfp_versions[VFP_VERSION_COUNT] =
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{
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{0, 0},
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{1, 16},
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@ -11711,7 +11733,8 @@ elf32_arm_merge_eabi_attributes (bfd *ibfd, bfd *obfd)
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{3, 32},
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{3, 16},
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{4, 32},
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{4, 16}
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{4, 16},
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{8, 32}
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};
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int ver;
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int regs;
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@ -11751,9 +11774,10 @@ elf32_arm_merge_eabi_attributes (bfd *ibfd, bfd *obfd)
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/* Now we can handle Tag_FP_arch. */
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/* Values greater than 6 aren't defined, so just pick the
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biggest */
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if (in_attr[i].i > 6 && in_attr[i].i > out_attr[i].i)
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/* Values of VFP_VERSION_COUNT or more aren't defined, so just
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pick the biggest. */
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if (in_attr[i].i >= VFP_VERSION_COUNT
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&& in_attr[i].i > out_attr[i].i)
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{
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out_attr[i] = in_attr[i];
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break;
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@ -11768,7 +11792,7 @@ elf32_arm_merge_eabi_attributes (bfd *ibfd, bfd *obfd)
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regs = vfp_versions[out_attr[i].i].regs;
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/* This assumes all possible supersets are also a valid
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options. */
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for (newval = 6; newval > 0; newval--)
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for (newval = VFP_VERSION_COUNT - 1; newval > 0; newval--)
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{
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if (regs == vfp_versions[newval].regs
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&& ver == vfp_versions[newval].ver)
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@ -1,3 +1,9 @@
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2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
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* readelf.c (arm_attr_tag_CPU_arch): Update for ARMv8.
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(arm_attr_tag_FP_arch): Likewise.
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(arm_attr_tag_Advanced_SIMD_arch): Likewise.
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2012-08-17 Yuri Chornoivan <yurchor@ukr.net>
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* doc/binutils.texi, * objdump.c, * od-xcoff.c: Typo fixes.
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@ -10868,15 +10868,16 @@ typedef struct
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static const char * arm_attr_tag_CPU_arch[] =
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{"Pre-v4", "v4", "v4T", "v5T", "v5TE", "v5TEJ", "v6", "v6KZ", "v6T2",
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"v6K", "v7", "v6-M", "v6S-M", "v7E-M"};
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"v6K", "v7", "v6-M", "v6S-M", "v7E-M", "v8"};
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static const char * arm_attr_tag_ARM_ISA_use[] = {"No", "Yes"};
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static const char * arm_attr_tag_THUMB_ISA_use[] =
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{"No", "Thumb-1", "Thumb-2"};
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static const char * arm_attr_tag_FP_arch[] =
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{"No", "VFPv1", "VFPv2", "VFPv3", "VFPv3-D16", "VFPv4", "VFPv4-D16"};
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{"No", "VFPv1", "VFPv2", "VFPv3", "VFPv3-D16", "VFPv4", "VFPv4-D16",
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"FP for ARMv8"};
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static const char * arm_attr_tag_WMMX_arch[] = {"No", "WMMXv1", "WMMXv2"};
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static const char * arm_attr_tag_Advanced_SIMD_arch[] =
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{"No", "NEONv1", "NEONv1 with Fused-MAC"};
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{"No", "NEONv1", "NEONv1 with Fused-MAC", "NEON for ARMv8"};
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static const char * arm_attr_tag_PCS_config[] =
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{"None", "Bare platform", "Linux application", "Linux DSO", "PalmOS 2004",
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"PalmOS (reserved)", "SymbianOS 2004", "SymbianOS (reserved)"};
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@ -1,3 +1,17 @@
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2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
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* config/tc-arm.h (arm_ext_v8): New variable.
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(fpu_vfp_ext_armv8): Likewise.
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(fpu_neon_ext_armv8): Likewise.
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(fpu_crypto_ext_armv8): Likewise.
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(arm_archs): Add armv8-a.
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(arm_extensions): Add crypto, fp, and simd.
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(arm_fpus): Add fp-armv8, neon-fp-armv8, crypto-neon-fp-armv8.
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(cpu_arch_ver): Add support for ARMv8.
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(aeabi_set_public_sttributes): Likewise.
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* doc/c-arm.texi (ARM Options): Document new architecture and
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extension options for ARMv8.
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2012-08-20 H.J. Lu <hongjiu.lu@intel.com>
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* doc/as.texinfo: Replace --n32 with --x32.
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@ -195,6 +195,7 @@ static const arm_feature_set arm_ext_v7 = ARM_FEATURE (ARM_EXT_V7, 0);
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static const arm_feature_set arm_ext_v7a = ARM_FEATURE (ARM_EXT_V7A, 0);
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static const arm_feature_set arm_ext_v7r = ARM_FEATURE (ARM_EXT_V7R, 0);
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static const arm_feature_set arm_ext_v7m = ARM_FEATURE (ARM_EXT_V7M, 0);
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static const arm_feature_set arm_ext_v8 = ARM_FEATURE (ARM_EXT_V8, 0);
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static const arm_feature_set arm_ext_m =
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ARM_FEATURE (ARM_EXT_V6M | ARM_EXT_OS | ARM_EXT_V7M, 0);
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static const arm_feature_set arm_ext_mp = ARM_FEATURE (ARM_EXT_MP, 0);
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@ -233,6 +234,12 @@ static const arm_feature_set fpu_vfp_v3_or_neon_ext =
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static const arm_feature_set fpu_vfp_fp16 = ARM_FEATURE (0, FPU_VFP_EXT_FP16);
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static const arm_feature_set fpu_neon_ext_fma = ARM_FEATURE (0, FPU_NEON_EXT_FMA);
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static const arm_feature_set fpu_vfp_ext_fma = ARM_FEATURE (0, FPU_VFP_EXT_FMA);
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static const arm_feature_set fpu_vfp_ext_armv8 =
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ARM_FEATURE (0, FPU_VFP_EXT_ARMV8);
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static const arm_feature_set fpu_neon_ext_armv8 =
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ARM_FEATURE (0, FPU_NEON_EXT_ARMV8);
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static const arm_feature_set fpu_crypto_ext_armv8 =
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ARM_FEATURE (0, FPU_CRYPTO_EXT_ARMV8);
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static int mfloat_abi_opt = -1;
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/* Record user cpu selection for object attributes. */
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@ -23188,6 +23195,7 @@ static const struct arm_arch_option_table arm_archs[] =
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ARM_ARCH_OPT ("armv7-r", ARM_ARCH_V7R, FPU_ARCH_VFP),
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ARM_ARCH_OPT ("armv7-m", ARM_ARCH_V7M, FPU_ARCH_VFP),
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ARM_ARCH_OPT ("armv7e-m", ARM_ARCH_V7EM, FPU_ARCH_VFP),
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ARM_ARCH_OPT ("armv8-a", ARM_ARCH_V8A, FPU_ARCH_VFP),
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ARM_ARCH_OPT ("xscale", ARM_ARCH_XSCALE, FPU_ARCH_VFP),
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ARM_ARCH_OPT ("iwmmxt", ARM_ARCH_IWMMXT, FPU_ARCH_VFP),
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ARM_ARCH_OPT ("iwmmxt2", ARM_ARCH_IWMMXT2,FPU_ARCH_VFP),
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@ -23209,6 +23217,10 @@ struct arm_option_extension_value_table
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#define ARM_EXT_OPT(N, V, AA) { N, sizeof (N) - 1, V, AA }
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static const struct arm_option_extension_value_table arm_extensions[] =
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{
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ARM_EXT_OPT ("crypto", FPU_ARCH_CRYPTO_NEON_VFP_ARMV8,
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ARM_FEATURE (ARM_EXT_V8, 0)),
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ARM_EXT_OPT ("fp", FPU_ARCH_VFP_ARMV8,
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ARM_FEATURE (ARM_EXT_V8, 0)),
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ARM_EXT_OPT ("idiv", ARM_FEATURE (ARM_EXT_ADIV | ARM_EXT_DIV, 0),
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ARM_FEATURE (ARM_EXT_V7A | ARM_EXT_V7R, 0)),
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ARM_EXT_OPT ("iwmmxt",ARM_FEATURE (0, ARM_CEXT_IWMMXT), ARM_ANY),
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@ -23218,6 +23230,8 @@ static const struct arm_option_extension_value_table arm_extensions[] =
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ARM_FEATURE (0, ARM_CEXT_MAVERICK), ARM_ANY),
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ARM_EXT_OPT ("mp", ARM_FEATURE (ARM_EXT_MP, 0),
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ARM_FEATURE (ARM_EXT_V7A | ARM_EXT_V7R, 0)),
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ARM_EXT_OPT ("simd", FPU_ARCH_NEON_VFP_ARMV8,
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ARM_FEATURE (ARM_EXT_V8, 0)),
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ARM_EXT_OPT ("os", ARM_FEATURE (ARM_EXT_OS, 0),
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ARM_FEATURE (ARM_EXT_V6M, 0)),
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ARM_EXT_OPT ("sec", ARM_FEATURE (ARM_EXT_SEC, 0),
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@ -23275,6 +23289,10 @@ static const struct arm_option_fpu_value_table arm_fpus[] =
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{"vfpv4-d16", FPU_ARCH_VFP_V4D16},
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{"fpv4-sp-d16", FPU_ARCH_VFP_V4_SP_D16},
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{"neon-vfpv4", FPU_ARCH_NEON_VFP_V4},
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{"fp-armv8", FPU_ARCH_VFP_ARMV8},
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{"neon-fp-armv8", FPU_ARCH_NEON_VFP_ARMV8},
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{"crypto-neon-fp-armv8",
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FPU_ARCH_CRYPTO_NEON_VFP_ARMV8},
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{NULL, ARM_ARCH_NONE}
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};
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@ -23749,9 +23767,10 @@ static const cpu_arch_ver_table cpu_arch_ver[] =
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{11, ARM_ARCH_V6M},
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{12, ARM_ARCH_V6SM},
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{8, ARM_ARCH_V6T2},
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{10, ARM_ARCH_V7A},
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{10, ARM_ARCH_V7A_IDIV_MP_SEC_VIRT},
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{10, ARM_ARCH_V7R},
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{10, ARM_ARCH_V7M},
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{14, ARM_ARCH_V8A},
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{0, ARM_ARCH_NONE}
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};
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@ -23781,6 +23800,7 @@ aeabi_set_public_attributes (void)
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int arch;
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char profile;
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int virt_sec = 0;
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int fp16_optional = 0;
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arm_feature_set flags;
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arm_feature_set tmp;
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const cpu_arch_ver_table *p;
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@ -23880,14 +23900,22 @@ aeabi_set_public_attributes (void)
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ARM_CPU_HAS_FEATURE (flags, arm_arch_t2) ? 2 : 1);
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/* Tag_VFP_arch. */
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if (ARM_CPU_HAS_FEATURE (flags, fpu_vfp_ext_fma))
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if (ARM_CPU_HAS_FEATURE (flags, fpu_vfp_ext_armv8))
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aeabi_set_attribute_int (Tag_VFP_arch, 7);
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else if (ARM_CPU_HAS_FEATURE (flags, fpu_vfp_ext_fma))
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aeabi_set_attribute_int (Tag_VFP_arch,
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ARM_CPU_HAS_FEATURE (flags, fpu_vfp_ext_d32)
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? 5 : 6);
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else if (ARM_CPU_HAS_FEATURE (flags, fpu_vfp_ext_d32))
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aeabi_set_attribute_int (Tag_VFP_arch, 3);
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{
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fp16_optional = 1;
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aeabi_set_attribute_int (Tag_VFP_arch, 3);
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}
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else if (ARM_CPU_HAS_FEATURE (flags, fpu_vfp_ext_v3xd))
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aeabi_set_attribute_int (Tag_VFP_arch, 4);
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{
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aeabi_set_attribute_int (Tag_VFP_arch, 4);
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fp16_optional = 1;
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}
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else if (ARM_CPU_HAS_FEATURE (flags, fpu_vfp_ext_v2))
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aeabi_set_attribute_int (Tag_VFP_arch, 2);
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else if (ARM_CPU_HAS_FEATURE (flags, fpu_vfp_ext_v1)
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@ -23906,13 +23934,23 @@ aeabi_set_public_attributes (void)
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aeabi_set_attribute_int (Tag_WMMX_arch, 1);
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/* Tag_Advanced_SIMD_arch (formerly Tag_NEON_arch). */
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if (ARM_CPU_HAS_FEATURE (flags, fpu_neon_ext_v1))
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aeabi_set_attribute_int
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(Tag_Advanced_SIMD_arch, (ARM_CPU_HAS_FEATURE (flags, fpu_neon_ext_fma)
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? 2 : 1));
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if (ARM_CPU_HAS_FEATURE (flags, fpu_neon_ext_armv8))
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aeabi_set_attribute_int (Tag_Advanced_SIMD_arch, 3);
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else if (ARM_CPU_HAS_FEATURE (flags, fpu_neon_ext_v1))
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{
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if (ARM_CPU_HAS_FEATURE (flags, fpu_neon_ext_fma))
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{
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aeabi_set_attribute_int (Tag_Advanced_SIMD_arch, 2);
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}
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else
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{
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aeabi_set_attribute_int (Tag_Advanced_SIMD_arch, 1);
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fp16_optional = 1;
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}
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}
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/* Tag_VFP_HP_extension (formerly Tag_NEON_FP16_arch). */
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if (ARM_CPU_HAS_FEATURE (flags, fpu_vfp_fp16))
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if (ARM_CPU_HAS_FEATURE (flags, fpu_vfp_fp16) && fp16_optional)
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aeabi_set_attribute_int (Tag_VFP_HP_extension, 1);
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/* Tag_DIV_use.
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@ -23921,12 +23959,17 @@ aeabi_set_public_attributes (void)
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in ARM state, or when Thumb integer divide instructions have been used,
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but we have no architecture profile set, nor have we any ARM instructions.
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For ARMv8 we set the tag to 0 as integer divide is implied by the base
|
||||
architecture.
|
||||
|
||||
For new architectures we will have to check these tests. */
|
||||
gas_assert (arch <= TAG_CPU_ARCH_V7E_M);
|
||||
if (ARM_CPU_HAS_FEATURE (flags, arm_ext_adiv)
|
||||
|| (profile == '\0'
|
||||
&& ARM_CPU_HAS_FEATURE (flags, arm_ext_div)
|
||||
&& !ARM_CPU_HAS_FEATURE (arm_arch_used, arm_arch_any)))
|
||||
gas_assert (arch <= TAG_CPU_ARCH_V8);
|
||||
if (ARM_CPU_HAS_FEATURE (flags, arm_ext_v8))
|
||||
aeabi_set_attribute_int (Tag_DIV_use, 0);
|
||||
else if (ARM_CPU_HAS_FEATURE (flags, arm_ext_adiv)
|
||||
|| (profile == '\0'
|
||||
&& ARM_CPU_HAS_FEATURE (flags, arm_ext_div)
|
||||
&& !ARM_CPU_HAS_FEATURE (arm_arch_used, arm_arch_any)))
|
||||
aeabi_set_attribute_int (Tag_DIV_use, 2);
|
||||
|
||||
/* Tag_MP_extension_use. */
|
||||
|
||||
@ -154,13 +154,16 @@ been added, again in ascending alphabetical order. For example,
|
||||
|
||||
|
||||
The following extensions are currently supported:
|
||||
@code{idiv}, (Integer Divide Extensions for v7-A and v7-R architectures),
|
||||
@code{crypto} (Cryptography Extensions for v8-A architecture, implies @code{fp+simd}),
|
||||
@code{fp} (Floating Point Extensions for v8-A architecture),
|
||||
@code{idiv} (Integer Divide Extensions for v7-A and v7-R architectures),
|
||||
@code{iwmmxt},
|
||||
@code{iwmmxt2},
|
||||
@code{maverick},
|
||||
@code{mp} (Multiprocessing Extensions for v7-A and v7-R architectures),
|
||||
@code{os} (Operating System for v6M architecture),
|
||||
@code{sec} (Security Extensions for v6K and v7-A architectures),
|
||||
@code{simd} (Advanced SIMD Extensions for v8-A architecture, implies @code{fp}),
|
||||
@code{virt} (Virtualization Extensions for v7-A architecture, implies
|
||||
@code{idiv}),
|
||||
and
|
||||
@ -199,6 +202,7 @@ names are recognized:
|
||||
@code{armv7-r},
|
||||
@code{armv7-m},
|
||||
@code{armv7e-m},
|
||||
@code{armv8-a},
|
||||
@code{iwmmxt}
|
||||
and
|
||||
@code{xscale}.
|
||||
@ -241,13 +245,16 @@ The following format options are recognized:
|
||||
@code{vfpv4},
|
||||
@code{vfpv4-d16},
|
||||
@code{fpv4-sp-d16},
|
||||
@code{fp-armv8},
|
||||
@code{arm1020t},
|
||||
@code{arm1020e},
|
||||
@code{arm1136jf-s},
|
||||
@code{maverick},
|
||||
@code{neon},
|
||||
@code{neon-vfpv4},
|
||||
@code{neon-fp-armv8},
|
||||
and
|
||||
@code{neon-vfpv4}.
|
||||
@code{crypto-neon-fp-armv8}.
|
||||
|
||||
In addition to determining which instructions are assembled, this option
|
||||
also affects the way in which the @code{.double} assembler directive behaves
|
||||
|
||||
@ -1,3 +1,14 @@
|
||||
2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
|
||||
|
||||
* gas/arm/attr-march-all.d: Update for change in expected
|
||||
output.
|
||||
* gas/arm/attr-mfpu-vfpv4-d16.d: Likewise.
|
||||
* gas/arm/attr-mfpu-vfpv4.d: Likewise.
|
||||
* gas/arm/attr-march-armv8-a+crypto.d: New testcase.
|
||||
* gas/arm/attr-march-armv8-a+fp.d: Likewise.
|
||||
* gas/arm/attr-march-armv8-a+simd.d: Likewise.
|
||||
* gas/arm/attr-march-armv8-a.d: Likewise.
|
||||
|
||||
2012-08-21 David S. Miller <davem@davemloft.net>
|
||||
|
||||
* gas/sparc/crypto.d: Fix opcodes for 4-arg crypto instructions.
|
||||
|
||||
@ -8,10 +8,9 @@
|
||||
Attribute Section: aeabi
|
||||
File Attributes
|
||||
Tag_CPU_name: "all"
|
||||
Tag_CPU_arch: v7
|
||||
Tag_CPU_arch: v8
|
||||
Tag_CPU_arch_profile: Application
|
||||
Tag_ARM_ISA_use: Yes
|
||||
Tag_THUMB_ISA_use: Thumb-2
|
||||
Tag_MPextension_use: Allowed
|
||||
Tag_DIV_use: Allowed in v7-A with integer division extension
|
||||
Tag_Virtualization_use: TrustZone and Virtualization Extensions
|
||||
|
||||
18
gas/testsuite/gas/arm/attr-march-armv8-a+crypto.d
Normal file
18
gas/testsuite/gas/arm/attr-march-armv8-a+crypto.d
Normal file
@ -0,0 +1,18 @@
|
||||
# name: attributes for -march=armv8-a+crypto
|
||||
# source: blank.s
|
||||
# as: -march=armv8-a+crypto
|
||||
# readelf: -A
|
||||
# This test is only valid on EABI based ports.
|
||||
# target: *-*-*eabi *-*-nacl*
|
||||
|
||||
Attribute Section: aeabi
|
||||
File Attributes
|
||||
Tag_CPU_name: "8-A"
|
||||
Tag_CPU_arch: v8
|
||||
Tag_CPU_arch_profile: Application
|
||||
Tag_ARM_ISA_use: Yes
|
||||
Tag_THUMB_ISA_use: Thumb-2
|
||||
Tag_FP_arch: FP for ARMv8
|
||||
Tag_Advanced_SIMD_arch: NEON for ARMv8
|
||||
Tag_MPextension_use: Allowed
|
||||
Tag_Virtualization_use: TrustZone and Virtualization Extensions
|
||||
17
gas/testsuite/gas/arm/attr-march-armv8-a+fp.d
Normal file
17
gas/testsuite/gas/arm/attr-march-armv8-a+fp.d
Normal file
@ -0,0 +1,17 @@
|
||||
# name: attributes for -march=armv8-a+fp
|
||||
# source: blank.s
|
||||
# as: -march=armv8-a+fp
|
||||
# readelf: -A
|
||||
# This test is only valid on EABI based ports.
|
||||
# target: *-*-*eabi *-*-nacl*
|
||||
|
||||
Attribute Section: aeabi
|
||||
File Attributes
|
||||
Tag_CPU_name: "8-A"
|
||||
Tag_CPU_arch: v8
|
||||
Tag_CPU_arch_profile: Application
|
||||
Tag_ARM_ISA_use: Yes
|
||||
Tag_THUMB_ISA_use: Thumb-2
|
||||
Tag_FP_arch: FP for ARMv8
|
||||
Tag_MPextension_use: Allowed
|
||||
Tag_Virtualization_use: TrustZone and Virtualization Extensions
|
||||
18
gas/testsuite/gas/arm/attr-march-armv8-a+simd.d
Normal file
18
gas/testsuite/gas/arm/attr-march-armv8-a+simd.d
Normal file
@ -0,0 +1,18 @@
|
||||
# name: attributes for -march=armv8-a+simd
|
||||
# source: blank.s
|
||||
# as: -march=armv8-a+simd
|
||||
# readelf: -A
|
||||
# This test is only valid on EABI based ports.
|
||||
# target: *-*-*eabi *-*-nacl*
|
||||
|
||||
Attribute Section: aeabi
|
||||
File Attributes
|
||||
Tag_CPU_name: "8-A"
|
||||
Tag_CPU_arch: v8
|
||||
Tag_CPU_arch_profile: Application
|
||||
Tag_ARM_ISA_use: Yes
|
||||
Tag_THUMB_ISA_use: Thumb-2
|
||||
Tag_FP_arch: FP for ARMv8
|
||||
Tag_Advanced_SIMD_arch: NEON for ARMv8
|
||||
Tag_MPextension_use: Allowed
|
||||
Tag_Virtualization_use: TrustZone and Virtualization Extensions
|
||||
16
gas/testsuite/gas/arm/attr-march-armv8-a.d
Normal file
16
gas/testsuite/gas/arm/attr-march-armv8-a.d
Normal file
@ -0,0 +1,16 @@
|
||||
# name: attributes for -march=armv8-a
|
||||
# source: blank.s
|
||||
# as: -march=armv8-a
|
||||
# readelf: -A
|
||||
# This test is only valid on EABI based ports.
|
||||
# target: *-*-*eabi *-*-nacl*
|
||||
|
||||
Attribute Section: aeabi
|
||||
File Attributes
|
||||
Tag_CPU_name: "8-A"
|
||||
Tag_CPU_arch: v8
|
||||
Tag_CPU_arch_profile: Application
|
||||
Tag_ARM_ISA_use: Yes
|
||||
Tag_THUMB_ISA_use: Thumb-2
|
||||
Tag_MPextension_use: Allowed
|
||||
Tag_Virtualization_use: TrustZone and Virtualization Extensions
|
||||
@ -10,4 +10,3 @@ File Attributes
|
||||
Tag_ARM_ISA_use: Yes
|
||||
Tag_THUMB_ISA_use: Thumb-1
|
||||
Tag_FP_arch: VFPv4-D16
|
||||
Tag_FP_HP_extension: Allowed
|
||||
|
||||
@ -10,4 +10,3 @@ File Attributes
|
||||
Tag_ARM_ISA_use: Yes
|
||||
Tag_THUMB_ISA_use: Thumb-1
|
||||
Tag_FP_arch: VFPv4
|
||||
Tag_FP_HP_extension: Allowed
|
||||
|
||||
@ -1,3 +1,23 @@
|
||||
2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
|
||||
|
||||
* elf/arm.h (TAG_CPU_ARCH_V8): New define.
|
||||
(MAX_TAG_CPU_ARCH): Update.
|
||||
* opcode/arm.h (ARM_EXT_V8): New define.
|
||||
(FPU_VFP_EXT_ARMV8): Likewise.
|
||||
(FPU_NEON_EXT_ARMV8): Likewise.
|
||||
(FPU_CRYPTO_EXT_ARMV8): Likewise.
|
||||
(ARM_AEXT_V8A): Likewise.
|
||||
(FPU_VFP_ARMV8): Likwise.
|
||||
(FPU_NEON_ARMV8): Likewise.
|
||||
(FPU_CRYPTO_ARMV8): Likewise.
|
||||
(FPU_ARCH_VFP_ARMV8): Likewise.
|
||||
(FPU_ARCH_NEON_VFP_ARMV8): Likewise.
|
||||
(FPU_ARCH_CRYPTO_NEON_VFP_ARMV8): Likewise.
|
||||
(ARM_ARCH_V8A): Likwise.
|
||||
(ARM_ARCH_V8A_FP): Likewise.
|
||||
(ARM_ARCH_V8A_SIMD): Likewise.
|
||||
(ARM_ARCH_V8A_CRYPTO): Likewise.
|
||||
|
||||
2012-08-13 Ian Bolton <ian.bolton@arm.com>
|
||||
Laurent Desnogues <laurent.desnogues@arm.com>
|
||||
Jim MacArthur <jim.macarthur@arm.com>
|
||||
|
||||
@ -101,7 +101,8 @@
|
||||
#define TAG_CPU_ARCH_V6_M 11
|
||||
#define TAG_CPU_ARCH_V6S_M 12
|
||||
#define TAG_CPU_ARCH_V7E_M 13
|
||||
#define MAX_TAG_CPU_ARCH 13
|
||||
#define TAG_CPU_ARCH_V8 14
|
||||
#define MAX_TAG_CPU_ARCH 14
|
||||
/* Pseudo-architecture to allow objects to be compatible with the subset of
|
||||
armv4t and armv6-m. This value should never be stored in object files. */
|
||||
#define TAG_CPU_ARCH_V4T_PLUS_V6_M (MAX_TAG_CPU_ARCH + 1)
|
||||
|
||||
@ -34,6 +34,7 @@
|
||||
#define ARM_EXT_V6 0x00001000 /* ARM V6. */
|
||||
#define ARM_EXT_V6K 0x00002000 /* ARM V6K. */
|
||||
/* 0x00004000 Was ARM V6Z. */
|
||||
#define ARM_EXT_V8 0x00004000 /* is now ARMv8. */
|
||||
#define ARM_EXT_V6T2 0x00008000 /* Thumb-2. */
|
||||
#define ARM_EXT_DIV 0x00010000 /* Integer division. */
|
||||
/* The 'M' in Arm V7M stands for Microcontroller.
|
||||
@ -77,6 +78,9 @@
|
||||
#define FPU_VFP_EXT_FP16 0x00100000 /* Half-precision extensions. */
|
||||
#define FPU_NEON_EXT_FMA 0x00080000 /* Neon fused multiply-add */
|
||||
#define FPU_VFP_EXT_FMA 0x00040000 /* VFP fused multiply-add */
|
||||
#define FPU_VFP_EXT_ARMV8 0x00020000 /* FP for ARMv8. */
|
||||
#define FPU_NEON_EXT_ARMV8 0x00010000 /* Neon for ARMv8. */
|
||||
#define FPU_CRYPTO_EXT_ARMV8 0x00008000 /* Crypto for ARMv8. */
|
||||
|
||||
/* Architectures are the sum of the base and extensions. The ARM ARM (rev E)
|
||||
defines the following: ARMv3, ARMv3M, ARMv4xM, ARMv4, ARMv4TxM, ARMv4T,
|
||||
@ -126,6 +130,9 @@
|
||||
#define ARM_AEXT_V7 (ARM_AEXT_V7A & ARM_AEXT_V7R & ARM_AEXT_V7M)
|
||||
#define ARM_AEXT_V7EM \
|
||||
(ARM_AEXT_V7M | ARM_EXT_V5ExP | ARM_EXT_V6_DSP)
|
||||
#define ARM_AEXT_V8A \
|
||||
(ARM_AEXT_V7A | ARM_EXT_MP | ARM_EXT_SEC | ARM_EXT_DIV | ARM_EXT_ADIV \
|
||||
| ARM_EXT_VIRT | ARM_EXT_V8)
|
||||
|
||||
/* Processors with specific extensions in the co-processor space. */
|
||||
#define ARM_ARCH_XSCALE ARM_FEATURE (ARM_AEXT_V5TE, ARM_CEXT_XSCALE)
|
||||
@ -143,6 +150,9 @@
|
||||
#define FPU_VFP_V4D16 (FPU_VFP_V3D16 | FPU_VFP_EXT_FP16 | FPU_VFP_EXT_FMA)
|
||||
#define FPU_VFP_V4 (FPU_VFP_V3 | FPU_VFP_EXT_FP16 | FPU_VFP_EXT_FMA)
|
||||
#define FPU_VFP_V4_SP_D16 (FPU_VFP_V3xD | FPU_VFP_EXT_FP16 | FPU_VFP_EXT_FMA)
|
||||
#define FPU_VFP_ARMV8 (FPU_VFP_V4 | FPU_VFP_EXT_ARMV8)
|
||||
#define FPU_NEON_ARMV8 (FPU_NEON_EXT_V1 | FPU_NEON_EXT_FMA | FPU_NEON_EXT_ARMV8)
|
||||
#define FPU_CRYPTO_ARMV8 (FPU_CRYPTO_EXT_ARMV8)
|
||||
#define FPU_VFP_HARD (FPU_VFP_EXT_V1xD | FPU_VFP_EXT_V1 | FPU_VFP_EXT_V2 \
|
||||
| FPU_VFP_EXT_V3xD | FPU_VFP_EXT_FMA | FPU_NEON_EXT_FMA \
|
||||
| FPU_VFP_EXT_V3 | FPU_NEON_EXT_V1 | FPU_VFP_EXT_D32)
|
||||
@ -175,6 +185,10 @@
|
||||
#define FPU_ARCH_VFP_V4_SP_D16 ARM_FEATURE(0, FPU_VFP_V4_SP_D16)
|
||||
#define FPU_ARCH_NEON_VFP_V4 \
|
||||
ARM_FEATURE(0, FPU_VFP_V4 | FPU_NEON_EXT_V1 | FPU_NEON_EXT_FMA)
|
||||
#define FPU_ARCH_VFP_ARMV8 ARM_FEATURE(0, FPU_VFP_ARMV8)
|
||||
#define FPU_ARCH_NEON_VFP_ARMV8 ARM_FEATURE(0, FPU_NEON_ARMV8 | FPU_VFP_ARMV8)
|
||||
#define FPU_ARCH_CRYPTO_NEON_VFP_ARMV8 \
|
||||
ARM_FEATURE(0, FPU_CRYPTO_ARMV8 | FPU_NEON_ARMV8 | FPU_VFP_ARMV8)
|
||||
|
||||
#define FPU_ARCH_ENDIAN_PURE ARM_FEATURE (0, FPU_ENDIAN_PURE)
|
||||
|
||||
@ -211,6 +225,7 @@
|
||||
#define ARM_ARCH_V7R ARM_FEATURE (ARM_AEXT_V7R, 0)
|
||||
#define ARM_ARCH_V7M ARM_FEATURE (ARM_AEXT_V7M, 0)
|
||||
#define ARM_ARCH_V7EM ARM_FEATURE (ARM_AEXT_V7EM, 0)
|
||||
#define ARM_ARCH_V8A ARM_FEATURE (ARM_AEXT_V8A, 0)
|
||||
|
||||
/* Some useful combinations: */
|
||||
#define ARM_ARCH_NONE ARM_FEATURE (0, 0)
|
||||
@ -233,6 +248,14 @@
|
||||
#define ARM_ARCH_V7R_IDIV ARM_FEATURE (ARM_AEXT_V7R | ARM_EXT_ADIV, 0)
|
||||
/* Features that are present in v6M and v6S-M but not other v6 cores. */
|
||||
#define ARM_ARCH_V6M_ONLY ARM_FEATURE (ARM_AEXT_V6M_ONLY, 0)
|
||||
/* v8-a+fp. */
|
||||
#define ARM_ARCH_V8A_FP ARM_FEATURE (ARM_AEXT_V8A, FPU_ARCH_VFP_ARMV8)
|
||||
/* v8-a+simd (implies fp). */
|
||||
#define ARM_ARCH_V8A_SIMD ARM_FEATURE (ARM_AEXT_V8A, \
|
||||
FPU_ARCH_NEON_VFP_ARMV8)
|
||||
/* v8-a+crypto (implies simd+fp). */
|
||||
#define ARM_ARCH_V8A_CRYPTOV1 ARM_FEATURE (ARM_AEXT_V8A, \
|
||||
FPU_ARCH_CRYPTO_NEON_VFP_ARMV8)
|
||||
|
||||
/* There are too many feature bits to fit in a single word, so use a
|
||||
structure. For simplicity we put all core features in one word and
|
||||
|
||||
@ -1,3 +1,18 @@
|
||||
2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
|
||||
|
||||
* ld-arm/arm-elf.exp: Add new testcases.
|
||||
* ld-arm/attr-merge-vfp-3.d: Update for change in expected
|
||||
output.
|
||||
* ld-arm/attr-merge-vfp-3r.d: Likewise.
|
||||
* ld-arm/attr-merge-vfp-4.d: Likewise.
|
||||
* ld-arm/attr-merge-vfp-4r.d: Likewise.
|
||||
* ld-arm/attr-merge-vfp-5.d: Likewise.
|
||||
* ld-arm/attr-merge-vfp-5r.d: Likewise.
|
||||
* ld-arm/attr-merge-vfp-7.d: New testcase.
|
||||
* ld-arm/attr-merge-vfp-7r.d: Likewise.
|
||||
* ld-arm/attr-merge-vfp-armv8-hard.s: Likewise.
|
||||
* ld-arm/attr-merge-vfp-armv8.s: Likewise.
|
||||
|
||||
2012-08-14 Nick Clifton <nickc@redhat.com>
|
||||
|
||||
PR ld/14265
|
||||
|
||||
@ -767,6 +767,8 @@ run_dump_test "attr-merge-vfp-5"
|
||||
run_dump_test "attr-merge-vfp-5r"
|
||||
run_dump_test "attr-merge-vfp-6"
|
||||
run_dump_test "attr-merge-vfp-6r"
|
||||
run_dump_test "attr-merge-vfp-7"
|
||||
run_dump_test "attr-merge-vfp-7r"
|
||||
run_dump_test "attr-merge-incompatible"
|
||||
run_dump_test "unresolved-1"
|
||||
if { ![istarget "arm*-*-nacl*"] } {
|
||||
|
||||
@ -11,4 +11,3 @@ File Attributes
|
||||
Tag_ARM_ISA_use: Yes
|
||||
Tag_THUMB_ISA_use: Thumb-1
|
||||
Tag_FP_arch: VFPv4-D16
|
||||
Tag_FP_HP_extension: Allowed
|
||||
|
||||
@ -11,4 +11,3 @@ File Attributes
|
||||
Tag_ARM_ISA_use: Yes
|
||||
Tag_THUMB_ISA_use: Thumb-1
|
||||
Tag_FP_arch: VFPv4-D16
|
||||
Tag_FP_HP_extension: Allowed
|
||||
|
||||
@ -11,4 +11,3 @@ File Attributes
|
||||
Tag_ARM_ISA_use: Yes
|
||||
Tag_THUMB_ISA_use: Thumb-1
|
||||
Tag_FP_arch: VFPv4
|
||||
Tag_FP_HP_extension: Allowed
|
||||
|
||||
@ -11,4 +11,3 @@ File Attributes
|
||||
Tag_ARM_ISA_use: Yes
|
||||
Tag_THUMB_ISA_use: Thumb-1
|
||||
Tag_FP_arch: VFPv4
|
||||
Tag_FP_HP_extension: Allowed
|
||||
|
||||
@ -11,4 +11,3 @@ File Attributes
|
||||
Tag_ARM_ISA_use: Yes
|
||||
Tag_THUMB_ISA_use: Thumb-1
|
||||
Tag_FP_arch: VFPv4
|
||||
Tag_FP_HP_extension: Allowed
|
||||
|
||||
@ -11,4 +11,3 @@ File Attributes
|
||||
Tag_ARM_ISA_use: Yes
|
||||
Tag_THUMB_ISA_use: Thumb-1
|
||||
Tag_FP_arch: VFPv4
|
||||
Tag_FP_HP_extension: Allowed
|
||||
|
||||
14
ld/testsuite/ld-arm/attr-merge-vfp-7.d
Normal file
14
ld/testsuite/ld-arm/attr-merge-vfp-7.d
Normal file
@ -0,0 +1,14 @@
|
||||
#source: attr-merge-vfp-armv8.s
|
||||
#source: attr-merge-vfp-armv8-hard.s
|
||||
#as:
|
||||
#ld: -r
|
||||
#readelf: -A
|
||||
# This test is only valid on ELF based ports.
|
||||
# not-target: *-*-*coff *-*-pe *-*-wince *-*-*aout* *-*-netbsd *-*-riscix*
|
||||
|
||||
Attribute Section: aeabi
|
||||
File Attributes
|
||||
Tag_ARM_ISA_use: Yes
|
||||
Tag_THUMB_ISA_use: Thumb-1
|
||||
Tag_FP_arch: FP for ARMv8
|
||||
Tag_ABI_HardFP_use: SP and DP
|
||||
14
ld/testsuite/ld-arm/attr-merge-vfp-7r.d
Normal file
14
ld/testsuite/ld-arm/attr-merge-vfp-7r.d
Normal file
@ -0,0 +1,14 @@
|
||||
#source: attr-merge-vfp-armv8.s
|
||||
#source: attr-merge-vfp-armv8-hard.s
|
||||
#as:
|
||||
#ld: -r
|
||||
#readelf: -A
|
||||
# This test is only valid on ELF based ports.
|
||||
# not-target: *-*-*coff *-*-pe *-*-wince *-*-*aout* *-*-netbsd *-*-riscix*
|
||||
|
||||
Attribute Section: aeabi
|
||||
File Attributes
|
||||
Tag_ARM_ISA_use: Yes
|
||||
Tag_THUMB_ISA_use: Thumb-1
|
||||
Tag_FP_arch: FP for ARMv8
|
||||
Tag_ABI_HardFP_use: SP and DP
|
||||
2
ld/testsuite/ld-arm/attr-merge-vfp-armv8-hard.s
Normal file
2
ld/testsuite/ld-arm/attr-merge-vfp-armv8-hard.s
Normal file
@ -0,0 +1,2 @@
|
||||
.fpu fp-armv8
|
||||
.eabi_attribute Tag_ABI_HardFP_use, 3
|
||||
2
ld/testsuite/ld-arm/attr-merge-vfp-armv8.s
Normal file
2
ld/testsuite/ld-arm/attr-merge-vfp-armv8.s
Normal file
@ -0,0 +1,2 @@
|
||||
.fpu fp-armv8
|
||||
|
||||
Loading…
Reference in New Issue
Block a user