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Revert "2.41 Release sources"

Browse Source 
This reverts commit 675b9d612c.

See https://sourceware.org/pipermail/binutils/2023-August/128761.html.
This commit is contained in:
Sam James 2023-08-02 12:06:23 +01:00
parent 675b9d612c
commit b5c37946cc
288 changed files with 20916 additions and 159271 deletions
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6
ChangeLog
View File

@ -1,9 +1,3 @@
2023-07-30 Nick Clifton <nickc@redhat.com>
This is the 2.41 release.
* src-release.sh: Add Changelog.git.
* ChangeLog.git: New file.
2023-07-03 Nick Clifton <nickc@redhat.com>
2.41 Branch Point.

142648
ChangeLog.git
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File diff suppressed because one or more lines are too long

32
bfd/ChangeLog
View File

@ -1,26 +1,26 @@
2023-07-30 Nick Clifton <nickc@redhat.com>
2023-07-24 Johannes Schauer Marin Rodrigues <josch@debian.org>
This is the 2.41 release.
* configure: Regenerate.
* development.sh: Set variables to false.
* po/bfd.pot: Regenerate.
* version.m4: Set version number to 2.41.
* peXXigen.c (_bfd_XXi_only_swap_filehdr_out): If inserting a
timestamp, use the value held in the SOURCE_DATE_EPOCH environment
variable, if it is defined.
2023-07-24 Nick Clifton <nickc@redhat.com>
2023-07-24 Jose E. Marchesi <jose.marchesi@oracle.com>
Import from mainline:
* elfnn-loongarch.c (RELOCATE_CALC_PC32_HI20): Redefined.
(RELOCATE_CALC_PC64_HI32): Redefined.
* reloc.c: New reloc BFD_RELOC_BPF_DISPCALL32.
* elf64-bpf.c (bpf_reloc_type_lookup): Handle the new reloc.
* libbfd.h (bfd_reloc_code_real_names): Regenerate.
* elfxx-loongarch.c (reloc_bits_pcrel20_s2): Delete.
(reloc_bits_b16): Delete.
(reloc_bits_b21): Delete.
(reloc_bits_b26): Delete.
(reloc_sign_bits): New.
2023-07-09 Fangrui Song <maskray@google.com>
PR 30592
* section.c: Define SEC_ELF_LARGE.
* bfd-in2.h: Regenerate.
* elf64-x86-64.c (elf_x86_64_section_flags, elf_x86_64_fake_sections,
elf_x86_64_copy_private_section_data): New.
2023-07-03 Nick Clifton <nickc@redhat.com>
* version.m4: Update version number to 2.40.90.
* version.m4: Update version number to 2.41.50.
* configure: Regenerate.
* bfd/po/bfd.pot: Regenerate.

5
bfd/bfd-in2.h
View File

@ -625,6 +625,9 @@ typedef struct bfd_section
TMS320C54X only. */
#define SEC_TIC54X_BLOCK 0x10000000
/* This section has the SHF_X86_64_LARGE flag. This is ELF x86-64 only. */
#define SEC_ELF_LARGE 0x10000000
/* Conditionally link this section; do not link if there are no
references found to any symbol in the section. This is for TI
TMS320C54X only. */
@ -7145,6 +7148,8 @@ assembler and not (currently) written to any object files. */
/* Linux eBPF relocations. */
BFD_RELOC_BPF_64,
BFD_RELOC_BPF_DISP32,
BFD_RELOC_BPF_DISPCALL32,
BFD_RELOC_BPF_DISP16,
/* Adapteva EPIPHANY - 8 bit signed pc-relative displacement */
BFD_RELOC_EPIPHANY_SIMM8,

15
bfd/bpf-reloc.def
View File

@ -72,3 +72,18 @@
0xffffffff, /* src_mask */
0xffffffff, /* dst_mask */
true) /* pcrel_offset */
/* 16-bit PC-relative address in load instructions. */
BPF_HOWTO (R_BPF_GNU_64_16, /* type */
0, /* rightshift */
2, /* size */
16, /* bitsize */
true, /* pc_relative */
16, /* bitpos */
complain_overflow_signed, /* complain_on_overflow */
bpf_elf_generic_reloc, /* special_function */
"R_BPF_GNU_64_16", /* name */
true, /* partial_inplace */
0xffff, /* src_mask */
0xffff, /* dst_mask */
true) /* pcrel_offset */

12
bfd/coffcode.h
View File

@ -3176,8 +3176,9 @@ coff_compute_section_file_positions (bfd * abfd)
created and not just improve performances with gdb.
*/
if ((!strcmp (current->name, _TEXT)
|| !strcmp (current->name, _DATA))
if ((current->flags & SEC_LOAD) != 0
&& (!strcmp (current->name, _TEXT)
|| !strcmp (current->name, _DATA))
&& (previous == NULL || strcmp(previous->name, _TDATA)))
{
bfd_vma align = 4096;
@ -3190,7 +3191,8 @@ coff_compute_section_file_positions (bfd * abfd)
sofar += align + vma_off - sofar_off;
}
#endif
if (previous != NULL)
if (previous != NULL
&& (previous->flags & SEC_LOAD) != 0)
previous->size += sofar - old_sofar;
}
@ -4695,7 +4697,7 @@ coff_slurp_symbol_table (bfd * abfd)
#endif
#ifdef RS6000COFF_C
case C_HIDEXT:
#if ! defined _AIX52 && ! defined AIX_WEAK_SUPPORT
#ifndef AIX_WEAK_SUPPORT
case C_AIX_WEAKEXT:
#endif
#endif
@ -5021,7 +5023,7 @@ coff_classify_symbol (bfd *abfd,
#endif
#ifdef RS6000COFF_C
case C_HIDEXT:
#if ! defined _AIX52 && ! defined AIX_WEAK_SUPPORT
#ifndef AIX_WEAK_SUPPORT
case C_AIX_WEAKEXT:
#endif
#endif

22
bfd/config.bfd
View File

@ -1098,18 +1098,6 @@ case "${targ}" in
targ_selvecs="rs6000_xcoff64_aix_vec"
want64=true
;;
powerpc-*-haiku*)
targ_defvec=powerpc_elf32_vec
targ_selvecs="rs6000_xcoff_vec powerpc_elf32_le_vec pef_vec pef_xlib_vec powerpc_xcoff_vec powerpc_boot_vec"
targ_cflags=-D__HAIKU_TARGET__
;;
#ifdef BFD64
powerpc64-*-aix5.[01])
targ_defvec=rs6000_xcoff64_aix_vec
targ_selvecs="rs6000_xcoff_vec"
want64=true
;;
#endif
powerpc-*-aix[5-9]* | rs6000-*-aix[5-9]*)
targ_cflags=-DAIX_WEAK_SUPPORT
targ_defvec=rs6000_xcoff_vec
@ -1117,6 +1105,11 @@ case "${targ}" in
want64=true
;;
#ifdef BFD64
powerpc64-*-aix5.[01])
targ_defvec=rs6000_xcoff64_aix_vec
targ_selvecs="rs6000_xcoff_vec"
want64=true
;;
powerpc64-*-aix[5-9]*)
targ_cflags=-DAIX_WEAK_SUPPORT
targ_defvec=rs6000_xcoff64_aix_vec
@ -1176,6 +1169,11 @@ case "${targ}" in
targ_selvecs="rs6000_xcoff_vec powerpc_elf32_le_vec powerpc_boot_vec"
targ64_selvecs="powerpc_elf64_vec powerpc_elf64_le_vec"
;;
powerpc-*-haiku*)
targ_defvec=powerpc_elf32_vec
targ_selvecs="rs6000_xcoff_vec powerpc_elf32_le_vec pef_vec pef_xlib_vec powerpc_xcoff_vec powerpc_boot_vec"
targ_cflags=-D__HAIKU_TARGET__
;;
powerpc-*-kaos*)
targ_defvec=powerpc_elf32_vec
targ_selvecs="powerpc_elf32_le_vec powerpc_boot_vec"

20
bfd/configure vendored
View File

@ -1,6 +1,6 @@
#! /bin/sh
# Guess values for system-dependent variables and create Makefiles.
# Generated by GNU Autoconf 2.69 for bfd 2.41.
# Generated by GNU Autoconf 2.69 for bfd 2.41.50.
#
#
# Copyright (C) 1992-1996, 1998-2012 Free Software Foundation, Inc.
@ -587,8 +587,8 @@ MAKEFLAGS=
# Identity of this package.
PACKAGE_NAME='bfd'
PACKAGE_TARNAME='bfd'
PACKAGE_VERSION='2.41'
PACKAGE_STRING='bfd 2.41'
PACKAGE_VERSION='2.41.50'
PACKAGE_STRING='bfd 2.41.50'
PACKAGE_BUGREPORT=''
PACKAGE_URL=''
@ -1400,7 +1400,7 @@ if test "$ac_init_help" = "long"; then
# Omit some internal or obsolete options to make the list less imposing.
# This message is too long to be a string in the A/UX 3.1 sh.
cat <<_ACEOF
\`configure' configures bfd 2.41 to adapt to many kinds of systems.
\`configure' configures bfd 2.41.50 to adapt to many kinds of systems.
Usage: $0 [OPTION]... [VAR=VALUE]...
@ -1471,7 +1471,7 @@ fi
if test -n "$ac_init_help"; then
case $ac_init_help in
short | recursive ) echo "Configuration of bfd 2.41:";;
short | recursive ) echo "Configuration of bfd 2.41.50:";;
esac
cat <<\_ACEOF
@ -1608,7 +1608,7 @@ fi
test -n "$ac_init_help" && exit $ac_status
if $ac_init_version; then
cat <<\_ACEOF
bfd configure 2.41
bfd configure 2.41.50
generated by GNU Autoconf 2.69
Copyright (C) 2012 Free Software Foundation, Inc.
@ -2202,7 +2202,7 @@ cat >config.log <<_ACEOF
This file contains any messages produced by compilers while
running configure, to aid debugging if configure makes a mistake.
It was created by bfd $as_me 2.41, which was
It was created by bfd $as_me 2.41.50, which was
generated by GNU Autoconf 2.69. Invocation command line was
$ $0 $@
@ -3184,7 +3184,7 @@ fi
# Define the identity of the package.
PACKAGE='bfd'
VERSION='2.41'
VERSION='2.41.50'
cat >>confdefs.h <<_ACEOF
@ -16103,7 +16103,7 @@ cat >>$CONFIG_STATUS <<\_ACEOF || ac_write_fail=1
# report actual input values of CONFIG_FILES etc. instead of their
# values after options handling.
ac_log="
This file was extended by bfd $as_me 2.41, which was
This file was extended by bfd $as_me 2.41.50, which was
generated by GNU Autoconf 2.69. Invocation command line was
CONFIG_FILES = $CONFIG_FILES
@ -16169,7 +16169,7 @@ _ACEOF
cat >>$CONFIG_STATUS <<_ACEOF || ac_write_fail=1
ac_cs_config="`$as_echo "$ac_configure_args" | sed 's/^ //; s/[\\""\`\$]/\\\\&/g'`"
ac_cs_version="\\
bfd config.status 2.41
bfd config.status 2.41.50
configured by $0, generated by GNU Autoconf 2.69,
with options \\"\$ac_cs_config\\"

4
bfd/development.sh
View File

@ -16,7 +16,7 @@
# along with this program. If not, see <http://www.gnu.org/licenses/>.
# Controls whether to enable development-mode features by default.
development=false
development=true
# Indicate whether this is a release branch.
experimental=false
experimental=true

3
bfd/elf64-bpf.c
View File

@ -88,7 +88,10 @@ bpf_reloc_type_lookup (bfd * abfd ATTRIBUTE_UNUSED,
case BFD_RELOC_BPF_64:
return &bpf_elf_howto_table[ (int) R_BPF_64_64_IDX];
case BFD_RELOC_BPF_DISP32:
case BFD_RELOC_BPF_DISPCALL32:
return &bpf_elf_howto_table[ (int) R_BPF_64_32_IDX];
case BFD_RELOC_BPF_DISP16:
return &bpf_elf_howto_table[ (int) R_BPF_GNU_64_16_IDX];
default:
/* Pacify gcc -Wall. */

39
bfd/elf64-x86-64.c
View File

@ -5281,6 +5281,39 @@ elf_x86_64_merge_symbol (struct elf_link_hash_entry *h,
return true;
}
static bool
elf_x86_64_section_flags (const Elf_Internal_Shdr *hdr)
{
if ((hdr->sh_flags & SHF_X86_64_LARGE) != 0)
hdr->bfd_section->flags |= SEC_ELF_LARGE;
return true;
}
static bool
elf_x86_64_fake_sections (bfd *abfd ATTRIBUTE_UNUSED,
Elf_Internal_Shdr *hdr, asection *sec)
{
if (sec->flags & SEC_ELF_LARGE)
hdr->sh_flags |= SHF_X86_64_LARGE;
return true;
}
static bool
elf_x86_64_copy_private_section_data (bfd *ibfd, asection *isec,
bfd *obfd, asection *osec)
{
if (!_bfd_elf_copy_private_section_data (ibfd, isec, obfd, osec))
return false;
/* objcopy --set-section-flags without "large" drops SHF_X86_64_LARGE. */
if (ibfd != obfd)
elf_section_flags (osec) &= ~SHF_X86_64_LARGE;
return true;
}
static int
elf_x86_64_additional_program_headers (bfd *abfd,
struct bfd_link_info *info ATTRIBUTE_UNUSED)
@ -5408,6 +5441,8 @@ elf_x86_64_special_sections[]=
#define elf_info_to_howto elf_x86_64_info_to_howto
#define bfd_elf64_bfd_copy_private_section_data \
elf_x86_64_copy_private_section_data
#define bfd_elf64_bfd_reloc_type_lookup elf_x86_64_reloc_type_lookup
#define bfd_elf64_bfd_reloc_name_lookup \
elf_x86_64_reloc_name_lookup
@ -5448,6 +5483,8 @@ elf_x86_64_special_sections[]=
elf_x86_64_merge_symbol
#define elf_backend_special_sections \
elf_x86_64_special_sections
#define elf_backend_section_flags elf_x86_64_section_flags
#define elf_backend_fake_sections elf_x86_64_fake_sections
#define elf_backend_additional_program_headers \
elf_x86_64_additional_program_headers
#define elf_backend_setup_gnu_properties \
@ -5564,6 +5601,8 @@ elf64_x86_64_copy_solaris_special_section_fields (const bfd *ibfd ATTRIBUTE_UNUS
#undef ELF_TARGET_OS
#undef ELF_OSABI
#define bfd_elf32_bfd_copy_private_section_data \
elf_x86_64_copy_private_section_data
#define bfd_elf32_bfd_reloc_type_lookup \
elf_x86_64_reloc_type_lookup
#define bfd_elf32_bfd_reloc_name_lookup \

67
bfd/elfnn-loongarch.c
View File

@ -1538,7 +1538,7 @@ elfNN_allocate_ifunc_dynrelocs (struct elf_link_hash_entry *h, void *inf)
/* Allocate space in .plt, .got and associated reloc sections for
ifunc dynamic relocs. */
static bool
static int
elfNN_allocate_local_ifunc_dynrelocs (void **slot, void *inf)
{
struct elf_link_hash_entry *h = (struct elf_link_hash_entry *) *slot;
@ -1700,7 +1700,7 @@ loongarch_elf_size_dynamic_sections (bfd *output_bfd,
/* Allocate .plt and .got entries, and space for local ifunc symbols. */
htab_traverse (htab->loc_hash_table,
(void *) elfNN_allocate_local_ifunc_dynrelocs, info);
elfNN_allocate_local_ifunc_dynrelocs, info);
/* Don't allocate .got.plt section if there are no PLT. */
if (htab->elf.sgotplt && htab->elf.sgotplt->size == GOTPLT_HEADER_SIZE
@ -4040,12 +4040,6 @@ loongarch_elf_finish_dynamic_symbol (bfd *output_bfd,
{
struct loongarch_elf_link_hash_table *htab = loongarch_elf_hash_table (info);
const struct elf_backend_data *bed = get_elf_backend_data (output_bfd);
asection *rela_dyn = bfd_get_section_by_name (output_bfd, ".rela.dyn");
struct bfd_link_order *lo = NULL;
Elf_Internal_Rela *slot = NULL, *last_slot = NULL;
if (rela_dyn)
lo = rela_dyn->map_head.link_order;
if (h->plt.offset != MINUS_ONE)
{
@ -4055,7 +4049,6 @@ loongarch_elf_finish_dynamic_symbol (bfd *output_bfd,
uint32_t plt_entry[PLT_ENTRY_INSNS];
bfd_byte *loc;
Elf_Internal_Rela rela;
asection *rela_sec = NULL;
if (htab->elf.splt)
{
@ -4113,26 +4106,7 @@ loongarch_elf_finish_dynamic_symbol (bfd *output_bfd,
+ h->root.u.def.section->output_section->vma
+ h->root.u.def.section->output_offset);
/* Find the space after dyn sort. */
while (slot == last_slot || slot->r_offset != 0)
{
if (slot != last_slot)
{
slot++;
continue;
}
BFD_ASSERT (lo != NULL);
rela_sec = lo->u.indirect.section;
lo = lo->next;
slot = (Elf_Internal_Rela *)rela_sec->contents;
last_slot = (Elf_Internal_Rela *)(rela_sec->contents +
rela_sec->size);
}
bed->s->swap_reloca_out (output_bfd, &rela, (bfd_byte *)slot);
rela_sec->reloc_count++;
loongarch_elf_append_rela (output_bfd, relplt, &rela);
}
else
{
@ -4299,7 +4273,7 @@ loongarch_finish_dyn (bfd *output_bfd, struct bfd_link_info *info, bfd *dynobj,
/* Finish up local dynamic symbol handling. We set the contents of
various dynamic sections here. */
static bool
static int
elfNN_loongarch_finish_local_dynamic_symbol (void **slot, void *inf)
{
struct elf_link_hash_entry *h = (struct elf_link_hash_entry *) *slot;
@ -4308,6 +4282,33 @@ elfNN_loongarch_finish_local_dynamic_symbol (void **slot, void *inf)
return loongarch_elf_finish_dynamic_symbol (info->output_bfd, info, h, NULL);
}
/* Value of struct elf_backend_data->elf_backend_output_arch_local_syms,
this function is called before elf_link_sort_relocs.
So relocation R_LARCH_IRELATIVE for local ifunc can be append to
.rela.dyn (.rela.got) by loongarch_elf_append_rela. */
static bool
elf_loongarch_output_arch_local_syms
(bfd *output_bfd ATTRIBUTE_UNUSED,
struct bfd_link_info *info,
void *flaginfo ATTRIBUTE_UNUSED,
int (*func) (void *, const char *,
Elf_Internal_Sym *,
asection *,
struct elf_link_hash_entry *) ATTRIBUTE_UNUSED)
{
struct loongarch_elf_link_hash_table *htab = loongarch_elf_hash_table (info);
if (htab == NULL)
return false;
/* Fill PLT and GOT entries for local STT_GNU_IFUNC symbols. */
htab_traverse (htab->loc_hash_table,
elfNN_loongarch_finish_local_dynamic_symbol,
info);
return true;
}
static bool
loongarch_elf_finish_dynamic_sections (bfd *output_bfd,
struct bfd_link_info *info)
@ -4386,10 +4387,6 @@ loongarch_elf_finish_dynamic_sections (bfd *output_bfd,
elf_section_data (output_section)->this_hdr.sh_entsize = GOT_ENTRY_SIZE;
}
/* Fill PLT and GOT entries for local STT_GNU_IFUNC symbols. */
htab_traverse (htab->loc_hash_table,
(void *) elfNN_loongarch_finish_local_dynamic_symbol, info);
return true;
}
@ -4654,6 +4651,8 @@ elf_loongarch64_hash_symbol (struct elf_link_hash_entry *h)
#define elf_backend_size_dynamic_sections loongarch_elf_size_dynamic_sections
#define elf_backend_relocate_section loongarch_elf_relocate_section
#define elf_backend_finish_dynamic_symbol loongarch_elf_finish_dynamic_symbol
#define elf_backend_output_arch_local_syms \
elf_loongarch_output_arch_local_syms
#define elf_backend_finish_dynamic_sections \
loongarch_elf_finish_dynamic_sections
#define elf_backend_object_p loongarch_elf_object_p

4
bfd/elfxx-loongarch.c
View File

@ -1711,10 +1711,12 @@ reloc_sign_bits (bfd *abfd, reloc_howto_type *howto, bfd_vma *fix_val)
{
case R_LARCH_SOP_POP_32_S_0_10_10_16_S2:
case R_LARCH_B26:
/* Perform insn bits field. 25:16>>16, 15:0<<10. */
/* Perform insn bits field. 15:0<<10, 25:16>>16. */
val = ((val & 0xffff) << 10) | ((val >> 16) & 0x3ff);
break;
case R_LARCH_SOP_POP_32_S_0_5_10_16_S2:
case R_LARCH_B21:
/* Perform insn bits field. 15:0<<10, 20:16>>16. */
val = ((val & 0xffff) << 10) | ((val >> 16) & 0x1f);
break;
default:

84
bfd/elfxx-riscv.c
View File

@ -1132,6 +1132,8 @@ static struct riscv_implicit_subset riscv_implicit_subsets[] =
{"zvl256b", "zvl128b", check_implicit_always},
{"zvl128b", "zvl64b", check_implicit_always},
{"zvl64b", "zvl32b", check_implicit_always},
{"zcd", "d", check_implicit_always},
{"zcf", "f", check_implicit_always},
{"zfa", "f", check_implicit_always},
{"d", "f", check_implicit_always},
{"zfh", "zfhmin", check_implicit_always},
@ -1173,6 +1175,9 @@ static struct riscv_implicit_subset riscv_implicit_subsets[] =
{"zvksg", "zvkg", check_implicit_always},
{"zvksc", "zvks", check_implicit_always},
{"zvksc", "zvbc", check_implicit_always},
{"zcf", "zca", check_implicit_always},
{"zcd", "zca", check_implicit_always},
{"zcb", "zca", check_implicit_always},
{"smaia", "ssaia", check_implicit_always},
{"smstateen", "ssstateen", check_implicit_always},
{"smepmp", "zicsr", check_implicit_always},
@ -1307,6 +1312,10 @@ static struct riscv_supported_ext riscv_supported_std_z_ext[] =
{"zvl32768b", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 },
{"zvl65536b", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 },
{"ztso", ISA_SPEC_CLASS_DRAFT, 0, 1, 0 },
{"zca", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 },
{"zcb", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 },
{"zcf", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 },
{"zcd", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 },
{NULL, 0, 0, 0, 0}
};
@ -1942,6 +1951,13 @@ riscv_parse_check_conflicts (riscv_parse_subset_t *rps)
rps->error_handler (_("rv%d does not support the `q' extension"), xlen);
no_conflict = false;
}
if (riscv_lookup_subset (rps->subset_list, "zcf", &subset)
&& xlen > 32)
{
rps->error_handler
(_("rv%d does not support the `zcf' extension"), xlen);
no_conflict = false;
}
if (riscv_lookup_subset (rps->subset_list, "zfinx", &subset)
&& riscv_lookup_subset (rps->subset_list, "f", &subset))
{
@ -2387,13 +2403,16 @@ riscv_multi_subset_supports (riscv_parse_subset_t *rps,
case INSN_CLASS_Q:
return riscv_subset_supports (rps, "q");
case INSN_CLASS_C:
return riscv_subset_supports (rps, "c");
return (riscv_subset_supports (rps, "c")
|| riscv_subset_supports (rps, "zca"));
case INSN_CLASS_F_AND_C:
return (riscv_subset_supports (rps, "f")
&& riscv_subset_supports (rps, "c"));
&& (riscv_subset_supports (rps, "c")
|| riscv_subset_supports (rps, "zcf")));
case INSN_CLASS_D_AND_C:
return (riscv_subset_supports (rps, "d")
&& riscv_subset_supports (rps, "c"));
&& (riscv_subset_supports (rps, "c")
|| riscv_subset_supports (rps, "zcd")));
case INSN_CLASS_F_INX:
return (riscv_subset_supports (rps, "f")
|| riscv_subset_supports (rps, "zfinx"));
@ -2482,10 +2501,6 @@ riscv_multi_subset_supports (riscv_parse_subset_t *rps,
return riscv_subset_supports (rps, "zvkg");
case INSN_CLASS_ZVKNED:
return riscv_subset_supports (rps, "zvkned");
case INSN_CLASS_ZVKNHA:
return riscv_subset_supports (rps, "zvknha");
case INSN_CLASS_ZVKNHB:
return riscv_subset_supports (rps, "zvknhb");
case INSN_CLASS_ZVKNHA_OR_ZVKNHB:
return (riscv_subset_supports (rps, "zvknha")
|| riscv_subset_supports (rps, "zvknhb"));
@ -2493,6 +2508,17 @@ riscv_multi_subset_supports (riscv_parse_subset_t *rps,
return riscv_subset_supports (rps, "zvksed");
case INSN_CLASS_ZVKSH:
return riscv_subset_supports (rps, "zvksh");
case INSN_CLASS_ZCB:
return riscv_subset_supports (rps, "zcb");
case INSN_CLASS_ZCB_AND_ZBB:
return (riscv_subset_supports (rps, "zcb")
&& riscv_subset_supports (rps, "zbb"));
case INSN_CLASS_ZCB_AND_ZBA:
return (riscv_subset_supports (rps, "zcb")
&& riscv_subset_supports (rps, "zba"));
case INSN_CLASS_ZCB_AND_ZMMUL:
return (riscv_subset_supports (rps, "zcb")
&& riscv_subset_supports (rps, "zmmul"));
case INSN_CLASS_SVINVAL:
return riscv_subset_supports (rps, "svinval");
case INSN_CLASS_H:
@ -2572,21 +2598,27 @@ riscv_multi_subset_supports_ext (riscv_parse_subset_t *rps,
case INSN_CLASS_C:
return "c";
case INSN_CLASS_F_AND_C:
if (!riscv_subset_supports (rps, "f")
&& !riscv_subset_supports (rps, "c"))
return _("f' and `c");
else if (!riscv_subset_supports (rps, "f"))
return "f";
if (!riscv_subset_supports (rps, "f"))
{
if (!riscv_subset_supports (rps, "c")
&& !riscv_subset_supports (rps, "zcf"))
return _("f' and `c', or `f' and `zcf");
else
return "f";
}
else
return "c";
return _("c' or `zcf");
case INSN_CLASS_D_AND_C:
if (!riscv_subset_supports (rps, "d")
&& !riscv_subset_supports (rps, "c"))
return _("d' and `c");
else if (!riscv_subset_supports (rps, "d"))
return "d";
if (!riscv_subset_supports (rps, "d"))
{
if (!riscv_subset_supports (rps, "c")
&& !riscv_subset_supports (rps, "zcd"))
return _("d' and `c', or `d' and `zcd");
else
return "d";
}
else
return "c";
return _("c' or `zcd");
case INSN_CLASS_F_INX:
return _("f' or `zfinx");
case INSN_CLASS_D_INX:
@ -2689,14 +2721,20 @@ riscv_multi_subset_supports_ext (riscv_parse_subset_t *rps,
return _("zvkg");
case INSN_CLASS_ZVKNED:
return _("zvkned");
case INSN_CLASS_ZVKNHA:
return _("zvknha");
case INSN_CLASS_ZVKNHB:
return _("zvknhb");
case INSN_CLASS_ZVKNHA_OR_ZVKNHB:
return _("zvknha' or `zvknhb");
case INSN_CLASS_ZVKSED:
return _("zvksed");
case INSN_CLASS_ZVKSH:
return _("zvksh");
case INSN_CLASS_ZCB:
return "zcb";
case INSN_CLASS_ZCB_AND_ZBA:
return _("zcb' and `zba");
case INSN_CLASS_ZCB_AND_ZBB:
return _("zcb' and `zbb");
case INSN_CLASS_ZCB_AND_ZMMUL:
return _("zcb' and `zmmul', or `zcb' and `m");
case INSN_CLASS_SVINVAL:
return "svinval";
case INSN_CLASS_H:

2
bfd/libbfd.h
View File

@ -3346,6 +3346,8 @@ static const char *const bfd_reloc_code_real_names[] = { "@@uninitialized@@",
"BFD_RELOC_TILEGX_IMM8_Y1_TLS_ADD",
"BFD_RELOC_BPF_64",
"BFD_RELOC_BPF_DISP32",
"BFD_RELOC_BPF_DISPCALL32",
"BFD_RELOC_BPF_DISP16",
"BFD_RELOC_EPIPHANY_SIMM8",
"BFD_RELOC_EPIPHANY_SIMM24",
"BFD_RELOC_EPIPHANY_HIGH",

15
bfd/peXXigen.c
View File

@ -838,7 +838,20 @@ _bfd_XXi_only_swap_filehdr_out (bfd * abfd, void * in, void * out)
/* Use a real timestamp by default, unless the no-insert-timestamp
option was chosen. */
if ((pe_data (abfd)->timestamp) == -1)
H_PUT_32 (abfd, time (0), filehdr_out->f_timdat);
{
time_t now;
char *source_date_epoch;
/* If the SOURCE_DATE_EPOCH environment variable is
defined then use that as the time, otherwise use
the current time. */
source_date_epoch = getenv ("SOURCE_DATE_EPOCH");
if (source_date_epoch)
now = (time_t) strtoll (source_date_epoch, NULL, 10);
else
now = time (NULL);
H_PUT_32 (abfd, now, filehdr_out->f_timdat);
}
else
H_PUT_32 (abfd, pe_data (abfd)->timestamp, filehdr_out->f_timdat);

277
bfd/po/bfd.pot
View File

@ -8,7 +8,7 @@ msgid ""
msgstr ""
"Project-Id-Version: PACKAGE VERSION\n"
"Report-Msgid-Bugs-To: https://sourceware.org/bugzilla/\n"
"POT-Creation-Date: 2023-07-30 14:35+0100\n"
"POT-Creation-Date: 2023-07-03 11:38+0100\n"
"PO-Revision-Date: YEAR-MO-DA HO:MI+ZONE\n"
"Last-Translator: FULL NAME <EMAIL@ADDRESS>\n"
"Language-Team: LANGUAGE <LL@li.org>\n"
@ -69,7 +69,7 @@ msgstr ""
#. Unknown relocation.
#: aoutx.h:4400 coff-alpha.c:601 coff-alpha.c:1521 coff-mips.c:356
#: coff-rs6000.c:3048 coff-sh.c:504 coff-tic4x.c:184 coff-tic54x.c:262
#: coff-rs6000.c:3029 coff-sh.c:504 coff-tic4x.c:184 coff-tic54x.c:262
#: elf-hppa.h:798 elf-hppa.h:826 elf-m10200.c:226 elf-m10300.c:813
#: elf32-arc.c:532 elf32-arm.c:1985 elf32-avr.c:962 elf32-bfin.c:1063
#: elf32-bfin.c:4686 elf32-cr16.c:654 elf32-cr16.c:684 elf32-cris.c:467
@ -95,7 +95,7 @@ msgstr ""
#: elf64-ia64-vms.c:3426 elf64-mips.c:3965 elf64-mips.c:3981 elf64-mmix.c:1264
#: elf64-nfp.c:151 elf64-ppc.c:1031 elf64-ppc.c:1385 elf64-ppc.c:1394
#: elf64-s390.c:328 elf64-s390.c:378 elf64-x86-64.c:269 elfn32-mips.c:3799
#: elfxx-ia64.c:324 elfxx-loongarch.c:1568 elfxx-riscv.c:980 elfxx-sparc.c:589
#: elfxx-ia64.c:324 elfxx-loongarch.c:1574 elfxx-riscv.c:980 elfxx-sparc.c:589
#: elfxx-sparc.c:639 elfxx-tilegx.c:907 elfxx-tilegx.c:947
#: elfnn-aarch64.c:2215 elfnn-aarch64.c:2313 elfnn-ia64.c:214
#: elfnn-ia64.c:3821
@ -307,32 +307,32 @@ msgstr ""
msgid "%pB: unsupported swap_aux_out for storage class %#x"
msgstr ""
#: coff-rs6000.c:3138
#: coff-rs6000.c:3119
#, c-format
msgid "%pB: TOC reloc at %#<PRIx64> to symbol `%s' with no TOC entry"
msgstr ""
#: coff-rs6000.c:3262 coff64-rs6000.c:848
#: coff-rs6000.c:3243 coff64-rs6000.c:848
#, c-format
msgid "Unable to find the stub entry targeting %s"
msgstr ""
#: coff-rs6000.c:3377
#: coff-rs6000.c:3358
#, c-format
msgid "%pB: TLS relocation at 0x%<PRIx64> over non-TLS symbol %s (0x%x)\n"
msgstr ""
#: coff-rs6000.c:3390
#: coff-rs6000.c:3371
#, c-format
msgid "%pB: TLS local relocation at 0x%<PRIx64> over imported symbol %s\n"
msgstr ""
#: coff-rs6000.c:3796
#: coff-rs6000.c:3777
#, c-format
msgid "%pB: relocation (%d) at 0x%<PRIx64> has wrong r_rsize (0x%x)\n"
msgstr ""
#: coff-rs6000.c:4058 coff64-rs6000.c:2031
#: coff-rs6000.c:4039 coff64-rs6000.c:2031
#, c-format
msgid "%pB: symbol `%s' has unrecognized smclas %d"
msgstr ""
@ -397,13 +397,13 @@ msgstr ""
msgid "R_AMD64_IMAGEBASE with __ImageBase undefined"
msgstr ""
#: coff-z80.c:351 coff-z8k.c:214 elf32-nds32.c:13189 elfxx-mips.c:13515
#: coff-z80.c:351 coff-z8k.c:214 elf32-nds32.c:13189 elfxx-mips.c:13513
#: reloc.c:8495 reloc16.c:314
#, c-format
msgid "%X%P: %pB(%pA): relocation \"%pR\" goes out of range\n"
msgstr ""
#: coff-z80.c:477 coff-z8k.c:378 elfxx-mips.c:13525 reloc.c:8505
#: coff-z80.c:477 coff-z8k.c:378 elfxx-mips.c:13523 reloc.c:8505
#, c-format
msgid "%X%P: %pB(%pA): relocation \"%pR\" is not supported\n"
msgstr ""
@ -938,7 +938,7 @@ msgstr ""
#: elf32-moxie.c:292 elf32-msp430.c:1510 elf32-nds32.c:6097 elf32-or1k.c:1901
#: elf32-score.c:2738 elf32-score7.c:2549 elf32-spu.c:5089
#: elf32-tilepro.c:3376 elf32-v850.c:2298 elf32-visium.c:684
#: elf32-xstormy16.c:934 elf64-mmix.c:1545 elfxx-mips.c:10653
#: elf32-xstormy16.c:934 elf64-mmix.c:1545 elfxx-mips.c:10651
#: elfxx-tilegx.c:3746
msgid "internal error: unsupported relocation error"
msgstr ""
@ -1111,7 +1111,7 @@ msgstr ""
msgid "%pB: invalid string offset %u >= %<PRIu64> for section `%s'"
msgstr ""
#: elf.c:517 elf32-arm.c:17730 elfnn-aarch64.c:8291 elfnn-loongarch.c:4430
#: elf.c:517 elf32-arm.c:17730 elfnn-aarch64.c:8291 elfnn-loongarch.c:4391
#, c-format
msgid "%pB symbol number %lu references nonexistent SHT_SYMTAB_SHNDX section"
msgstr ""
@ -1558,7 +1558,7 @@ msgid ""
msgstr ""
#: elf32-arc.c:938 elf32-iq2000.c:844 elf32-m32c.c:889 elf32-m68hc1x.c:1390
#: elf32-ppc.c:3856 elf64-sparc.c:737 elfxx-mips.c:15687
#: elf32-ppc.c:3856 elf64-sparc.c:737 elfxx-mips.c:15685
#, c-format
msgid "%pB: uses different e_flags (%#x) fields than previous modules (%#x)"
msgstr ""
@ -2356,7 +2356,7 @@ msgstr ""
#. Ignore init flag - it may not be set, despite the flags field containing valid data.
#: elf32-bfin.c:4728 elf32-cris.c:3862 elf32-m68hc1x.c:1415 elf32-m68k.c:1265
#: elf32-score.c:3987 elf32-score7.c:3794 elf32-vax.c:536 elf32-xgate.c:494
#: elfxx-mips.c:16373
#: elfxx-mips.c:16371
#, c-format
msgid "private flags = %lx:"
msgstr ""
@ -3774,12 +3774,12 @@ msgstr ""
#: elf32-sh.c:5013
#, c-format
msgid "%X%H: relocation to \"%s\" references a different segment\n"
msgid "%X%C: relocation to \"%s\" references a different segment\n"
msgstr ""
#: elf32-sh.c:5020
#, c-format
msgid "%H: warning: relocation to \"%s\" references a different segment\n"
msgid "%C: warning: relocation to \"%s\" references a different segment\n"
msgstr ""
#: elf32-sh.c:5488 elf32-sh.c:5570
@ -4036,7 +4036,7 @@ msgid "warning: %pB and %pB differ in whether code is compiled for DSBT"
msgstr ""
#: elf32-tilepro.c:3627 elfxx-tilegx.c:4017 elfxx-x86.c:2710
#: elfnn-aarch64.c:9999 elfnn-loongarch.c:4356 elfnn-riscv.c:3458
#: elfnn-aarch64.c:9999 elfnn-loongarch.c:4317 elfnn-riscv.c:3458
#, c-format
msgid "discarded output section: `%pA'"
msgstr ""
@ -4893,7 +4893,7 @@ msgid ""
"%pB(%pA+%#<PRIx64>): misaligned symbol `%s' (%#<PRIx64>) for relocation %s"
msgstr ""
#: elf64-sparc.c:134 elfcode.h:1593
#: elf64-sparc.c:134 elfcode.h:1582
#, c-format
msgid "%pB(%pA): relocation %d has invalid symbol index %ld"
msgstr ""
@ -5041,17 +5041,17 @@ msgstr ""
msgid "warning: %pB has a corrupt string table index"
msgstr ""
#: elfcode.h:838
#: elfcode.h:837
#, c-format
msgid "warning: %pB has a program header with invalid alignment"
msgstr ""
#: elfcode.h:1050
#: elfcode.h:1039
#, c-format
msgid "%pB: %pA+%<PRIx64>: relocation addend %<PRIx64> too large"
msgstr ""
#: elfcode.h:1313
#: elfcode.h:1302
#, c-format
msgid "%pB: version count (%<PRId64>) does not match symbol count (%ld)"
msgstr ""
@ -5418,27 +5418,28 @@ msgstr ""
msgid "error: %pB: <corrupt AArch64 used size: 0x%x>"
msgstr ""
#: elfxx-loongarch.c:1584
#: elfxx-loongarch.c:1590
#, c-format
msgid "%pB: unsupported relocation type %s"
msgstr ""
#: elfxx-loongarch.c:1613
#: elfxx-loongarch.c:1619
#, c-format
msgid "%pB: unsupported bfd relocation type %#x"
msgstr ""
#: elfxx-loongarch.c:1632
#: elfxx-loongarch.c:1638
#, c-format
msgid "%pB: unsupported relocation type name %s"
msgstr ""
#: elfxx-loongarch.c:1685
#: elfxx-loongarch.c:1689
#, c-format
msgid "%pB: relocation %s right shift %d error 0x%lx"
msgstr ""
#: elfxx-loongarch.c:1699
#: elfxx-loongarch.c:1699 elfxx-loongarch.c:1735 elfxx-loongarch.c:1770
#: elfxx-loongarch.c:1807
#, c-format
msgid "%pB: relocation %s overflow 0x%lx"
msgstr ""
@ -5471,533 +5472,533 @@ msgstr ""
msgid "%X%H: unsupported branch between ISA modes\n"
msgstr ""
#: elfxx-mips.c:7345
#: elfxx-mips.c:7344
#, c-format
msgid ""
"%pB: incorrect `.reginfo' section size; expected %<PRIu64>, got %<PRIu64>"
msgstr ""
#: elfxx-mips.c:7389
#: elfxx-mips.c:7388
#, c-format
msgid "%pB: warning: bad `%s' option size %u smaller than its header"
msgstr ""
#: elfxx-mips.c:7625
#: elfxx-mips.c:7624
#, c-format
msgid "%pB: warning: truncated `%s' option"
msgstr ""
#: elfxx-mips.c:8449 elfxx-mips.c:8575
#: elfxx-mips.c:8447 elfxx-mips.c:8573
#, c-format
msgid ""
"%pB: warning: cannot determine the target function for stub section `%s'"
msgstr ""
#: elfxx-mips.c:8707
#: elfxx-mips.c:8705
#, c-format
msgid "%pB: malformed reloc detected for section %s"
msgstr ""
#: elfxx-mips.c:8807
#: elfxx-mips.c:8805
#, c-format
msgid "%pB: GOT reloc at %#<PRIx64> not expected in executables"
msgstr ""
#: elfxx-mips.c:8947
#: elfxx-mips.c:8945
#, c-format
msgid "%pB: CALL16 reloc at %#<PRIx64> not against global symbol"
msgstr ""
#: elfxx-mips.c:9250
#: elfxx-mips.c:9248
#, c-format
msgid ""
"%X%H: relocation %s against `%s' cannot be used when making a shared object; "
"recompile with -fPIC\n"
msgstr ""
#: elfxx-mips.c:9376
#: elfxx-mips.c:9374
#, c-format
msgid "IFUNC symbol %s in dynamic symbol table - IFUNCS are not supported"
msgstr ""
#: elfxx-mips.c:9379
#: elfxx-mips.c:9377
#, c-format
msgid "non-dynamic symbol %s in dynamic symbol table"
msgstr ""
#: elfxx-mips.c:9599
#: elfxx-mips.c:9597
#, c-format
msgid "non-dynamic relocations refer to dynamic symbol %s"
msgstr ""
#: elfxx-mips.c:10534
#: elfxx-mips.c:10532
#, c-format
msgid ""
"%pB: can't find matching LO16 reloc against `%s' for %s at %#<PRIx64> in "
"section `%pA'"
msgstr ""
#: elfxx-mips.c:10674
#: elfxx-mips.c:10672
msgid ""
"small-data section exceeds 64KB; lower small-data size limit (see option -G)"
msgstr ""
#: elfxx-mips.c:10693
#: elfxx-mips.c:10691
msgid "cannot convert a jump to JALX for a non-word-aligned address"
msgstr ""
#: elfxx-mips.c:10696
#: elfxx-mips.c:10694
msgid "jump to a non-word-aligned address"
msgstr ""
#: elfxx-mips.c:10697
#: elfxx-mips.c:10695
msgid "jump to a non-instruction-aligned address"
msgstr ""
#: elfxx-mips.c:10700
#: elfxx-mips.c:10698
msgid "cannot convert a branch to JALX for a non-word-aligned address"
msgstr ""
#: elfxx-mips.c:10702
#: elfxx-mips.c:10700
msgid "branch to a non-instruction-aligned address"
msgstr ""
#: elfxx-mips.c:10704
#: elfxx-mips.c:10702
msgid "PC-relative load from unaligned address"
msgstr ""
#: elfxx-mips.c:11004
#: elfxx-mips.c:11002
#, c-format
msgid ""
"%pB: `%pA' entry VMA of %#<PRIx64> outside the 32-bit range supported; "
"consider using `-Ttext-segment=...'"
msgstr ""
#: elfxx-mips.c:11119 elfxx-mips.c:11706
#: elfxx-mips.c:11117 elfxx-mips.c:11704
#, c-format
msgid "%pB: `%pA' offset of %<PRId64> from `%pA' beyond the range of ADDIUPC"
msgstr ""
#: elfxx-mips.c:11678
#: elfxx-mips.c:11676
#, c-format
msgid ""
"%pB: `%pA' start VMA of %#<PRIx64> outside the 32-bit range supported; "
"consider using `-Ttext-segment=...'"
msgstr ""
#: elfxx-mips.c:13424 reloc.c:8417
#: elfxx-mips.c:13422 reloc.c:8417
#, c-format
msgid "%X%P: %pB(%pA): error: relocation for offset %V has no value\n"
msgstr ""
#: elfxx-mips.c:13534 reloc.c:8514
#: elfxx-mips.c:13532 reloc.c:8514
#, c-format
msgid "%X%P: %pB(%pA): relocation \"%pR\" returns an unrecognized value %x\n"
msgstr ""
#: elfxx-mips.c:14736
#: elfxx-mips.c:14734
#, c-format
msgid "%pB: unknown architecture %s"
msgstr ""
#: elfxx-mips.c:15264
#: elfxx-mips.c:15262
#, c-format
msgid "%pB: illegal section name `%pA'"
msgstr ""
#: elfxx-mips.c:15541
#: elfxx-mips.c:15539
#, c-format
msgid "%pB: warning: linking abicalls files with non-abicalls files"
msgstr ""
#: elfxx-mips.c:15558
#: elfxx-mips.c:15556
#, c-format
msgid "%pB: linking 32-bit code with 64-bit code"
msgstr ""
#: elfxx-mips.c:15590 elfxx-mips.c:15656 elfxx-mips.c:15671
#: elfxx-mips.c:15588 elfxx-mips.c:15654 elfxx-mips.c:15669
#, c-format
msgid "%pB: linking %s module with previous %s modules"
msgstr ""
#: elfxx-mips.c:15614
#: elfxx-mips.c:15612
#, c-format
msgid "%pB: ABI mismatch: linking %s module with previous %s modules"
msgstr ""
#: elfxx-mips.c:15639
#: elfxx-mips.c:15637
#, c-format
msgid "%pB: ASE mismatch: linking %s module with previous %s modules"
msgstr ""
#: elfxx-mips.c:15773
#: elfxx-mips.c:15771
#, c-format
msgid ""
"warning: %pB uses unknown floating point ABI %d (set by %pB), %pB uses "
"unknown floating point ABI %d"
msgstr ""
#: elfxx-mips.c:15779
#: elfxx-mips.c:15777
#, c-format
msgid ""
"warning: %pB uses unknown floating point ABI %d (set by %pB), %pB uses %s"
msgstr ""
#: elfxx-mips.c:15785
#: elfxx-mips.c:15783
#, c-format
msgid ""
"warning: %pB uses %s (set by %pB), %pB uses unknown floating point ABI %d"
msgstr ""
#: elfxx-mips.c:15799
#: elfxx-mips.c:15797
#, c-format
msgid "warning: %pB uses %s (set by %pB), %pB uses %s"
msgstr ""
#: elfxx-mips.c:15818
#: elfxx-mips.c:15816
#, c-format
msgid "warning: %pB uses %s (set by %pB), %pB uses unknown MSA ABI %d"
msgstr ""
#: elfxx-mips.c:15830
#: elfxx-mips.c:15828
#, c-format
msgid "warning: %pB uses unknown MSA ABI %d (set by %pB), %pB uses %s"
msgstr ""
#: elfxx-mips.c:15839
#: elfxx-mips.c:15837
#, c-format
msgid ""
"warning: %pB uses unknown MSA ABI %d (set by %pB), %pB uses unknown MSA ABI %"
"d"
msgstr ""
#: elfxx-mips.c:15901
#: elfxx-mips.c:15899
#, c-format
msgid "%pB: endianness incompatible with that of the selected emulation"
msgstr ""
#: elfxx-mips.c:15915
#: elfxx-mips.c:15913
#, c-format
msgid "%pB: ABI is incompatible with that of the selected emulation"
msgstr ""
#: elfxx-mips.c:15968
#: elfxx-mips.c:15966
#, c-format
msgid "%pB: warning: inconsistent ISA between e_flags and .MIPS.abiflags"
msgstr ""
#: elfxx-mips.c:15973
#: elfxx-mips.c:15971
#, c-format
msgid ""
"%pB: warning: inconsistent FP ABI between .gnu.attributes and .MIPS.abiflags"
msgstr ""
#: elfxx-mips.c:15977
#: elfxx-mips.c:15975
#, c-format
msgid "%pB: warning: inconsistent ASEs between e_flags and .MIPS.abiflags"
msgstr ""
#: elfxx-mips.c:15984
#: elfxx-mips.c:15982
#, c-format
msgid ""
"%pB: warning: inconsistent ISA extensions between e_flags and .MIPS.abiflags"
msgstr ""
#: elfxx-mips.c:15988
#: elfxx-mips.c:15986
#, c-format
msgid ""
"%pB: warning: unexpected flag in the flags2 field of .MIPS.abiflags (0x%lx)"
msgstr ""
#: elfxx-mips.c:16179
#: elfxx-mips.c:16177
msgid "-mips32r2 -mfp64 (12 callee-saved)"
msgstr ""
#: elfxx-mips.c:16241 elfxx-mips.c:16252
#: elfxx-mips.c:16239 elfxx-mips.c:16250
msgid "None"
msgstr ""
#: elfxx-mips.c:16243 elfxx-mips.c:16312
#: elfxx-mips.c:16241 elfxx-mips.c:16310
msgid "Unknown"
msgstr ""
#: elfxx-mips.c:16323
#: elfxx-mips.c:16321
#, c-format
msgid "Hard or soft float\n"
msgstr ""
#: elfxx-mips.c:16326
#: elfxx-mips.c:16324
#, c-format
msgid "Hard float (double precision)\n"
msgstr ""
#: elfxx-mips.c:16329
#: elfxx-mips.c:16327
#, c-format
msgid "Hard float (single precision)\n"
msgstr ""
#: elfxx-mips.c:16332
#: elfxx-mips.c:16330
#, c-format
msgid "Soft float\n"
msgstr ""
#: elfxx-mips.c:16335
#: elfxx-mips.c:16333
#, c-format
msgid "Hard float (MIPS32r2 64-bit FPU 12 callee-saved)\n"
msgstr ""
#: elfxx-mips.c:16338
#: elfxx-mips.c:16336
#, c-format
msgid "Hard float (32-bit CPU, Any FPU)\n"
msgstr ""
#: elfxx-mips.c:16341
#: elfxx-mips.c:16339
#, c-format
msgid "Hard float (32-bit CPU, 64-bit FPU)\n"
msgstr ""
#: elfxx-mips.c:16344
#: elfxx-mips.c:16342
#, c-format
msgid "Hard float compat (32-bit CPU, 64-bit FPU)\n"
msgstr ""
#: elfxx-mips.c:16376
#: elfxx-mips.c:16374
#, c-format
msgid " [abi=O32]"
msgstr ""
#: elfxx-mips.c:16378
#: elfxx-mips.c:16376
#, c-format
msgid " [abi=O64]"
msgstr ""
#: elfxx-mips.c:16380
#: elfxx-mips.c:16378
#, c-format
msgid " [abi=EABI32]"
msgstr ""
#: elfxx-mips.c:16382
#: elfxx-mips.c:16380
#, c-format
msgid " [abi=EABI64]"
msgstr ""
#: elfxx-mips.c:16384
#: elfxx-mips.c:16382
#, c-format
msgid " [abi unknown]"
msgstr ""
#: elfxx-mips.c:16386
#: elfxx-mips.c:16384
#, c-format
msgid " [abi=N32]"
msgstr ""
#: elfxx-mips.c:16388
#: elfxx-mips.c:16386
#, c-format
msgid " [abi=64]"
msgstr ""
#: elfxx-mips.c:16390
#: elfxx-mips.c:16388
#, c-format
msgid " [no abi set]"
msgstr ""
#: elfxx-mips.c:16415
#: elfxx-mips.c:16413
#, c-format
msgid " [unknown ISA]"
msgstr ""
#: elfxx-mips.c:16435
#: elfxx-mips.c:16433
#, c-format
msgid " [not 32bitmode]"
msgstr ""
#: elfxx-riscv.c:1660
#: elfxx-riscv.c:1657
#, c-format
msgid "x ISA extension `%s' must be set with the versions"
msgstr ""
#: elfxx-riscv.c:1666
#: elfxx-riscv.c:1663
#, c-format
msgid "cannot find default versions of the ISA extension `%s'"
msgstr ""
#: elfxx-riscv.c:1772
#: elfxx-riscv.c:1769
#, c-format
msgid "%s: first ISA extension must be `e', `i' or `g'"
msgstr ""
#: elfxx-riscv.c:1796
#: elfxx-riscv.c:1793
#, c-format
msgid "%s: unknown standard ISA extension or prefix class `%c'"
msgstr ""
#: elfxx-riscv.c:1832
#: elfxx-riscv.c:1829
#, c-format
msgid "%s: invalid prefixed ISA extension `%s' ends with <number>p"
msgstr ""
#: elfxx-riscv.c:1856
#: elfxx-riscv.c:1853
#, c-format
msgid "%s: unknown prefixed ISA extension `%s'"
msgstr ""
#: elfxx-riscv.c:1880
#: elfxx-riscv.c:1877
#, c-format
msgid "%s: prefixed ISA extension must separate with _"
msgstr ""
#: elfxx-riscv.c:1934
#: elfxx-riscv.c:1931
#, c-format
msgid "rv%d does not support the `e' extension"
msgstr ""
#: elfxx-riscv.c:1942
#: elfxx-riscv.c:1939
#, c-format
msgid "rv%d does not support the `q' extension"
msgstr ""
#: elfxx-riscv.c:1949
#: elfxx-riscv.c:1946
msgid "`zfinx' is conflict with the `f/d/q/zfh/zfhmin' extension"
msgstr ""
#: elfxx-riscv.c:1970
#: elfxx-riscv.c:1967
msgid "zvl*b extensions need to enable either `v' or `zve' extension"
msgstr ""
#: elfxx-riscv.c:2032
#: elfxx-riscv.c:2029
#, c-format
msgid "%s: ISA string cannot contain uppercase letters"
msgstr ""
#: elfxx-riscv.c:2060
#: elfxx-riscv.c:2057
#, c-format
msgid "%s: ISA string must begin with rv32 or rv64"
msgstr ""
#: elfxx-riscv.c:2286
#: elfxx-riscv.c:2283
#, c-format
msgid "invalid ISA extension ends with <number>p in .option arch `%s'"
msgstr ""
#: elfxx-riscv.c:2309
#: elfxx-riscv.c:2306
#, c-format
msgid "unknown ISA extension `%s' in .option arch `%s'"
msgstr ""
#: elfxx-riscv.c:2320
#: elfxx-riscv.c:2317
#, c-format
msgid "cannot + or - base extension `%s' in .option arch `%s'"
msgstr ""
#: elfxx-riscv.c:2528 elfxx-riscv.c:2730
#: elfxx-riscv.c:2525 elfxx-riscv.c:2727
msgid "internal: unreachable INSN_CLASS_*"
msgstr ""
#: elfxx-riscv.c:2561
#: elfxx-riscv.c:2558
msgid "m' or `zmmul"
msgstr ""
#: elfxx-riscv.c:2577
#: elfxx-riscv.c:2574
msgid "f' and `c"
msgstr ""
#: elfxx-riscv.c:2585
#: elfxx-riscv.c:2582
msgid "d' and `c"
msgstr ""
#: elfxx-riscv.c:2591
#: elfxx-riscv.c:2588
msgid "f' or `zfinx"
msgstr ""
#: elfxx-riscv.c:2593
#: elfxx-riscv.c:2590
msgid "d' or `zdinx"
msgstr ""
#: elfxx-riscv.c:2595
#: elfxx-riscv.c:2592
msgid "q' or `zqinx"
msgstr ""
#: elfxx-riscv.c:2597
#: elfxx-riscv.c:2594
msgid "zfh' or `zhinx"
msgstr ""
#: elfxx-riscv.c:2601
#: elfxx-riscv.c:2598
msgid "zfhmin' or `zhinxmin"
msgstr ""
#: elfxx-riscv.c:2612
#: elfxx-riscv.c:2609
msgid "zfhmin' and `d', or `zhinxmin' and `zdinx"
msgstr ""
#: elfxx-riscv.c:2623
#: elfxx-riscv.c:2620
msgid "zfhmin' and `q', or `zhinxmin' and `zqinx"
msgstr ""
#: elfxx-riscv.c:2629
#: elfxx-riscv.c:2626
msgid "d' and `zfa"
msgstr ""
#: elfxx-riscv.c:2637
#: elfxx-riscv.c:2634
msgid "q' and `zfa"
msgstr ""
#: elfxx-riscv.c:2645
#: elfxx-riscv.c:2642
msgid "zfh' and `zfa"
msgstr ""
#: elfxx-riscv.c:2665
#: elfxx-riscv.c:2662
msgid "zbb' or `zbkb"
msgstr ""
#: elfxx-riscv.c:2667
#: elfxx-riscv.c:2664
msgid "zbc' or `zbkc"
msgstr ""
#: elfxx-riscv.c:2675
#: elfxx-riscv.c:2672
msgid "zknd' or `zkne"
msgstr ""
#: elfxx-riscv.c:2681
#: elfxx-riscv.c:2678
msgid "v' or `zve64x' or `zve32x"
msgstr ""
#: elfxx-riscv.c:2683
#: elfxx-riscv.c:2680
msgid "v' or `zve64d' or `zve64f' or `zve32f"
msgstr ""
#: elfxx-riscv.c:2685
#: elfxx-riscv.c:2682
msgid "zvbb"
msgstr ""
#: elfxx-riscv.c:2687
#: elfxx-riscv.c:2684
msgid "zvbc"
msgstr ""
#: elfxx-riscv.c:2689
#: elfxx-riscv.c:2686
msgid "zvkg"
msgstr ""
#: elfxx-riscv.c:2691
#: elfxx-riscv.c:2688
msgid "zvkned"
msgstr ""
#: elfxx-riscv.c:2693
#: elfxx-riscv.c:2690
msgid "zvknha"
msgstr ""
#: elfxx-riscv.c:2695
#: elfxx-riscv.c:2692
msgid "zvknhb"
msgstr ""
#: elfxx-riscv.c:2697
#: elfxx-riscv.c:2694
msgid "zvksed"
msgstr ""
#: elfxx-riscv.c:2699
#: elfxx-riscv.c:2696
msgid "zvksh"
msgstr ""
#: elfxx-riscv.c:2703
#: elfxx-riscv.c:2700
msgid "h"
msgstr ""
@ -9100,7 +9101,7 @@ msgstr ""
msgid "Internal error: unreachable."
msgstr ""
#: elfnn-loongarch.c:3848 elfnn-riscv.c:4766
#: elfnn-loongarch.c:3809 elfnn-riscv.c:4766
#, c-format
msgid ""
"%pB(%pA+%#<PRIx64>): %<PRId64> bytes required for alignment to %<PRId64>-"

4
bfd/reloc.c
View File

@ -7753,6 +7753,10 @@ ENUM
BFD_RELOC_BPF_64
ENUMX
BFD_RELOC_BPF_DISP32
ENUMX
BFD_RELOC_BPF_DISPCALL32
ENUMX
BFD_RELOC_BPF_DISP16
ENUMDOC
Linux eBPF relocations.

3
bfd/section.c
View File

@ -359,6 +359,9 @@ CODE_FRAGMENT
. TMS320C54X only. *}
.#define SEC_TIC54X_BLOCK 0x10000000
.
. {* This section has the SHF_X86_64_LARGE flag. This is ELF x86-64 only. *}
.#define SEC_ELF_LARGE 0x10000000
.
. {* Conditionally link this section; do not link if there are no
. references found to any symbol in the section. This is for TI
. TMS320C54X only. *}

2
bfd/version.h
View File

@ -16,7 +16,7 @@
In releases, the date is not included in either version strings or
sonames. */
#define BFD_VERSION_DATE 20230730
#define BFD_VERSION_DATE 20230802
#define BFD_VERSION @bfd_version@
#define BFD_VERSION_STRING @bfd_version_package@ @bfd_version_string@
#define REPORT_BUGS_TO @report_bugs_to@

2
bfd/version.m4
View File

@ -1 +1 @@
m4_define([BFD_VERSION], [2.41])
m4_define([BFD_VERSION], [2.41.50])

25
binutils/ChangeLog
View File

@ -1,7 +1,26 @@
2023-07-30 Nick Clifton <nickc@redhat.com>
2023-07-30 Jose E. Marchesi <jose.marchesi@oracle.com>
This is the 2.41 release.
* configure: Regenerate.
* readelf.c (get_machine_flags): Recognize and pretty print BPF
machine flags.
2023-07-24 Johannes Schauer Marin Rodrigues <josch@debian.org>
* doc/binutils.texi (objcopy): Document change in behaviour of
objcopy's --preserve-dates command line option.
2023-07-09 Fangrui Song <maskray@google.com>
PR 30592
* NEWS: Mention the new feature for objcopy.
* doc/binutils.texi: Mention "large".
* objcopy.c (parse_flags): Parse "large".
(check_new_section_flags): Error if "large" is used with a
non-x86-64 ELF target.
* testsuite/binutils-all/x86-64/large-sections.d: New.
* testsuite/binutils-all/x86-64/large-sections.s: New.
* testsuite/binutils-all/x86-64/large-sections-i386.d: New.
* testsuite/binutils-all/x86-64/large-sections-2.d: New.
* testsuite/binutils-all/x86-64/large-sections-2-x32.d: New.
2023-07-03 Nick Clifton <nickc@redhat.com>

3
binutils/NEWS
View File

@ -1,5 +1,8 @@
-*- text -*-
* objcopy --set-section-flags now supports "large" to set SHF_X86_64_LARGE
for ELF x86-64 objects.
Changes in 2.41:
* The MIPS port now supports the Sony Interactive Entertainment Allegrex

87
binutils/README-how-to-make-a-release
View File

@ -34,6 +34,10 @@ How to perform a release.
directories and the top level Makefile and configure files. Also
consider updating the toplevel libtool files.
-------------------------------------------------
How to create the release branch.
-------------------------------------------------
Approx time to complete from here: 2 hours ....
2.5 If you have not built from the sources recently then now is the
@ -52,8 +56,8 @@ Approx time to complete from here: 2 hours ....
4. Create the release branch using:
git branch binutils-2_41-branch
git push origin binutils-2_41-branch
git branch binutils-2_42-branch
git push origin binutils-2_42-branch
If you get a message like:
@ -85,8 +89,8 @@ Approx time to complete from here: 2 hours ....
ask Joel Brobecker <brobecker AT adacore DOT com>.
7. Rename the current HEAD version entry in Bugzilla, and create a
new one. E.g. rename "2.41 (HEAD)" to 2.41, and create
"2.42 (HEAD)":
new one. E.g. rename "2.42 (HEAD)" to 2.42, and create
"2.43 (HEAD)":
https://sourceware.org/bugzilla/editversions.cgi?product=binutils
@ -99,13 +103,13 @@ Approx time to complete from here: 2 hours ....
and the version number on the MAINLINE should be set to 2.41.50 -
ie half way to 2.42 release.
So the branch bfd/version.m4 has:
So the BRANCH bfd/version.m4 has:
m4_define([BFD_VERSION], [2.40.90])
m4_define([BFD_VERSION], [2.41.90])
and the mainline has:
and the MAINLINE has:
m4_define([BFD_VERSION], [2.41.50])
m4_define([BFD_VERSION], [2.42.50])
Regenerate various files on both branch and HEAD by configuring
with "--enable-maintainer-mode --enable-gold --enable-shared" and then building
@ -137,21 +141,21 @@ Approx time to complete from here: 2 hours ....
xz -9 binutils-<release>.tar
eg:
touch -d 2023-06-01 binutils-2.40.90/gas/doc/.dirstamp
tar rvf binutils-2.40.90.tar binutils-2.40.90/gas/doc/.ditstamp
rm binutils-2.40.90.tar.xz
xz -9 binutils-2.40.90.tar
touch -d 2024-01-01 binutils-2.41.90/gas/doc/.dirstamp
tar rvf binutils-2.41.90.tar binutils-2.41.90/gas/doc/.dirstamp
rm binutils-2.41.90.tar.xz
xz -9 binutils-2.41.90.tar
...END OF FIXME
c. Build a test target using this tarball.
cp binutils-2.40.90.tar.xz /dev/shm
cp binutils-2.41.90.tar.xz /dev/shm
pushd /dev/shm
tar xvf binutils-2.40.90.tar.xz
tar xvf binutils-2.41.90.tar.xz
mkdir build
cd build
../binutils-2.40.90/configure --quiet --enable-gold
../binutils-2.41.90/configure --quiet --enable-gold
make
popd
@ -173,11 +177,11 @@ Approx time to complete from here: 2 hours ....
------------------------------------------------------------------------
Dear Translation Project
The 2.40 release branch has been created for the GNU Binutils project.
The 2.42 release branch has been created for the GNU Binutils project.
A snapshot of the branch sources can be found here:
https://sourceware.org/pub/binutils/snapshots/binutils-2.39.90.tar.xz
https://sourceware.org/pub/binutils/snapshots/binutils-2.41.90.tar.xz
We hope to make the official release of the sources on the <DATE>
although that could change if there are important bugs that need to
@ -188,7 +192,7 @@ Dear Translation Project
binutils mailing list. Set a date for when the release will
actually happen. Something like:
------------------------------------------------------------------------
Hi Everyone,
The <NEW_VERSION> branch has now been created:
@ -219,25 +223,39 @@ Hi Everyone,
architectures...
==============================================================================
==============================================================================
When the time comes to actually make the release....
For the next few weeks, monitor the mailing list for new translations
and respond to any requests to have patches applied to the branch.
==============================================================================
==============================================================================
Then, a couple of weeks later ...
-------------------------------------------------
How to create the release.
-------------------------------------------------
20. Make sure that the branch sources still build, test and install
correctly. Make sure that the sources are clean, without any
patch files (.reg .orig *~) left over.
cd <branch>
git pull
git clean -fdx
cd <builds>
make
21. a. Update the release number in bfd/version.m4 on the release
branch to a whole new minor version number, without a point
value. Eg "2.40.90" becomes "2.41". NB/ Not: "2.41.00"
value. Eg "2.41.90" becomes "2.42". NB/ Not: "2.42.00"
b. Change bfd/development.sh to set all values to "false".
c. Regenerate the configure and makefiles. And *info* files.
cd <build-configured-with-enable-maintainer-mode>
make all-gas all-ld all-binutils all-gprof all-gold all-gprofng all-libctf
make info
@ -259,7 +277,7 @@ When the time comes to actually make the release....
need to agree to have it there.
e. Add ChangeLog entries for all of the updates and add a
"this-is-the-2.41-release" comment and commit.
"this-is-the-2.42-release" comment and commit.
git add .
git commit
@ -281,7 +299,11 @@ When the time comes to actually make the release....
DEVO_SUPPORT variable in the src-release.sh script. If they are
needed then add them.
Create the release tarballs:
PARANOIA: Check that there are no pending commits:
git status
Then create the release tarballs:
./src-release.sh -b -g -l -x binutils
@ -326,14 +348,15 @@ When the time comes to actually make the release....
[optional: add "-u XXXXX" to sign with a gpg key]
enter a tag message such as: "Official GNU Binutils 2.4x release"
git tag -a binutils-2_41 -u DD9E3C4F <=== Be careful to get the tag right
git tag -a <TAG> -u <Your Key>
git tag -a binutils-2_42 -u DD9E3C4F <=== Be careful to get the tag right
NB/ If you do sign the binaries make sure to use a key
that has been published with the FSF.
Then push the release:
git push origin binutils-2_41
git push origin binutils-2_42
If you get an error message along the lines of:
"Invalid revision range ..."
@ -341,7 +364,7 @@ When the time comes to actually make the release....
27. Upload the tarballs to ftp.gnu.org.
for A in bz2 gz lz xz ; do gnupload --to ftp.gnu.org:binutils binutils-2.41.tar.$A ; done
gnupload --to ftp.gnu.org:binutils binutils-2.42.tar.*
Be prepared to provide the password for the key, if you
signed the binaries.
@ -369,7 +392,7 @@ When the time comes to actually make the release....
29. Update web pages. For sourceware.org:
Create a new documentation folder on the sourceware.org web
pages as /sourceware/www/sourceware/htdocs/binutils/docs-2.3x.
pages as /sourceware/www/sourceware/htdocs/binutils/docs-2.4x.
sftp sourceware.org
cd /sourceware/www/sourceware/htdocs/binutils
@ -378,9 +401,9 @@ When the time comes to actually make the release....
mkdir as
mkdir bfd
mkdir binutils
mkdir gprof
mkdir gprof [NB/ gprofng is not needed]
mkdir ld
cd ../docs-2.3(x-1)
cd ../docs-2.4(x-1)
get index.html
Update the (local copy of the) index.html file to point to the
@ -412,7 +435,7 @@ When the time comes to actually make the release....
put bfd.pdf
cd binutils
lcd ../../binutils/binutils <=== NB/ Path not like others
lcd ../../binutils/binutils_html <=== NB/ Path not like others
put *
cd ..
lcd ../doc <=== Also not like the others
@ -473,7 +496,7 @@ Hi FSF Webmasters,
https://www.gnu.org/software/binutils/binutils.html
be updated to indicate that there is now a newer version available
(2.3x). I have already updated the related page on the sourceware
(2.4x). I have already updated the related page on the sourceware
website so this might be useful as a template:
https://sourceware.org/binutils/
@ -536,7 +559,7 @@ Cheers
date suffix keeps the version lower than the trunk version.
Regenerate files. Commit these changes.
33. Email the binutils list telling everyone that the 2.34 branch
33. Email the binutils list telling everyone that the 2.4x branch
is now open for business as usual and that patches no longer
need special approval.
@ -544,7 +567,7 @@ Cheers
any pending obsolete targets into the definitely obsolete
section. Create a changelog entry and commit.
Sit back and relax, you are all done.
--------------------------------------------------------------------------
How to perform a POINT release.
--------------------------------------------------------------------------

6
binutils/bucomm.h
View File

@ -76,12 +76,6 @@ extern void set_times (const char *, const struct stat *);
extern int smart_rename (const char *, const char *, int,
struct stat *, bool);
/* In libiberty. */
void *xmalloc (size_t);
void *xrealloc (void *, size_t);
#if __GNUC__ >= 7
#define _mul_overflow(a, b, res) __builtin_mul_overflow (a, b, res)
#else

266
binutils/configure vendored
View File

@ -1,6 +1,6 @@
#! /bin/sh
# Guess values for system-dependent variables and create Makefiles.
# Generated by GNU Autoconf 2.69 for binutils 2.41.
# Generated by GNU Autoconf 2.69 for binutils 2.41.50.
#
#
# Copyright (C) 1992-1996, 1998-2012 Free Software Foundation, Inc.
@ -587,8 +587,8 @@ MAKEFLAGS=
# Identity of this package.
PACKAGE_NAME='binutils'
PACKAGE_TARNAME='binutils'
PACKAGE_VERSION='2.41'
PACKAGE_STRING='binutils 2.41'
PACKAGE_VERSION='2.41.50'
PACKAGE_STRING='binutils 2.41.50'
PACKAGE_BUGREPORT=''
PACKAGE_URL=''
@ -1401,7 +1401,7 @@ if test "$ac_init_help" = "long"; then
# Omit some internal or obsolete options to make the list less imposing.
# This message is too long to be a string in the A/UX 3.1 sh.
cat <<_ACEOF
\`configure' configures binutils 2.41 to adapt to many kinds of systems.
\`configure' configures binutils 2.41.50 to adapt to many kinds of systems.
Usage: $0 [OPTION]... [VAR=VALUE]...
@ -1472,7 +1472,7 @@ fi
if test -n "$ac_init_help"; then
case $ac_init_help in
short | recursive ) echo "Configuration of binutils 2.41:";;
short | recursive ) echo "Configuration of binutils 2.41.50:";;
esac
cat <<\_ACEOF
@ -1631,7 +1631,7 @@ fi
test -n "$ac_init_help" && exit $ac_status
if $ac_init_version; then
cat <<\_ACEOF
binutils configure 2.41
binutils configure 2.41.50
generated by GNU Autoconf 2.69
Copyright (C) 2012 Free Software Foundation, Inc.
@ -2099,7 +2099,7 @@ cat >config.log <<_ACEOF
This file contains any messages produced by compilers while
running configure, to aid debugging if configure makes a mistake.
It was created by binutils $as_me 2.41, which was
It was created by binutils $as_me 2.41.50, which was
generated by GNU Autoconf 2.69. Invocation command line was
$ $0 $@
@ -3081,7 +3081,7 @@ fi
# Define the identity of the package.
PACKAGE='binutils'
VERSION='2.41'
VERSION='2.41.50'
cat >>confdefs.h <<_ACEOF
@ -14542,7 +14542,6 @@ _ACEOF
fi
all_targets=false
BUILD_SRCONV=
BUILD_DLLTOOL=
DLLTOOL_DEFS=
@ -14559,140 +14558,137 @@ od_vectors=
for targ in $target $canon_targets
do
if test "x$targ" = "xall"; then
all_targets=true
case $targ in
all | *-*-hms*)
BUILD_SRCONV='$(SRCONV_PROG)'
BUILD_MISC="${BUILD_MISC} "'bin2c$(EXEEXT_FOR_BUILD)'
BUILD_WINDRES='$(WINDRES_PROG)$(EXEEXT)'
BUILD_WINDMC='$(WINDMC_PROG)$(EXEEXT)'
;;
esac
case $targ in
all | spu-*-*)
BUILD_MISC='bin2c$(EXEEXT_FOR_BUILD)'
;;
esac
case $targ in
powerpc*-*-linux* | powerpc*-*-elf* | powerpc*-*-eabi*)
BUILD_INSTALL_MISC=embedspu
;;
esac
case $targ in
mep-*)
OBJDUMP_DEFS="-DSKIP_ZEROES=256 -DSKIP_ZEROES_AT_END=0"
;;
powerpc*-aix5.[01])
;;
powerpc*-aix[5-9].*)
OBJDUMP_DEFS="-DAIX_WEAK_SUPPORT"
;;
esac
case $targ in
aarch64-*-mingw*)
BUILD_DLLTOOL='$(DLLTOOL_PROG)$(EXEEXT)'
if test -z "$DLLTOOL_DEFAULT"; then
DLLTOOL_DEFAULT="-DDLLTOOL_DEFAULT_I386"
DLLTOOL_DEFAULT="-DDLLTOOL_DEFAULT_AARCH64"
fi
DLLTOOL_DEFS="$DLLTOOL_DEFS -DDLLTOOL_AARCH64"
BUILD_WINDRES='$(WINDRES_PROG)$(EXEEXT)'
BUILD_WINDMC='$(WINDMC_PROG)$(EXEEXT)'
BUILD_DLLWRAP='$(DLLWRAP_PROG)$(EXEEXT)'
;;
arm-wince-pe* | arm-*-wince | arm*-*-cegcc* | arm*-*-mingw32ce*)
BUILD_DLLTOOL='$(DLLTOOL_PROG)$(EXEEXT)'
if test -z "$DLLTOOL_DEFAULT"; then
DLLTOOL_DEFAULT="-DDLLTOOL_DEFAULT_ARM_WINCE"
fi
DLLTOOL_DEFS="$DLLTOOL_DEFS -DDLLTOOL_ARM_WINCE -DDLLTOOL_ARM"
BUILD_WINDRES='$(WINDRES_PROG)$(EXEEXT)'
BUILD_WINDMC='$(WINDMC_PROG)$(EXEEXT)'
;;
arm-*-pe*)
BUILD_DLLTOOL='$(DLLTOOL_PROG)$(EXEEXT)'
if test -z "$DLLTOOL_DEFAULT"; then
DLLTOOL_DEFAULT="-DDLLTOOL_DEFAULT_ARM"
fi
DLLTOOL_DEFS="$DLLTOOL_DEFS -DDLLTOOL_ARM"
BUILD_WINDRES='$(WINDRES_PROG)$(EXEEXT)'
BUILD_WINDMC='$(WINDMC_PROG)$(EXEEXT)'
;;
i[3-7]86-*-pe* | i[3-7]86-*-cygwin* | i[3-7]86-*-mingw32** | all)
BUILD_DLLTOOL='$(DLLTOOL_PROG)$(EXEEXT)'
if test -z "$DLLTOOL_DEFAULT"; then
DLLTOOL_DEFAULT="-DDLLTOOL_DEFAULT_I386"
fi
DLLTOOL_DEFS="$DLLTOOL_DEFS -DDLLTOOL_I386"
BUILD_WINDRES='$(WINDRES_PROG)$(EXEEXT)'
BUILD_WINDMC='$(WINDMC_PROG)$(EXEEXT)'
BUILD_DLLWRAP='$(DLLWRAP_PROG)$(EXEEXT)'
od_vectors="$od_vectors objdump_private_desc_xcoff objdump_private_desc_pe"
else
case $targ in
*-*-hms*) BUILD_SRCONV='$(SRCONV_PROG)' ;;
esac
case $targ in
aarch64-*-mingw*)
BUILD_DLLTOOL='$(DLLTOOL_PROG)$(EXEEXT)'
if test -z "$DLLTOOL_DEFAULT"; then
DLLTOOL_DEFAULT="-DDLLTOOL_DEFAULT_AARCH64"
fi
DLLTOOL_DEFS="$DLLTOOL_DEFS -DDLLTOOL_AARCH64"
BUILD_WINDRES='$(WINDRES_PROG)$(EXEEXT)'
BUILD_WINDMC='$(WINDMC_PROG)$(EXEEXT)'
BUILD_DLLWRAP='$(DLLWRAP_PROG)$(EXEEXT)'
;;
arm-wince-pe* | arm-*-wince | arm*-*-cegcc* | arm*-*-mingw32ce*)
BUILD_DLLTOOL='$(DLLTOOL_PROG)$(EXEEXT)'
if test -z "$DLLTOOL_DEFAULT"; then
DLLTOOL_DEFAULT="-DDLLTOOL_DEFAULT_ARM_WINCE"
fi
DLLTOOL_DEFS="$DLLTOOL_DEFS -DDLLTOOL_ARM_WINCE -DDLLTOOL_ARM"
BUILD_WINDRES='$(WINDRES_PROG)$(EXEEXT)'
BUILD_WINDMC='$(WINDMC_PROG)$(EXEEXT)'
;;
arm-*-pe*)
BUILD_DLLTOOL='$(DLLTOOL_PROG)$(EXEEXT)'
if test -z "$DLLTOOL_DEFAULT"; then
DLLTOOL_DEFAULT="-DDLLTOOL_DEFAULT_ARM"
fi
DLLTOOL_DEFS="$DLLTOOL_DEFS -DDLLTOOL_ARM"
BUILD_WINDRES='$(WINDRES_PROG)$(EXEEXT)'
BUILD_WINDMC='$(WINDMC_PROG)$(EXEEXT)'
;;
x86_64-*-mingw* | x86_64-*-cygwin*)
BUILD_DLLTOOL='$(DLLTOOL_PROG)$(EXEEXT)'
if test -z "$DLLTOOL_DEFAULT"; then
DLLTOOL_DEFAULT="-DDLLTOOL_DEFAULT_MX86_64"
fi
DLLTOOL_DEFS="$DLLTOOL_DEFS -DDLLTOOL_MX86_64"
BUILD_WINDRES='$(WINDRES_PROG)$(EXEEXT)'
BUILD_WINDMC='$(WINDMC_PROG)$(EXEEXT)'
BUILD_DLLWRAP='$(DLLWRAP_PROG)$(EXEEXT)'
;;
i[3-7]86-*-pe* | i[3-7]86-*-cygwin* | i[3-7]86-*-mingw32**)
BUILD_DLLTOOL='$(DLLTOOL_PROG)$(EXEEXT)'
if test -z "$DLLTOOL_DEFAULT"; then
;;
i[3-7]86-*-interix)
BUILD_DLLTOOL='$(DLLTOOL_PROG)'
if test -z "$DLLTOOL_DEFAULT"; then
DLLTOOL_DEFAULT="-DDLLTOOL_DEFAULT_I386"
fi
DLLTOOL_DEFS="$DLLTOOL_DEFS -DDLLTOOL_I386"
BUILD_WINDRES='$(WINDRES_PROG)$(EXEEXT)'
BUILD_WINDMC='$(WINDMC_PROG)$(EXEEXT)'
BUILD_DLLWRAP='$(DLLWRAP_PROG)$(EXEEXT)'
;;
i[3-7]86-*-interix)
BUILD_DLLTOOL='$(DLLTOOL_PROG)'
if test -z "$DLLTOOL_DEFAULT"; then
DLLTOOL_DEFAULT="-DDLLTOOL_DEFAULT_I386"
fi
DLLTOOL_DEFS="$DLLTOOL_DEFS -DDLLTOOL_I386"
;;
powerpc*-aix5.[01])
;;
powerpc*-aix[5-9].*)
OBJDUMP_DEFS="-DAIX_WEAK_SUPPORT"
;;
powerpc*-*-linux* | powerpc*-*-elf* | powerpc*-*-eabi*)
case "$BUILD_INSTALL_MISC" in
*embedspu*) ;;
*) BUILD_INSTALL_MISC="${BUILD_INSTALL_MISC} embedspu"
esac
;;
sh*-*-pe)
BUILD_DLLTOOL='$(DLLTOOL_PROG)$(EXEEXT)'
if test -z "$DLLTOOL_DEFAULT"; then
DLLTOOL_DEFAULT="-DDLLTOOL_DEFAULT_SH"
fi
DLLTOOL_DEFS="$DLLTOOL_DEFS -DDLLTOOL_SH"
BUILD_WINDRES='$(WINDRES_PROG)$(EXEEXT)'
BUILD_WINDMC='$(WINDMC_PROG)$(EXEEXT)'
;;
spu-*-*)
BUILD_MISC="${BUILD_MISC} "'bin2c$(EXEEXT_FOR_BUILD)'
;;
mcore-*-pe)
BUILD_DLLTOOL='$(DLLTOOL_PROG)$(EXEEXT)'
if test -z "$DLLTOOL_DEFAULT"; then
fi
DLLTOOL_DEFS="$DLLTOOL_DEFS -DDLLTOOL_I386"
;;
mcore-*-pe)
BUILD_DLLTOOL='$(DLLTOOL_PROG)$(EXEEXT)'
if test -z "$DLLTOOL_DEFAULT"; then
DLLTOOL_DEFAULT="-DDLLTOOL_DEFAULT_MCORE"
fi
DLLTOOL_DEFS="$DLLTOOL_DEFS -DDLLTOOL_MCORE"
BUILD_WINDRES='$(WINDRES_PROG)$(EXEEXT)'
BUILD_WINDMC='$(WINDMC_PROG)$(EXEEXT)'
;;
mcore-*-elf)
BUILD_DLLTOOL='$(DLLTOOL_PROG)$(EXEEXT)'
if test -z "$DLLTOOL_DEFAULT"; then
fi
DLLTOOL_DEFS="$DLLTOOL_DEFS -DDLLTOOL_MCORE"
BUILD_WINDRES='$(WINDRES_PROG)$(EXEEXT)'
BUILD_WINDMC='$(WINDMC_PROG)$(EXEEXT)'
;;
mcore-*-elf)
BUILD_DLLTOOL='$(DLLTOOL_PROG)$(EXEEXT)'
if test -z "$DLLTOOL_DEFAULT"; then
DLLTOOL_DEFAULT="-DDLLTOOL_DEFAULT_MCORE_ELF"
fi
DLLTOOL_DEFS="$DLLTOOL_DEFS -DDLLTOOL_MCORE_ELF"
;;
mep-*)
OBJDUMP_DEFS="-DSKIP_ZEROES=256 -DSKIP_ZEROES_AT_END=0"
;;
esac
fi
DLLTOOL_DEFS="$DLLTOOL_DEFS -DDLLTOOL_MCORE_ELF"
;;
sh*-*-pe)
BUILD_DLLTOOL='$(DLLTOOL_PROG)$(EXEEXT)'
if test -z "$DLLTOOL_DEFAULT"; then
DLLTOOL_DEFAULT="-DDLLTOOL_DEFAULT_SH"
fi
DLLTOOL_DEFS="$DLLTOOL_DEFS -DDLLTOOL_SH"
BUILD_WINDRES='$(WINDRES_PROG)$(EXEEXT)'
BUILD_WINDMC='$(WINDMC_PROG)$(EXEEXT)'
;;
x86_64-*-mingw* | x86_64-*-cygwin*)
BUILD_DLLTOOL='$(DLLTOOL_PROG)$(EXEEXT)'
if test -z "$DLLTOOL_DEFAULT"; then
DLLTOOL_DEFAULT="-DDLLTOOL_DEFAULT_MX86_64"
fi
DLLTOOL_DEFS="$DLLTOOL_DEFS -DDLLTOOL_MX86_64"
BUILD_WINDRES='$(WINDRES_PROG)$(EXEEXT)'
BUILD_WINDMC='$(WINDMC_PROG)$(EXEEXT)'
BUILD_DLLWRAP='$(DLLWRAP_PROG)$(EXEEXT)'
;;
esac
# Add objdump private vectors.
case $targ in
avr-*-*)
od_vectors="$od_vectors objdump_private_desc_elf32_avr"
;;
powerpc*-*-aix* | rs6000-*-aix*)
od_vectors="$od_vectors objdump_private_desc_xcoff"
;;
*-*-pe* | *-*-cygwin* | *-*-mingw*)
od_vectors="$od_vectors objdump_private_desc_pe"
;;
*-*-darwin*)
od_vectors="$od_vectors objdump_private_desc_mach_o"
;;
esac
fi
# Add objdump private vectors.
case $targ in
all)
od_vectors="objdump_private_desc_elf32_avr objdump_private_desc_xcoff\
objdump_private_desc_pe objdump_private_desc_mach_o"
;;
avr-*-*)
od_vectors="$od_vectors objdump_private_desc_elf32_avr"
;;
powerpc*-*-aix* | rs6000-*-aix*)
od_vectors="$od_vectors objdump_private_desc_xcoff"
;;
*-*-pe* | *-*-cygwin* | *-*-mingw*)
od_vectors="$od_vectors objdump_private_desc_pe"
;;
*-*-darwin*)
od_vectors="$od_vectors objdump_private_desc_mach_o"
;;
esac
done
# Uniq objdump private vector, build objdump target ofiles.
@ -15332,7 +15328,7 @@ cat >>$CONFIG_STATUS <<\_ACEOF || ac_write_fail=1
# report actual input values of CONFIG_FILES etc. instead of their
# values after options handling.
ac_log="
This file was extended by binutils $as_me 2.41, which was
This file was extended by binutils $as_me 2.41.50, which was
generated by GNU Autoconf 2.69. Invocation command line was
CONFIG_FILES = $CONFIG_FILES
@ -15398,7 +15394,7 @@ _ACEOF
cat >>$CONFIG_STATUS <<_ACEOF || ac_write_fail=1
ac_cs_config="`$as_echo "$ac_configure_args" | sed 's/^ //; s/[\\""\`\$]/\\\\&/g'`"
ac_cs_version="\\
binutils config.status 2.41
binutils config.status 2.41.50
configured by $0, generated by GNU Autoconf 2.69,
with options \\"\$ac_cs_config\\"

256
binutils/configure.ac
View File

@ -319,7 +319,6 @@ fi
AC_CHECK_HEADER(iconv.h)
AM_ICONV
all_targets=false
BUILD_SRCONV=
BUILD_DLLTOOL=
DLLTOOL_DEFS=
@ -336,148 +335,143 @@ od_vectors=
for targ in $target $canon_targets
do
if test "x$targ" = "xall"; then
all_targets=true
case $targ in
all | *-*-hms*)
BUILD_SRCONV='$(SRCONV_PROG)'
BUILD_MISC="${BUILD_MISC} "'bin2c$(EXEEXT_FOR_BUILD)'
BUILD_WINDRES='$(WINDRES_PROG)$(EXEEXT)'
BUILD_WINDMC='$(WINDMC_PROG)$(EXEEXT)'
;;
esac
case $targ in
all | spu-*-*)
BUILD_MISC='bin2c$(EXEEXT_FOR_BUILD)'
;;
esac
case $targ in
powerpc*-*-linux* | powerpc*-*-elf* | powerpc*-*-eabi*)
BUILD_INSTALL_MISC=embedspu
;;
esac
case $targ in
mep-*)
OBJDUMP_DEFS="-DSKIP_ZEROES=256 -DSKIP_ZEROES_AT_END=0"
;;
changequote(,)dnl
powerpc*-aix5.[01])
;;
powerpc*-aix[5-9].*)
changequote([,])dnl
OBJDUMP_DEFS="-DAIX_WEAK_SUPPORT"
;;
esac
case $targ in
aarch64-*-mingw*)
BUILD_DLLTOOL='$(DLLTOOL_PROG)$(EXEEXT)'
if test -z "$DLLTOOL_DEFAULT"; then
DLLTOOL_DEFAULT="-DDLLTOOL_DEFAULT_I386"
DLLTOOL_DEFAULT="-DDLLTOOL_DEFAULT_AARCH64"
fi
DLLTOOL_DEFS="$DLLTOOL_DEFS -DDLLTOOL_AARCH64"
BUILD_WINDRES='$(WINDRES_PROG)$(EXEEXT)'
BUILD_WINDMC='$(WINDMC_PROG)$(EXEEXT)'
BUILD_DLLWRAP='$(DLLWRAP_PROG)$(EXEEXT)'
;;
arm-wince-pe* | arm-*-wince | arm*-*-cegcc* | arm*-*-mingw32ce*)
BUILD_DLLTOOL='$(DLLTOOL_PROG)$(EXEEXT)'
if test -z "$DLLTOOL_DEFAULT"; then
DLLTOOL_DEFAULT="-DDLLTOOL_DEFAULT_ARM_WINCE"
fi
DLLTOOL_DEFS="$DLLTOOL_DEFS -DDLLTOOL_ARM_WINCE -DDLLTOOL_ARM"
BUILD_WINDRES='$(WINDRES_PROG)$(EXEEXT)'
BUILD_WINDMC='$(WINDMC_PROG)$(EXEEXT)'
;;
arm-*-pe*)
BUILD_DLLTOOL='$(DLLTOOL_PROG)$(EXEEXT)'
if test -z "$DLLTOOL_DEFAULT"; then
DLLTOOL_DEFAULT="-DDLLTOOL_DEFAULT_ARM"
fi
DLLTOOL_DEFS="$DLLTOOL_DEFS -DDLLTOOL_ARM"
BUILD_WINDRES='$(WINDRES_PROG)$(EXEEXT)'
BUILD_WINDMC='$(WINDMC_PROG)$(EXEEXT)'
;;
changequote(,)dnl
i[3-7]86-*-pe* | i[3-7]86-*-cygwin* | i[3-7]86-*-mingw32** | all)
changequote([,])dnl
BUILD_DLLTOOL='$(DLLTOOL_PROG)$(EXEEXT)'
if test -z "$DLLTOOL_DEFAULT"; then
DLLTOOL_DEFAULT="-DDLLTOOL_DEFAULT_I386"
fi
DLLTOOL_DEFS="$DLLTOOL_DEFS -DDLLTOOL_I386"
BUILD_WINDRES='$(WINDRES_PROG)$(EXEEXT)'
BUILD_WINDMC='$(WINDMC_PROG)$(EXEEXT)'
BUILD_DLLWRAP='$(DLLWRAP_PROG)$(EXEEXT)'
od_vectors="$od_vectors objdump_private_desc_xcoff objdump_private_desc_pe"
else
case $targ in
*-*-hms*) BUILD_SRCONV='$(SRCONV_PROG)' ;;
esac
case $targ in
aarch64-*-mingw*)
BUILD_DLLTOOL='$(DLLTOOL_PROG)$(EXEEXT)'
if test -z "$DLLTOOL_DEFAULT"; then
DLLTOOL_DEFAULT="-DDLLTOOL_DEFAULT_AARCH64"
fi
DLLTOOL_DEFS="$DLLTOOL_DEFS -DDLLTOOL_AARCH64"
BUILD_WINDRES='$(WINDRES_PROG)$(EXEEXT)'
BUILD_WINDMC='$(WINDMC_PROG)$(EXEEXT)'
BUILD_DLLWRAP='$(DLLWRAP_PROG)$(EXEEXT)'
;;
arm-wince-pe* | arm-*-wince | arm*-*-cegcc* | arm*-*-mingw32ce*)
BUILD_DLLTOOL='$(DLLTOOL_PROG)$(EXEEXT)'
if test -z "$DLLTOOL_DEFAULT"; then
DLLTOOL_DEFAULT="-DDLLTOOL_DEFAULT_ARM_WINCE"
fi
DLLTOOL_DEFS="$DLLTOOL_DEFS -DDLLTOOL_ARM_WINCE -DDLLTOOL_ARM"
BUILD_WINDRES='$(WINDRES_PROG)$(EXEEXT)'
BUILD_WINDMC='$(WINDMC_PROG)$(EXEEXT)'
;;
arm-*-pe*)
BUILD_DLLTOOL='$(DLLTOOL_PROG)$(EXEEXT)'
if test -z "$DLLTOOL_DEFAULT"; then
DLLTOOL_DEFAULT="-DDLLTOOL_DEFAULT_ARM"
fi
DLLTOOL_DEFS="$DLLTOOL_DEFS -DDLLTOOL_ARM"
BUILD_WINDRES='$(WINDRES_PROG)$(EXEEXT)'
BUILD_WINDMC='$(WINDMC_PROG)$(EXEEXT)'
;;
x86_64-*-mingw* | x86_64-*-cygwin*)
BUILD_DLLTOOL='$(DLLTOOL_PROG)$(EXEEXT)'
if test -z "$DLLTOOL_DEFAULT"; then
DLLTOOL_DEFAULT="-DDLLTOOL_DEFAULT_MX86_64"
fi
DLLTOOL_DEFS="$DLLTOOL_DEFS -DDLLTOOL_MX86_64"
BUILD_WINDRES='$(WINDRES_PROG)$(EXEEXT)'
BUILD_WINDMC='$(WINDMC_PROG)$(EXEEXT)'
BUILD_DLLWRAP='$(DLLWRAP_PROG)$(EXEEXT)'
;;
;;
changequote(,)dnl
i[3-7]86-*-pe* | i[3-7]86-*-cygwin* | i[3-7]86-*-mingw32**)
i[3-7]86-*-interix)
changequote([,])dnl
BUILD_DLLTOOL='$(DLLTOOL_PROG)$(EXEEXT)'
if test -z "$DLLTOOL_DEFAULT"; then
BUILD_DLLTOOL='$(DLLTOOL_PROG)'
if test -z "$DLLTOOL_DEFAULT"; then
DLLTOOL_DEFAULT="-DDLLTOOL_DEFAULT_I386"
fi
DLLTOOL_DEFS="$DLLTOOL_DEFS -DDLLTOOL_I386"
BUILD_WINDRES='$(WINDRES_PROG)$(EXEEXT)'
BUILD_WINDMC='$(WINDMC_PROG)$(EXEEXT)'
BUILD_DLLWRAP='$(DLLWRAP_PROG)$(EXEEXT)'
;;
changequote(,)dnl
i[3-7]86-*-interix)
changequote([,])dnl
BUILD_DLLTOOL='$(DLLTOOL_PROG)'
if test -z "$DLLTOOL_DEFAULT"; then
DLLTOOL_DEFAULT="-DDLLTOOL_DEFAULT_I386"
fi
DLLTOOL_DEFS="$DLLTOOL_DEFS -DDLLTOOL_I386"
;;
changequote(,)dnl
powerpc*-aix5.[01])
changequote([,])dnl
;;
changequote(,)dnl
powerpc*-aix[5-9].*)
changequote([,])dnl
OBJDUMP_DEFS="-DAIX_WEAK_SUPPORT"
;;
powerpc*-*-linux* | powerpc*-*-elf* | powerpc*-*-eabi*)
case "$BUILD_INSTALL_MISC" in
*embedspu*) ;;
*) BUILD_INSTALL_MISC="${BUILD_INSTALL_MISC} embedspu"
esac
;;
sh*-*-pe)
BUILD_DLLTOOL='$(DLLTOOL_PROG)$(EXEEXT)'
if test -z "$DLLTOOL_DEFAULT"; then
DLLTOOL_DEFAULT="-DDLLTOOL_DEFAULT_SH"
fi
DLLTOOL_DEFS="$DLLTOOL_DEFS -DDLLTOOL_SH"
BUILD_WINDRES='$(WINDRES_PROG)$(EXEEXT)'
BUILD_WINDMC='$(WINDMC_PROG)$(EXEEXT)'
;;
spu-*-*)
BUILD_MISC="${BUILD_MISC} "'bin2c$(EXEEXT_FOR_BUILD)'
;;
mcore-*-pe)
BUILD_DLLTOOL='$(DLLTOOL_PROG)$(EXEEXT)'
if test -z "$DLLTOOL_DEFAULT"; then
fi
DLLTOOL_DEFS="$DLLTOOL_DEFS -DDLLTOOL_I386"
;;
mcore-*-pe)
BUILD_DLLTOOL='$(DLLTOOL_PROG)$(EXEEXT)'
if test -z "$DLLTOOL_DEFAULT"; then
DLLTOOL_DEFAULT="-DDLLTOOL_DEFAULT_MCORE"
fi
DLLTOOL_DEFS="$DLLTOOL_DEFS -DDLLTOOL_MCORE"
BUILD_WINDRES='$(WINDRES_PROG)$(EXEEXT)'
BUILD_WINDMC='$(WINDMC_PROG)$(EXEEXT)'
;;
mcore-*-elf)
BUILD_DLLTOOL='$(DLLTOOL_PROG)$(EXEEXT)'
if test -z "$DLLTOOL_DEFAULT"; then
fi
DLLTOOL_DEFS="$DLLTOOL_DEFS -DDLLTOOL_MCORE"
BUILD_WINDRES='$(WINDRES_PROG)$(EXEEXT)'
BUILD_WINDMC='$(WINDMC_PROG)$(EXEEXT)'
;;
mcore-*-elf)
BUILD_DLLTOOL='$(DLLTOOL_PROG)$(EXEEXT)'
if test -z "$DLLTOOL_DEFAULT"; then
DLLTOOL_DEFAULT="-DDLLTOOL_DEFAULT_MCORE_ELF"
fi
DLLTOOL_DEFS="$DLLTOOL_DEFS -DDLLTOOL_MCORE_ELF"
;;
mep-*)
OBJDUMP_DEFS="-DSKIP_ZEROES=256 -DSKIP_ZEROES_AT_END=0"
;;
esac
fi
DLLTOOL_DEFS="$DLLTOOL_DEFS -DDLLTOOL_MCORE_ELF"
;;
sh*-*-pe)
BUILD_DLLTOOL='$(DLLTOOL_PROG)$(EXEEXT)'
if test -z "$DLLTOOL_DEFAULT"; then
DLLTOOL_DEFAULT="-DDLLTOOL_DEFAULT_SH"
fi
DLLTOOL_DEFS="$DLLTOOL_DEFS -DDLLTOOL_SH"
BUILD_WINDRES='$(WINDRES_PROG)$(EXEEXT)'
BUILD_WINDMC='$(WINDMC_PROG)$(EXEEXT)'
;;
x86_64-*-mingw* | x86_64-*-cygwin*)
BUILD_DLLTOOL='$(DLLTOOL_PROG)$(EXEEXT)'
if test -z "$DLLTOOL_DEFAULT"; then
DLLTOOL_DEFAULT="-DDLLTOOL_DEFAULT_MX86_64"
fi
DLLTOOL_DEFS="$DLLTOOL_DEFS -DDLLTOOL_MX86_64"
BUILD_WINDRES='$(WINDRES_PROG)$(EXEEXT)'
BUILD_WINDMC='$(WINDMC_PROG)$(EXEEXT)'
BUILD_DLLWRAP='$(DLLWRAP_PROG)$(EXEEXT)'
;;
esac
# Add objdump private vectors.
case $targ in
avr-*-*)
od_vectors="$od_vectors objdump_private_desc_elf32_avr"
;;
powerpc*-*-aix* | rs6000-*-aix*)
od_vectors="$od_vectors objdump_private_desc_xcoff"
;;
*-*-pe* | *-*-cygwin* | *-*-mingw*)
od_vectors="$od_vectors objdump_private_desc_pe"
;;
*-*-darwin*)
od_vectors="$od_vectors objdump_private_desc_mach_o"
;;
esac
fi
# Add objdump private vectors.
case $targ in
all)
od_vectors="objdump_private_desc_elf32_avr objdump_private_desc_xcoff\
objdump_private_desc_pe objdump_private_desc_mach_o"
;;
avr-*-*)
od_vectors="$od_vectors objdump_private_desc_elf32_avr"
;;
powerpc*-*-aix* | rs6000-*-aix*)
od_vectors="$od_vectors objdump_private_desc_xcoff"
;;
*-*-pe* | *-*-cygwin* | *-*-mingw*)
od_vectors="$od_vectors objdump_private_desc_pe"
;;
*-*-darwin*)
od_vectors="$od_vectors objdump_private_desc_mach_o"
;;
esac
done
# Uniq objdump private vector, build objdump target ofiles.

20
binutils/doc/binutils.texi
View File

@ -1626,6 +1626,11 @@ commands. If the input was '12345678' then the outputs would be
Set the access and modification dates of the output file to be the same
as those of the input file.
This option also copies the date stored in a PE format file's header,
unless the SOURCE_DATE_EPOCH environment variable is defined. If it
is defined then this variable will be used as the date stored in the
header, interpreted as the number of seconds since the Unix epoch.
@item -D
@itemx --enable-deterministic-archives
@cindex deterministic archives
@ -1745,13 +1750,14 @@ Set the flags for any sections matching @var{sectionpattern}. The
@var{flags} argument is a comma separated string of flag names. The
recognized names are @samp{alloc}, @samp{contents}, @samp{load},
@samp{noload}, @samp{readonly}, @samp{code}, @samp{data}, @samp{rom},
@samp{exclude}, @samp{share}, and @samp{debug}. You can set the
@samp{contents} flag for a section which does not have contents, but it
is not meaningful to clear the @samp{contents} flag of a section which
does have contents--just remove the section instead. Not all flags are
meaningful for all object file formats. In particular the
@samp{share} flag is only meaningful for COFF format files and not for
ELF format files.
@samp{exclude}, @samp{share}, @samp{debug}, and @samp{large}.
You can set the @samp{contents} flag for a section which does not have
contents, but it is not meaningful to clear the @samp{contents} flag of a
section which does have contents--just remove the section instead. Not all
flags are meaningful for all object file formats. In particular the
@samp{share} flag is only meaningful for COFF format files and not for ELF
format files. The ELF x86-64 specific flag @samp{large} corresponds to
SHF_X86_64_LARGE.
@item --set-section-alignment @var{sectionpattern}=@var{align}
Set the alignment for any sections matching @var{sectionpattern}.

106
binutils/objcopy.c
View File

@ -803,6 +803,7 @@ parse_flags (const char *s)
PARSE_FLAG ("contents", SEC_HAS_CONTENTS);
PARSE_FLAG ("merge", SEC_MERGE);
PARSE_FLAG ("strings", SEC_STRINGS);
PARSE_FLAG ("large", SEC_ELF_LARGE);
#undef PARSE_FLAG
else
{
@ -812,8 +813,10 @@ parse_flags (const char *s)
strncpy (copy, s, len);
copy[len] = '\0';
non_fatal (_("unrecognized section flag `%s'"), copy);
fatal (_("supported flags: %s"),
"alloc, load, noload, readonly, debug, code, data, rom, exclude, share, contents, merge, strings");
fatal (_ ("supported flags: %s"),
"alloc, load, noload, readonly, debug, code, data, rom, "
"exclude, contents, merge, strings, (COFF specific) share, "
"(ELF x86-64 specific) large");
}
s = snext;
@ -2618,7 +2621,7 @@ merge_gnu_build_notes (bfd * abfd,
}
static flagword
check_new_section_flags (flagword flags, bfd * abfd, const char * secname)
check_new_section_flags (flagword flags, bfd *abfd, const char * secname)
{
/* Only set the SEC_COFF_SHARED flag on COFF files.
The same bit value is used by ELF targets to indicate
@ -2631,6 +2634,19 @@ check_new_section_flags (flagword flags, bfd * abfd, const char * secname)
bfd_get_filename (abfd), secname);
flags &= ~ SEC_COFF_SHARED;
}
/* Report a fatal error if 'large' is used with a non-x86-64 ELF target.
Suppress the error for non-ELF targets to allow -O binary and formats that
use the bit value SEC_ELF_LARGE for other purposes. */
if ((flags & SEC_ELF_LARGE) != 0
&& bfd_get_flavour (abfd) == bfd_target_elf_flavour
&& get_elf_backend_data (abfd)->elf_machine_code != EM_X86_64)
{
fatal (_ ("%s[%s]: 'large' flag is ELF x86-64 specific"),
bfd_get_filename (abfd), secname);
flags &= ~SEC_ELF_LARGE;
}
return flags;
}
@ -3599,9 +3615,11 @@ copy_archive (bfd *ibfd, bfd *obfd, const char *output_target,
} *list, *l;
bfd **ptr = &obfd->archive_head;
bfd *this_element;
char *dir;
char *dir = NULL;
char *filename;
list = NULL;
/* PR 24281: It is not clear what should happen when copying a thin archive.
One part is straight forward - if the output archive is in a different
directory from the input archive then any relative paths in the library
@ -3620,7 +3638,7 @@ copy_archive (bfd *ibfd, bfd *obfd, const char *output_target,
bfd_set_error (bfd_error_invalid_operation);
bfd_nonfatal_message (NULL, ibfd, NULL,
_("sorry: copying thin archives is not currently supported"));
return;
goto cleanup_and_exit;
}
/* Make a temp directory to hold the contents. */
@ -3638,8 +3656,6 @@ copy_archive (bfd *ibfd, bfd *obfd, const char *output_target,
if (deterministic)
obfd->flags |= BFD_DETERMINISTIC_OUTPUT;
list = NULL;
this_element = bfd_openr_next_archived_file (ibfd, NULL);
if (!bfd_set_format (obfd, bfd_get_format (ibfd)))
@ -3781,44 +3797,46 @@ copy_archive (bfd *ibfd, bfd *obfd, const char *output_target,
}
*ptr = NULL;
cleanup_and_exit:
filename = xstrdup (bfd_get_filename (obfd));
if (!(status == 0 ? bfd_close : bfd_close_all_done) (obfd))
{
if (!status)
bfd_nonfatal_message (filename, NULL, NULL, NULL);
status = 1;
bfd_nonfatal_message (filename, NULL, NULL, NULL);
}
free (filename);
filename = xstrdup (bfd_get_filename (ibfd));
if (!bfd_close (ibfd))
{
if (!status)
bfd_nonfatal_message (filename, NULL, NULL, NULL);
status = 1;
bfd_nonfatal_message (filename, NULL, NULL, NULL);
}
free (filename);
cleanup_and_exit:
/* Delete all the files that we opened. */
{
struct name_list * next;
struct name_list *next;
for (l = list; l != NULL; l = next)
{
if (l->obfd == NULL)
rmdir (l->name);
else
{
bfd_close (l->obfd);
unlink (l->name);
}
free ((char *) l->name);
next = l->next;
free (l);
}
for (l = list; l != NULL; l = next)
{
if (l->obfd == NULL)
rmdir (l->name);
else
{
bfd_close (l->obfd);
unlink (l->name);
}
free ((char *) l->name);
next = l->next;
free (l);
}
}
rmdir (dir);
free (dir);
if (dir)
{
rmdir (dir);
free (dir);
}
}
/* The top-level control. */
@ -3917,7 +3935,8 @@ copy_file (const char *input_filename, const char *output_filename, int ofd,
if (obfd == NULL)
{
close (ofd);
if (ofd >= 0)
close (ofd);
bfd_nonfatal_message (output_filename, NULL, NULL, NULL);
bfd_close (ibfd);
status = 1;
@ -3950,7 +3969,8 @@ copy_file (const char *input_filename, const char *output_filename, int ofd,
if (obfd == NULL)
{
close (ofd);
if (ofd >= 0)
close (ofd);
bfd_nonfatal_message (output_filename, NULL, NULL, NULL);
bfd_close (ibfd);
status = 1;
@ -4141,13 +4161,25 @@ setup_section (bfd *ibfd, sec_ptr isection, void *obfdarg)
flags = p->flags | (flags & (SEC_HAS_CONTENTS | SEC_RELOC));
flags = check_new_section_flags (flags, obfd, bfd_section_name (isection));
}
else if (strip_symbols == STRIP_NONDEBUG
&& (flags & (SEC_ALLOC | SEC_GROUP)) != 0
&& !is_nondebug_keep_contents_section (ibfd, isection))
else
{
flagword clr = SEC_HAS_CONTENTS | SEC_LOAD | SEC_GROUP;
flagword clr = 0;
if (bfd_get_flavour (obfd) == bfd_target_elf_flavour)
/* For --extract-symbols where section sizes are zeroed, clear
SEC_LOAD to indicate to coff_compute_section_file_positions that
section sizes should not be adjusted for ALIGN_SECTIONS_IN_FILE.
We don't want to clear SEC_HAS_CONTENTS as that will result
in symbols being classified as 'B' by nm. */
if (extract_symbol)
clr = SEC_LOAD;
/* If only keeping debug sections then we'll be keeping section
sizes in headers but making the sections have no contents. */
else if (strip_symbols == STRIP_NONDEBUG
&& (flags & (SEC_ALLOC | SEC_GROUP)) != 0
&& !is_nondebug_keep_contents_section (ibfd, isection))
clr = SEC_HAS_CONTENTS | SEC_LOAD | SEC_GROUP;
if (clr && bfd_get_flavour (obfd) == bfd_target_elf_flavour)
{
/* PR 29532: Copy group sections intact as otherwise we end up with
empty groups. This prevents separate debug info files from
@ -4155,7 +4187,7 @@ setup_section (bfd *ibfd, sec_ptr isection, void *obfdarg)
originally contained groups. */
if (flags & SEC_GROUP)
clr = SEC_LOAD;
else
if ((clr & SEC_HAS_CONTENTS) != 0)
make_nobits = true;
/* Twiddle the input section flags so that it seems to

19
binutils/od-elf32_avr.c
View File

@ -270,25 +270,26 @@ elf32_avr_dump_mem_usage (bfd *abfd)
"Device: %s\n\n", device.name);
/* Text size */
printf ("Program:%8lu bytes", text_usage);
printf ("Program:%8" PRIu64 " bytes", (uint64_t) text_usage);
if (device.flash_size > 0)
printf (" (%2.1f%% Full)", ((float) text_usage / device.flash_size) * 100);
printf (" (%2.1f%% Full)", (double) text_usage / device.flash_size * 100);
printf ("\n(.text + .data + .bootloader)\n\n");
/* Data size */
printf ("Data: %8lu bytes", data_usage);
printf ("Data: %8" PRIu64 " bytes", (uint64_t) data_usage);
if (device.ram_size > 0)
printf (" (%2.1f%% Full)", ((float) data_usage / device.ram_size) * 100);
printf (" (%2.1f%% Full)", (double) data_usage / device.ram_size * 100);
printf ("\n(.data + .bss + .noinit)\n\n");
/* EEPROM size */
if (eeprom_usage > 0)
{
printf ("EEPROM: %8lu bytes", eeprom_usage);
printf ("EEPROM: %8" PRIu64 " bytes", (uint64_t) eeprom_usage);
if (device.eeprom_size > 0)
printf (" (%2.1f%% Full)", ((float) eeprom_usage / device.eeprom_size) * 100);
printf (" (%2.1f%% Full)",
(double) eeprom_usage / device.eeprom_size * 100);
printf ("\n(.eeprom)\n\n");
}
@ -315,12 +316,12 @@ elf32_avr_dump_avr_prop (bfd *abfd)
for (i = 0; i < r_list->record_count; ++i)
{
printf (" %d %s @ %s + %#08lx (%#08lx)\n",
printf (" %d %s @ %s + %#08" PRIx64" (%#08" PRIx64 ")\n",
i,
avr_elf32_property_record_name (&r_list->records [i]),
r_list->records [i].section->name,
r_list->records [i].offset,
(bfd_section_vma (r_list->records [i].section)
(uint64_t) r_list->records [i].offset,
((uint64_t) bfd_section_vma (r_list->records [i].section)
+ r_list->records [i].offset));
switch (r_list->records [i].type)
{

1
binutils/od-macho.c
View File

@ -23,6 +23,7 @@
#include <stddef.h>
#include <time.h>
#include "safe-ctype.h"
#include "libiberty.h"
#include "bfd.h"
#include "objdump.h"
#include "bucomm.h"

1
binutils/od-xcoff.c
View File

@ -23,6 +23,7 @@
#include <stddef.h>
#include <time.h>
#include "safe-ctype.h"
#include "libiberty.h"
#include "bfd.h"
#include "objdump.h"
#include "bucomm.h"

2
binutils/po/binutils.pot
View File

@ -8,7 +8,7 @@ msgid ""
msgstr ""
"Project-Id-Version: PACKAGE VERSION\n"
"Report-Msgid-Bugs-To: https://sourceware.org/bugzilla/\n"
"POT-Creation-Date: 2023-07-03 11:32+0100\n"
"POT-Creation-Date: 2023-07-03 11:41+0100\n"
"PO-Revision-Date: YEAR-MO-DA HO:MI+ZONE\n"
"Last-Translator: FULL NAME <EMAIL@ADDRESS>\n"
"Language-Team: LANGUAGE <LL@li.org>\n"

36
binutils/readelf.c
View File

@ -168,6 +168,7 @@
#include "elf/xtensa.h"
#include "elf/z80.h"
#include "elf/loongarch.h"
#include "elf/bpf.h"
#include "getopt.h"
#include "libiberty.h"
@ -1061,6 +1062,8 @@ guess_is_rela (unsigned int e_machine)
case EM_ARC:
case EM_ARC_COMPACT:
case EM_ARC_COMPACT2:
case EM_ARC_COMPACT3:
case EM_ARC_COMPACT3_64:
case EM_AVR:
case EM_AVR_OLD:
case EM_BLACKFIN:
@ -1738,6 +1741,8 @@ dump_relocations (Filedata *filedata,
case EM_ARC:
case EM_ARC_COMPACT:
case EM_ARC_COMPACT2:
case EM_ARC_COMPACT3:
case EM_ARC_COMPACT3_64:
rtype = elf_arc_reloc_type (type);
break;
@ -2968,9 +2973,9 @@ get_machine_name (unsigned e_machine)
case EM_NFP: return "Netronome Flow Processor";
case EM_VE: return "NEC Vector Engine";
case EM_CSKY: return "C-SKY";
case EM_ARC_COMPACT3_64: return "Synopsys ARCv2.3 64-bit";
case EM_ARC_COMPACT3_64: return "Synopsys ARCv3 64-bit processor";
case EM_MCS6502: return "MOS Technology MCS 6502 processor";
case EM_ARC_COMPACT3: return "Synopsys ARCv2.3 32-bit";
case EM_ARC_COMPACT3: return "Synopsys ARCv3 32-bit processor";
case EM_KVX: return "Kalray VLIW core of the MPPA processor family";
case EM_65816: return "WDC 65816/65C816";
case EM_LOONGARCH: return "LoongArch";
@ -3715,6 +3720,14 @@ get_machine_flags (Filedata * filedata, unsigned e_flags, unsigned e_machine)
default:
break;
case EM_ARC_COMPACT3:
strcat (buf, ", HS5x");
break;
case EM_ARC_COMPACT3_64:
strcat (buf, ", HS6x");
break;
case EM_ARC_COMPACT2:
case EM_ARC_COMPACT:
decode_ARC_machine_flags (e_flags, e_machine, buf);
@ -4179,6 +4192,11 @@ get_machine_flags (Filedata * filedata, unsigned e_flags, unsigned e_machine)
strcat (buf, ", no delay");
break;
case EM_BPF:
sprintf (buf + strlen (buf), ", CPU Version: %u",
e_flags & EF_BPF_CPUVER);
break;
case EM_SPARCV9:
if (e_flags & EF_SPARC_32PLUS)
strcat (buf, ", v8+");
@ -4983,6 +5001,8 @@ get_section_type_name (Filedata * filedata, unsigned int sh_type)
case EM_ARC:
case EM_ARC_COMPACT:
case EM_ARC_COMPACT2:
case EM_ARC_COMPACT3:
case EM_ARC_COMPACT3_64:
result = get_arc_section_type_name (sh_type);
break;
case EM_MIPS:
@ -14324,6 +14344,8 @@ is_32bit_abs_reloc (Filedata * filedata, unsigned int reloc_type)
return reloc_type == 1; /* R_ARC_32. */
case EM_ARC_COMPACT:
case EM_ARC_COMPACT2:
case EM_ARC_COMPACT3:
case EM_ARC_COMPACT3_64:
return reloc_type == 4; /* R_ARC_32. */
case EM_ARM:
return reloc_type == 2; /* R_ARM_ABS32 */
@ -14518,6 +14540,8 @@ is_32bit_pcrel_reloc (Filedata * filedata, unsigned int reloc_type)
return reloc_type == 10; /* R_ALPHA_SREL32. */
case EM_ARC_COMPACT:
case EM_ARC_COMPACT2:
case EM_ARC_COMPACT3:
case EM_ARC_COMPACT3_64:
return reloc_type == 49; /* R_ARC_32_PCREL. */
case EM_ARM:
return reloc_type == 3; /* R_ARM_REL32 */
@ -14584,6 +14608,8 @@ is_64bit_abs_reloc (Filedata * filedata, unsigned int reloc_type)
{
case EM_AARCH64:
return reloc_type == 257; /* R_AARCH64_ABS64. */
case EM_ARC_COMPACT3_64:
return reloc_type == 5; /* R_ARC_64. */
case EM_ALPHA:
return reloc_type == 2; /* R_ALPHA_REFQUAD. */
case EM_IA_64:
@ -14687,6 +14713,8 @@ is_16bit_abs_reloc (Filedata * filedata, unsigned int reloc_type)
case EM_ARC:
case EM_ARC_COMPACT:
case EM_ARC_COMPACT2:
case EM_ARC_COMPACT3:
case EM_ARC_COMPACT3_64:
return reloc_type == 2; /* R_ARC_16. */
case EM_ADAPTEVA_EPIPHANY:
return reloc_type == 5;
@ -14969,6 +14997,8 @@ is_none_reloc (Filedata * filedata, unsigned int reloc_type)
case EM_ARC: /* R_ARC_NONE. */
case EM_ARC_COMPACT2: /* R_ARC_NONE. */
case EM_ARC_COMPACT: /* R_ARC_NONE. */
case EM_ARC_COMPACT3: /* R_ARC_NONE. */
case EM_ARC_COMPACT3_64: /* R_ARC_NONE. */
case EM_ARM: /* R_ARM_NONE. */
case EM_CRIS: /* R_CRIS_NONE. */
case EM_FT32: /* R_FT32_NONE. */
@ -22302,6 +22332,8 @@ process_arch_specific (Filedata * filedata)
case EM_ARC:
case EM_ARC_COMPACT:
case EM_ARC_COMPACT2:
case EM_ARC_COMPACT3:
case EM_ARC_COMPACT3_64:
return process_attributes (filedata, "ARC", SHT_ARC_ATTRIBUTES,
display_arc_attribute,
display_generic_attribute);

7
binutils/testsuite/binutils-all/objcopy.exp
View File

@ -1028,7 +1028,11 @@ proc keep_debug_symbols_for_elf_relocatable { prog flags test } {
{[^a-zA-Z]+([a-zA-Z0-9_\.]+)[ \t]+([A-Z]+)[ \t]+[0-9a-f]+ [0-9a-f]+ [0-9a-f]+ [0-9]+[ \t]+([A-Z]*)[ \t]+[0-9]+(.*)} \
$got all name type flag rest] } {
if { $type != "NOTE" && [regexp {[AG]} $flag] } {
lappend non_debug_sections $name
# PR 30699: Some debug sections can be in a group, so
# exclude sections whose name includes "debug_"
if { ! [regexp {debug_} $name] } {
lappend non_debug_sections $name
}
}
set got $rest
}
@ -1086,6 +1090,7 @@ switch [copy_setup] {
untested $test5
if [is_elf_format] {
untested $test6
untested $test7
}
}
"3" {

2
configure.ac
View File

@ -141,7 +141,7 @@ host_libs="intl libiberty opcodes bfd readline tcl tk itcl libgui zlib libbacktr
# binutils, gas and ld appear in that order because it makes sense to run
# "make check" in that particular order.
# If --enable-gold is used, "gold" may replace "ld".
host_tools="flex bison binutils gas ld fixincludes gcc cgen sid sim gdb gdbserver gprof etc expect dejagnu m4 utils guile fastjar gnattools libcc1 gotools c++tools"
host_tools="texinfo flex bison binutils gas ld fixincludes gcc cgen sid sim gdb gdbserver gprof etc expect dejagnu m4 utils guile fastjar gnattools libcc1 gotools c++tools"
# these libraries are built for the target environment, and are built after
# the host libraries and the host tools (which may be a cross compiler)

178
gas/ChangeLog
View File

@ -1,20 +1,168 @@
2023-07-30 Nick Clifton <nickc@redhat.com>
2023-07-30 Jose E. Marchesi <jose.marchesi@oracle.com>
This is the 2.41 release.
* configure: Regenerate.
* po/gas.pot: Regenerate.
* config/tc-bpf.h (elf_tc_final_processing): Define.
* config/tc-bpf.c (bpf_elf_final_processing): New function.
modified: gold/po/gold.pot
modified: gprof/configure
modified: gprofng/configure
modified: gprofng/doc/version.texi
modified: gprofng/libcollector/configure
modified: ld/configure
modified: ld/po/ld.pot
modified: libiberty/functions.texi
modified: opcodes/configure
modified: opcodes/po/opcodes.pot
modified: src-release.sh
2023-07-30 Jose E. Marchesi <jose.marchesi@oracle.com>
* config/tc-bpf.c (signed_overflow): Copy function from
tc-aarch64.c.
(encode_insn): Check for overflow in constant immediates.
(add_relaxed_insn): Pass relax argument to encode_insn.
(add_fixed_insn): Likewise.
* testsuite/gas/bpf/disp16-overflow.d: New file.
* testsuite/gas/bpf/disp16-overflow.s: Likewise.
* testsuite/gas/bpf/disp16-overflow.l: Likewise.
* testsuite/gas/bpf/disp32-overflow.d: Likewise.
* testsuite/gas/bpf/disp32-overflow.s: Likewise.
* testsuite/gas/bpf/disp32-overflow.l: Likewise.
* testsuite/gas/bpf/imm32-overflow.d: Likewise.
* testsuite/gas/bpf/imm32-overflow.s: Likewise.
* testsuite/gas/bpf/imm32-overflow.l: Likewise.
* testsuite/gas/bpf/offset16-overflow.d: Likewise.
* testsuite/gas/bpf/offset16-overflow.s: Likewise.
* testsuite/gas/bpf/offset16-overflow.l: Likewise.
* testsuite/gas/bpf/disp16-overflow-relax.d: Likewise.
* testsuite/gas/bpf/disp16-overflow-relax.l: Likewise.
* testsuite/gas/bpf/disp16-overflow-relax.s: Likewise.
* testsuite/gas/bpf/jump-relax-jump-be.d: New file.
* testsuite/gas/bpf/bpf.exp: Run new tests.
2023-07-28 Jose E. Marchesi <jose.marchesi@oracle.com>
PR gas/30690
* config/tc-bpf.c (struct bpf_insn): Add fields is_relaxable and
relaxed_exp.
(enum options): Add OPTION_NO_RELAX.
(md_longopts): Likewise for -mno-relax.
(do_relax): New global.
(md_parse_option): Handle OPTION_NO_RELAX.
(RELAX_BRANCH_ENCODE): Define.
(RELAX_BRANCH_P): Likewise.
(RELAX_BRANCH_LENGTH): Likewise.
(RELAX_BRANCH_CONST): Likewise.
(RELAX_BRANCH_UNCOND): Likewise.
(relaxed_branch_length): New function.
(md_estimate_size_before_relax): Likewise.
(read_insn_word): Likewise.
(encode_int16): Likewise.
(encode_int32): Likewise.
(write_insn_bytes): Likewise.
(md_convert_frag): Likewise.
(encode_insn): Likewise.
(install_insn_fixups): Likewise.
(add_fixed_insn): Likewise.
(add_relaxed_insn): Likewise.
(md_assemble): Move instruction encoding logic to the above
new functions.
* testsuite/gas/bpf/jump-relax-ja.d: New test.
* testsuite/gas/bpf/jump-relax-ja-be.d: Likewise.
* testsuite/gas/bpf/jump-relax-ja.s: And corresponding source.
* testsuite/gas/bpf/jump-relax-jump.d: New test.
* testsuite/gas/bpf/jump-relax-jump-be.d: Likewise.
* testsuite/gas/bpf/jump-relax-jump.s: And corresponding source.
* testsuite/gas/bpf/bpf.exp: Run new tests.
* doc/c-bpf.texi (BPF Options): Document -mno-relax.
2023-07-26 Jose E. Marchesi <jose.marchesi@oracle.com>
* testsuite/gas/bpf/alu.s: Add test for NEGI and NEG32I.
* testsuite/gas/bpf/alu32.s: Likewise.
* testsuite/gas/bpf/alu-pseudoc.s: Likewise.
* testsuite/gas/bpf/alu32-pseudoc.s: Likewise.
* testsuite/gas/bpf/alu.d: Add expected results.
* testsuite/gas/bpf/alu-be.d: Likewise.
* testsuite/gas/bpf/alu-pseudoc.d: Likewise.
* testsuite/gas/bpf/alu-be-pseudoc.d: Likewise.
* testsuite/gas/bpf/alu32.d: Likewise.
* testsuite/gas/bpf/alu32-be.d: Likewise.
* testsuite/gas/bpf/alu32-be-pseudoc.d: Likewise.
2023-07-26 Jose E. Marchesi <jose.marchesi@oracle.com>
* testsuite/gas/bpf/alu.s: The register neg instruction gets only
one argument.
* testsuite/gas/bpf/alu32-be-pseudoc.d: Likewise.
* testsuite/gas/bpf/alu32-pseudoc.d: Likewise.
* testsuite/gas/bpf/alu32-pseudoc.s: Likewise.
* testsuite/gas/bpf/alu-pseudoc.d: Likewise.
* testsuite/gas/bpf/alu-be-pseudoc.d: Likewise.
* testsuite/gas/bpf/alu-pseudoc.s: Likewise.
* testsuite/gas/bpf/alu-be.d: Likewise.
* testsuite/gas/bpf/alu.d: Likewise.
* testsuite/gas/bpf/alu32-be.d: Likewise.
* testsuite/gas/bpf/alu32.d: Likewise.
* testsuite/gas/bpf/alu32.s: Likewise.
* doc/c-bpf.texi (BPF Instructions): Update accordingly.
2023-07-24 Jose E. Marchesi <jose.marchesi@oracle.com>
* doc/c-bpf.texi (BPF Instructions): Document BSWAP* instructions.
* testsuite/gas/bpf/alu.s: Test BSWAP{16,32,64} instructions.
* testsuite/gas/bpf/alu.d: Likewise.
* testsuite/gas/bpf/alu-be.d: Likewise.
* testsuite/gas/bpf/alu-pseudoc.s: Likewise.
* testsuite/gas/bpf/alu-pseudoc.d: Likewise.
* testsuite/gas/bpf/alu-be-pseudoc.d: Likewise.
2023-07-24 Jose E. Marchesi <jose.marchesi@oracle.com>
* doc/c-bpf.texi (BPF Instructions): The pseudoc syntax for MOVS*
doesn't use `s=' but `='.
2023-07-24 Jose E. Marchesi <jose.marchesi@oracle.com>
* doc/c-bpf.texi (BPF Instructions): Fix pseudoc syntax for MOVS*
and LDXS* instructions.
* testsuite/gas/bpf/mem-pseudoc.d: Likewise.
* testsuite/gas/bpf/mem-be-pseudoc.d: Likewise.
* testsuite/gas/bpf/mem-pseudoc.s: Likewise.
* testsuite/gas/bpf/alu-pseudoc.s: Likewise.
* testsuite/gas/bpf/alu-pseudoc.d: Likewise.
* testsuite/gas/bpf/alu-be-pseudoc.d: Likewise.
* testsuite/gas/bpf/alu32-pseudoc.s: Likewise.
* testsuite/gas/bpf/alu32-pseudoc.d: Likewise.
* testsuite/gas/bpf/alu32-be-pseudoc.d: Likewise.
2023-07-24 Jose E. Marchesi <jose.marchesi@oracle.com>
* config/tc-bpf.c (struct bpf_insn): New field `id'.
(md_assemble): Save the ids of successfully parsed instructions
and use the new BFD_RELOC_BPF_DISPCALL32 whenever appropriate.
(md_apply_fix): Adapt to the new BFD reloc.
* testsuite/gas/bpf/jump.s: Test JAL.
* testsuite/gas/bpf/jump.d: Likewise.
* testsuite/gas/bpf/jump-pseudoc.d: Likewise.
* testsuite/gas/bpf/jump-be.d: Likewise.
* testsuite/gas/bpf/jump-be-pseudoc.d: Likewise.
* doc/c-bpf.texi (BPF Instructions): Document new instruction
jal/gotol.
Document new operand type disp32.
2023-07-21 Jose E. Marchesi <jose.marchesi@oracle.com>
* testsuite/gas/bpf/mem.s: Add signed load instructions.
* testsuite/gas/bpf/mem-pseudoc.s: Likewise.
* testsuite/gas/bpf/mem.d: Likewise.
* testsuite/gas/bpf/mem-pseudoc.d: Likewise.
* testsuite/gas/bpf/mem-be.d: Likewise.
* doc/c-bpf.texi (BPF Instructions): Document the signed load
instructions.
2023-07-21 Jose E. Marchesi <jose.marchesi@oracle.com>
* testsuite/gas/bpf/alu.s: Test movs instructions.
* testsuite/gas/bpf/alu-pseudoc.s: Likewise.
* testsuite/gas/bpf/alu32.s: Likewise for movs32 instruction.
* testsuite/gas/bpf/alu32-pseudoc.s: Likewise.
* testsuite/gas/bpf/alu.d: Add expected results.
* testsuite/gas/bpf/alu32.d: Likewise.
* testsuite/gas/bpf/alu-be.d: Likewise.
* testsuite/gas/bpf/alu32-be.d: Likewise.
* testsuite/gas/bpf/alu-pseudoc.d: Likewise.
* testsuite/gas/bpf/alu32-pseudoc.d: Likewise.
* testsuite/gas/bpf/alu-be-pseudoc.d: Likewise.
* testsuite/gas/bpf/alu32-be-pseudoc.d: Likewise.
2023-07-03 Nick Clifton <nickc@redhat.com>

2
gas/Makefile.in
View File

@ -2230,7 +2230,7 @@ de-stage3:
doc/asconfig.texi: doc/$(CONFIG).texi doc/$(am__dirstamp)
$(AM_V_at)rm -f doc/asconfig.texi
$(AM_V_GEN)cp -p $(srcdir)/doc/$(CONFIG).texi doc/asconfig.texi
$(AM_V_GEN)cp $(srcdir)/doc/$(CONFIG).texi doc/asconfig.texi && touch -m -r $(srcdir)/doc/$(CONFIG).texi doc/asconfig.texi
$(AM_V_at)chmod u+w doc/asconfig.texi
# Maintenance

10
gas/NEWS
View File

@ -1,5 +1,15 @@
-*- text -*-
* Add support for Intel PBNDKB instructions.
* Add support for Intel SM4 instructions.
* Add support for Intel SM3 instructions.
* Add support for Intel SHA512 instructions.
* Add support for Intel AVX-VNNI-INT16 instructions.
Changes in 2.41:
* Add support for Intel FRED instructions.

5
gas/config/obj-elf.c
View File

@ -1088,8 +1088,9 @@ obj_elf_attach_to_group (int dummy ATTRIBUTE_UNUSED)
if (elf_group_name (now_seg))
{
as_warn (_("section %s already has a group (%s)"),
bfd_section_name (now_seg), elf_group_name (now_seg));
if (strcmp (elf_group_name (now_seg), gname) != 0)
as_warn (_("section %s already has a group (%s)"),
bfd_section_name (now_seg), elf_group_name (now_seg));
return;
}

2
gas/config/tc-arc.c
View File

@ -49,7 +49,7 @@
&& (SUB_OPCODE (x) == 0x28))
#ifndef TARGET_WITH_CPU
#define TARGET_WITH_CPU "arc700"
#define TARGET_WITH_CPU "hs38_linux"
#endif /* TARGET_WITH_CPU */
#define ARC_GET_FLAG(s) (*symbol_get_tc (s))

2981
gas/config/tc-bpf.c
View File

File diff suppressed because it is too large Load Diff

7
gas/config/tc-bpf.h
View File

@ -37,7 +37,6 @@
/* .-foo gets turned into PC relative relocs. */
#define DIFF_EXPR_OK 1
#define GAS_CGEN_PCREL_R_TYPE(R_TYPE) gas_cgen_pcrel_r_type (R_TYPE)
/* Call md_pcrel_from_section(), not md_pcrel_from(). */
#define MD_PCREL_FROM_SECTION(FIXP, SEC) md_pcrel_from_section (FIXP, SEC)
@ -52,4 +51,8 @@
a jump to offset 0 means jump to the next instruction. */
#define md_single_noop_insn "ja 0"
#define TC_EQUAL_IN_INSN(c, s) 1
#define TC_EQUAL_IN_INSN(c, s) bpf_tc_equal_in_insn ((c), (s))
extern bool bpf_tc_equal_in_insn (int, char *);
#define elf_tc_final_processing bpf_elf_final_processing
extern void bpf_elf_final_processing (void);

4
gas/config/tc-d10v.c
View File

@ -1391,8 +1391,8 @@ find_opcode (struct d10v_opcode *opcode, expressionS myops[])
|| myops[i].X_add_number == OPERAND_CONTROL + 12
|| myops[i].X_add_number == OPERAND_CONTROL + 13
|| myops[i].X_add_number == OPERAND_CONTROL + 15))
as_warn (_("cr%ld is a reserved control register"),
myops[i].X_add_number - OPERAND_CONTROL);
as_warn (_("cr%d is a reserved control register"),
(int) myops[i].X_add_number - OPERAND_CONTROL);
}
return opcode;
}

89
gas/config/tc-i386.c
View File

@ -1151,6 +1151,11 @@ static const arch_entry cpu_arch[] =
SUBARCH (rmpquery, RMPQUERY, ANY_RMPQUERY, false),
SUBARCH (fred, FRED, ANY_FRED, false),
SUBARCH (lkgs, LKGS, ANY_LKGS, false),
SUBARCH (avx_vnni_int16, AVX_VNNI_INT16, ANY_AVX_VNNI_INT16, false),
SUBARCH (sha512, SHA512, ANY_SHA512, false),
SUBARCH (sm3, SM3, ANY_SM3, false),
SUBARCH (sm4, SM4, ANY_SM4, false),
SUBARCH (pbndkb, PBNDKB, PBNDKB, false),
};
#undef SUBARCH
@ -4563,6 +4568,90 @@ optimize_encoding (void)
i.types[j].bitfield.disp8
= fits_in_disp8 (i.op[j].disps->X_add_number);
}
else if (optimize_for_space
&& i.tm.base_opcode == 0x29
&& i.tm.opcode_space == SPACE_0F38
&& i.operands == i.reg_operands
&& i.op[0].regs == i.op[1].regs
&& (!i.tm.opcode_modifier.vex
|| !(i.op[0].regs->reg_flags & RegRex))
&& !is_evex_encoding (&i.tm))
{
/* Optimize: -Os:
pcmpeqq %xmmN, %xmmN -> pcmpeqd %xmmN, %xmmN
vpcmpeqq %xmmN, %xmmN, %xmmM -> vpcmpeqd %xmmN, %xmmN, %xmmM (N < 8)
vpcmpeqq %ymmN, %ymmN, %ymmM -> vpcmpeqd %ymmN, %ymmN, %ymmM (N < 8)
*/
i.tm.opcode_space = SPACE_0F;
i.tm.base_opcode = 0x76;
}
else if (((i.tm.base_opcode >= 0x64
&& i.tm.base_opcode <= 0x66
&& i.tm.opcode_space == SPACE_0F)
|| (i.tm.base_opcode == 0x37
&& i.tm.opcode_space == SPACE_0F38))
&& i.operands == i.reg_operands
&& i.op[0].regs == i.op[1].regs
&& !is_evex_encoding (&i.tm))
{
/* Optimize: -O:
pcmpgt[bwd] %mmN, %mmN -> pxor %mmN, %mmN
pcmpgt[bwdq] %xmmN, %xmmN -> pxor %xmmN, %xmmN
vpcmpgt[bwdq] %xmmN, %xmmN, %xmmM -> vpxor %xmmN, %xmmN, %xmmM (N < 8)
vpcmpgt[bwdq] %xmmN, %xmmN, %xmmM -> vpxor %xmm0, %xmm0, %xmmM (N > 7)
vpcmpgt[bwdq] %ymmN, %ymmN, %ymmM -> vpxor %ymmN, %ymmN, %ymmM (N < 8)
vpcmpgt[bwdq] %ymmN, %ymmN, %ymmM -> vpxor %ymm0, %ymm0, %ymmM (N > 7)
*/
i.tm.opcode_space = SPACE_0F;
i.tm.base_opcode = 0xef;
if (i.tm.opcode_modifier.vex && (i.op[0].regs->reg_flags & RegRex))
{
if (i.operands == 2)
{
gas_assert (i.tm.opcode_modifier.sse2avx);
i.operands = 3;
i.reg_operands = 3;
i.tm.operands = 3;
i.op[2].regs = i.op[0].regs;
i.types[2] = i.types[0];
i.flags[2] = i.flags[0];
i.tm.operand_types[2] = i.tm.operand_types[0];
i.tm.opcode_modifier.sse2avx = 0;
}
i.op[0].regs -= i.op[0].regs->reg_num + 8;
i.op[1].regs = i.op[0].regs;
}
}
else if (optimize_for_space
&& i.tm.base_opcode == 0x59
&& i.tm.opcode_space == SPACE_0F38
&& i.operands == i.reg_operands
&& i.tm.opcode_modifier.vex
&& !(i.op[0].regs->reg_flags & RegRex)
&& i.op[0].regs->reg_type.bitfield.xmmword
&& i.vec_encoding != vex_encoding_vex3)
{
/* Optimize: -Os:
vpbroadcastq %xmmN, %xmmM -> vpunpcklqdq %xmmN, %xmmN, %xmmM (N < 8)
*/
i.tm.opcode_space = SPACE_0F;
i.tm.base_opcode = 0x6c;
i.tm.opcode_modifier.vexvvvv = 1;
++i.operands;
++i.reg_operands;
++i.tm.operands;
i.op[2].regs = i.op[0].regs;
i.types[2] = i.types[0];
i.flags[2] = i.flags[0];
i.tm.operand_types[2] = i.tm.operand_types[0];
swap_2_operands (1, 2);
}
}
/* Return non-zero for load instruction. */

18
gas/config/tc-m68hc11.c
View File

@ -1574,7 +1574,8 @@ fixup8 (expressionS *oper, int mode, int opmode)
{
static char trap_id_warn_once = 0;
as_bad (_("Trap id `%ld' is out of range."), oper->X_add_number);
as_bad (_("Trap id `%" PRId64 "' is out of range."),
(int64_t) oper->X_add_number);
if (trap_id_warn_once == 0)
{
trap_id_warn_once = 1;
@ -1585,7 +1586,8 @@ fixup8 (expressionS *oper, int mode, int opmode)
if (!(mode & M6812_OP_TRAP_ID)
&& !check_range (oper->X_add_number, mode))
{
as_bad (_("Operand out of 8-bit range: `%ld'."), oper->X_add_number);
as_bad (_("Operand out of 8-bit range: `%" PRId64 "'."),
(int64_t) oper->X_add_number);
}
number_to_chars_bigendian (f, oper->X_add_number & 0x0FF, 1);
}
@ -1641,8 +1643,8 @@ fixup16 (expressionS *oper, int mode, int opmode ATTRIBUTE_UNUSED)
{
if (!check_range (oper->X_add_number, mode))
{
as_bad (_("Operand out of 16-bit range: `%ld'."),
oper->X_add_number);
as_bad (_("Operand out of 16-bit range: `%" PRId64 "'."),
(int64_t) oper->X_add_number);
}
number_to_chars_bigendian (f, oper->X_add_number & 0x0FFFF, 2);
}
@ -1689,8 +1691,8 @@ fixup24 (expressionS *oper, int mode, int opmode ATTRIBUTE_UNUSED)
{
if (!check_range (oper->X_add_number, mode))
{
as_bad (_("Operand out of 16-bit range: `%ld'."),
oper->X_add_number);
as_bad (_("Operand out of 16-bit range: `%" PRId64 "'."),
(int64_t) oper->X_add_number);
}
number_to_chars_bigendian (f, oper->X_add_number & 0x0FFFFFF, 3);
}
@ -1736,8 +1738,8 @@ fixup8_xg (expressionS *oper, int mode, int opmode)
else
{
if (!(check_range (oper->X_add_number, mode)))
as_bad (_("Operand out of 8-bit range: `%ld'."),
oper->X_add_number);
as_bad (_("Operand out of 8-bit range: `%" PRId64 "'."),
(int64_t) oper->X_add_number);
number_to_chars_bigendian (f, oper->X_add_number & 0x0FF, 1);
}
}

59
gas/config/tc-riscv.c
View File

@ -337,7 +337,8 @@ riscv_set_arch (const char *s)
riscv_reset_subsets_list_arch_str ();
riscv_set_rvc (false);
if (riscv_subset_supports (&riscv_rps_as, "c"))
if (riscv_subset_supports (&riscv_rps_as, "c")
|| riscv_subset_supports (&riscv_rps_as, "zca"))
riscv_set_rvc (true);
if (riscv_subset_supports (&riscv_rps_as, "ztso"))
@ -1425,6 +1426,18 @@ validate_riscv_insn (const struct riscv_opcode *opc, int length)
goto unknown_validate_operand;
}
break;
case 'c':
switch (*++oparg)
{
/* byte immediate operators, load/store byte insns. */
case 'h': used_bits |= ENCODE_ZCB_HALFWORD_UIMM (-1U); break;
/* halfword immediate operators, load/store halfword insns. */
case 'b': used_bits |= ENCODE_ZCB_BYTE_UIMM (-1U); break;
case 'f': break;
default:
goto unknown_validate_operand;
}
break;
default:
goto unknown_validate_operand;
}
@ -3558,6 +3571,47 @@ riscv_ip (char *str, struct riscv_cl_insn *ip, expressionS *imm_expr,
goto unknown_riscv_ip_operand;
}
break;
case 'c':
switch (*++oparg)
{
case 'h': /* Immediate field for c.lh/c.lhu/c.sh. */
/* Handle cases, such as c.sh rs2', (rs1'). */
if (riscv_handle_implicit_zero_offset (imm_expr, asarg))
continue;
if (my_getSmallExpression (imm_expr, imm_reloc, asarg, p)
|| imm_expr->X_op != O_constant
|| !VALID_ZCB_HALFWORD_UIMM ((valueT) imm_expr->X_add_number))
break;
ip->insn_opcode |= ENCODE_ZCB_HALFWORD_UIMM (imm_expr->X_add_number);
goto rvc_imm_done;
case 'b': /* Immediate field for c.lbu/c.sb. */
/* Handle cases, such as c.lbu rd', (rs1'). */
if (riscv_handle_implicit_zero_offset (imm_expr, asarg))
continue;
if (my_getSmallExpression (imm_expr, imm_reloc, asarg, p)
|| imm_expr->X_op != O_constant
|| !VALID_ZCB_BYTE_UIMM ((valueT) imm_expr->X_add_number))
break;
ip->insn_opcode |= ENCODE_ZCB_BYTE_UIMM (imm_expr->X_add_number);
goto rvc_imm_done;
case 'f': /* Operand for matching immediate 255. */
if (my_getSmallExpression (imm_expr, imm_reloc, asarg, p)
|| imm_expr->X_op != O_constant
|| imm_expr->X_add_number != 255)
break;
/* This operand is used for matching immediate 255, and
we do not write anything to encoding by this operand. */
asarg = expr_parse_end;
imm_expr->X_op = O_absent;
continue;
default:
goto unknown_riscv_ip_operand;
}
break;
default:
goto unknown_riscv_ip_operand;
}
@ -4322,7 +4376,8 @@ s_riscv_option (int x ATTRIBUTE_UNUSED)
riscv_reset_subsets_list_arch_str ();
riscv_set_rvc (false);
if (riscv_subset_supports (&riscv_rps_as, "c"))
if (riscv_subset_supports (&riscv_rps_as, "c")
|| riscv_subset_supports (&riscv_rps_as, "zca"))
riscv_set_rvc (true);
if (riscv_subset_supports (&riscv_rps_as, "ztso"))

14
gas/config/tc-s390.c
View File

@ -2291,25 +2291,25 @@ md_apply_fix (fixS *fixP, valueT *valP, segT seg ATTRIBUTE_UNUSED)
We are only prepared to turn a few of the operands into
relocs. */
fixP->fx_offset = value;
if (operand->bits == 12 && operand->shift == 20)
if (operand->bits == 12 && operand->shift == 20 && !fixP->fx_pcrel)
{
fixP->fx_size = 2;
fixP->fx_where += 2;
fixP->fx_r_type = BFD_RELOC_390_12;
}
else if (operand->bits == 12 && operand->shift == 36)
else if (operand->bits == 12 && operand->shift == 36 && !fixP->fx_pcrel)
{
fixP->fx_size = 2;
fixP->fx_where += 4;
fixP->fx_r_type = BFD_RELOC_390_12;
}
else if (operand->bits == 20 && operand->shift == 20)
else if (operand->bits == 20 && operand->shift == 20 && !fixP->fx_pcrel)
{
fixP->fx_size = 4;
fixP->fx_where += 2;
fixP->fx_r_type = BFD_RELOC_390_20;
}
else if (operand->bits == 8 && operand->shift == 8)
else if (operand->bits == 8 && operand->shift == 8 && !fixP->fx_pcrel)
{
fixP->fx_size = 1;
fixP->fx_where += 1;
@ -2334,6 +2334,12 @@ md_apply_fix (fixS *fixP, valueT *valP, segT seg ATTRIBUTE_UNUSED)
fixP->fx_offset += 2;
fixP->fx_pcrel_adjust = 2;
}
else if (fixP->fx_pcrel)
{
fixP->fx_r_type = BFD_RELOC_16_PCREL;
fixP->fx_offset += 2;
fixP->fx_pcrel_adjust = 2;
}
else
fixP->fx_r_type = BFD_RELOC_16;
}

27
gas/config/tc-sh.c
View File

@ -1222,6 +1222,10 @@ static char *
get_operands (sh_opcode_info *info, char *args, sh_operand_info *operand)
{
char *ptr = args;
operand[0].type = 0;
operand[1].type = 0;
operand[2].type = 0;
if (info->arg[0])
{
/* The pre-processor will eliminate whitespace in front of '@'
@ -1234,9 +1238,7 @@ get_operands (sh_opcode_info *info, char *args, sh_operand_info *operand)
if (info->arg[1])
{
if (*ptr == ',')
{
ptr++;
}
ptr++;
get_operand (&ptr, operand + 1);
/* ??? Hack: psha/pshl have a varying operand number depending on
the type of the first operand. We handle this by having the
@ -1247,27 +1249,10 @@ get_operands (sh_opcode_info *info, char *args, sh_operand_info *operand)
if (info->arg[2] && operand[0].type != A_IMM)
{
if (*ptr == ',')
{
ptr++;
}
ptr++;
get_operand (&ptr, operand + 2);
}
else
{
operand[2].type = 0;
}
}
else
{
operand[1].type = 0;
operand[2].type = 0;
}
}
else
{
operand[0].type = 0;
operand[1].type = 0;
operand[2].type = 0;
}
return ptr;
}

1
gas/config/tc-sparc.c
View File

@ -4992,3 +4992,4 @@ sparc_cfi_emit_pcrel_expr (expressionS *exp, unsigned int nbytes)
emit_expr_with_reloc (exp, nbytes, "disp");
sparc_no_align_cons = 0;
}

5
gas/config/tc-vax.c
View File

@ -2683,8 +2683,9 @@ md_assemble (char *instruction_string)
}
else
{
as_warn (_("A bignum/flonum may not be a displacement: 0x%lx used"),
(expP->X_add_number = 0x80000000L));
as_warn (_("A bignum/flonum may not be a displacement: 0x%"
PRIx64 " used"),
(uint64_t) (expP->X_add_number = 0x80000000L));
/* Chosen so luser gets the most offset bits to patch later. */
}
expP->X_add_number = floatP->low[0]

5
gas/config/tc-xtensa.c
View File

@ -7869,8 +7869,9 @@ dump_litpools (void)
count++;
litfrag = litfrag->fr_next;
}
printf(" %ld <%d:%d> (%d) [%d]: ",
lpf->addr, lpf->priority, lpf->original_priority,
printf(" %" PRId64 " <%d:%d> (%d) [%d]: ",
(int64_t) lpf->addr,
lpf->priority, lpf->original_priority,
lpf->fragP->fr_line, count);
/* dump_frag(lpf->fragP); */
}

13
gas/config/tc-z80.c
View File

@ -1143,10 +1143,11 @@ emit_data_val (expressionS * val, int size)
but it does help to maintain compatibility with earlier versions
of the assembler. */
if (! val->X_extrabit
&& is_overflow (val->X_add_number, size*8))
as_warn ( _("%d-bit overflow (%+ld)"), size*8, val->X_add_number);
&& is_overflow (val->X_add_number, size * 8))
as_warn ( _("%d-bit overflow (%+" PRId64 ")"), size * 8,
(int64_t) val->X_add_number);
for (i = 0; i < size; ++i)
p[i] = (char)(val->X_add_number >> (i*8));
p[i] = (val->X_add_number >> (i * 8)) & 0xff;
return;
}
@ -1250,9 +1251,11 @@ emit_byte (expressionS * val, bfd_reloc_code_real_type r_type)
if ((val->X_add_number < -128) || (val->X_add_number >= 128))
{
if (r_type == BFD_RELOC_Z80_DISP8)
as_bad (_("index overflow (%+ld)"), val->X_add_number);
as_bad (_("index overflow (%+" PRId64 ")"),
(int64_t) val->X_add_number);
else
as_bad (_("offset overflow (%+ld)"), val->X_add_number);
as_bad (_("offset overflow (%+" PRId64 ")"),
(int64_t) val->X_add_number);
}
}
else

23
gas/configure vendored
View File

@ -1,6 +1,6 @@
#! /bin/sh
# Guess values for system-dependent variables and create Makefiles.
# Generated by GNU Autoconf 2.69 for gas 2.41.
# Generated by GNU Autoconf 2.69 for gas 2.41.50.
#
#
# Copyright (C) 1992-1996, 1998-2012 Free Software Foundation, Inc.
@ -587,8 +587,8 @@ MAKEFLAGS=
# Identity of this package.
PACKAGE_NAME='gas'
PACKAGE_TARNAME='gas'
PACKAGE_VERSION='2.41'
PACKAGE_STRING='gas 2.41'
PACKAGE_VERSION='2.41.50'
PACKAGE_STRING='gas 2.41.50'
PACKAGE_BUGREPORT=''
PACKAGE_URL=''
@ -1381,7 +1381,7 @@ if test "$ac_init_help" = "long"; then
# Omit some internal or obsolete options to make the list less imposing.
# This message is too long to be a string in the A/UX 3.1 sh.
cat <<_ACEOF
\`configure' configures gas 2.41 to adapt to many kinds of systems.
\`configure' configures gas 2.41.50 to adapt to many kinds of systems.
Usage: $0 [OPTION]... [VAR=VALUE]...
@ -1452,7 +1452,7 @@ fi
if test -n "$ac_init_help"; then
case $ac_init_help in
short | recursive ) echo "Configuration of gas 2.41:";;
short | recursive ) echo "Configuration of gas 2.41.50:";;
esac
cat <<\_ACEOF
@ -1600,7 +1600,7 @@ fi
test -n "$ac_init_help" && exit $ac_status
if $ac_init_version; then
cat <<\_ACEOF
gas configure 2.41
gas configure 2.41.50
generated by GNU Autoconf 2.69
Copyright (C) 2012 Free Software Foundation, Inc.
@ -2011,7 +2011,7 @@ cat >config.log <<_ACEOF
This file contains any messages produced by compilers while
running configure, to aid debugging if configure makes a mistake.
It was created by gas $as_me 2.41, which was
It was created by gas $as_me 2.41.50, which was
generated by GNU Autoconf 2.69. Invocation command line was
$ $0 $@
@ -2990,7 +2990,7 @@ fi
# Define the identity of the package.
PACKAGE='gas'
VERSION='2.41'
VERSION='2.41.50'
cat >>confdefs.h <<_ACEOF
@ -12107,6 +12107,8 @@ $as_echo "#define STRICTCOFF 1" >>confdefs.h
microblaze*)
;;
ppc-*-aix5.[01]*)
;;
ppc-*-aix[5-9].*)
$as_echo "#define AIX_WEAK_SUPPORT 1" >>confdefs.h
@ -12296,7 +12298,6 @@ cat >>confdefs.h <<_ACEOF
_ACEOF
fi
using_cgen=yes
;;
epiphany | fr30 | ip2k | iq2000 | lm32 | m32r | or1k)
using_cgen=yes
@ -14909,7 +14910,7 @@ cat >>$CONFIG_STATUS <<\_ACEOF || ac_write_fail=1
# report actual input values of CONFIG_FILES etc. instead of their
# values after options handling.
ac_log="
This file was extended by gas $as_me 2.41, which was
This file was extended by gas $as_me 2.41.50, which was
generated by GNU Autoconf 2.69. Invocation command line was
CONFIG_FILES = $CONFIG_FILES
@ -14975,7 +14976,7 @@ _ACEOF
cat >>$CONFIG_STATUS <<_ACEOF || ac_write_fail=1
ac_cs_config="`$as_echo "$ac_configure_args" | sed 's/^ //; s/[\\""\`\$]/\\\\&/g'`"
ac_cs_version="\\
gas config.status 2.41
gas config.status 2.41.50
configured by $0, generated by GNU Autoconf 2.69,
with options \\"\$ac_cs_config\\"

3
gas/configure.ac
View File

@ -272,6 +272,8 @@ for this_target in $target $canon_targets ; do
;;
changequote(,)dnl
ppc-*-aix5.[01]*)
;;
ppc-*-aix[5-9].*)
changequote([,])dnl
AC_DEFINE(AIX_WEAK_SUPPORT, 1,
@ -449,7 +451,6 @@ changequote([,])dnl
if test $this_target = $target ; then
AC_DEFINE_UNQUOTED(DEFAULT_ARCH, "${arch}", [Default architecture.])
fi
using_cgen=yes
;;
epiphany | fr30 | ip2k | iq2000 | lm32 | m32r | or1k)
using_cgen=yes

904
gas/doc/c-bpf.texi
View File

File diff suppressed because it is too large Load Diff

10
gas/doc/c-i386.texi
View File

@ -207,6 +207,11 @@ accept various extension mnemonics. For example,
@code{rao_int},
@code{fred},
@code{lkgs},
@code{avx_vnni_int16},
@code{sha512},
@code{sm3},
@code{sm4},
@code{pbndkb},
@code{amx_int8},
@code{amx_bf16},
@code{amx_fp16},
@ -1635,8 +1640,9 @@ supported on the CPU specified. The choices for @var{cpu_type} are:
@item @samp{.clwb} @tab @samp{.rdpid} @tab @samp{.ptwrite} @tab @samp{.ibt}
@item @samp{.prefetchi} @tab @samp{.avx_ifma} @tab @samp{.avx_vnni_int8}
@item @samp{.cmpccxadd} @tab @samp{.wrmsrns} @tab @samp{.msrlist}
@item @samp{.avx_ne_convert} @tab @samp{.rao_int}
@item @samp{.fred} @tab @samp{.lkgs}
@item @samp{.avx_ne_convert} @tab @samp{.rao_int} @tab @samp{.fred} @tab @samp{.lkgs}
@item @samp{.avx_vnni_int16} @tab @samp{.sha512} @tab @samp{.sm3} @tab @samp{.sm4}
@item @samp{.pbndkb}
@item @samp{.wbnoinvd} @tab @samp{.pconfig} @tab @samp{.waitpkg} @tab @samp{.cldemote}
@item @samp{.shstk} @tab @samp{.gfni} @tab @samp{.vaes} @tab @samp{.vpclmulqdq}
@item @samp{.movdiri} @tab @samp{.movdir64b} @tab @samp{.enqcmd} @tab @samp{.tsxldtrk}

2
gas/doc/local.mk
View File

@ -41,7 +41,7 @@ TEXI2DVI = texi2dvi -I "$(srcdir)/%D%" -I %D% -I "$(srcdir)/../libiberty" \
%D%/asconfig.texi: %D%/$(CONFIG).texi %D%/$(am__dirstamp)
$(AM_V_at)rm -f %D%/asconfig.texi
$(AM_V_GEN)cp -p $(srcdir)/%D%/$(CONFIG).texi %D%/asconfig.texi
$(AM_V_GEN)cp $(srcdir)/%D%/$(CONFIG).texi %D%/asconfig.texi && touch -m -r $(srcdir)/%D%/$(CONFIG).texi %D%/asconfig.texi
$(AM_V_at)chmod u+w %D%/asconfig.texi
CPU_DOCS = \

2
gas/po/gas.pot
View File

@ -8,7 +8,7 @@ msgid ""
msgstr ""
"Project-Id-Version: PACKAGE VERSION\n"
"Report-Msgid-Bugs-To: https://sourceware.org/bugzilla/\n"
"POT-Creation-Date: 2023-07-30 14:35+0100\n"
"POT-Creation-Date: 2023-07-03 11:41+0100\n"
"PO-Revision-Date: YEAR-MO-DA HO:MI+ZONE\n"
"Last-Translator: FULL NAME <EMAIL@ADDRESS>\n"
"Language-Team: LANGUAGE <LL@li.org>\n"

2
gas/symbols.c
View File

@ -3103,7 +3103,7 @@ symbol_begin (void)
{
symbol_lastP = NULL;
symbol_rootP = NULL; /* In case we have 0 symbols (!!) */
sy_hash = htab_create_alloc (16, hash_symbol_entry, eq_symbol_entry,
sy_hash = htab_create_alloc (1024, hash_symbol_entry, eq_symbol_entry,
NULL, xcalloc, free);
#if defined (EMIT_SECTION_SYMBOLS) || !defined (RELOC_REQUIRES_SYMBOL)

1
gas/testsuite/gas/all/assign-bad-recursive.d
View File

@ -1,5 +1,4 @@
#name: bad recursive assignments
#source: assign-bad-recursive.s
#xfail: bfin-*-*
#notarget: *bpf-*-*
#error_output: assign-bad-recursive.l

2
gas/testsuite/gas/all/eqv-dot.d
View File

@ -2,7 +2,7 @@
#name: eqv involving dot
# bfin doesn't support 'symbol = expression'
# tic30 and tic4x have 4 octets per byte, tic54x has 2 octets per byte
#notarget: bfin-*-* *c30-*-* *c4x-*-* *c54x-*-* *bpf-*-*
#notarget: bfin-*-* *c30-*-* *c4x-*-* *c54x-*-*
# linkrelax targets don't handle equivalence expressions well (nor any
# other forward expression). mep uses complex relocs
#xfail: am33_2.0-*-* crx-*-* h8300-*-* mn10200-*-* mn10300-*-* mep-*-*

5
gas/testsuite/gas/all/gas.exp
View File

@ -105,7 +105,7 @@ if { [istarget "pdp11-*-*"] } then {
run_dump_test eqv-dot
}
if { ![istarget "bfin-*-*"] && ![istarget "bpf-*-*"] } then {
if { ![istarget "bfin-*-*"] } then {
gas_test "assign-ok.s" "" "" "== assignment support"
}
gas_test_error "assign-bad.s" "" "== assignment for symbol already set"
@ -403,8 +403,7 @@ if { ([istarget "i*86-*-*pe*"] && ![istarget "i*86-*-openbsd*"]) \
gas_test "fastcall.s" "" "" "fastcall labels"
}
if { ![istarget "bfin-*-*"] && ![istarget "nds32*-*-*"] \
&& ![istarget "bpf-*-*"] } then {
if { ![istarget "bfin-*-*"] && ![istarget "nds32*-*-*"] } then {
run_dump_test assign
}
run_dump_test sleb128

73
gas/testsuite/gas/bpf/alu-be-pseudoc.d
View File

@ -1,5 +1,72 @@
#as: --EB
#as: -EB -mdialect=pseudoc
#source: alu-pseudoc.s
#objdump: -dr
#dump: alu-be.dump
#objdump: -dr -M hex,pseudoc
#name: eBPF ALU64 instructions, big endian, pseudoc syntax
.*: +file format .*bpf.*
Disassembly of section .text:
0+ <.text>:
0: 07 20 00 00 00 00 02 9a r2\+=0x29a
8: 07 30 00 00 ff ff fd 66 r3\+=0xfffffd66
10: 07 40 00 00 7e ad be ef r4\+=0x7eadbeef
18: 0f 56 00 00 00 00 00 00 r5\+=r6
20: 17 20 00 00 00 00 02 9a r2-=0x29a
28: 17 30 00 00 ff ff fd 66 r3-=0xfffffd66
30: 17 40 00 00 7e ad be ef r4-=0x7eadbeef
38: 1f 56 00 00 00 00 00 00 r5-=r6
40: 27 20 00 00 00 00 02 9a r2\*=0x29a
48: 27 30 00 00 ff ff fd 66 r3\*=0xfffffd66
50: 27 40 00 00 7e ad be ef r4\*=0x7eadbeef
58: 2f 56 00 00 00 00 00 00 r5\*=r6
60: 37 20 00 00 00 00 02 9a r2/=0x29a
68: 37 30 00 00 ff ff fd 66 r3/=0xfffffd66
70: 37 40 00 00 7e ad be ef r4/=0x7eadbeef
78: 3f 56 00 00 00 00 00 00 r5/=r6
80: 47 20 00 00 00 00 02 9a r2|=0x29a
88: 47 30 00 00 ff ff fd 66 r3|=0xfffffd66
90: 47 40 00 00 7e ad be ef r4|=0x7eadbeef
98: 4f 56 00 00 00 00 00 00 r5|=r6
a0: 57 20 00 00 00 00 02 9a r2&=0x29a
a8: 57 30 00 00 ff ff fd 66 r3&=0xfffffd66
b0: 57 40 00 00 7e ad be ef r4&=0x7eadbeef
b8: 5f 56 00 00 00 00 00 00 r5&=r6
c0: 67 20 00 00 00 00 02 9a r2<<=0x29a
c8: 67 30 00 00 ff ff fd 66 r3<<=0xfffffd66
d0: 67 40 00 00 7e ad be ef r4<<=0x7eadbeef
d8: 6f 56 00 00 00 00 00 00 r5<<=r6
e0: 77 20 00 00 00 00 02 9a r2>>=0x29a
e8: 77 30 00 00 ff ff fd 66 r3>>=0xfffffd66
f0: 77 40 00 00 7e ad be ef r4>>=0x7eadbeef
f8: 7f 56 00 00 00 00 00 00 r5>>=r6
100: 97 20 00 00 00 00 02 9a r2%=0x29a
108: 97 30 00 00 ff ff fd 66 r3%=0xfffffd66
110: 97 40 00 00 7e ad be ef r4%=0x7eadbeef
118: 9f 56 00 00 00 00 00 00 r5%=r6
120: a7 20 00 00 00 00 02 9a r2\^=0x29a
128: a7 30 00 00 ff ff fd 66 r3\^=0xfffffd66
130: a7 40 00 00 7e ad be ef r4\^=0x7eadbeef
138: af 56 00 00 00 00 00 00 r5\^=r6
140: b7 20 00 00 00 00 02 9a r2=0x29a
148: b7 30 00 00 ff ff fd 66 r3=0xfffffd66
150: b7 40 00 00 7e ad be ef r4=0x7eadbeef
158: bf 56 00 00 00 00 00 00 r5=r6
160: c7 20 00 00 00 00 02 9a r2 s>>=0x29a
168: c7 30 00 00 ff ff fd 66 r3 s>>=0xfffffd66
170: c7 40 00 00 7e ad be ef r4 s>>=0x7eadbeef
178: cf 56 00 00 00 00 00 00 r5 s>>=r6
180: 8f 20 00 00 00 00 00 00 r2=-r2
188: d4 90 00 00 00 00 00 10 r9=le16 r9
190: d4 80 00 00 00 00 00 20 r8=le32 r8
198: d4 70 00 00 00 00 00 40 r7=le64 r7
1a0: dc 60 00 00 00 00 00 10 r6=be16 r6
1a8: dc 50 00 00 00 00 00 20 r5=be32 r5
1b0: dc 40 00 00 00 00 00 40 r4=be64 r4
1b8: bf 12 00 08 00 00 00 00 r1 = \(s8\) r2
1c0: bf 12 00 10 00 00 00 00 r1 = \(s16\) r2
1c8: bf 12 00 20 00 00 00 00 r1 = \(s32\) r2
1d0: d7 10 00 00 00 00 00 10 r1 = bswap16 r1
1d8: d7 20 00 00 00 00 00 20 r2 = bswap32 r2
1e0: d7 30 00 00 00 00 00 40 r3 = bswap64 r3
1e8: b7 10 00 00 ff ff f1 00 r1=0xfffff100

75
gas/testsuite/gas/bpf/alu-be.d
View File

@ -1,5 +1,72 @@
#as: --EB
#as: -EB -mdialect=normal
#source: alu.s
#objdump: -dr
#dump: alu-be.dump
#name: eBPF ALU64 instructions, big endian, normal syntax
#objdump: -dr -M hex
#name: eBPF ALU instructions, big endian, normal syntax
.*: +file format .*bpf.*
Disassembly of section .text:
0+ <.text>:
0: 07 20 00 00 00 00 02 9a add %r2,0x29a
8: 07 30 00 00 ff ff fd 66 add %r3,0xfffffd66
10: 07 40 00 00 7e ad be ef add %r4,0x7eadbeef
18: 0f 56 00 00 00 00 00 00 add %r5,%r6
20: 17 20 00 00 00 00 02 9a sub %r2,0x29a
28: 17 30 00 00 ff ff fd 66 sub %r3,0xfffffd66
30: 17 40 00 00 7e ad be ef sub %r4,0x7eadbeef
38: 1f 56 00 00 00 00 00 00 sub %r5,%r6
40: 27 20 00 00 00 00 02 9a mul %r2,0x29a
48: 27 30 00 00 ff ff fd 66 mul %r3,0xfffffd66
50: 27 40 00 00 7e ad be ef mul %r4,0x7eadbeef
58: 2f 56 00 00 00 00 00 00 mul %r5,%r6
60: 37 20 00 00 00 00 02 9a div %r2,0x29a
68: 37 30 00 00 ff ff fd 66 div %r3,0xfffffd66
70: 37 40 00 00 7e ad be ef div %r4,0x7eadbeef
78: 3f 56 00 00 00 00 00 00 div %r5,%r6
80: 47 20 00 00 00 00 02 9a or %r2,0x29a
88: 47 30 00 00 ff ff fd 66 or %r3,0xfffffd66
90: 47 40 00 00 7e ad be ef or %r4,0x7eadbeef
98: 4f 56 00 00 00 00 00 00 or %r5,%r6
a0: 57 20 00 00 00 00 02 9a and %r2,0x29a
a8: 57 30 00 00 ff ff fd 66 and %r3,0xfffffd66
b0: 57 40 00 00 7e ad be ef and %r4,0x7eadbeef
b8: 5f 56 00 00 00 00 00 00 and %r5,%r6
c0: 67 20 00 00 00 00 02 9a lsh %r2,0x29a
c8: 67 30 00 00 ff ff fd 66 lsh %r3,0xfffffd66
d0: 67 40 00 00 7e ad be ef lsh %r4,0x7eadbeef
d8: 6f 56 00 00 00 00 00 00 lsh %r5,%r6
e0: 77 20 00 00 00 00 02 9a rsh %r2,0x29a
e8: 77 30 00 00 ff ff fd 66 rsh %r3,0xfffffd66
f0: 77 40 00 00 7e ad be ef rsh %r4,0x7eadbeef
f8: 7f 56 00 00 00 00 00 00 rsh %r5,%r6
100: 97 20 00 00 00 00 02 9a mod %r2,0x29a
108: 97 30 00 00 ff ff fd 66 mod %r3,0xfffffd66
110: 97 40 00 00 7e ad be ef mod %r4,0x7eadbeef
118: 9f 56 00 00 00 00 00 00 mod %r5,%r6
120: a7 20 00 00 00 00 02 9a xor %r2,0x29a
128: a7 30 00 00 ff ff fd 66 xor %r3,0xfffffd66
130: a7 40 00 00 7e ad be ef xor %r4,0x7eadbeef
138: af 56 00 00 00 00 00 00 xor %r5,%r6
140: b7 20 00 00 00 00 02 9a mov %r2,0x29a
148: b7 30 00 00 ff ff fd 66 mov %r3,0xfffffd66
150: b7 40 00 00 7e ad be ef mov %r4,0x7eadbeef
158: bf 56 00 00 00 00 00 00 mov %r5,%r6
160: c7 20 00 00 00 00 02 9a arsh %r2,0x29a
168: c7 30 00 00 ff ff fd 66 arsh %r3,0xfffffd66
170: c7 40 00 00 7e ad be ef arsh %r4,0x7eadbeef
178: cf 56 00 00 00 00 00 00 arsh %r5,%r6
180: 8f 20 00 00 00 00 00 00 neg %r2
188: d4 90 00 00 00 00 00 10 endle %r9,16
190: d4 80 00 00 00 00 00 20 endle %r8,32
198: d4 70 00 00 00 00 00 40 endle %r7,64
1a0: dc 60 00 00 00 00 00 10 endbe %r6,16
1a8: dc 50 00 00 00 00 00 20 endbe %r5,32
1b0: dc 40 00 00 00 00 00 40 endbe %r4,64
1b8: bf 12 00 08 00 00 00 00 movs %r1,%r2,8
1c0: bf 12 00 10 00 00 00 00 movs %r1,%r2,16
1c8: bf 12 00 20 00 00 00 00 movs %r1,%r2,32
1d0: d7 10 00 00 00 00 00 10 bswap %r1,16
1d8: d7 20 00 00 00 00 00 20 bswap %r2,32
1e0: d7 30 00 00 00 00 00 40 bswap %r3,64
1e8: 87 10 00 00 00 00 0f 00 neg %r1,0xf00

75
gas/testsuite/gas/bpf/alu-pseudoc.d
View File

@ -1,5 +1,72 @@
#as: --EL
#objdump: -dr
#as: -EL -mdialect=pseudoc
#objdump: -dr -M hex,pseudoc
#source: alu-pseudoc.s
#dump: alu.dump
#name: eBPF ALU64 instructions, pseudo-c syntax
#name: eBPF ALU instructions, pseudo-c syntax
.*: +file format .*bpf.*
Disassembly of section .text:
0+ <.text>:
0: 07 02 00 00 9a 02 00 00 r2\+=0x29a
8: 07 03 00 00 66 fd ff ff r3\+=0xfffffd66
10: 07 04 00 00 ef be ad 7e r4\+=0x7eadbeef
18: 0f 65 00 00 00 00 00 00 r5\+=r6
20: 17 02 00 00 9a 02 00 00 r2-=0x29a
28: 17 03 00 00 66 fd ff ff r3-=0xfffffd66
30: 17 04 00 00 ef be ad 7e r4-=0x7eadbeef
38: 1f 65 00 00 00 00 00 00 r5-=r6
40: 27 02 00 00 9a 02 00 00 r2\*=0x29a
48: 27 03 00 00 66 fd ff ff r3\*=0xfffffd66
50: 27 04 00 00 ef be ad 7e r4\*=0x7eadbeef
58: 2f 65 00 00 00 00 00 00 r5\*=r6
60: 37 02 00 00 9a 02 00 00 r2/=0x29a
68: 37 03 00 00 66 fd ff ff r3/=0xfffffd66
70: 37 04 00 00 ef be ad 7e r4/=0x7eadbeef
78: 3f 65 00 00 00 00 00 00 r5/=r6
80: 47 02 00 00 9a 02 00 00 r2|=0x29a
88: 47 03 00 00 66 fd ff ff r3|=0xfffffd66
90: 47 04 00 00 ef be ad 7e r4|=0x7eadbeef
98: 4f 65 00 00 00 00 00 00 r5|=r6
a0: 57 02 00 00 9a 02 00 00 r2&=0x29a
a8: 57 03 00 00 66 fd ff ff r3&=0xfffffd66
b0: 57 04 00 00 ef be ad 7e r4&=0x7eadbeef
b8: 5f 65 00 00 00 00 00 00 r5&=r6
c0: 67 02 00 00 9a 02 00 00 r2<<=0x29a
c8: 67 03 00 00 66 fd ff ff r3<<=0xfffffd66
d0: 67 04 00 00 ef be ad 7e r4<<=0x7eadbeef
d8: 6f 65 00 00 00 00 00 00 r5<<=r6
e0: 77 02 00 00 9a 02 00 00 r2>>=0x29a
e8: 77 03 00 00 66 fd ff ff r3>>=0xfffffd66
f0: 77 04 00 00 ef be ad 7e r4>>=0x7eadbeef
f8: 7f 65 00 00 00 00 00 00 r5>>=r6
100: 97 02 00 00 9a 02 00 00 r2%=0x29a
108: 97 03 00 00 66 fd ff ff r3%=0xfffffd66
110: 97 04 00 00 ef be ad 7e r4%=0x7eadbeef
118: 9f 65 00 00 00 00 00 00 r5%=r6
120: a7 02 00 00 9a 02 00 00 r2\^=0x29a
128: a7 03 00 00 66 fd ff ff r3\^=0xfffffd66
130: a7 04 00 00 ef be ad 7e r4\^=0x7eadbeef
138: af 65 00 00 00 00 00 00 r5\^=r6
140: b7 02 00 00 9a 02 00 00 r2=0x29a
148: b7 03 00 00 66 fd ff ff r3=0xfffffd66
150: b7 04 00 00 ef be ad 7e r4=0x7eadbeef
158: bf 65 00 00 00 00 00 00 r5=r6
160: c7 02 00 00 9a 02 00 00 r2 s>>=0x29a
168: c7 03 00 00 66 fd ff ff r3 s>>=0xfffffd66
170: c7 04 00 00 ef be ad 7e r4 s>>=0x7eadbeef
178: cf 65 00 00 00 00 00 00 r5 s>>=r6
180: 8f 02 00 00 00 00 00 00 r2=-r2
188: d4 09 00 00 10 00 00 00 r9=le16 r9
190: d4 08 00 00 20 00 00 00 r8=le32 r8
198: d4 07 00 00 40 00 00 00 r7=le64 r7
1a0: dc 06 00 00 10 00 00 00 r6=be16 r6
1a8: dc 05 00 00 20 00 00 00 r5=be32 r5
1b0: dc 04 00 00 40 00 00 00 r4=be64 r4
1b8: bf 21 08 00 00 00 00 00 r1 = \(s8\) r2
1c0: bf 21 10 00 00 00 00 00 r1 = \(s16\) r2
1c8: bf 21 20 00 00 00 00 00 r1 = \(s32\) r2
1d0: d7 01 00 00 10 00 00 00 r1 = bswap16 r1
1d8: d7 02 00 00 20 00 00 00 r2 = bswap32 r2
1e0: d7 03 00 00 40 00 00 00 r3 = bswap64 r3
1e8: b7 01 00 00 00 f1 ff ff r1=0xfffff100

18
gas/testsuite/gas/bpf/alu-pseudoc.s
View File

@ -48,4 +48,20 @@
r3 s>>= -666
r4 s>>= 2125315823
r5 s>>= r6
r2 = -r2
r2 = - r2
r9 = le16 r9
r8 = le32 r8
r7 = le64 r7
r6 = be16 r6
r5 = be32 r5
r4 = be64 r4
r1 = (s8) r2
r1 = (s16) r2
r1 = (s32) r2
r1 = bswap16 r1
r2 = bswap32 r2
r3 = bswap64 r3
;; Note that the next instruction gets processed by the GAS
;; preprocessor into r1 =-0xf00, which parses into a %dr = %i32
;; instruction instead of a neg :/
r1 = - 0xf00

75
gas/testsuite/gas/bpf/alu.d
View File

@ -1,5 +1,72 @@
#as: --EL
#objdump: -dr
#as: -EL -mdialect=normal
#objdump: -dr -M hex
#source: alu.s
#dump: alu.dump
#name: eBPF ALU64 instructions, normal syntax
#name: eBPF ALU instructions, normal syntax
.*: +file format .*bpf.*
Disassembly of section .text:
0+ <.text>:
0: 07 02 00 00 9a 02 00 00 add %r2,0x29a
8: 07 03 00 00 66 fd ff ff add %r3,0xfffffd66
10: 07 04 00 00 ef be ad 7e add %r4,0x7eadbeef
18: 0f 65 00 00 00 00 00 00 add %r5,%r6
20: 17 02 00 00 9a 02 00 00 sub %r2,0x29a
28: 17 03 00 00 66 fd ff ff sub %r3,0xfffffd66
30: 17 04 00 00 ef be ad 7e sub %r4,0x7eadbeef
38: 1f 65 00 00 00 00 00 00 sub %r5,%r6
40: 27 02 00 00 9a 02 00 00 mul %r2,0x29a
48: 27 03 00 00 66 fd ff ff mul %r3,0xfffffd66
50: 27 04 00 00 ef be ad 7e mul %r4,0x7eadbeef
58: 2f 65 00 00 00 00 00 00 mul %r5,%r6
60: 37 02 00 00 9a 02 00 00 div %r2,0x29a
68: 37 03 00 00 66 fd ff ff div %r3,0xfffffd66
70: 37 04 00 00 ef be ad 7e div %r4,0x7eadbeef
78: 3f 65 00 00 00 00 00 00 div %r5,%r6
80: 47 02 00 00 9a 02 00 00 or %r2,0x29a
88: 47 03 00 00 66 fd ff ff or %r3,0xfffffd66
90: 47 04 00 00 ef be ad 7e or %r4,0x7eadbeef
98: 4f 65 00 00 00 00 00 00 or %r5,%r6
a0: 57 02 00 00 9a 02 00 00 and %r2,0x29a
a8: 57 03 00 00 66 fd ff ff and %r3,0xfffffd66
b0: 57 04 00 00 ef be ad 7e and %r4,0x7eadbeef
b8: 5f 65 00 00 00 00 00 00 and %r5,%r6
c0: 67 02 00 00 9a 02 00 00 lsh %r2,0x29a
c8: 67 03 00 00 66 fd ff ff lsh %r3,0xfffffd66
d0: 67 04 00 00 ef be ad 7e lsh %r4,0x7eadbeef
d8: 6f 65 00 00 00 00 00 00 lsh %r5,%r6
e0: 77 02 00 00 9a 02 00 00 rsh %r2,0x29a
e8: 77 03 00 00 66 fd ff ff rsh %r3,0xfffffd66
f0: 77 04 00 00 ef be ad 7e rsh %r4,0x7eadbeef
f8: 7f 65 00 00 00 00 00 00 rsh %r5,%r6
100: 97 02 00 00 9a 02 00 00 mod %r2,0x29a
108: 97 03 00 00 66 fd ff ff mod %r3,0xfffffd66
110: 97 04 00 00 ef be ad 7e mod %r4,0x7eadbeef
118: 9f 65 00 00 00 00 00 00 mod %r5,%r6
120: a7 02 00 00 9a 02 00 00 xor %r2,0x29a
128: a7 03 00 00 66 fd ff ff xor %r3,0xfffffd66
130: a7 04 00 00 ef be ad 7e xor %r4,0x7eadbeef
138: af 65 00 00 00 00 00 00 xor %r5,%r6
140: b7 02 00 00 9a 02 00 00 mov %r2,0x29a
148: b7 03 00 00 66 fd ff ff mov %r3,0xfffffd66
150: b7 04 00 00 ef be ad 7e mov %r4,0x7eadbeef
158: bf 65 00 00 00 00 00 00 mov %r5,%r6
160: c7 02 00 00 9a 02 00 00 arsh %r2,0x29a
168: c7 03 00 00 66 fd ff ff arsh %r3,0xfffffd66
170: c7 04 00 00 ef be ad 7e arsh %r4,0x7eadbeef
178: cf 65 00 00 00 00 00 00 arsh %r5,%r6
180: 8f 02 00 00 00 00 00 00 neg %r2
188: d4 09 00 00 10 00 00 00 endle %r9,16
190: d4 08 00 00 20 00 00 00 endle %r8,32
198: d4 07 00 00 40 00 00 00 endle %r7,64
1a0: dc 06 00 00 10 00 00 00 endbe %r6,16
1a8: dc 05 00 00 20 00 00 00 endbe %r5,32
1b0: dc 04 00 00 40 00 00 00 endbe %r4,64
1b8: bf 21 08 00 00 00 00 00 movs %r1,%r2,8
1c0: bf 21 10 00 00 00 00 00 movs %r1,%r2,16
1c8: bf 21 20 00 00 00 00 00 movs %r1,%r2,32
1d0: d7 01 00 00 10 00 00 00 bswap %r1,16
1d8: d7 02 00 00 20 00 00 00 bswap %r2,32
1e0: d7 03 00 00 40 00 00 00 bswap %r3,64
1e8: 87 01 00 00 00 0f 00 00 neg %r1,0xf00

13
gas/testsuite/gas/bpf/alu.s
View File

@ -49,3 +49,16 @@
arsh %r4, 0x7eadbeef
arsh %r5, %r6
neg %r2
endle %r9,16
endle %r8,32
endle %r7,64
endbe %r6,16
endbe %r5,32
endbe %r4,64
movs %r1,%r2,8
movs %r1,%r2,16
movs %r1,%r2,32
bswap %r1, 16
bswap %r2, 32
bswap %r3, 64
neg %r1, 0xf00

66
gas/testsuite/gas/bpf/alu32-be-pseudoc.d
View File

@ -1,5 +1,63 @@
#as: --EB
#objdump: -dr
#as: -EB -mdialect=pseudoc
#objdump: -dr -M hex,pseudoc
#source: alu32-pseudoc.s
#dump: alu32-be.dump
#name: eBPF ALU instructions, big-endian, pseudo-c syntax
#name: eBPF ALU32 instructions, big-endian, pseudo-c syntax
.*: +file format .*bpf.*
Disassembly of section .text:
0+ <.text>:
0: 04 20 00 00 00 00 02 9a w2\+=0x29a
8: 04 30 00 00 ff ff fd 66 w3\+=0xfffffd66
10: 04 40 00 00 7e ad be ef w4\+=0x7eadbeef
18: 0c 56 00 00 00 00 00 00 w5\+=w6
20: 14 20 00 00 00 00 02 9a w2-=0x29a
28: 14 30 00 00 ff ff fd 66 w3-=0xfffffd66
30: 14 40 00 00 7e ad be ef w4-=0x7eadbeef
38: 1c 56 00 00 00 00 00 00 w5-=w6
40: 24 20 00 00 00 00 02 9a w2\*=0x29a
48: 24 30 00 00 ff ff fd 66 w3\*=0xfffffd66
50: 24 40 00 00 7e ad be ef w4\*=0x7eadbeef
58: 2c 56 00 00 00 00 00 00 w5\*=w6
60: 34 20 00 00 00 00 02 9a w2/=0x29a
68: 34 30 00 00 ff ff fd 66 w3/=0xfffffd66
70: 34 40 00 00 7e ad be ef w4/=0x7eadbeef
78: 3c 56 00 00 00 00 00 00 w5/=w6
80: 44 20 00 00 00 00 02 9a w2|=0x29a
88: 44 30 00 00 ff ff fd 66 w3|=0xfffffd66
90: 44 40 00 00 7e ad be ef w4|=0x7eadbeef
98: 4c 56 00 00 00 00 00 00 w5|=w6
a0: 54 20 00 00 00 00 02 9a w2&=0x29a
a8: 54 30 00 00 ff ff fd 66 w3&=0xfffffd66
b0: 54 40 00 00 7e ad be ef w4&=0x7eadbeef
b8: 5c 56 00 00 00 00 00 00 w5&=w6
c0: 64 20 00 00 00 00 02 9a w2<<=0x29a
c8: 64 30 00 00 ff ff fd 66 w3<<=0xfffffd66
d0: 64 40 00 00 7e ad be ef w4<<=0x7eadbeef
d8: 6c 56 00 00 00 00 00 00 w5<<=w6
e0: 74 20 00 00 00 00 02 9a w2>>=0x29a
e8: 74 30 00 00 ff ff fd 66 w3>>=0xfffffd66
f0: 74 40 00 00 7e ad be ef w4>>=0x7eadbeef
f8: 7c 56 00 00 00 00 00 00 w5>>=w6
100: 94 20 00 00 00 00 02 9a w2%=0x29a
108: 94 30 00 00 ff ff fd 66 w3%=0xfffffd66
110: 94 40 00 00 7e ad be ef w4%=0x7eadbeef
118: 9c 56 00 00 00 00 00 00 w5%=w6
120: a4 20 00 00 00 00 02 9a w2\^=0x29a
128: a4 30 00 00 ff ff fd 66 w3\^=0xfffffd66
130: a4 40 00 00 7e ad be ef w4\^=0x7eadbeef
138: ac 56 00 00 00 00 00 00 w5\^=w6
140: b4 20 00 00 00 00 02 9a w2=0x29a
148: b4 30 00 00 ff ff fd 66 w3=0xfffffd66
150: b4 40 00 00 7e ad be ef w4=0x7eadbeef
158: bc 56 00 00 00 00 00 00 w5=w6
160: c4 20 00 00 00 00 02 9a w2 s>>=0x29a
168: c4 30 00 00 ff ff fd 66 w3 s>>=0xfffffd66
170: c4 40 00 00 7e ad be ef w4 s>>=0x7eadbeef
178: cc 56 00 00 00 00 00 00 w5 s>>=w6
180: 8c 20 00 00 00 00 00 00 w2=-w2
188: bc 12 00 08 00 00 00 00 w1 = \(s8\) w2
190: bc 12 00 10 00 00 00 00 w1 = \(s16\) w2
198: bc 12 00 20 00 00 00 00 w1 = \(s32\) w2
1a0: b4 10 00 00 ff ff f1 00 w1=0xfffff100

68
gas/testsuite/gas/bpf/alu32-be.d
View File

@ -1,5 +1,63 @@
#as: --EB
#objdump: -dr
#source: alu32-pseudoc.s
#dump: alu32-be.dump
#name: eBPF ALU instructions, big-endian, normal syntax
#as: -EB -mdialect=normal
#objdump: -dr -M hex
#source: alu32.s
#name: eBPF ALU32 instructions, big-endian, normal syntax
.*: +file format .*bpf.*
Disassembly of section .text:
0+ <.text>:
0: 04 20 00 00 00 00 02 9a add32 %r2,0x29a
8: 04 30 00 00 ff ff fd 66 add32 %r3,0xfffffd66
10: 04 40 00 00 7e ad be ef add32 %r4,0x7eadbeef
18: 0c 56 00 00 00 00 00 00 add32 %r5,%r6
20: 14 20 00 00 00 00 02 9a sub32 %r2,0x29a
28: 14 30 00 00 ff ff fd 66 sub32 %r3,0xfffffd66
30: 14 40 00 00 7e ad be ef sub32 %r4,0x7eadbeef
38: 1c 56 00 00 00 00 00 00 sub32 %r5,%r6
40: 24 20 00 00 00 00 02 9a mul32 %r2,0x29a
48: 24 30 00 00 ff ff fd 66 mul32 %r3,0xfffffd66
50: 24 40 00 00 7e ad be ef mul32 %r4,0x7eadbeef
58: 2c 56 00 00 00 00 00 00 mul32 %r5,%r6
60: 34 20 00 00 00 00 02 9a div32 %r2,0x29a
68: 34 30 00 00 ff ff fd 66 div32 %r3,0xfffffd66
70: 34 40 00 00 7e ad be ef div32 %r4,0x7eadbeef
78: 3c 56 00 00 00 00 00 00 div32 %r5,%r6
80: 44 20 00 00 00 00 02 9a or32 %r2,0x29a
88: 44 30 00 00 ff ff fd 66 or32 %r3,0xfffffd66
90: 44 40 00 00 7e ad be ef or32 %r4,0x7eadbeef
98: 4c 56 00 00 00 00 00 00 or32 %r5,%r6
a0: 54 20 00 00 00 00 02 9a and32 %r2,0x29a
a8: 54 30 00 00 ff ff fd 66 and32 %r3,0xfffffd66
b0: 54 40 00 00 7e ad be ef and32 %r4,0x7eadbeef
b8: 5c 56 00 00 00 00 00 00 and32 %r5,%r6
c0: 64 20 00 00 00 00 02 9a lsh32 %r2,0x29a
c8: 64 30 00 00 ff ff fd 66 lsh32 %r3,0xfffffd66
d0: 64 40 00 00 7e ad be ef lsh32 %r4,0x7eadbeef
d8: 6c 56 00 00 00 00 00 00 lsh32 %r5,%r6
e0: 74 20 00 00 00 00 02 9a rsh32 %r2,0x29a
e8: 74 30 00 00 ff ff fd 66 rsh32 %r3,0xfffffd66
f0: 74 40 00 00 7e ad be ef rsh32 %r4,0x7eadbeef
f8: 7c 56 00 00 00 00 00 00 rsh32 %r5,%r6
100: 94 20 00 00 00 00 02 9a mod32 %r2,0x29a
108: 94 30 00 00 ff ff fd 66 mod32 %r3,0xfffffd66
110: 94 40 00 00 7e ad be ef mod32 %r4,0x7eadbeef
118: 9c 56 00 00 00 00 00 00 mod32 %r5,%r6
120: a4 20 00 00 00 00 02 9a xor32 %r2,0x29a
128: a4 30 00 00 ff ff fd 66 xor32 %r3,0xfffffd66
130: a4 40 00 00 7e ad be ef xor32 %r4,0x7eadbeef
138: ac 56 00 00 00 00 00 00 xor32 %r5,%r6
140: b4 20 00 00 00 00 02 9a mov32 %r2,0x29a
148: b4 30 00 00 ff ff fd 66 mov32 %r3,0xfffffd66
150: b4 40 00 00 7e ad be ef mov32 %r4,0x7eadbeef
158: bc 56 00 00 00 00 00 00 mov32 %r5,%r6
160: c4 20 00 00 00 00 02 9a arsh32 %r2,0x29a
168: c4 30 00 00 ff ff fd 66 arsh32 %r3,0xfffffd66
170: c4 40 00 00 7e ad be ef arsh32 %r4,0x7eadbeef
178: cc 56 00 00 00 00 00 00 arsh32 %r5,%r6
180: 8c 20 00 00 00 00 00 00 neg32 %r2
188: bc 12 00 08 00 00 00 00 movs32 %r1,%r2,8
190: bc 12 00 10 00 00 00 00 movs32 %r1,%r2,16
198: bc 12 00 20 00 00 00 00 movs32 %r1,%r2,32
1a0: 84 10 00 00 00 00 0f 00 neg32 %r1,0xf00

66
gas/testsuite/gas/bpf/alu32-pseudoc.d
View File

@ -1,5 +1,63 @@
#as: --EL
#objdump: -dr
#as: -EL -mdialect=pseudoc
#objdump: -dr -M hex,pseudoc
#source: alu32-pseudoc.s
#dump: alu32.dump
#name: eBPF ALU instructions, pseudo-c syntax
#name: eBPF ALU32 instructions, pseudo-c syntax
.*: +file format .*bpf.*
Disassembly of section .text:
0+ <.text>:
0: 04 02 00 00 9a 02 00 00 w2\+=0x29a
8: 04 03 00 00 66 fd ff ff w3\+=0xfffffd66
10: 04 04 00 00 ef be ad 7e w4\+=0x7eadbeef
18: 0c 65 00 00 00 00 00 00 w5\+=w6
20: 14 02 00 00 9a 02 00 00 w2-=0x29a
28: 14 03 00 00 66 fd ff ff w3-=0xfffffd66
30: 14 04 00 00 ef be ad 7e w4-=0x7eadbeef
38: 1c 65 00 00 00 00 00 00 w5-=w6
40: 24 02 00 00 9a 02 00 00 w2\*=0x29a
48: 24 03 00 00 66 fd ff ff w3\*=0xfffffd66
50: 24 04 00 00 ef be ad 7e w4\*=0x7eadbeef
58: 2c 65 00 00 00 00 00 00 w5\*=w6
60: 34 02 00 00 9a 02 00 00 w2/=0x29a
68: 34 03 00 00 66 fd ff ff w3/=0xfffffd66
70: 34 04 00 00 ef be ad 7e w4/=0x7eadbeef
78: 3c 65 00 00 00 00 00 00 w5/=w6
80: 44 02 00 00 9a 02 00 00 w2|=0x29a
88: 44 03 00 00 66 fd ff ff w3|=0xfffffd66
90: 44 04 00 00 ef be ad 7e w4|=0x7eadbeef
98: 4c 65 00 00 00 00 00 00 w5|=w6
a0: 54 02 00 00 9a 02 00 00 w2&=0x29a
a8: 54 03 00 00 66 fd ff ff w3&=0xfffffd66
b0: 54 04 00 00 ef be ad 7e w4&=0x7eadbeef
b8: 5c 65 00 00 00 00 00 00 w5&=w6
c0: 64 02 00 00 9a 02 00 00 w2<<=0x29a
c8: 64 03 00 00 66 fd ff ff w3<<=0xfffffd66
d0: 64 04 00 00 ef be ad 7e w4<<=0x7eadbeef
d8: 6c 65 00 00 00 00 00 00 w5<<=w6
e0: 74 02 00 00 9a 02 00 00 w2>>=0x29a
e8: 74 03 00 00 66 fd ff ff w3>>=0xfffffd66
f0: 74 04 00 00 ef be ad 7e w4>>=0x7eadbeef
f8: 7c 65 00 00 00 00 00 00 w5>>=w6
100: 94 02 00 00 9a 02 00 00 w2%=0x29a
108: 94 03 00 00 66 fd ff ff w3%=0xfffffd66
110: 94 04 00 00 ef be ad 7e w4%=0x7eadbeef
118: 9c 65 00 00 00 00 00 00 w5%=w6
120: a4 02 00 00 9a 02 00 00 w2\^=0x29a
128: a4 03 00 00 66 fd ff ff w3\^=0xfffffd66
130: a4 04 00 00 ef be ad 7e w4\^=0x7eadbeef
138: ac 65 00 00 00 00 00 00 w5\^=w6
140: b4 02 00 00 9a 02 00 00 w2=0x29a
148: b4 03 00 00 66 fd ff ff w3=0xfffffd66
150: b4 04 00 00 ef be ad 7e w4=0x7eadbeef
158: bc 65 00 00 00 00 00 00 w5=w6
160: c4 02 00 00 9a 02 00 00 w2 s>>=0x29a
168: c4 03 00 00 66 fd ff ff w3 s>>=0xfffffd66
170: c4 04 00 00 ef be ad 7e w4 s>>=0x7eadbeef
178: cc 65 00 00 00 00 00 00 w5 s>>=w6
180: 8c 02 00 00 00 00 00 00 w2=-w2
188: bc 21 08 00 00 00 00 00 w1 = \(s8\) w2
190: bc 21 10 00 00 00 00 00 w1 = \(s16\) w2
198: bc 21 20 00 00 00 00 00 w1 = \(s32\) w2
1a0: b4 01 00 00 00 f1 ff ff w1=0xfffff100

37
gas/testsuite/gas/bpf/alu32-pseudoc.s
View File

@ -1,16 +1,16 @@
# Tests for the ALU eBPF pseudo-C instructions
.text
W2 += 666
W3 += -666
W4 += 2125315823
W5 += w6
W2 -= 666
W3 -= -666
W4 -= 2125315823
W5 -= w6
W2 *= 666
W3 *= -666
W4 *= 2125315823
w2 += 666
w3 += -666
w4 += 2125315823
w5 += w6
w2 -= 666
w3 -= -666
w4 -= 2125315823
w5 -= w6
w2 *= 666
w3 *= -666
w4 *= 2125315823
w5 *= w6
w2 /= 666
w3 /= -666
@ -48,10 +48,11 @@
w3 s>>= -666
w4 s>>= 2125315823
w5 s>>= w6
w2 = -w2
r9 = le16 r9
r8 = le32 r8
r7 = le64 r7
r6 = be16 r6
r5 = be32 r5
r4 = be64 r4
w2 = - w2
w1 = (s8) w2
w1 = (s16) w2
w1 = (s32) w2
;; Note that the next instruction gets processed by the GAS
;; preprocessor into w1 =-0xf00, which parses into a %dw = %i32
;; instruction instead of a neg :/
w1 = - 0xf00

66
gas/testsuite/gas/bpf/alu32.d
View File

@ -1,5 +1,63 @@
#as: --EL
#objdump: -dr
#as: -EL -mdialect=normal
#objdump: -dr -M hex
#source: alu32.s
#dump: alu32.dump
#name: eBPF ALU instructions, normal syntax
#name: eBPF ALU32 instructions, normal syntax
.*: +file format .*bpf.*
Disassembly of section .text:
0+ <.text>:
0: 04 02 00 00 9a 02 00 00 add32 %r2,0x29a
8: 04 03 00 00 66 fd ff ff add32 %r3,0xfffffd66
10: 04 04 00 00 ef be ad 7e add32 %r4,0x7eadbeef
18: 0c 65 00 00 00 00 00 00 add32 %r5,%r6
20: 14 02 00 00 9a 02 00 00 sub32 %r2,0x29a
28: 14 03 00 00 66 fd ff ff sub32 %r3,0xfffffd66
30: 14 04 00 00 ef be ad 7e sub32 %r4,0x7eadbeef
38: 1c 65 00 00 00 00 00 00 sub32 %r5,%r6
40: 24 02 00 00 9a 02 00 00 mul32 %r2,0x29a
48: 24 03 00 00 66 fd ff ff mul32 %r3,0xfffffd66
50: 24 04 00 00 ef be ad 7e mul32 %r4,0x7eadbeef
58: 2c 65 00 00 00 00 00 00 mul32 %r5,%r6
60: 34 02 00 00 9a 02 00 00 div32 %r2,0x29a
68: 34 03 00 00 66 fd ff ff div32 %r3,0xfffffd66
70: 34 04 00 00 ef be ad 7e div32 %r4,0x7eadbeef
78: 3c 65 00 00 00 00 00 00 div32 %r5,%r6
80: 44 02 00 00 9a 02 00 00 or32 %r2,0x29a
88: 44 03 00 00 66 fd ff ff or32 %r3,0xfffffd66
90: 44 04 00 00 ef be ad 7e or32 %r4,0x7eadbeef
98: 4c 65 00 00 00 00 00 00 or32 %r5,%r6
a0: 54 02 00 00 9a 02 00 00 and32 %r2,0x29a
a8: 54 03 00 00 66 fd ff ff and32 %r3,0xfffffd66
b0: 54 04 00 00 ef be ad 7e and32 %r4,0x7eadbeef
b8: 5c 65 00 00 00 00 00 00 and32 %r5,%r6
c0: 64 02 00 00 9a 02 00 00 lsh32 %r2,0x29a
c8: 64 03 00 00 66 fd ff ff lsh32 %r3,0xfffffd66
d0: 64 04 00 00 ef be ad 7e lsh32 %r4,0x7eadbeef
d8: 6c 65 00 00 00 00 00 00 lsh32 %r5,%r6
e0: 74 02 00 00 9a 02 00 00 rsh32 %r2,0x29a
e8: 74 03 00 00 66 fd ff ff rsh32 %r3,0xfffffd66
f0: 74 04 00 00 ef be ad 7e rsh32 %r4,0x7eadbeef
f8: 7c 65 00 00 00 00 00 00 rsh32 %r5,%r6
100: 94 02 00 00 9a 02 00 00 mod32 %r2,0x29a
108: 94 03 00 00 66 fd ff ff mod32 %r3,0xfffffd66
110: 94 04 00 00 ef be ad 7e mod32 %r4,0x7eadbeef
118: 9c 65 00 00 00 00 00 00 mod32 %r5,%r6
120: a4 02 00 00 9a 02 00 00 xor32 %r2,0x29a
128: a4 03 00 00 66 fd ff ff xor32 %r3,0xfffffd66
130: a4 04 00 00 ef be ad 7e xor32 %r4,0x7eadbeef
138: ac 65 00 00 00 00 00 00 xor32 %r5,%r6
140: b4 02 00 00 9a 02 00 00 mov32 %r2,0x29a
148: b4 03 00 00 66 fd ff ff mov32 %r3,0xfffffd66
150: b4 04 00 00 ef be ad 7e mov32 %r4,0x7eadbeef
158: bc 65 00 00 00 00 00 00 mov32 %r5,%r6
160: c4 02 00 00 9a 02 00 00 arsh32 %r2,0x29a
168: c4 03 00 00 66 fd ff ff arsh32 %r3,0xfffffd66
170: c4 04 00 00 ef be ad 7e arsh32 %r4,0x7eadbeef
178: cc 65 00 00 00 00 00 00 arsh32 %r5,%r6
180: 8c 02 00 00 00 00 00 00 neg32 %r2
188: bc 21 08 00 00 00 00 00 movs32 %r1,%r2,8
190: bc 21 10 00 00 00 00 00 movs32 %r1,%r2,16
198: bc 21 20 00 00 00 00 00 movs32 %r1,%r2,32
1a0: 84 01 00 00 00 0f 00 00 neg32 %r1,0xf00

10
gas/testsuite/gas/bpf/alu32.s
View File

@ -49,9 +49,7 @@
arsh32 %r4, 0x7eadbeef
arsh32 %r5, %r6
neg32 %r2
endle %r9,16
endle %r8,32
endle %r7,64
endbe %r6,16
endbe %r5,32
endbe %r4,64
movs32 %r1,%r2,8
movs32 %r1,%r2,16
movs32 %r1,%r2,32
neg32 %r1, 0xf00

27
gas/testsuite/gas/bpf/atomic-be.d
View File

@ -1,7 +1,6 @@
#as: --EB
#as: -EB -mdialect=normal
#source: atomic.s
#source: atomic-pseudoc.s
#objdump: -dr
#objdump: -dr -M hex
#name: eBPF atomic instructions, big endian
.*: +file format .*bpf.*
@ -9,5 +8,23 @@
Disassembly of section .text:
0+ <.text>:
0: db 12 1e ef 00 00 00 00 xadddw \[%r1\+0x1eef\],%r2
8: c3 12 1e ef 00 00 00 00 xaddw \[%r1\+0x1eef\],%r2
0: db 12 1e ef 00 00 00 00 aadd \[%r1\+0x1eef\],%r2
8: c3 12 1e ef 00 00 00 00 aadd32 \[%r1\+0x1eef\],%r2
10: db 12 1e ef 00 00 00 50 aand \[%r1\+0x1eef\],%r2
18: c3 12 1e ef 00 00 00 50 aand32 \[%r1\+0x1eef\],%r2
20: db 12 1e ef 00 00 00 40 aor \[%r1\+0x1eef\],%r2
28: c3 12 1e ef 00 00 00 40 aor32 \[%r1\+0x1eef\],%r2
30: db 12 1e ef 00 00 00 a0 axor \[%r1\+0x1eef\],%r2
38: c3 12 1e ef 00 00 00 a0 axor32 \[%r1\+0x1eef\],%r2
40: db 12 1e ef 00 00 00 01 afadd \[%r1\+0x1eef\],%r2
48: c3 12 1e ef 00 00 00 01 afadd32 \[%r1\+0x1eef\],%r2
50: db 12 1e ef 00 00 00 51 afand \[%r1\+0x1eef\],%r2
58: c3 12 1e ef 00 00 00 51 afand32 \[%r1\+0x1eef\],%r2
60: db 12 1e ef 00 00 00 41 afor \[%r1\+0x1eef\],%r2
68: c3 12 1e ef 00 00 00 41 afor32 \[%r1\+0x1eef\],%r2
70: db 12 1e ef 00 00 00 a1 afxor \[%r1\+0x1eef\],%r2
78: c3 12 1e ef 00 00 00 a1 afxor32 \[%r1\+0x1eef\],%r2
80: db 12 00 04 00 00 00 f1 acmp \[%r1\+0x4\],%r2
88: c3 23 00 04 00 00 00 f1 acmp32 \[%r2\+0x4\],%r3
90: db 12 00 08 00 00 00 e1 axchg \[%r1\+0x8\],%r2
98: c3 13 00 08 00 00 00 e1 axchg32 \[%r1\+0x8\],%r3

35
gas/testsuite/gas/bpf/atomic-pseudoc.d
View File

@ -1,5 +1,32 @@
#as: --EL
#objdump: -dr
#as: -EL -mdialect=pseudoc
#objdump: -dr -M hex,pseudoc
#source: atomic-pseudoc.s
#dump: atomic.dump
#name: eBPF atomic instructions, normal syntax
#name: eBPF atomic instructions, pseudoc syntax
.*: +file format .*bpf.*
Disassembly of section .text:
0+ <.text>:
0: db 21 ef 1e 00 00 00 00 lock \*\(u64\*\)\(r1\+0x1eef\)\+=r2
8: c3 21 ef 1e 00 00 00 00 lock \*\(u32\*\)\(r1\+0x1eef\)\+=r2
10: db 21 ef 1e 00 00 00 00 lock \*\(u64\*\)\(r1\+0x1eef\)\+=r2
18: c3 21 ef 1e 00 00 00 00 lock \*\(u32\*\)\(r1\+0x1eef\)\+=r2
20: db 21 ef 1e 50 00 00 00 lock \*\(u64\*\)\(r1\+0x1eef\)\&=r2
28: c3 21 ef 1e 50 00 00 00 lock \*\(u32\*\)\(r1\+0x1eef\)\&=r2
30: db 21 ef 1e 40 00 00 00 lock \*\(u64\*\)\(r1\+0x1eef\)\|=r2
38: c3 21 ef 1e 40 00 00 00 lock \*\(u32\*\)\(r1\+0x1eef\)\|=r2
40: db 21 ef 1e a0 00 00 00 lock \*\(u64\*\)\(r1\+0x1eef\)\^=r2
48: c3 21 ef 1e a0 00 00 00 lock \*\(u32\*\)\(r1\+0x1eef\)\^=r2
50: db 21 ef 1e 01 00 00 00 r2=atomic_fetch_add\(\(u64\*\)\(r1\+0x1eef\),r2\)
58: c3 21 ef 1e 01 00 00 00 w2=atomic_fetch_add\(\(u32\*\)\(r1\+0x1eef\),w2\)
60: db 21 ef 1e 51 00 00 00 r2=atomic_fetch_and\(\(u64\*\)\(r1\+0x1eef\),r2\)
68: c3 21 ef 1e 51 00 00 00 w2=atomic_fetch_and\(\(u32\*\)\(r1\+0x1eef\),w2\)
70: db 21 ef 1e 41 00 00 00 r2=atomic_fetch_or\(\(u64\*\)\(r1\+0x1eef\),r2\)
78: c3 21 ef 1e 41 00 00 00 w2=atomic_fetch_or\(\(u32\*\)\(r1\+0x1eef\),w2\)
80: db 21 ef 1e a1 00 00 00 r2=atomic_fetch_xor\(\(u64\*\)\(r1\+0x1eef\),r2\)
88: c3 21 ef 1e a1 00 00 00 w2=atomic_fetch_xor\(\(u32\*\)\(r1\+0x1eef\),w2\)
90: db 21 04 00 f1 00 00 00 r0=cmpxchg_64\(r1\+0x4,r0,r2\)
98: c3 32 04 00 f1 00 00 00 w0=cmpxchg32_32\(r2\+0x4,w0,w3\)
a0: db 21 08 00 e1 00 00 00 r2=xchg_64\(r1\+0x8,r2\)
a8: c3 31 08 00 e1 00 00 00 w3=xchg32_32\(r1\+0x8,w3\)

26
gas/testsuite/gas/bpf/atomic-pseudoc.s
View File

@ -1,4 +1,24 @@
# Test for eBPF ADDW and ADDDW pseudo-C instructions
# Test for eBPF atomic pseudo-C instructions.
.text
lock *(u64 *)(r1 + 7919) += r2
lock *(u32 *)(r1 + 7919) += r2
lock *(u64 *)(r1 + 0x1eef) += r2
lock *(u32 *)(r1 + 0x1eef) += r2
lock *(u64*)(r1+0x1eef)+=r2
lock *(u32*)(r1+0x1eef)+=r2
lock *(u64*)(r1+0x1eef)&=r2
lock *(u32*)(r1+0x1eef)&=r2
lock *(u64*)(r1+0x1eef)|=r2
lock *(u32*)(r1+0x1eef)|=r2
lock *(u64*)(r1+0x1eef)^=r2
lock *(u32*)(r1+0x1eef)^=r2
r2 = atomic_fetch_add((u64*)(r1+0x1eef),r2)
w2 = atomic_fetch_add((u32*)(r1+0x1eef),w2)
r2 = atomic_fetch_and((u64*)(r1+0x1eef),r2)
w2 = atomic_fetch_and((u32*)(r1+0x1eef),w2)
r2 = atomic_fetch_or((u64*)(r1+0x1eef),r2)
w2 = atomic_fetch_or((u32*)(r1+0x1eef),w2)
r2 = atomic_fetch_xor((u64*)(r1+0x1eef),r2)
w2 = atomic_fetch_xor((u32*)(r1+0x1eef),w2)
r0 = cmpxchg_64(r1+0x4,r0,r2)
w0 = cmpxchg32_32(r2+0x4,w0,w3)
r2 = xchg_64(r1+0x8,r2)
w3 = xchg32_32(r1+0x8,w3)

31
gas/testsuite/gas/bpf/atomic.d
View File

@ -1,5 +1,30 @@
#as: --EL
#objdump: -dr
#as: -EL -mdialect=normal
#objdump: -dr -M hex
#source: atomic.s
#dump: atomic.dump
#name: eBPF atomic instructions, normal syntax
.*: +file format .*bpf.*
Disassembly of section .text:
0+ <.text>:
0: db 21 ef 1e 00 00 00 00 aadd \[%r1\+0x1eef\],%r2
8: c3 21 ef 1e 00 00 00 00 aadd32 \[%r1\+0x1eef\],%r2
10: db 21 ef 1e 50 00 00 00 aand \[%r1\+0x1eef\],%r2
18: c3 21 ef 1e 50 00 00 00 aand32 \[%r1\+0x1eef\],%r2
20: db 21 ef 1e 40 00 00 00 aor \[%r1\+0x1eef\],%r2
28: c3 21 ef 1e 40 00 00 00 aor32 \[%r1\+0x1eef\],%r2
30: db 21 ef 1e a0 00 00 00 axor \[%r1\+0x1eef\],%r2
38: c3 21 ef 1e a0 00 00 00 axor32 \[%r1\+0x1eef\],%r2
40: db 21 ef 1e 01 00 00 00 afadd \[%r1\+0x1eef\],%r2
48: c3 21 ef 1e 01 00 00 00 afadd32 \[%r1\+0x1eef\],%r2
50: db 21 ef 1e 51 00 00 00 afand \[%r1\+0x1eef\],%r2
58: c3 21 ef 1e 51 00 00 00 afand32 \[%r1\+0x1eef\],%r2
60: db 21 ef 1e 41 00 00 00 afor \[%r1\+0x1eef\],%r2
68: c3 21 ef 1e 41 00 00 00 afor32 \[%r1\+0x1eef\],%r2
70: db 21 ef 1e a1 00 00 00 afxor \[%r1\+0x1eef\],%r2
78: c3 21 ef 1e a1 00 00 00 afxor32 \[%r1\+0x1eef\],%r2
80: db 21 04 00 f1 00 00 00 acmp \[%r1\+0x4\],%r2
88: c3 32 04 00 f1 00 00 00 acmp32 \[%r2\+0x4\],%r3
90: db 21 08 00 e1 00 00 00 axchg \[%r1\+0x8\],%r2
98: c3 31 08 00 e1 00 00 00 axchg32 \[%r1\+0x8\],%r3

27
gas/testsuite/gas/bpf/atomic.s
View File

@ -1,5 +1,24 @@
# Test for eBPF ADDW and ADDDW instructions
# Test for eBPF atomic instructions
.text
xadddw [%r1+0x1eef], %r2
xaddw [%r1+0x1eef], %r2
aadd [%r1+0x1eef], %r2
aadd32 [%r1+0x1eef], %r2
aand [%r1+0x1eef], %r2
aand32 [%r1+0x1eef], %r2
aor [%r1+0x1eef], %r2
aor32 [%r1+0x1eef], %r2
axor [%r1+0x1eef], %r2
axor32 [%r1+0x1eef], %r2
afadd [%r1+0x1eef], %r2
afadd32 [%r1+0x1eef], %r2
afand [%r1+0x1eef], %r2
afand32 [%r1+0x1eef], %r2
afor [%r1+0x1eef], %r2
afor32 [%r1+0x1eef], %r2
afxor [%r1+0x1eef], %r2
afxor32 [%r1+0x1eef], %r2
acmp [%r1+4], %r2
acmp32 [%r2+4], %r3
axchg [%r1+8], %r2
axchg32 [%r1+8], %r3

41
gas/testsuite/gas/bpf/bpf.exp
View File

@ -18,6 +18,10 @@
# Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.
if {[istarget bpf*-*-*]} {
# Little-endian BPF tests
run_dump_test call
run_dump_test exit
run_dump_test data
run_dump_test lddw
run_dump_test lddw-pseudoc
run_dump_test alu
@ -30,13 +34,19 @@ if {[istarget bpf*-*-*]} {
run_dump_test jump-pseudoc
run_dump_test jump32
run_dump_test jump32-pseudoc
run_dump_test call
run_dump_test exit
run_dump_test atomic-v1
run_dump_test atomic
run_dump_test atomic-pseudoc
run_dump_test data
run_dump_test pseudoc-normal
run_dump_test indcall-1
run_dump_test indcall-1-pseudoc
run_dump_test jump-relax-ja
run_dump_test jump-relax-jump
# Big-endian BPF tests
run_dump_test call-be
run_dump_test exit-be
run_dump_test data-be
run_dump_test lddw-be
run_dump_test lddw-be-pseudoc
run_dump_test alu-be
@ -44,17 +54,22 @@ if {[istarget bpf*-*-*]} {
run_dump_test alu32-be
run_dump_test alu32-be-pseudoc
run_dump_test mem-be
run_dump_test mem-be-pseudoc
run_dump_test jump-be
run_dump_test call-be
run_dump_test exit-be
run_dump_test jump-be-pseudoc
run_dump_test jump32-be
run_dump_test jump32-be-pseudoc
run_dump_test atomic-v1-be
run_dump_test atomic-be
run_dump_test data-be
run_dump_test pseudoc-normal-be
run_dump_test atomic-be-pseudoc
run_dump_test indcall-1
run_dump_test indcall-1-pseudoc
run_list_test indcall-bad-1
run_dump_test jump-relax-ja-be
run_dump_test jump-relax-jump-be
run_dump_test alu-xbpf
run_dump_test alu32-xbpf
# Overflow tests
run_dump_test offset16-overflow
run_dump_test disp16-overflow
run_dump_test disp16-overflow-relax
run_dump_test disp32-overflow
run_dump_test imm32-overflow
}

4
gas/testsuite/gas/bpf/call-be.d
View File

@ -1,6 +1,6 @@
#as: --EB
#as: -EB -mdialect=normal
#source: call.s
#objdump: -dr
#objdump: -dr -M dec
#name: eBPF CALL instruction, big endian
.*: +file format .*bpf.*

4
gas/testsuite/gas/bpf/call.d
View File

@ -1,5 +1,5 @@
#as: --EL
#objdump: -dr
#as: -EL -mdialect=normal
#objdump: -dr -M dec
#name: eBPF CALL instruction
.*: +file format .*bpf.*

2
gas/testsuite/gas/bpf/data-be.d
View File

@ -1,4 +1,4 @@
#as: --EB
#as: -EB -mdialect=normal
#source: data.s
#objdump: -s -j .data
#name: eBPF data directives, big endian

2
gas/testsuite/gas/bpf/data.d
View File

@ -1,4 +1,4 @@
#as: --EL
#as: -EL -mdialect=normal
#objdump: -s -j .data
#name: eBPF data directives

4
gas/testsuite/gas/bpf/exit-be.d
View File

@ -1,6 +1,6 @@
#as: --EB
#as: -EB -mdialect=normal
#source: exit.s
#objdump: -dr
#objdump: -dr -M hex
#name: eBPF EXIT instruction, big endian
.*: +file format .*bpf.*

4
gas/testsuite/gas/bpf/exit.d
View File

@ -1,5 +1,5 @@
#as: --EL
#objdump: -dr
#as: -EL -mdialect=normal
#objdump: -dr -M hex
#name: eBPF EXIT instruction
.*: +file format .*bpf.*

24
gas/testsuite/gas/bpf/indcall-1-pseudoc.d
View File

@ -1,5 +1,23 @@
#as: -mxbpf --EL
#objdump: -mxbpf -dr
#as: -EL -mdialect=pseudoc -misa-spec=xbpf
#objdump: -M xbpf,pseudoc,dec -dr
#source: indcall-1-pseudoc.s
#dump: indcall-1.dump
#name: BPF indirect call 1, pseudoc syntax
.*: +file format .*bpf.*
Disassembly of section \.text:
0000000000000000 <main>:
0: b7 00 00 00 01 00 00 00 r0=1
8: b7 01 00 00 01 00 00 00 r1=1
10: b7 02 00 00 02 00 00 00 r2=2
18: 18 06 00 00 38 00 00 00 r6=56 ll
20: 00 00 00 00 00 00 00 00[ ]*
18: R_BPF_64_64 .text
28: 8d 06 00 00 00 00 00 00 callx r6
30: 95 00 00 00 00 00 00 00 exit
0000000000000038 <bar>:
38: b7 00 00 00 00 00 00 00 r0=0
40: 95 00 00 00 00 00 00 00 exit
#pass

24
gas/testsuite/gas/bpf/indcall-1.d
View File

@ -1,5 +1,23 @@
#as: -mxbpf --EL
#objdump: -mxbpf -dr
#as: -EL -misa-spec=xbpf
#objdump: -dr -M xbpf,dec
#source: indcall-1.s
#dump: indcall-1.dump
#name: BPF indirect call 1, normal syntax
.*: +file format .*bpf.*
Disassembly of section \.text:
0000000000000000 <main>:
0: b7 00 00 00 01 00 00 00 mov %r0,1
8: b7 01 00 00 01 00 00 00 mov %r1,1
10: b7 02 00 00 02 00 00 00 mov %r2,2
18: 18 06 00 00 38 00 00 00 lddw %r6,56
20: 00 00 00 00 00 00 00 00[ ]*
18: R_BPF_64_64 .text
28: 8d 06 00 00 00 00 00 00 call %r6
30: 95 00 00 00 00 00 00 00 exit
0000000000000038 <bar>:
38: b7 00 00 00 00 00 00 00 mov %r0,0
40: 95 00 00 00 00 00 00 00 exit
#pass

7
gas/testsuite/gas/bpf/jump-be.d
View File

@ -1,7 +1,6 @@
#as: --EB
#as: -EB -mdialect=normal
#source: jump.s
#source: jump-pseudoc.s
#objdump: -dr
#objdump: -dr -M dec
#name: eBPF JUMP instructions, big endian
.*: +file format .*bpf.*
@ -31,3 +30,5 @@ Disassembly of section .text:
98: cd 34 00 00 00 00 00 00 jslt %r3,%r4,0
a0: d5 30 00 01 00 00 00 03 jsle %r3,3,1
a8: dd 34 00 00 00 00 00 00 jsle %r3,%r4,0
b0: 06 00 00 00 00 00 00 01 jal 1
b8: 06 00 00 00 00 00 00 00 jal 0

35
gas/testsuite/gas/bpf/jump-pseudoc.d
View File

@ -1,5 +1,34 @@
#as: --EL
#objdump: -dr
#as: -EL -mdialect=pseudoc
#objdump: -dr -M dec,pseudoc
#source: jump-pseudoc.s
#dump: jump.dump
#name: eBPF JUMP instructions, pseudoc syntax
.*: +file format .*bpf.*
Disassembly of section .text:
0+ <.text>:
0: 05 00 03 00 00 00 00 00 goto 3
8: 0f 11 00 00 00 00 00 00 r1\+=r1
10: 15 03 01 00 03 00 00 00 if r3==3 goto 1
18: 1d 43 00 00 00 00 00 00 if r3==r4 goto 0
20: 35 03 fd ff 03 00 00 00 if r3>=3 goto -3
28: 3d 43 fc ff 00 00 00 00 if r3>=r4 goto -4
30: a5 03 01 00 03 00 00 00 if r3<3 goto 1
38: ad 43 00 00 00 00 00 00 if r3<r4 goto 0
40: b5 03 01 00 03 00 00 00 if r3<=3 goto 1
48: bd 43 00 00 00 00 00 00 if r3<=r4 goto 0
50: 45 03 01 00 03 00 00 00 if r3&3 goto 1
58: 4d 43 00 00 00 00 00 00 if r3&r4 goto 0
60: 55 03 01 00 03 00 00 00 if r3!=3 goto 1
68: 5d 43 00 00 00 00 00 00 if r3!=r4 goto 0
70: 65 03 01 00 03 00 00 00 if r3s>3 goto 1
78: 6d 43 00 00 00 00 00 00 if r3s>r4 goto 0
80: 75 03 01 00 03 00 00 00 if r3s>=3 goto 1
88: 7d 43 00 00 00 00 00 00 if r3s>=r4 goto 0
90: c5 03 01 00 03 00 00 00 if r3s<3 goto 1
98: cd 43 00 00 00 00 00 00 if r3s<r4 goto 0
a0: d5 03 01 00 03 00 00 00 if r3s<=3 goto 1
a8: dd 43 00 00 00 00 00 00 if r3s<=r4 goto 0
b0: 06 00 00 00 01 00 00 00 gotol 1
b8: 06 00 00 00 00 00 00 00 gotol 0

2
gas/testsuite/gas/bpf/jump-pseudoc.s
View File

@ -22,4 +22,6 @@
if r3 s< r4 goto 1f
1: if r3 s<= 3 goto 1f
if r3 s<= r4 goto 1f
1: gotol 1f
gotol 1f
1:

35
gas/testsuite/gas/bpf/jump.d
View File

@ -1,5 +1,34 @@
#as: --EL
#objdump: -dr
#as: -EL -mdialect=normal
#objdump: -dr -M dec
#source: jump.s
#dump: jump.dump
#name: eBPF JUMP instructions, normal syntax
.*: +file format .*bpf.*
Disassembly of section .text:
0+ <.text>:
0: 05 00 03 00 00 00 00 00 ja 3
8: 0f 11 00 00 00 00 00 00 add %r1,%r1
10: 15 03 01 00 03 00 00 00 jeq %r3,3,1
18: 1d 43 00 00 00 00 00 00 jeq %r3,%r4,0
20: 35 03 fd ff 03 00 00 00 jge %r3,3,-3
28: 3d 43 fc ff 00 00 00 00 jge %r3,%r4,-4
30: a5 03 01 00 03 00 00 00 jlt %r3,3,1
38: ad 43 00 00 00 00 00 00 jlt %r3,%r4,0
40: b5 03 01 00 03 00 00 00 jle %r3,3,1
48: bd 43 00 00 00 00 00 00 jle %r3,%r4,0
50: 45 03 01 00 03 00 00 00 jset %r3,3,1
58: 4d 43 00 00 00 00 00 00 jset %r3,%r4,0
60: 55 03 01 00 03 00 00 00 jne %r3,3,1
68: 5d 43 00 00 00 00 00 00 jne %r3,%r4,0
70: 65 03 01 00 03 00 00 00 jsgt %r3,3,1
78: 6d 43 00 00 00 00 00 00 jsgt %r3,%r4,0
80: 75 03 01 00 03 00 00 00 jsge %r3,3,1
88: 7d 43 00 00 00 00 00 00 jsge %r3,%r4,0
90: c5 03 01 00 03 00 00 00 jslt %r3,3,1
98: cd 43 00 00 00 00 00 00 jslt %r3,%r4,0
a0: d5 03 01 00 03 00 00 00 jsle %r3,3,1
a8: dd 43 00 00 00 00 00 00 jsle %r3,%r4,0
b0: 06 00 00 00 01 00 00 00 jal 1
b8: 06 00 00 00 00 00 00 00 jal 0

4
gas/testsuite/gas/bpf/jump.s
View File

@ -22,4 +22,6 @@
jslt %r3,%r4,1f
1: jsle %r3,3,1f
jsle %r3,%r4,1f
1:
1: jal 1f
jal 1f
1:

33
gas/testsuite/gas/bpf/jump32-pseudoc.d
View File

@ -1,5 +1,32 @@
#as: --EL
#objdump: -dr
#as: -EL -mdialect=pseudoc
#objdump: -dr -M dec,pseudoc
#source: jump32-pseudoc.s
#dump: jump32.dump
#name: eBPF JUMP32 instructions, pseudoc syntax
.*: +file format .*bpf.*
Disassembly of section .text:
0+ <.text>:
0: 05 00 03 00 00 00 00 00 goto 3
8: 0f 11 00 00 00 00 00 00 r1\+=r1
10: 16 03 01 00 03 00 00 00 if w3==3 goto 1
18: 1e 43 00 00 00 00 00 00 if w3==w4 goto 0
20: 36 03 fd ff 03 00 00 00 if w3>=3 goto -3
28: 3e 43 fc ff 00 00 00 00 if w3>=w4 goto -4
30: a6 03 01 00 03 00 00 00 if w3<3 goto 1
38: ae 43 00 00 00 00 00 00 if w3<w4 goto 0
40: b6 03 01 00 03 00 00 00 if w3<=3 goto 1
48: be 43 00 00 00 00 00 00 if w3<=w4 goto 0
50: 46 03 01 00 03 00 00 00 if w3&3 goto 1
58: 4e 43 00 00 00 00 00 00 if w3&w4 goto 0
60: 56 03 01 00 03 00 00 00 if w3!=3 goto 1
68: 5e 43 00 00 00 00 00 00 if w3!=w4 goto 0
70: 66 03 01 00 03 00 00 00 if w3s>3 goto 1
78: 6e 43 00 00 00 00 00 00 if w3s>w4 goto 0
80: 76 03 01 00 03 00 00 00 if w3s>=3 goto 1
88: 7e 43 00 00 00 00 00 00 if w3s>=w4 goto 0
90: c6 03 01 00 03 00 00 00 if w3s<3 goto 1
98: ce 43 00 00 00 00 00 00 if w3s<w4 goto 0
a0: d6 03 01 00 03 00 00 00 if w3s<=3 goto 1
a8: de 43 00 00 00 00 00 00 if w3s<=w4 goto 0

33
gas/testsuite/gas/bpf/jump32.d
View File

@ -1,5 +1,32 @@
#as: --EL
#objdump: -dr
#as: -EL -mdialect=normal
#objdump: -dr -M dec
#source: jump32.s
#dump: jump32.dump
#name: eBPF JUMP32 instructions, normal syntax
.*: +file format .*bpf.*
Disassembly of section .text:
0+ <.text>:
0: 05 00 03 00 00 00 00 00 ja 3
8: 0f 11 00 00 00 00 00 00 add %r1,%r1
10: 16 03 01 00 03 00 00 00 jeq32 %r3,3,1
18: 1e 43 00 00 00 00 00 00 jeq32 %r3,%r4,0
20: 36 03 fd ff 03 00 00 00 jge32 %r3,3,-3
28: 3e 43 fc ff 00 00 00 00 jge32 %r3,%r4,-4
30: a6 03 01 00 03 00 00 00 jlt32 %r3,3,1
38: ae 43 00 00 00 00 00 00 jlt32 %r3,%r4,0
40: b6 03 01 00 03 00 00 00 jle32 %r3,3,1
48: be 43 00 00 00 00 00 00 jle32 %r3,%r4,0
50: 46 03 01 00 03 00 00 00 jset32 %r3,3,1
58: 4e 43 00 00 00 00 00 00 jset32 %r3,%r4,0
60: 56 03 01 00 03 00 00 00 jne32 %r3,3,1
68: 5e 43 00 00 00 00 00 00 jne32 %r3,%r4,0
70: 66 03 01 00 03 00 00 00 jsgt32 %r3,3,1
78: 6e 43 00 00 00 00 00 00 jsgt32 %r3,%r4,0
80: 76 03 01 00 03 00 00 00 jsge32 %r3,3,1
88: 7e 43 00 00 00 00 00 00 jsge32 %r3,%r4,0
90: c6 03 01 00 03 00 00 00 jslt32 %r3,3,1
98: ce 43 00 00 00 00 00 00 jslt32 %r3,%r4,0
a0: d6 03 01 00 03 00 00 00 jsle32 %r3,3,1
a8: de 43 00 00 00 00 00 00 jsle32 %r3,%r4,0

19
gas/testsuite/gas/bpf/lddw-be-pseudoc.d
View File

@ -1,5 +1,18 @@
#as: --EB
#as: -EB -mdialect=pseudoc
#source: lddw-pseudoc.s
#objdump: -dr
#dump: lddw-be.dump
#objdump: -dr -M hex,pseudoc
#name: eBPF LDDW, big-endian, pseudoc syntax
.*: +file format .*bpf.*
Disassembly of section .text:
0+ <.text>:
0: 18 30 00 00 00 00 00 01 r3=0x1 ll
8: 00 00 00 00 00 00 00 00
10: 18 40 00 00 de ad be ef r4=0xdeadbeef ll
18: 00 00 00 00 00 00 00 00
20: 18 50 00 00 55 66 77 88 r5=0x1122334455667788 ll
28: 00 00 00 00 11 22 33 44
30: 18 60 00 00 ff ff ff fe r6=0xfffffffffffffffe ll
38: 00 00 00 00 ff ff ff ff

19
gas/testsuite/gas/bpf/lddw-be.d
View File

@ -1,5 +1,18 @@
#as: --EB
#as: -EB -mdialect=normal
#source: lddw.s
#objdump: -dr
#dump: lddw-be.dump
#objdump: -dr -M hex
#name: eBPF LDDW, big-endian, normal syntax
.*: +file format .*bpf.*
Disassembly of section .text:
0+ <.text>:
0: 18 30 00 00 00 00 00 01 lddw %r3,0x1
8: 00 00 00 00 00 00 00 00
10: 18 40 00 00 de ad be ef lddw %r4,0xdeadbeef
18: 00 00 00 00 00 00 00 00
20: 18 50 00 00 55 66 77 88 lddw %r5,0x1122334455667788
28: 00 00 00 00 11 22 33 44
30: 18 60 00 00 ff ff ff fe lddw %r6,0xfffffffffffffffe
38: 00 00 00 00 ff ff ff ff

19
gas/testsuite/gas/bpf/lddw-pseudoc.d
View File

@ -1,5 +1,18 @@
#as: --EL
#objdump: -dr
#as: -EL -mdialect=pseudoc
#objdump: -dr -M hex,pseudoc
#source: lddw-pseudoc.s
#dump: lddw.dump
#name: eBPF LDDW, pseudoc syntax
.*: +file format .*bpf.*
Disassembly of section .text:
0+ <.text>:
0: 18 03 00 00 01 00 00 00 r3=0x1 ll
8: 00 00 00 00 00 00 00 00
10: 18 04 00 00 ef be ad de r4=0xdeadbeef ll
18: 00 00 00 00 00 00 00 00
20: 18 05 00 00 88 77 66 55 r5=0x1122334455667788 ll
28: 00 00 00 00 44 33 22 11
30: 18 06 00 00 fe ff ff ff r6=0xfffffffffffffffe ll
38: 00 00 00 00 ff ff ff ff

19
gas/testsuite/gas/bpf/lddw.d
View File

@ -1,5 +1,18 @@
#as: --EL
#objdump: -dr
#as: -EL -mdialect=normal
#objdump: -dr -M hex
#source: lddw.s
#dump: lddw.dump
#name: eBPF LDDW, normal syntax
.*: +file format .*bpf.*
Disassembly of section .text:
0+ <.text>:
0: 18 03 00 00 01 00 00 00 lddw %r3,0x1
8: 00 00 00 00 00 00 00 00
10: 18 04 00 00 ef be ad de lddw %r4,0xdeadbeef
18: 00 00 00 00 00 00 00 00
20: 18 05 00 00 88 77 66 55 lddw %r5,0x1122334455667788
28: 00 00 00 00 44 33 22 11
30: 18 06 00 00 fe ff ff ff lddw %r6,0xfffffffffffffffe
38: 00 00 00 00 ff ff ff ff

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