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opcodes: support insn endianness in cgen_cpu_open
This patch adds support for a new CGEN_OPEN_INSN_ENDIAN argument for @arch@_cgen_cpu_open. This is useful for architectures in which the endianness of the instruction words is not the same than the endianness used for data. An accompanying patch has been sent to the CGEN mailing list that adds support for this argument on the CGEN side [1]. Its been already pre-approved [2], and will be applied simultaneously with this binutils series. [1] https://sourceware.org/pipermail/cgen/2020q2/002733.html [2] https://sourceware.org/pipermail/cgen/2020q2/002737.html include/ChangeLog: 2020-06-04 Jose E. Marchesi <jemarch@gnu.org> * opcode/cgen.h (enum cgen_cpu_open_arg): New value CGEN_CPU_OPEN_INSN_ENDIAN. opcodes/ChangeLog: 2020-06-04 Jose E. Marchesi <jemarch@gnu.org> * cgen-dis.in (cpu_desc_list): New field `insn_endian'. (print_insn_): Handle instruction endian. * bpf-dis.c: Regenerate. * bpf-desc.c: Regenerate. * epiphany-dis.c: Likewise. * epiphany-desc.c: Likewise. * fr30-dis.c: Likewise. * fr30-desc.c: Likewise. * frv-dis.c: Likewise. * frv-desc.c: Likewise. * ip2k-dis.c: Likewise. * ip2k-desc.c: Likewise. * iq2000-dis.c: Likewise. * iq2000-desc.c: Likewise. * lm32-dis.c: Likewise. * lm32-desc.c: Likewise. * m32c-dis.c: Likewise. * m32c-desc.c: Likewise. * m32r-dis.c: Likewise. * m32r-desc.c: Likewise. * mep-dis.c: Likewise. * mep-desc.c: Likewise. * mt-dis.c: Likewise. * mt-desc.c: Likewise. * or1k-dis.c: Likewise. * or1k-desc.c: Likewise. * xc16x-dis.c: Likewise. * xc16x-desc.c: Likewise. * xstormy16-dis.c: Likewise. * xstormy16-desc.c: Likewise. binutils/ChangeLog: 2020-06-04 Jose E. Marchesi <jose.marchesi@oracle.com> * objdump.c (disassemble_data): Set disasm_info.endian_code to disasm_info.endian after the latter is initialized to the endianness reported by BFD.
This commit is contained in:
Jose E. Marchesi
parent
0cfcd4f003
commit
b3db6d07be
@ -1,3 +1,9 @@
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2020-06-04 Jose E. Marchesi <jose.marchesi@oracle.com>
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* objdump.c (disassemble_data): Set disasm_info.endian_code to
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disasm_info.endian after the latter is initialized to the
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endianness reported by BFD.
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2020-06-04 Alan Modra <amodra@gmail.com>
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* testsuite/binutils-all/i386/i386.exp: Remove global directive
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@ -3479,6 +3479,8 @@ disassemble_data (bfd *abfd)
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instead. */
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disasm_info.endian = BFD_ENDIAN_UNKNOWN;
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disasm_info.endian_code = disasm_info.endian;
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/* Allow the target to customize the info structure. */
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disassemble_init_for_target (& disasm_info);
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@ -1,3 +1,8 @@
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2020-06-04 Jose E. Marchesi <jemarch@gnu.org>
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* opcode/cgen.h (enum cgen_cpu_open_arg): New value
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CGEN_CPU_OPEN_INSN_ENDIAN.
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2020-06-03 Nelson Chu <nelson.chu@sifive.com>
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* opcode/riscv.h: Remove #include "bfd.h". And change the return
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@ -1392,7 +1392,9 @@ enum cgen_cpu_open_arg {
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Multiple machines can be specified by repeated use. */
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CGEN_CPU_OPEN_BFDMACH,
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/* Select endian, arg is CGEN_ENDIAN_*. */
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CGEN_CPU_OPEN_ENDIAN
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CGEN_CPU_OPEN_ENDIAN,
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/* Select instruction endian, arg is CGEN_ENDIAN_*. */
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CGEN_CPU_OPEN_INSN_ENDIAN,
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};
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/* Open a cpu descriptor table for use.
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@ -1465,6 +1467,11 @@ extern CGEN_INSN_INT cgen_get_insn_value
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extern void cgen_put_insn_value
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(CGEN_CPU_DESC, unsigned char *, int, CGEN_INSN_INT);
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extern CGEN_INSN_INT cgen_get_base_insn_value
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(CGEN_CPU_DESC, unsigned char *, int);
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extern void cgen_put_base_insn_value
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(CGEN_CPU_DESC, unsigned char *, int, CGEN_INSN_INT);
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/* Read in a cpu description file.
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??? For future concerns, including adding instructions to the assembler/
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disassembler at run-time. */
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@ -1,3 +1,36 @@
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2020-06-04 Jose E. Marchesi <jemarch@gnu.org>
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* cgen-dis.in (cpu_desc_list): New field `insn_endian'.
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(print_insn_): Handle instruction endian.
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* bpf-dis.c: Regenerate.
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* bpf-desc.c: Regenerate.
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* epiphany-dis.c: Likewise.
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* epiphany-desc.c: Likewise.
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* fr30-dis.c: Likewise.
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* fr30-desc.c: Likewise.
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* frv-dis.c: Likewise.
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* frv-desc.c: Likewise.
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* ip2k-dis.c: Likewise.
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* ip2k-desc.c: Likewise.
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* iq2000-dis.c: Likewise.
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* iq2000-desc.c: Likewise.
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* lm32-dis.c: Likewise.
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* lm32-desc.c: Likewise.
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* m32c-dis.c: Likewise.
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* m32c-desc.c: Likewise.
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* m32r-dis.c: Likewise.
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* m32r-desc.c: Likewise.
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* mep-dis.c: Likewise.
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* mep-desc.c: Likewise.
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* mt-dis.c: Likewise.
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* mt-desc.c: Likewise.
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* or1k-dis.c: Likewise.
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* or1k-desc.c: Likewise.
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* xc16x-dis.c: Likewise.
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* xc16x-desc.c: Likewise.
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* xstormy16-dis.c: Likewise.
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* xstormy16-desc.c: Likewise.
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2020-06-03 Nick Clifton <nickc@redhat.com>
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* po/sr.po: Updated Serbian translation.
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@ -1701,6 +1701,7 @@ bpf_cgen_rebuild_tables (CGEN_CPU_TABLE *cd)
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CGEN_CPU_OPEN_MACHS: bitmap of values in enum mach_attr
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CGEN_CPU_OPEN_BFDMACH: specify 1 mach using bfd name
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CGEN_CPU_OPEN_ENDIAN: specify endian choice
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CGEN_CPU_OPEN_INSN_ENDIAN: specify instruction endian choice
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CGEN_CPU_OPEN_END: terminates arguments
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??? Simultaneous multiple isas might not make sense, but it's not (yet)
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@ -1714,6 +1715,7 @@ bpf_cgen_cpu_open (enum cgen_cpu_open_arg arg_type, ...)
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CGEN_BITSET *isas = 0; /* 0 = "unspecified" */
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unsigned int machs = 0; /* 0 = "unspecified" */
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enum cgen_endian endian = CGEN_ENDIAN_UNKNOWN;
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enum cgen_endian insn_endian = CGEN_ENDIAN_UNKNOWN;
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va_list ap;
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if (! init_p)
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@ -1748,6 +1750,9 @@ bpf_cgen_cpu_open (enum cgen_cpu_open_arg arg_type, ...)
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case CGEN_CPU_OPEN_ENDIAN :
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endian = va_arg (ap, enum cgen_endian);
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break;
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case CGEN_CPU_OPEN_INSN_ENDIAN :
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insn_endian = va_arg (ap, enum cgen_endian);
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break;
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default :
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opcodes_error_handler
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(/* xgettext:c-format */
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@ -1777,11 +1782,8 @@ bpf_cgen_cpu_open (enum cgen_cpu_open_arg arg_type, ...)
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cd->isas = cgen_bitset_copy (isas);
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cd->machs = machs;
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cd->endian = endian;
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/* FIXME: for the sparc case we can determine insn-endianness statically.
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The worry here is where both data and insn endian can be independently
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chosen, in which case this function will need another argument.
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Actually, will want to allow for more arguments in the future anyway. */
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cd->insn_endian = endian;
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cd->insn_endian
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= (insn_endian == CGEN_ENDIAN_UNKNOWN ? endian : insn_endian);
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/* Table (re)builder. */
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cd->rebuild_tables = bpf_cgen_rebuild_tables;
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@ -507,6 +507,7 @@ typedef struct cpu_desc_list
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CGEN_BITSET *isa;
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int mach;
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int endian;
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int insn_endian;
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CGEN_CPU_DESC cd;
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} cpu_desc_list;
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@ -519,12 +520,16 @@ print_insn_bpf (bfd_vma pc, disassemble_info *info)
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static CGEN_BITSET *prev_isa;
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static int prev_mach;
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static int prev_endian;
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static int prev_insn_endian;
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int length;
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CGEN_BITSET *isa;
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int mach;
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int endian = (info->endian == BFD_ENDIAN_BIG
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? CGEN_ENDIAN_BIG
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: CGEN_ENDIAN_LITTLE);
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int insn_endian = (info->endian_code == BFD_ENDIAN_BIG
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? CGEN_ENDIAN_BIG
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: CGEN_ENDIAN_LITTLE);
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enum bfd_architecture arch;
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/* ??? gdb will set mach but leave the architecture as "unknown" */
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@ -590,9 +595,11 @@ print_insn_bpf (bfd_vma pc, disassemble_info *info)
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prev_isa = cgen_bitset_copy (isa);
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prev_mach = mach;
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prev_endian = endian;
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prev_insn_endian = insn_endian;
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cd = bpf_cgen_cpu_open (CGEN_CPU_OPEN_ISAS, prev_isa,
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CGEN_CPU_OPEN_BFDMACH, mach_name,
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CGEN_CPU_OPEN_ENDIAN, prev_endian,
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CGEN_CPU_OPEN_INSN_ENDIAN, prev_insn_endian,
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CGEN_CPU_OPEN_END);
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if (!cd)
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abort ();
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@ -341,6 +341,7 @@ typedef struct cpu_desc_list
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CGEN_BITSET *isa;
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int mach;
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int endian;
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int insn_endian;
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CGEN_CPU_DESC cd;
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} cpu_desc_list;
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@ -353,12 +354,16 @@ print_insn_@arch@ (bfd_vma pc, disassemble_info *info)
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static CGEN_BITSET *prev_isa;
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static int prev_mach;
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static int prev_endian;
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static int prev_insn_endian;
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int length;
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CGEN_BITSET *isa;
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int mach;
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int endian = (info->endian == BFD_ENDIAN_BIG
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? CGEN_ENDIAN_BIG
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: CGEN_ENDIAN_LITTLE);
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int insn_endian = (info->endian_code == BFD_ENDIAN_BIG
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? CGEN_ENDIAN_BIG
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: CGEN_ENDIAN_LITTLE);
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enum bfd_architecture arch;
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/* ??? gdb will set mach but leave the architecture as "unknown" */
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@ -424,9 +429,11 @@ print_insn_@arch@ (bfd_vma pc, disassemble_info *info)
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prev_isa = cgen_bitset_copy (isa);
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prev_mach = mach;
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prev_endian = endian;
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prev_insn_endian = insn_endian;
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cd = @arch@_cgen_cpu_open (CGEN_CPU_OPEN_ISAS, prev_isa,
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CGEN_CPU_OPEN_BFDMACH, mach_name,
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CGEN_CPU_OPEN_ENDIAN, prev_endian,
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CGEN_CPU_OPEN_INSN_ENDIAN, prev_insn_endian,
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CGEN_CPU_OPEN_END);
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if (!cd)
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abort ();
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@ -2139,6 +2139,7 @@ epiphany_cgen_rebuild_tables (CGEN_CPU_TABLE *cd)
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CGEN_CPU_OPEN_MACHS: bitmap of values in enum mach_attr
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CGEN_CPU_OPEN_BFDMACH: specify 1 mach using bfd name
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CGEN_CPU_OPEN_ENDIAN: specify endian choice
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CGEN_CPU_OPEN_INSN_ENDIAN: specify instruction endian choice
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CGEN_CPU_OPEN_END: terminates arguments
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??? Simultaneous multiple isas might not make sense, but it's not (yet)
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@ -2152,6 +2153,7 @@ epiphany_cgen_cpu_open (enum cgen_cpu_open_arg arg_type, ...)
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CGEN_BITSET *isas = 0; /* 0 = "unspecified" */
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unsigned int machs = 0; /* 0 = "unspecified" */
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enum cgen_endian endian = CGEN_ENDIAN_UNKNOWN;
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enum cgen_endian insn_endian = CGEN_ENDIAN_UNKNOWN;
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va_list ap;
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if (! init_p)
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@ -2186,6 +2188,9 @@ epiphany_cgen_cpu_open (enum cgen_cpu_open_arg arg_type, ...)
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case CGEN_CPU_OPEN_ENDIAN :
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endian = va_arg (ap, enum cgen_endian);
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break;
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case CGEN_CPU_OPEN_INSN_ENDIAN :
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insn_endian = va_arg (ap, enum cgen_endian);
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break;
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default :
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opcodes_error_handler
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(/* xgettext:c-format */
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@ -2215,11 +2220,8 @@ epiphany_cgen_cpu_open (enum cgen_cpu_open_arg arg_type, ...)
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cd->isas = cgen_bitset_copy (isas);
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cd->machs = machs;
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cd->endian = endian;
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/* FIXME: for the sparc case we can determine insn-endianness statically.
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The worry here is where both data and insn endian can be independently
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chosen, in which case this function will need another argument.
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Actually, will want to allow for more arguments in the future anyway. */
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cd->insn_endian = endian;
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cd->insn_endian
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= (insn_endian == CGEN_ENDIAN_UNKNOWN ? endian : insn_endian);
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/* Table (re)builder. */
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cd->rebuild_tables = epiphany_cgen_rebuild_tables;
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@ -582,6 +582,7 @@ typedef struct cpu_desc_list
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CGEN_BITSET *isa;
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int mach;
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int endian;
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int insn_endian;
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CGEN_CPU_DESC cd;
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} cpu_desc_list;
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@ -594,12 +595,16 @@ print_insn_epiphany (bfd_vma pc, disassemble_info *info)
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static CGEN_BITSET *prev_isa;
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static int prev_mach;
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static int prev_endian;
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static int prev_insn_endian;
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int length;
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CGEN_BITSET *isa;
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int mach;
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int endian = (info->endian == BFD_ENDIAN_BIG
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? CGEN_ENDIAN_BIG
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: CGEN_ENDIAN_LITTLE);
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int insn_endian = (info->endian_code == BFD_ENDIAN_BIG
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? CGEN_ENDIAN_BIG
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: CGEN_ENDIAN_LITTLE);
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enum bfd_architecture arch;
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/* ??? gdb will set mach but leave the architecture as "unknown" */
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@ -665,9 +670,11 @@ print_insn_epiphany (bfd_vma pc, disassemble_info *info)
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prev_isa = cgen_bitset_copy (isa);
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prev_mach = mach;
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prev_endian = endian;
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prev_insn_endian = insn_endian;
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cd = epiphany_cgen_cpu_open (CGEN_CPU_OPEN_ISAS, prev_isa,
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CGEN_CPU_OPEN_BFDMACH, mach_name,
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CGEN_CPU_OPEN_ENDIAN, prev_endian,
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CGEN_CPU_OPEN_INSN_ENDIAN, prev_insn_endian,
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CGEN_CPU_OPEN_END);
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if (!cd)
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abort ();
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@ -1616,6 +1616,7 @@ fr30_cgen_rebuild_tables (CGEN_CPU_TABLE *cd)
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CGEN_CPU_OPEN_MACHS: bitmap of values in enum mach_attr
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CGEN_CPU_OPEN_BFDMACH: specify 1 mach using bfd name
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CGEN_CPU_OPEN_ENDIAN: specify endian choice
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CGEN_CPU_OPEN_INSN_ENDIAN: specify instruction endian choice
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CGEN_CPU_OPEN_END: terminates arguments
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??? Simultaneous multiple isas might not make sense, but it's not (yet)
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@ -1629,6 +1630,7 @@ fr30_cgen_cpu_open (enum cgen_cpu_open_arg arg_type, ...)
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CGEN_BITSET *isas = 0; /* 0 = "unspecified" */
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unsigned int machs = 0; /* 0 = "unspecified" */
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enum cgen_endian endian = CGEN_ENDIAN_UNKNOWN;
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enum cgen_endian insn_endian = CGEN_ENDIAN_UNKNOWN;
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va_list ap;
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if (! init_p)
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@ -1663,6 +1665,9 @@ fr30_cgen_cpu_open (enum cgen_cpu_open_arg arg_type, ...)
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case CGEN_CPU_OPEN_ENDIAN :
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endian = va_arg (ap, enum cgen_endian);
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break;
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case CGEN_CPU_OPEN_INSN_ENDIAN :
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insn_endian = va_arg (ap, enum cgen_endian);
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break;
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default :
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opcodes_error_handler
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(/* xgettext:c-format */
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@ -1692,11 +1697,8 @@ fr30_cgen_cpu_open (enum cgen_cpu_open_arg arg_type, ...)
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cd->isas = cgen_bitset_copy (isas);
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cd->machs = machs;
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cd->endian = endian;
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/* FIXME: for the sparc case we can determine insn-endianness statically.
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The worry here is where both data and insn endian can be independently
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chosen, in which case this function will need another argument.
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Actually, will want to allow for more arguments in the future anyway. */
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cd->insn_endian = endian;
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cd->insn_endian
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= (insn_endian == CGEN_ENDIAN_UNKNOWN ? endian : insn_endian);
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/* Table (re)builder. */
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cd->rebuild_tables = fr30_cgen_rebuild_tables;
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@ -603,6 +603,7 @@ typedef struct cpu_desc_list
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CGEN_BITSET *isa;
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int mach;
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int endian;
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int insn_endian;
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CGEN_CPU_DESC cd;
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} cpu_desc_list;
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@ -615,12 +616,16 @@ print_insn_fr30 (bfd_vma pc, disassemble_info *info)
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static CGEN_BITSET *prev_isa;
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static int prev_mach;
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static int prev_endian;
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static int prev_insn_endian;
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int length;
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CGEN_BITSET *isa;
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int mach;
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int endian = (info->endian == BFD_ENDIAN_BIG
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? CGEN_ENDIAN_BIG
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: CGEN_ENDIAN_LITTLE);
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int insn_endian = (info->endian_code == BFD_ENDIAN_BIG
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? CGEN_ENDIAN_BIG
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: CGEN_ENDIAN_LITTLE);
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enum bfd_architecture arch;
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/* ??? gdb will set mach but leave the architecture as "unknown" */
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@ -686,9 +691,11 @@ print_insn_fr30 (bfd_vma pc, disassemble_info *info)
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prev_isa = cgen_bitset_copy (isa);
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prev_mach = mach;
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prev_endian = endian;
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prev_insn_endian = insn_endian;
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||||
cd = fr30_cgen_cpu_open (CGEN_CPU_OPEN_ISAS, prev_isa,
|
||||
CGEN_CPU_OPEN_BFDMACH, mach_name,
|
||||
CGEN_CPU_OPEN_ENDIAN, prev_endian,
|
||||
CGEN_CPU_OPEN_INSN_ENDIAN, prev_insn_endian,
|
||||
CGEN_CPU_OPEN_END);
|
||||
if (!cd)
|
||||
abort ();
|
||||
|
||||
@ -6356,6 +6356,7 @@ frv_cgen_rebuild_tables (CGEN_CPU_TABLE *cd)
|
||||
CGEN_CPU_OPEN_MACHS: bitmap of values in enum mach_attr
|
||||
CGEN_CPU_OPEN_BFDMACH: specify 1 mach using bfd name
|
||||
CGEN_CPU_OPEN_ENDIAN: specify endian choice
|
||||
CGEN_CPU_OPEN_INSN_ENDIAN: specify instruction endian choice
|
||||
CGEN_CPU_OPEN_END: terminates arguments
|
||||
|
||||
??? Simultaneous multiple isas might not make sense, but it's not (yet)
|
||||
@ -6369,6 +6370,7 @@ frv_cgen_cpu_open (enum cgen_cpu_open_arg arg_type, ...)
|
||||
CGEN_BITSET *isas = 0; /* 0 = "unspecified" */
|
||||
unsigned int machs = 0; /* 0 = "unspecified" */
|
||||
enum cgen_endian endian = CGEN_ENDIAN_UNKNOWN;
|
||||
enum cgen_endian insn_endian = CGEN_ENDIAN_UNKNOWN;
|
||||
va_list ap;
|
||||
|
||||
if (! init_p)
|
||||
@ -6403,6 +6405,9 @@ frv_cgen_cpu_open (enum cgen_cpu_open_arg arg_type, ...)
|
||||
case CGEN_CPU_OPEN_ENDIAN :
|
||||
endian = va_arg (ap, enum cgen_endian);
|
||||
break;
|
||||
case CGEN_CPU_OPEN_INSN_ENDIAN :
|
||||
insn_endian = va_arg (ap, enum cgen_endian);
|
||||
break;
|
||||
default :
|
||||
opcodes_error_handler
|
||||
(/* xgettext:c-format */
|
||||
@ -6432,11 +6437,8 @@ frv_cgen_cpu_open (enum cgen_cpu_open_arg arg_type, ...)
|
||||
cd->isas = cgen_bitset_copy (isas);
|
||||
cd->machs = machs;
|
||||
cd->endian = endian;
|
||||
/* FIXME: for the sparc case we can determine insn-endianness statically.
|
||||
The worry here is where both data and insn endian can be independently
|
||||
chosen, in which case this function will need another argument.
|
||||
Actually, will want to allow for more arguments in the future anyway. */
|
||||
cd->insn_endian = endian;
|
||||
cd->insn_endian
|
||||
= (insn_endian == CGEN_ENDIAN_UNKNOWN ? endian : insn_endian);
|
||||
|
||||
/* Table (re)builder. */
|
||||
cd->rebuild_tables = frv_cgen_rebuild_tables;
|
||||
|
||||
@ -700,6 +700,7 @@ typedef struct cpu_desc_list
|
||||
CGEN_BITSET *isa;
|
||||
int mach;
|
||||
int endian;
|
||||
int insn_endian;
|
||||
CGEN_CPU_DESC cd;
|
||||
} cpu_desc_list;
|
||||
|
||||
@ -712,12 +713,16 @@ print_insn_frv (bfd_vma pc, disassemble_info *info)
|
||||
static CGEN_BITSET *prev_isa;
|
||||
static int prev_mach;
|
||||
static int prev_endian;
|
||||
static int prev_insn_endian;
|
||||
int length;
|
||||
CGEN_BITSET *isa;
|
||||
int mach;
|
||||
int endian = (info->endian == BFD_ENDIAN_BIG
|
||||
? CGEN_ENDIAN_BIG
|
||||
: CGEN_ENDIAN_LITTLE);
|
||||
int insn_endian = (info->endian_code == BFD_ENDIAN_BIG
|
||||
? CGEN_ENDIAN_BIG
|
||||
: CGEN_ENDIAN_LITTLE);
|
||||
enum bfd_architecture arch;
|
||||
|
||||
/* ??? gdb will set mach but leave the architecture as "unknown" */
|
||||
@ -783,9 +788,11 @@ print_insn_frv (bfd_vma pc, disassemble_info *info)
|
||||
prev_isa = cgen_bitset_copy (isa);
|
||||
prev_mach = mach;
|
||||
prev_endian = endian;
|
||||
prev_insn_endian = insn_endian;
|
||||
cd = frv_cgen_cpu_open (CGEN_CPU_OPEN_ISAS, prev_isa,
|
||||
CGEN_CPU_OPEN_BFDMACH, mach_name,
|
||||
CGEN_CPU_OPEN_ENDIAN, prev_endian,
|
||||
CGEN_CPU_OPEN_INSN_ENDIAN, prev_insn_endian,
|
||||
CGEN_CPU_OPEN_END);
|
||||
if (!cd)
|
||||
abort ();
|
||||
|
||||
@ -1045,6 +1045,7 @@ ip2k_cgen_rebuild_tables (CGEN_CPU_TABLE *cd)
|
||||
CGEN_CPU_OPEN_MACHS: bitmap of values in enum mach_attr
|
||||
CGEN_CPU_OPEN_BFDMACH: specify 1 mach using bfd name
|
||||
CGEN_CPU_OPEN_ENDIAN: specify endian choice
|
||||
CGEN_CPU_OPEN_INSN_ENDIAN: specify instruction endian choice
|
||||
CGEN_CPU_OPEN_END: terminates arguments
|
||||
|
||||
??? Simultaneous multiple isas might not make sense, but it's not (yet)
|
||||
@ -1058,6 +1059,7 @@ ip2k_cgen_cpu_open (enum cgen_cpu_open_arg arg_type, ...)
|
||||
CGEN_BITSET *isas = 0; /* 0 = "unspecified" */
|
||||
unsigned int machs = 0; /* 0 = "unspecified" */
|
||||
enum cgen_endian endian = CGEN_ENDIAN_UNKNOWN;
|
||||
enum cgen_endian insn_endian = CGEN_ENDIAN_UNKNOWN;
|
||||
va_list ap;
|
||||
|
||||
if (! init_p)
|
||||
@ -1092,6 +1094,9 @@ ip2k_cgen_cpu_open (enum cgen_cpu_open_arg arg_type, ...)
|
||||
case CGEN_CPU_OPEN_ENDIAN :
|
||||
endian = va_arg (ap, enum cgen_endian);
|
||||
break;
|
||||
case CGEN_CPU_OPEN_INSN_ENDIAN :
|
||||
insn_endian = va_arg (ap, enum cgen_endian);
|
||||
break;
|
||||
default :
|
||||
opcodes_error_handler
|
||||
(/* xgettext:c-format */
|
||||
@ -1121,11 +1126,8 @@ ip2k_cgen_cpu_open (enum cgen_cpu_open_arg arg_type, ...)
|
||||
cd->isas = cgen_bitset_copy (isas);
|
||||
cd->machs = machs;
|
||||
cd->endian = endian;
|
||||
/* FIXME: for the sparc case we can determine insn-endianness statically.
|
||||
The worry here is where both data and insn endian can be independently
|
||||
chosen, in which case this function will need another argument.
|
||||
Actually, will want to allow for more arguments in the future anyway. */
|
||||
cd->insn_endian = endian;
|
||||
cd->insn_endian
|
||||
= (insn_endian == CGEN_ENDIAN_UNKNOWN ? endian : insn_endian);
|
||||
|
||||
/* Table (re)builder. */
|
||||
cd->rebuild_tables = ip2k_cgen_rebuild_tables;
|
||||
|
||||
@ -592,6 +592,7 @@ typedef struct cpu_desc_list
|
||||
CGEN_BITSET *isa;
|
||||
int mach;
|
||||
int endian;
|
||||
int insn_endian;
|
||||
CGEN_CPU_DESC cd;
|
||||
} cpu_desc_list;
|
||||
|
||||
@ -604,12 +605,16 @@ print_insn_ip2k (bfd_vma pc, disassemble_info *info)
|
||||
static CGEN_BITSET *prev_isa;
|
||||
static int prev_mach;
|
||||
static int prev_endian;
|
||||
static int prev_insn_endian;
|
||||
int length;
|
||||
CGEN_BITSET *isa;
|
||||
int mach;
|
||||
int endian = (info->endian == BFD_ENDIAN_BIG
|
||||
? CGEN_ENDIAN_BIG
|
||||
: CGEN_ENDIAN_LITTLE);
|
||||
int insn_endian = (info->endian_code == BFD_ENDIAN_BIG
|
||||
? CGEN_ENDIAN_BIG
|
||||
: CGEN_ENDIAN_LITTLE);
|
||||
enum bfd_architecture arch;
|
||||
|
||||
/* ??? gdb will set mach but leave the architecture as "unknown" */
|
||||
@ -675,9 +680,11 @@ print_insn_ip2k (bfd_vma pc, disassemble_info *info)
|
||||
prev_isa = cgen_bitset_copy (isa);
|
||||
prev_mach = mach;
|
||||
prev_endian = endian;
|
||||
prev_insn_endian = insn_endian;
|
||||
cd = ip2k_cgen_cpu_open (CGEN_CPU_OPEN_ISAS, prev_isa,
|
||||
CGEN_CPU_OPEN_BFDMACH, mach_name,
|
||||
CGEN_CPU_OPEN_ENDIAN, prev_endian,
|
||||
CGEN_CPU_OPEN_INSN_ENDIAN, prev_insn_endian,
|
||||
CGEN_CPU_OPEN_END);
|
||||
if (!cd)
|
||||
abort ();
|
||||
|
||||
@ -2050,6 +2050,7 @@ iq2000_cgen_rebuild_tables (CGEN_CPU_TABLE *cd)
|
||||
CGEN_CPU_OPEN_MACHS: bitmap of values in enum mach_attr
|
||||
CGEN_CPU_OPEN_BFDMACH: specify 1 mach using bfd name
|
||||
CGEN_CPU_OPEN_ENDIAN: specify endian choice
|
||||
CGEN_CPU_OPEN_INSN_ENDIAN: specify instruction endian choice
|
||||
CGEN_CPU_OPEN_END: terminates arguments
|
||||
|
||||
??? Simultaneous multiple isas might not make sense, but it's not (yet)
|
||||
@ -2063,6 +2064,7 @@ iq2000_cgen_cpu_open (enum cgen_cpu_open_arg arg_type, ...)
|
||||
CGEN_BITSET *isas = 0; /* 0 = "unspecified" */
|
||||
unsigned int machs = 0; /* 0 = "unspecified" */
|
||||
enum cgen_endian endian = CGEN_ENDIAN_UNKNOWN;
|
||||
enum cgen_endian insn_endian = CGEN_ENDIAN_UNKNOWN;
|
||||
va_list ap;
|
||||
|
||||
if (! init_p)
|
||||
@ -2097,6 +2099,9 @@ iq2000_cgen_cpu_open (enum cgen_cpu_open_arg arg_type, ...)
|
||||
case CGEN_CPU_OPEN_ENDIAN :
|
||||
endian = va_arg (ap, enum cgen_endian);
|
||||
break;
|
||||
case CGEN_CPU_OPEN_INSN_ENDIAN :
|
||||
insn_endian = va_arg (ap, enum cgen_endian);
|
||||
break;
|
||||
default :
|
||||
opcodes_error_handler
|
||||
(/* xgettext:c-format */
|
||||
@ -2126,11 +2131,8 @@ iq2000_cgen_cpu_open (enum cgen_cpu_open_arg arg_type, ...)
|
||||
cd->isas = cgen_bitset_copy (isas);
|
||||
cd->machs = machs;
|
||||
cd->endian = endian;
|
||||
/* FIXME: for the sparc case we can determine insn-endianness statically.
|
||||
The worry here is where both data and insn endian can be independently
|
||||
chosen, in which case this function will need another argument.
|
||||
Actually, will want to allow for more arguments in the future anyway. */
|
||||
cd->insn_endian = endian;
|
||||
cd->insn_endian
|
||||
= (insn_endian == CGEN_ENDIAN_UNKNOWN ? endian : insn_endian);
|
||||
|
||||
/* Table (re)builder. */
|
||||
cd->rebuild_tables = iq2000_cgen_rebuild_tables;
|
||||
|
||||
@ -493,6 +493,7 @@ typedef struct cpu_desc_list
|
||||
CGEN_BITSET *isa;
|
||||
int mach;
|
||||
int endian;
|
||||
int insn_endian;
|
||||
CGEN_CPU_DESC cd;
|
||||
} cpu_desc_list;
|
||||
|
||||
@ -505,12 +506,16 @@ print_insn_iq2000 (bfd_vma pc, disassemble_info *info)
|
||||
static CGEN_BITSET *prev_isa;
|
||||
static int prev_mach;
|
||||
static int prev_endian;
|
||||
static int prev_insn_endian;
|
||||
int length;
|
||||
CGEN_BITSET *isa;
|
||||
int mach;
|
||||
int endian = (info->endian == BFD_ENDIAN_BIG
|
||||
? CGEN_ENDIAN_BIG
|
||||
: CGEN_ENDIAN_LITTLE);
|
||||
int insn_endian = (info->endian_code == BFD_ENDIAN_BIG
|
||||
? CGEN_ENDIAN_BIG
|
||||
: CGEN_ENDIAN_LITTLE);
|
||||
enum bfd_architecture arch;
|
||||
|
||||
/* ??? gdb will set mach but leave the architecture as "unknown" */
|
||||
@ -576,9 +581,11 @@ print_insn_iq2000 (bfd_vma pc, disassemble_info *info)
|
||||
prev_isa = cgen_bitset_copy (isa);
|
||||
prev_mach = mach;
|
||||
prev_endian = endian;
|
||||
prev_insn_endian = insn_endian;
|
||||
cd = iq2000_cgen_cpu_open (CGEN_CPU_OPEN_ISAS, prev_isa,
|
||||
CGEN_CPU_OPEN_BFDMACH, mach_name,
|
||||
CGEN_CPU_OPEN_ENDIAN, prev_endian,
|
||||
CGEN_CPU_OPEN_INSN_ENDIAN, prev_insn_endian,
|
||||
CGEN_CPU_OPEN_END);
|
||||
if (!cd)
|
||||
abort ();
|
||||
|
||||
@ -1032,6 +1032,7 @@ lm32_cgen_rebuild_tables (CGEN_CPU_TABLE *cd)
|
||||
CGEN_CPU_OPEN_MACHS: bitmap of values in enum mach_attr
|
||||
CGEN_CPU_OPEN_BFDMACH: specify 1 mach using bfd name
|
||||
CGEN_CPU_OPEN_ENDIAN: specify endian choice
|
||||
CGEN_CPU_OPEN_INSN_ENDIAN: specify instruction endian choice
|
||||
CGEN_CPU_OPEN_END: terminates arguments
|
||||
|
||||
??? Simultaneous multiple isas might not make sense, but it's not (yet)
|
||||
@ -1045,6 +1046,7 @@ lm32_cgen_cpu_open (enum cgen_cpu_open_arg arg_type, ...)
|
||||
CGEN_BITSET *isas = 0; /* 0 = "unspecified" */
|
||||
unsigned int machs = 0; /* 0 = "unspecified" */
|
||||
enum cgen_endian endian = CGEN_ENDIAN_UNKNOWN;
|
||||
enum cgen_endian insn_endian = CGEN_ENDIAN_UNKNOWN;
|
||||
va_list ap;
|
||||
|
||||
if (! init_p)
|
||||
@ -1079,6 +1081,9 @@ lm32_cgen_cpu_open (enum cgen_cpu_open_arg arg_type, ...)
|
||||
case CGEN_CPU_OPEN_ENDIAN :
|
||||
endian = va_arg (ap, enum cgen_endian);
|
||||
break;
|
||||
case CGEN_CPU_OPEN_INSN_ENDIAN :
|
||||
insn_endian = va_arg (ap, enum cgen_endian);
|
||||
break;
|
||||
default :
|
||||
opcodes_error_handler
|
||||
(/* xgettext:c-format */
|
||||
@ -1108,11 +1113,8 @@ lm32_cgen_cpu_open (enum cgen_cpu_open_arg arg_type, ...)
|
||||
cd->isas = cgen_bitset_copy (isas);
|
||||
cd->machs = machs;
|
||||
cd->endian = endian;
|
||||
/* FIXME: for the sparc case we can determine insn-endianness statically.
|
||||
The worry here is where both data and insn endian can be independently
|
||||
chosen, in which case this function will need another argument.
|
||||
Actually, will want to allow for more arguments in the future anyway. */
|
||||
cd->insn_endian = endian;
|
||||
cd->insn_endian
|
||||
= (insn_endian == CGEN_ENDIAN_UNKNOWN ? endian : insn_endian);
|
||||
|
||||
/* Table (re)builder. */
|
||||
cd->rebuild_tables = lm32_cgen_rebuild_tables;
|
||||
|
||||
@ -451,6 +451,7 @@ typedef struct cpu_desc_list
|
||||
CGEN_BITSET *isa;
|
||||
int mach;
|
||||
int endian;
|
||||
int insn_endian;
|
||||
CGEN_CPU_DESC cd;
|
||||
} cpu_desc_list;
|
||||
|
||||
@ -463,12 +464,16 @@ print_insn_lm32 (bfd_vma pc, disassemble_info *info)
|
||||
static CGEN_BITSET *prev_isa;
|
||||
static int prev_mach;
|
||||
static int prev_endian;
|
||||
static int prev_insn_endian;
|
||||
int length;
|
||||
CGEN_BITSET *isa;
|
||||
int mach;
|
||||
int endian = (info->endian == BFD_ENDIAN_BIG
|
||||
? CGEN_ENDIAN_BIG
|
||||
: CGEN_ENDIAN_LITTLE);
|
||||
int insn_endian = (info->endian_code == BFD_ENDIAN_BIG
|
||||
? CGEN_ENDIAN_BIG
|
||||
: CGEN_ENDIAN_LITTLE);
|
||||
enum bfd_architecture arch;
|
||||
|
||||
/* ??? gdb will set mach but leave the architecture as "unknown" */
|
||||
@ -534,9 +539,11 @@ print_insn_lm32 (bfd_vma pc, disassemble_info *info)
|
||||
prev_isa = cgen_bitset_copy (isa);
|
||||
prev_mach = mach;
|
||||
prev_endian = endian;
|
||||
prev_insn_endian = insn_endian;
|
||||
cd = lm32_cgen_cpu_open (CGEN_CPU_OPEN_ISAS, prev_isa,
|
||||
CGEN_CPU_OPEN_BFDMACH, mach_name,
|
||||
CGEN_CPU_OPEN_ENDIAN, prev_endian,
|
||||
CGEN_CPU_OPEN_INSN_ENDIAN, prev_insn_endian,
|
||||
CGEN_CPU_OPEN_END);
|
||||
if (!cd)
|
||||
abort ();
|
||||
|
||||
@ -63063,6 +63063,7 @@ m32c_cgen_rebuild_tables (CGEN_CPU_TABLE *cd)
|
||||
CGEN_CPU_OPEN_MACHS: bitmap of values in enum mach_attr
|
||||
CGEN_CPU_OPEN_BFDMACH: specify 1 mach using bfd name
|
||||
CGEN_CPU_OPEN_ENDIAN: specify endian choice
|
||||
CGEN_CPU_OPEN_INSN_ENDIAN: specify instruction endian choice
|
||||
CGEN_CPU_OPEN_END: terminates arguments
|
||||
|
||||
??? Simultaneous multiple isas might not make sense, but it's not (yet)
|
||||
@ -63076,6 +63077,7 @@ m32c_cgen_cpu_open (enum cgen_cpu_open_arg arg_type, ...)
|
||||
CGEN_BITSET *isas = 0; /* 0 = "unspecified" */
|
||||
unsigned int machs = 0; /* 0 = "unspecified" */
|
||||
enum cgen_endian endian = CGEN_ENDIAN_UNKNOWN;
|
||||
enum cgen_endian insn_endian = CGEN_ENDIAN_UNKNOWN;
|
||||
va_list ap;
|
||||
|
||||
if (! init_p)
|
||||
@ -63110,6 +63112,9 @@ m32c_cgen_cpu_open (enum cgen_cpu_open_arg arg_type, ...)
|
||||
case CGEN_CPU_OPEN_ENDIAN :
|
||||
endian = va_arg (ap, enum cgen_endian);
|
||||
break;
|
||||
case CGEN_CPU_OPEN_INSN_ENDIAN :
|
||||
insn_endian = va_arg (ap, enum cgen_endian);
|
||||
break;
|
||||
default :
|
||||
opcodes_error_handler
|
||||
(/* xgettext:c-format */
|
||||
@ -63139,11 +63144,8 @@ m32c_cgen_cpu_open (enum cgen_cpu_open_arg arg_type, ...)
|
||||
cd->isas = cgen_bitset_copy (isas);
|
||||
cd->machs = machs;
|
||||
cd->endian = endian;
|
||||
/* FIXME: for the sparc case we can determine insn-endianness statically.
|
||||
The worry here is where both data and insn endian can be independently
|
||||
chosen, in which case this function will need another argument.
|
||||
Actually, will want to allow for more arguments in the future anyway. */
|
||||
cd->insn_endian = endian;
|
||||
cd->insn_endian
|
||||
= (insn_endian == CGEN_ENDIAN_UNKNOWN ? endian : insn_endian);
|
||||
|
||||
/* Table (re)builder. */
|
||||
cd->rebuild_tables = m32c_cgen_rebuild_tables;
|
||||
|
||||
@ -1195,6 +1195,7 @@ typedef struct cpu_desc_list
|
||||
CGEN_BITSET *isa;
|
||||
int mach;
|
||||
int endian;
|
||||
int insn_endian;
|
||||
CGEN_CPU_DESC cd;
|
||||
} cpu_desc_list;
|
||||
|
||||
@ -1207,12 +1208,16 @@ print_insn_m32c (bfd_vma pc, disassemble_info *info)
|
||||
static CGEN_BITSET *prev_isa;
|
||||
static int prev_mach;
|
||||
static int prev_endian;
|
||||
static int prev_insn_endian;
|
||||
int length;
|
||||
CGEN_BITSET *isa;
|
||||
int mach;
|
||||
int endian = (info->endian == BFD_ENDIAN_BIG
|
||||
? CGEN_ENDIAN_BIG
|
||||
: CGEN_ENDIAN_LITTLE);
|
||||
int insn_endian = (info->endian_code == BFD_ENDIAN_BIG
|
||||
? CGEN_ENDIAN_BIG
|
||||
: CGEN_ENDIAN_LITTLE);
|
||||
enum bfd_architecture arch;
|
||||
|
||||
/* ??? gdb will set mach but leave the architecture as "unknown" */
|
||||
@ -1278,9 +1283,11 @@ print_insn_m32c (bfd_vma pc, disassemble_info *info)
|
||||
prev_isa = cgen_bitset_copy (isa);
|
||||
prev_mach = mach;
|
||||
prev_endian = endian;
|
||||
prev_insn_endian = insn_endian;
|
||||
cd = m32c_cgen_cpu_open (CGEN_CPU_OPEN_ISAS, prev_isa,
|
||||
CGEN_CPU_OPEN_BFDMACH, mach_name,
|
||||
CGEN_CPU_OPEN_ENDIAN, prev_endian,
|
||||
CGEN_CPU_OPEN_INSN_ENDIAN, prev_insn_endian,
|
||||
CGEN_CPU_OPEN_END);
|
||||
if (!cd)
|
||||
abort ();
|
||||
|
||||
@ -1395,6 +1395,7 @@ m32r_cgen_rebuild_tables (CGEN_CPU_TABLE *cd)
|
||||
CGEN_CPU_OPEN_MACHS: bitmap of values in enum mach_attr
|
||||
CGEN_CPU_OPEN_BFDMACH: specify 1 mach using bfd name
|
||||
CGEN_CPU_OPEN_ENDIAN: specify endian choice
|
||||
CGEN_CPU_OPEN_INSN_ENDIAN: specify instruction endian choice
|
||||
CGEN_CPU_OPEN_END: terminates arguments
|
||||
|
||||
??? Simultaneous multiple isas might not make sense, but it's not (yet)
|
||||
@ -1408,6 +1409,7 @@ m32r_cgen_cpu_open (enum cgen_cpu_open_arg arg_type, ...)
|
||||
CGEN_BITSET *isas = 0; /* 0 = "unspecified" */
|
||||
unsigned int machs = 0; /* 0 = "unspecified" */
|
||||
enum cgen_endian endian = CGEN_ENDIAN_UNKNOWN;
|
||||
enum cgen_endian insn_endian = CGEN_ENDIAN_UNKNOWN;
|
||||
va_list ap;
|
||||
|
||||
if (! init_p)
|
||||
@ -1442,6 +1444,9 @@ m32r_cgen_cpu_open (enum cgen_cpu_open_arg arg_type, ...)
|
||||
case CGEN_CPU_OPEN_ENDIAN :
|
||||
endian = va_arg (ap, enum cgen_endian);
|
||||
break;
|
||||
case CGEN_CPU_OPEN_INSN_ENDIAN :
|
||||
insn_endian = va_arg (ap, enum cgen_endian);
|
||||
break;
|
||||
default :
|
||||
opcodes_error_handler
|
||||
(/* xgettext:c-format */
|
||||
@ -1471,11 +1476,8 @@ m32r_cgen_cpu_open (enum cgen_cpu_open_arg arg_type, ...)
|
||||
cd->isas = cgen_bitset_copy (isas);
|
||||
cd->machs = machs;
|
||||
cd->endian = endian;
|
||||
/* FIXME: for the sparc case we can determine insn-endianness statically.
|
||||
The worry here is where both data and insn endian can be independently
|
||||
chosen, in which case this function will need another argument.
|
||||
Actually, will want to allow for more arguments in the future anyway. */
|
||||
cd->insn_endian = endian;
|
||||
cd->insn_endian
|
||||
= (insn_endian == CGEN_ENDIAN_UNKNOWN ? endian : insn_endian);
|
||||
|
||||
/* Table (re)builder. */
|
||||
cd->rebuild_tables = m32r_cgen_rebuild_tables;
|
||||
|
||||
@ -583,6 +583,7 @@ typedef struct cpu_desc_list
|
||||
CGEN_BITSET *isa;
|
||||
int mach;
|
||||
int endian;
|
||||
int insn_endian;
|
||||
CGEN_CPU_DESC cd;
|
||||
} cpu_desc_list;
|
||||
|
||||
@ -595,12 +596,16 @@ print_insn_m32r (bfd_vma pc, disassemble_info *info)
|
||||
static CGEN_BITSET *prev_isa;
|
||||
static int prev_mach;
|
||||
static int prev_endian;
|
||||
static int prev_insn_endian;
|
||||
int length;
|
||||
CGEN_BITSET *isa;
|
||||
int mach;
|
||||
int endian = (info->endian == BFD_ENDIAN_BIG
|
||||
? CGEN_ENDIAN_BIG
|
||||
: CGEN_ENDIAN_LITTLE);
|
||||
int insn_endian = (info->endian_code == BFD_ENDIAN_BIG
|
||||
? CGEN_ENDIAN_BIG
|
||||
: CGEN_ENDIAN_LITTLE);
|
||||
enum bfd_architecture arch;
|
||||
|
||||
/* ??? gdb will set mach but leave the architecture as "unknown" */
|
||||
@ -666,9 +671,11 @@ print_insn_m32r (bfd_vma pc, disassemble_info *info)
|
||||
prev_isa = cgen_bitset_copy (isa);
|
||||
prev_mach = mach;
|
||||
prev_endian = endian;
|
||||
prev_insn_endian = insn_endian;
|
||||
cd = m32r_cgen_cpu_open (CGEN_CPU_OPEN_ISAS, prev_isa,
|
||||
CGEN_CPU_OPEN_BFDMACH, mach_name,
|
||||
CGEN_CPU_OPEN_ENDIAN, prev_endian,
|
||||
CGEN_CPU_OPEN_INSN_ENDIAN, prev_insn_endian,
|
||||
CGEN_CPU_OPEN_END);
|
||||
if (!cd)
|
||||
abort ();
|
||||
|
||||
@ -6256,6 +6256,7 @@ mep_cgen_rebuild_tables (CGEN_CPU_TABLE *cd)
|
||||
CGEN_CPU_OPEN_MACHS: bitmap of values in enum mach_attr
|
||||
CGEN_CPU_OPEN_BFDMACH: specify 1 mach using bfd name
|
||||
CGEN_CPU_OPEN_ENDIAN: specify endian choice
|
||||
CGEN_CPU_OPEN_INSN_ENDIAN: specify instruction endian choice
|
||||
CGEN_CPU_OPEN_END: terminates arguments
|
||||
|
||||
??? Simultaneous multiple isas might not make sense, but it's not (yet)
|
||||
@ -6269,6 +6270,7 @@ mep_cgen_cpu_open (enum cgen_cpu_open_arg arg_type, ...)
|
||||
CGEN_BITSET *isas = 0; /* 0 = "unspecified" */
|
||||
unsigned int machs = 0; /* 0 = "unspecified" */
|
||||
enum cgen_endian endian = CGEN_ENDIAN_UNKNOWN;
|
||||
enum cgen_endian insn_endian = CGEN_ENDIAN_UNKNOWN;
|
||||
va_list ap;
|
||||
|
||||
if (! init_p)
|
||||
@ -6303,6 +6305,9 @@ mep_cgen_cpu_open (enum cgen_cpu_open_arg arg_type, ...)
|
||||
case CGEN_CPU_OPEN_ENDIAN :
|
||||
endian = va_arg (ap, enum cgen_endian);
|
||||
break;
|
||||
case CGEN_CPU_OPEN_INSN_ENDIAN :
|
||||
insn_endian = va_arg (ap, enum cgen_endian);
|
||||
break;
|
||||
default :
|
||||
opcodes_error_handler
|
||||
(/* xgettext:c-format */
|
||||
@ -6332,11 +6337,8 @@ mep_cgen_cpu_open (enum cgen_cpu_open_arg arg_type, ...)
|
||||
cd->isas = cgen_bitset_copy (isas);
|
||||
cd->machs = machs;
|
||||
cd->endian = endian;
|
||||
/* FIXME: for the sparc case we can determine insn-endianness statically.
|
||||
The worry here is where both data and insn endian can be independently
|
||||
chosen, in which case this function will need another argument.
|
||||
Actually, will want to allow for more arguments in the future anyway. */
|
||||
cd->insn_endian = endian;
|
||||
cd->insn_endian
|
||||
= (insn_endian == CGEN_ENDIAN_UNKNOWN ? endian : insn_endian);
|
||||
|
||||
/* Table (re)builder. */
|
||||
cd->rebuild_tables = mep_cgen_rebuild_tables;
|
||||
|
||||
@ -1491,6 +1491,7 @@ typedef struct cpu_desc_list
|
||||
CGEN_BITSET *isa;
|
||||
int mach;
|
||||
int endian;
|
||||
int insn_endian;
|
||||
CGEN_CPU_DESC cd;
|
||||
} cpu_desc_list;
|
||||
|
||||
@ -1503,12 +1504,16 @@ print_insn_mep (bfd_vma pc, disassemble_info *info)
|
||||
static CGEN_BITSET *prev_isa;
|
||||
static int prev_mach;
|
||||
static int prev_endian;
|
||||
static int prev_insn_endian;
|
||||
int length;
|
||||
CGEN_BITSET *isa;
|
||||
int mach;
|
||||
int endian = (info->endian == BFD_ENDIAN_BIG
|
||||
? CGEN_ENDIAN_BIG
|
||||
: CGEN_ENDIAN_LITTLE);
|
||||
int insn_endian = (info->endian_code == BFD_ENDIAN_BIG
|
||||
? CGEN_ENDIAN_BIG
|
||||
: CGEN_ENDIAN_LITTLE);
|
||||
enum bfd_architecture arch;
|
||||
|
||||
/* ??? gdb will set mach but leave the architecture as "unknown" */
|
||||
@ -1574,9 +1579,11 @@ print_insn_mep (bfd_vma pc, disassemble_info *info)
|
||||
prev_isa = cgen_bitset_copy (isa);
|
||||
prev_mach = mach;
|
||||
prev_endian = endian;
|
||||
prev_insn_endian = insn_endian;
|
||||
cd = mep_cgen_cpu_open (CGEN_CPU_OPEN_ISAS, prev_isa,
|
||||
CGEN_CPU_OPEN_BFDMACH, mach_name,
|
||||
CGEN_CPU_OPEN_ENDIAN, prev_endian,
|
||||
CGEN_CPU_OPEN_INSN_ENDIAN, prev_insn_endian,
|
||||
CGEN_CPU_OPEN_END);
|
||||
if (!cd)
|
||||
abort ();
|
||||
|
||||
@ -1176,6 +1176,7 @@ mt_cgen_rebuild_tables (CGEN_CPU_TABLE *cd)
|
||||
CGEN_CPU_OPEN_MACHS: bitmap of values in enum mach_attr
|
||||
CGEN_CPU_OPEN_BFDMACH: specify 1 mach using bfd name
|
||||
CGEN_CPU_OPEN_ENDIAN: specify endian choice
|
||||
CGEN_CPU_OPEN_INSN_ENDIAN: specify instruction endian choice
|
||||
CGEN_CPU_OPEN_END: terminates arguments
|
||||
|
||||
??? Simultaneous multiple isas might not make sense, but it's not (yet)
|
||||
@ -1189,6 +1190,7 @@ mt_cgen_cpu_open (enum cgen_cpu_open_arg arg_type, ...)
|
||||
CGEN_BITSET *isas = 0; /* 0 = "unspecified" */
|
||||
unsigned int machs = 0; /* 0 = "unspecified" */
|
||||
enum cgen_endian endian = CGEN_ENDIAN_UNKNOWN;
|
||||
enum cgen_endian insn_endian = CGEN_ENDIAN_UNKNOWN;
|
||||
va_list ap;
|
||||
|
||||
if (! init_p)
|
||||
@ -1223,6 +1225,9 @@ mt_cgen_cpu_open (enum cgen_cpu_open_arg arg_type, ...)
|
||||
case CGEN_CPU_OPEN_ENDIAN :
|
||||
endian = va_arg (ap, enum cgen_endian);
|
||||
break;
|
||||
case CGEN_CPU_OPEN_INSN_ENDIAN :
|
||||
insn_endian = va_arg (ap, enum cgen_endian);
|
||||
break;
|
||||
default :
|
||||
opcodes_error_handler
|
||||
(/* xgettext:c-format */
|
||||
@ -1252,11 +1257,8 @@ mt_cgen_cpu_open (enum cgen_cpu_open_arg arg_type, ...)
|
||||
cd->isas = cgen_bitset_copy (isas);
|
||||
cd->machs = machs;
|
||||
cd->endian = endian;
|
||||
/* FIXME: for the sparc case we can determine insn-endianness statically.
|
||||
The worry here is where both data and insn endian can be independently
|
||||
chosen, in which case this function will need another argument.
|
||||
Actually, will want to allow for more arguments in the future anyway. */
|
||||
cd->insn_endian = endian;
|
||||
cd->insn_endian
|
||||
= (insn_endian == CGEN_ENDIAN_UNKNOWN ? endian : insn_endian);
|
||||
|
||||
/* Table (re)builder. */
|
||||
cd->rebuild_tables = mt_cgen_rebuild_tables;
|
||||
|
||||
@ -594,6 +594,7 @@ typedef struct cpu_desc_list
|
||||
CGEN_BITSET *isa;
|
||||
int mach;
|
||||
int endian;
|
||||
int insn_endian;
|
||||
CGEN_CPU_DESC cd;
|
||||
} cpu_desc_list;
|
||||
|
||||
@ -606,12 +607,16 @@ print_insn_mt (bfd_vma pc, disassemble_info *info)
|
||||
static CGEN_BITSET *prev_isa;
|
||||
static int prev_mach;
|
||||
static int prev_endian;
|
||||
static int prev_insn_endian;
|
||||
int length;
|
||||
CGEN_BITSET *isa;
|
||||
int mach;
|
||||
int endian = (info->endian == BFD_ENDIAN_BIG
|
||||
? CGEN_ENDIAN_BIG
|
||||
: CGEN_ENDIAN_LITTLE);
|
||||
int insn_endian = (info->endian_code == BFD_ENDIAN_BIG
|
||||
? CGEN_ENDIAN_BIG
|
||||
: CGEN_ENDIAN_LITTLE);
|
||||
enum bfd_architecture arch;
|
||||
|
||||
/* ??? gdb will set mach but leave the architecture as "unknown" */
|
||||
@ -677,9 +682,11 @@ print_insn_mt (bfd_vma pc, disassemble_info *info)
|
||||
prev_isa = cgen_bitset_copy (isa);
|
||||
prev_mach = mach;
|
||||
prev_endian = endian;
|
||||
prev_insn_endian = insn_endian;
|
||||
cd = mt_cgen_cpu_open (CGEN_CPU_OPEN_ISAS, prev_isa,
|
||||
CGEN_CPU_OPEN_BFDMACH, mach_name,
|
||||
CGEN_CPU_OPEN_ENDIAN, prev_endian,
|
||||
CGEN_CPU_OPEN_INSN_ENDIAN, prev_insn_endian,
|
||||
CGEN_CPU_OPEN_END);
|
||||
if (!cd)
|
||||
abort ();
|
||||
|
||||
@ -2070,6 +2070,7 @@ or1k_cgen_rebuild_tables (CGEN_CPU_TABLE *cd)
|
||||
CGEN_CPU_OPEN_MACHS: bitmap of values in enum mach_attr
|
||||
CGEN_CPU_OPEN_BFDMACH: specify 1 mach using bfd name
|
||||
CGEN_CPU_OPEN_ENDIAN: specify endian choice
|
||||
CGEN_CPU_OPEN_INSN_ENDIAN: specify instruction endian choice
|
||||
CGEN_CPU_OPEN_END: terminates arguments
|
||||
|
||||
??? Simultaneous multiple isas might not make sense, but it's not (yet)
|
||||
@ -2083,6 +2084,7 @@ or1k_cgen_cpu_open (enum cgen_cpu_open_arg arg_type, ...)
|
||||
CGEN_BITSET *isas = 0; /* 0 = "unspecified" */
|
||||
unsigned int machs = 0; /* 0 = "unspecified" */
|
||||
enum cgen_endian endian = CGEN_ENDIAN_UNKNOWN;
|
||||
enum cgen_endian insn_endian = CGEN_ENDIAN_UNKNOWN;
|
||||
va_list ap;
|
||||
|
||||
if (! init_p)
|
||||
@ -2117,6 +2119,9 @@ or1k_cgen_cpu_open (enum cgen_cpu_open_arg arg_type, ...)
|
||||
case CGEN_CPU_OPEN_ENDIAN :
|
||||
endian = va_arg (ap, enum cgen_endian);
|
||||
break;
|
||||
case CGEN_CPU_OPEN_INSN_ENDIAN :
|
||||
insn_endian = va_arg (ap, enum cgen_endian);
|
||||
break;
|
||||
default :
|
||||
opcodes_error_handler
|
||||
(/* xgettext:c-format */
|
||||
@ -2146,11 +2151,8 @@ or1k_cgen_cpu_open (enum cgen_cpu_open_arg arg_type, ...)
|
||||
cd->isas = cgen_bitset_copy (isas);
|
||||
cd->machs = machs;
|
||||
cd->endian = endian;
|
||||
/* FIXME: for the sparc case we can determine insn-endianness statically.
|
||||
The worry here is where both data and insn endian can be independently
|
||||
chosen, in which case this function will need another argument.
|
||||
Actually, will want to allow for more arguments in the future anyway. */
|
||||
cd->insn_endian = endian;
|
||||
cd->insn_endian
|
||||
= (insn_endian == CGEN_ENDIAN_UNKNOWN ? endian : insn_endian);
|
||||
|
||||
/* Table (re)builder. */
|
||||
cd->rebuild_tables = or1k_cgen_rebuild_tables;
|
||||
|
||||
@ -478,6 +478,7 @@ typedef struct cpu_desc_list
|
||||
CGEN_BITSET *isa;
|
||||
int mach;
|
||||
int endian;
|
||||
int insn_endian;
|
||||
CGEN_CPU_DESC cd;
|
||||
} cpu_desc_list;
|
||||
|
||||
@ -490,12 +491,16 @@ print_insn_or1k (bfd_vma pc, disassemble_info *info)
|
||||
static CGEN_BITSET *prev_isa;
|
||||
static int prev_mach;
|
||||
static int prev_endian;
|
||||
static int prev_insn_endian;
|
||||
int length;
|
||||
CGEN_BITSET *isa;
|
||||
int mach;
|
||||
int endian = (info->endian == BFD_ENDIAN_BIG
|
||||
? CGEN_ENDIAN_BIG
|
||||
: CGEN_ENDIAN_LITTLE);
|
||||
int insn_endian = (info->endian_code == BFD_ENDIAN_BIG
|
||||
? CGEN_ENDIAN_BIG
|
||||
: CGEN_ENDIAN_LITTLE);
|
||||
enum bfd_architecture arch;
|
||||
|
||||
/* ??? gdb will set mach but leave the architecture as "unknown" */
|
||||
@ -561,9 +566,11 @@ print_insn_or1k (bfd_vma pc, disassemble_info *info)
|
||||
prev_isa = cgen_bitset_copy (isa);
|
||||
prev_mach = mach;
|
||||
prev_endian = endian;
|
||||
prev_insn_endian = insn_endian;
|
||||
cd = or1k_cgen_cpu_open (CGEN_CPU_OPEN_ISAS, prev_isa,
|
||||
CGEN_CPU_OPEN_BFDMACH, mach_name,
|
||||
CGEN_CPU_OPEN_ENDIAN, prev_endian,
|
||||
CGEN_CPU_OPEN_INSN_ENDIAN, prev_insn_endian,
|
||||
CGEN_CPU_OPEN_END);
|
||||
if (!cd)
|
||||
abort ();
|
||||
|
||||
@ -3379,6 +3379,7 @@ xc16x_cgen_rebuild_tables (CGEN_CPU_TABLE *cd)
|
||||
CGEN_CPU_OPEN_MACHS: bitmap of values in enum mach_attr
|
||||
CGEN_CPU_OPEN_BFDMACH: specify 1 mach using bfd name
|
||||
CGEN_CPU_OPEN_ENDIAN: specify endian choice
|
||||
CGEN_CPU_OPEN_INSN_ENDIAN: specify instruction endian choice
|
||||
CGEN_CPU_OPEN_END: terminates arguments
|
||||
|
||||
??? Simultaneous multiple isas might not make sense, but it's not (yet)
|
||||
@ -3392,6 +3393,7 @@ xc16x_cgen_cpu_open (enum cgen_cpu_open_arg arg_type, ...)
|
||||
CGEN_BITSET *isas = 0; /* 0 = "unspecified" */
|
||||
unsigned int machs = 0; /* 0 = "unspecified" */
|
||||
enum cgen_endian endian = CGEN_ENDIAN_UNKNOWN;
|
||||
enum cgen_endian insn_endian = CGEN_ENDIAN_UNKNOWN;
|
||||
va_list ap;
|
||||
|
||||
if (! init_p)
|
||||
@ -3426,6 +3428,9 @@ xc16x_cgen_cpu_open (enum cgen_cpu_open_arg arg_type, ...)
|
||||
case CGEN_CPU_OPEN_ENDIAN :
|
||||
endian = va_arg (ap, enum cgen_endian);
|
||||
break;
|
||||
case CGEN_CPU_OPEN_INSN_ENDIAN :
|
||||
insn_endian = va_arg (ap, enum cgen_endian);
|
||||
break;
|
||||
default :
|
||||
opcodes_error_handler
|
||||
(/* xgettext:c-format */
|
||||
@ -3455,11 +3460,8 @@ xc16x_cgen_cpu_open (enum cgen_cpu_open_arg arg_type, ...)
|
||||
cd->isas = cgen_bitset_copy (isas);
|
||||
cd->machs = machs;
|
||||
cd->endian = endian;
|
||||
/* FIXME: for the sparc case we can determine insn-endianness statically.
|
||||
The worry here is where both data and insn endian can be independently
|
||||
chosen, in which case this function will need another argument.
|
||||
Actually, will want to allow for more arguments in the future anyway. */
|
||||
cd->insn_endian = endian;
|
||||
cd->insn_endian
|
||||
= (insn_endian == CGEN_ENDIAN_UNKNOWN ? endian : insn_endian);
|
||||
|
||||
/* Table (re)builder. */
|
||||
cd->rebuild_tables = xc16x_cgen_rebuild_tables;
|
||||
|
||||
@ -724,6 +724,7 @@ typedef struct cpu_desc_list
|
||||
CGEN_BITSET *isa;
|
||||
int mach;
|
||||
int endian;
|
||||
int insn_endian;
|
||||
CGEN_CPU_DESC cd;
|
||||
} cpu_desc_list;
|
||||
|
||||
@ -736,12 +737,16 @@ print_insn_xc16x (bfd_vma pc, disassemble_info *info)
|
||||
static CGEN_BITSET *prev_isa;
|
||||
static int prev_mach;
|
||||
static int prev_endian;
|
||||
static int prev_insn_endian;
|
||||
int length;
|
||||
CGEN_BITSET *isa;
|
||||
int mach;
|
||||
int endian = (info->endian == BFD_ENDIAN_BIG
|
||||
? CGEN_ENDIAN_BIG
|
||||
: CGEN_ENDIAN_LITTLE);
|
||||
int insn_endian = (info->endian_code == BFD_ENDIAN_BIG
|
||||
? CGEN_ENDIAN_BIG
|
||||
: CGEN_ENDIAN_LITTLE);
|
||||
enum bfd_architecture arch;
|
||||
|
||||
/* ??? gdb will set mach but leave the architecture as "unknown" */
|
||||
@ -807,9 +812,11 @@ print_insn_xc16x (bfd_vma pc, disassemble_info *info)
|
||||
prev_isa = cgen_bitset_copy (isa);
|
||||
prev_mach = mach;
|
||||
prev_endian = endian;
|
||||
prev_insn_endian = insn_endian;
|
||||
cd = xc16x_cgen_cpu_open (CGEN_CPU_OPEN_ISAS, prev_isa,
|
||||
CGEN_CPU_OPEN_BFDMACH, mach_name,
|
||||
CGEN_CPU_OPEN_ENDIAN, prev_endian,
|
||||
CGEN_CPU_OPEN_INSN_ENDIAN, prev_insn_endian,
|
||||
CGEN_CPU_OPEN_END);
|
||||
if (!cd)
|
||||
abort ();
|
||||
|
||||
@ -1347,6 +1347,7 @@ xstormy16_cgen_rebuild_tables (CGEN_CPU_TABLE *cd)
|
||||
CGEN_CPU_OPEN_MACHS: bitmap of values in enum mach_attr
|
||||
CGEN_CPU_OPEN_BFDMACH: specify 1 mach using bfd name
|
||||
CGEN_CPU_OPEN_ENDIAN: specify endian choice
|
||||
CGEN_CPU_OPEN_INSN_ENDIAN: specify instruction endian choice
|
||||
CGEN_CPU_OPEN_END: terminates arguments
|
||||
|
||||
??? Simultaneous multiple isas might not make sense, but it's not (yet)
|
||||
@ -1360,6 +1361,7 @@ xstormy16_cgen_cpu_open (enum cgen_cpu_open_arg arg_type, ...)
|
||||
CGEN_BITSET *isas = 0; /* 0 = "unspecified" */
|
||||
unsigned int machs = 0; /* 0 = "unspecified" */
|
||||
enum cgen_endian endian = CGEN_ENDIAN_UNKNOWN;
|
||||
enum cgen_endian insn_endian = CGEN_ENDIAN_UNKNOWN;
|
||||
va_list ap;
|
||||
|
||||
if (! init_p)
|
||||
@ -1394,6 +1396,9 @@ xstormy16_cgen_cpu_open (enum cgen_cpu_open_arg arg_type, ...)
|
||||
case CGEN_CPU_OPEN_ENDIAN :
|
||||
endian = va_arg (ap, enum cgen_endian);
|
||||
break;
|
||||
case CGEN_CPU_OPEN_INSN_ENDIAN :
|
||||
insn_endian = va_arg (ap, enum cgen_endian);
|
||||
break;
|
||||
default :
|
||||
opcodes_error_handler
|
||||
(/* xgettext:c-format */
|
||||
@ -1423,11 +1428,8 @@ xstormy16_cgen_cpu_open (enum cgen_cpu_open_arg arg_type, ...)
|
||||
cd->isas = cgen_bitset_copy (isas);
|
||||
cd->machs = machs;
|
||||
cd->endian = endian;
|
||||
/* FIXME: for the sparc case we can determine insn-endianness statically.
|
||||
The worry here is where both data and insn endian can be independently
|
||||
chosen, in which case this function will need another argument.
|
||||
Actually, will want to allow for more arguments in the future anyway. */
|
||||
cd->insn_endian = endian;
|
||||
cd->insn_endian
|
||||
= (insn_endian == CGEN_ENDIAN_UNKNOWN ? endian : insn_endian);
|
||||
|
||||
/* Table (re)builder. */
|
||||
cd->rebuild_tables = xstormy16_cgen_rebuild_tables;
|
||||
|
||||
@ -472,6 +472,7 @@ typedef struct cpu_desc_list
|
||||
CGEN_BITSET *isa;
|
||||
int mach;
|
||||
int endian;
|
||||
int insn_endian;
|
||||
CGEN_CPU_DESC cd;
|
||||
} cpu_desc_list;
|
||||
|
||||
@ -484,12 +485,16 @@ print_insn_xstormy16 (bfd_vma pc, disassemble_info *info)
|
||||
static CGEN_BITSET *prev_isa;
|
||||
static int prev_mach;
|
||||
static int prev_endian;
|
||||
static int prev_insn_endian;
|
||||
int length;
|
||||
CGEN_BITSET *isa;
|
||||
int mach;
|
||||
int endian = (info->endian == BFD_ENDIAN_BIG
|
||||
? CGEN_ENDIAN_BIG
|
||||
: CGEN_ENDIAN_LITTLE);
|
||||
int insn_endian = (info->endian_code == BFD_ENDIAN_BIG
|
||||
? CGEN_ENDIAN_BIG
|
||||
: CGEN_ENDIAN_LITTLE);
|
||||
enum bfd_architecture arch;
|
||||
|
||||
/* ??? gdb will set mach but leave the architecture as "unknown" */
|
||||
@ -555,9 +560,11 @@ print_insn_xstormy16 (bfd_vma pc, disassemble_info *info)
|
||||
prev_isa = cgen_bitset_copy (isa);
|
||||
prev_mach = mach;
|
||||
prev_endian = endian;
|
||||
prev_insn_endian = insn_endian;
|
||||
cd = xstormy16_cgen_cpu_open (CGEN_CPU_OPEN_ISAS, prev_isa,
|
||||
CGEN_CPU_OPEN_BFDMACH, mach_name,
|
||||
CGEN_CPU_OPEN_ENDIAN, prev_endian,
|
||||
CGEN_CPU_OPEN_INSN_ENDIAN, prev_insn_endian,
|
||||
CGEN_CPU_OPEN_END);
|
||||
if (!cd)
|
||||
abort ();
|
||||
|
||||
Loading…
Reference in New Issue
Block a user