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[AArch64] Fix ARMv8.1 and ARMv8.2 feature settings.
ARMv8.1 includes CRC as a required extension but this isn't reflected in the features enabled by -march=armv8.1-a. The FP16 feature modifier also clashes with AARCH64_FEATURE_V8_1 and the list of features for ARMv8.2 is missing ARMv8.1 features. This patch enables +crc for -march values of armv8.1-a and later. It also fixes the values for AARCH64_FEATURE_F16 and makes AARCH64_ARCH_V8_2 and superset of AARCH64_ARCH_V8_2. gas/ 2015-12-10 Matthew Wahab <matthew.wahab@arm.com> * doc/c-aarch64.texi (AArch64 Extensions): Update entry for crc. include/opcode 2015-12-10 Matthew Wahab <matthew.wahab@arm.com> * aarch64.h (AARCH64_FEATURE_F16): Fix clash with AARCH64_FEATURE_V8_1. (AARCH64_ARCH_V8_1): Add AARCH64_FEATURE_CRC. (AARCH64_ARCH_V8_2): Add AARCH64_FEATURE_CRC and AARCH64_FEATURE_V8_1. Change-Id: I8af5369f6df2430b28f6cec92870d2a4d14a7431
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@ -1,3 +1,7 @@
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2015-12-10 Matthew Wahab <matthew.wahab@arm.com>
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* doc/c-aarch64.texi (AArch64 Extensions): Update entry for crc.
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2015-12-10 Andrew Burgess <andrew.burgess@embecosm.com>
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* config/tc-arc.c (md_parse_option): Return 1 in order to accept
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@ -128,7 +128,7 @@ automatically cause those extensions to be disabled.
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@multitable @columnfractions .12 .17 .17 .54
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@headitem Extension @tab Minimum Architecture @tab Enabled by default
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@tab Description
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@item @code{crc} @tab ARMv8-A @tab No
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@item @code{crc} @tab ARMv8-A @tab ARMv8.1-A or later
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@tab Enable CRC instructions.
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@item @code{crypto} @tab ARMv8-A @tab No
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@tab Enable cryptographic extensions. This implies @code{fp} and @code{simd}.
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@ -1,3 +1,11 @@
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2015-12-10 Matthew Wahab <matthew.wahab@arm.com>
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* aarch64.h (AARCH64_FEATURE_F16): Fix clash with
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AARCH64_FEATURE_V8_1.
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(AARCH64_ARCH_V8_1): Add AARCH64_FEATURE_CRC.
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(AARCH64_ARCH_V8_2): Add AARCH64_FEATURE_CRC and
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AARCH64_FEATURE_V8_1.
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2015-12-04 Claudiu Zissulescu <claziss@synopsys.com>
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* arc.h (arc_reloc_equiv_tab): Replace flagcode with flags[32].
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@ -48,7 +48,7 @@ typedef uint32_t aarch64_insn;
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#define AARCH64_FEATURE_LOR 0x00400000 /* LOR instructions. */
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#define AARCH64_FEATURE_RDMA 0x00800000 /* v8.1 SIMD instructions. */
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#define AARCH64_FEATURE_V8_1 0x01000000 /* v8.1 features. */
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#define AARCH64_FEATURE_F16 0x01000000 /* v8.2 FP16 instructions. */
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#define AARCH64_FEATURE_F16 0x02000000 /* v8.2 FP16 instructions. */
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/* Architectures are the sum of the base and extensions. */
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#define AARCH64_ARCH_V8 AARCH64_FEATURE (AARCH64_FEATURE_V8, \
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@ -57,6 +57,7 @@ typedef uint32_t aarch64_insn;
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#define AARCH64_ARCH_V8_1 AARCH64_FEATURE (AARCH64_FEATURE_V8, \
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AARCH64_FEATURE_FP \
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| AARCH64_FEATURE_SIMD \
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| AARCH64_FEATURE_CRC \
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| AARCH64_FEATURE_V8_1 \
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| AARCH64_FEATURE_LSE \
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| AARCH64_FEATURE_PAN \
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@ -67,6 +68,8 @@ typedef uint32_t aarch64_insn;
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| AARCH64_FEATURE_F16 \
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| AARCH64_FEATURE_FP \
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| AARCH64_FEATURE_SIMD \
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| AARCH64_FEATURE_CRC \
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| AARCH64_FEATURE_V8_1 \
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| AARCH64_FEATURE_LSE \
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| AARCH64_FEATURE_PAN \
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| AARCH64_FEATURE_LOR \
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