diff --git a/gas/ChangeLog b/gas/ChangeLog
index 63014ee98c6..153c693890e 100644
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,7 @@
+2015-12-10  Matthew Wahab  <matthew.wahab@arm.com>
+
+	* doc/c-aarch64.texi (AArch64 Extensions): Update entry for crc.
+
 2015-12-10  Andrew Burgess  <andrew.burgess@embecosm.com>
 
 	* config/tc-arc.c (md_parse_option): Return 1 in order to accept
diff --git a/gas/doc/c-aarch64.texi b/gas/doc/c-aarch64.texi
index 2717af2ece8..363366a5b64 100644
--- a/gas/doc/c-aarch64.texi
+++ b/gas/doc/c-aarch64.texi
@@ -128,7 +128,7 @@ automatically cause those extensions to be disabled.
 @multitable @columnfractions .12 .17 .17 .54
 @headitem Extension @tab Minimum Architecture @tab Enabled by default
  @tab Description
-@item @code{crc} @tab ARMv8-A @tab No
+@item @code{crc} @tab ARMv8-A @tab ARMv8.1-A or later
  @tab Enable CRC instructions.
 @item @code{crypto} @tab ARMv8-A @tab No
  @tab Enable cryptographic extensions.  This implies @code{fp} and @code{simd}.
diff --git a/include/opcode/ChangeLog b/include/opcode/ChangeLog
index 531f2d4b388..9dc6c1b9f11 100644
--- a/include/opcode/ChangeLog
+++ b/include/opcode/ChangeLog
@@ -1,3 +1,11 @@
+2015-12-10  Matthew Wahab  <matthew.wahab@arm.com>
+
+	* aarch64.h (AARCH64_FEATURE_F16): Fix clash with
+	AARCH64_FEATURE_V8_1.
+	(AARCH64_ARCH_V8_1): Add AARCH64_FEATURE_CRC.
+	(AARCH64_ARCH_V8_2): Add AARCH64_FEATURE_CRC and
+	AARCH64_FEATURE_V8_1.
+
 2015-12-04  Claudiu Zissulescu  <claziss@synopsys.com>
 
 	* arc.h (arc_reloc_equiv_tab): Replace flagcode with flags[32].
diff --git a/include/opcode/aarch64.h b/include/opcode/aarch64.h
index f1658bc55ea..6654be358fb 100644
--- a/include/opcode/aarch64.h
+++ b/include/opcode/aarch64.h
@@ -48,7 +48,7 @@ typedef uint32_t aarch64_insn;
 #define AARCH64_FEATURE_LOR	0x00400000	/* LOR instructions.  */
 #define AARCH64_FEATURE_RDMA	0x00800000	/* v8.1 SIMD instructions.  */
 #define AARCH64_FEATURE_V8_1	0x01000000	/* v8.1 features.  */
-#define AARCH64_FEATURE_F16	0x01000000	/* v8.2 FP16 instructions.  */
+#define AARCH64_FEATURE_F16	0x02000000	/* v8.2 FP16 instructions.  */
 
 /* Architectures are the sum of the base and extensions.  */
 #define AARCH64_ARCH_V8		AARCH64_FEATURE (AARCH64_FEATURE_V8, \
@@ -57,6 +57,7 @@ typedef uint32_t aarch64_insn;
 #define AARCH64_ARCH_V8_1	AARCH64_FEATURE (AARCH64_FEATURE_V8, \
 						 AARCH64_FEATURE_FP  \
 						 | AARCH64_FEATURE_SIMD	\
+						 | AARCH64_FEATURE_CRC	\
 						 | AARCH64_FEATURE_V8_1 \
 						 | AARCH64_FEATURE_LSE	\
 						 | AARCH64_FEATURE_PAN	\
@@ -66,7 +67,9 @@ typedef uint32_t aarch64_insn;
 						 AARCH64_FEATURE_V8_2	\
 						 | AARCH64_FEATURE_F16	\
 						 | AARCH64_FEATURE_FP	\
-						 | AARCH64_FEATURE_SIMD \
+						 | AARCH64_FEATURE_SIMD	\
+						 | AARCH64_FEATURE_CRC	\
+						 | AARCH64_FEATURE_V8_1 \
 						 | AARCH64_FEATURE_LSE	\
 						 | AARCH64_FEATURE_PAN	\
 						 | AARCH64_FEATURE_LOR	\