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bfd/efl32-arm.c: Fix handling of IRELATIVE relocs.

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bfd/ChangeLog:

2013-04-24  Will Newton  <will.newton@linaro.org>

	* elf32-arm.c (elf32_arm_populate_plt_entry): Call
	elf32_arm_add_dynreloc when emitting R_ARM_IRELATIVE relocs.

ld/testsuite/ChangeLog:

2013-04-24  Will Newton  <will.newton@linaro.org>

	* ld-arm/arm-elf.exp: Add IFUNC test 17.
	* ld-arm/ifunc-17.dd: New file.
	* ld-arm/ifunc-17.gd: Likewise.
	* ld-arm/ifunc-17.rd: Likewise.
	* ld-arm/ifunc-17.s: Likweise.
	* ld-arm/ifunc-1.rd: Reorder relocs to match linker output.
	* ld-arm/ifunc-2.rd: Likewise.
	* ld-arm/ifunc-5.rd: Likewise.
	* ld-arm/ifunc-6.rd: Likewise.
This commit is contained in:
Will Newton 2013-04-29 09:48:32 +00:00
parent 2810e26c6a
commit aba8c3de87
12 changed files with 100 additions and 9 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

5
bfd/ChangeLog
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@ -1,3 +1,8 @@
2013-04-29 Will Newton <will.newton@linaro.org>
* elf32-arm.c (elf32_arm_populate_plt_entry): Call
elf32_arm_add_dynreloc when emitting R_ARM_IRELATIVE relocs.
2013-04-29 Will Newton <will.newton@linaro.org>
* elf64-aarch64.c (elf64_aarch64_check_relocs): Move relocation

9
bfd/elf32-arm.c
View File

@ -7699,8 +7699,13 @@ elf32_arm_populate_plt_entry (bfd *output_bfd, struct bfd_link_info *info,
sgot->contents + got_offset);
}
loc = srel->contents + plt_index * RELOC_SIZE (htab);
SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
if (dynindx == -1)
elf32_arm_add_dynreloc (output_bfd, info, srel, &rel);
else
{
loc = srel->contents + plt_index * RELOC_SIZE (htab);
SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
}
}
/* Some relocations map to different relocations depending on the

12
ld/testsuite/ChangeLog
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@ -1,3 +1,15 @@
2013-04-29 Will Newton <will.newton@linaro.org>
* ld-arm/arm-elf.exp: Add IFUNC test 17.
* ld-arm/ifunc-17.dd: New file.
* ld-arm/ifunc-17.gd: Likewise.
* ld-arm/ifunc-17.rd: Likewise.
* ld-arm/ifunc-17.s: Likweise.
* ld-arm/ifunc-1.rd: Reorder relocs to match linker output.
* ld-arm/ifunc-2.rd: Likewise.
* ld-arm/ifunc-5.rd: Likewise.
* ld-arm/ifunc-6.rd: Likewise.
2013-04-29 Will Newton <will.newton@linaro.org>
* ld-plugin/lto.exp: Disable ld/12942 test for gcc < 4.7.0.

5
ld/testsuite/ld-arm/arm-elf.exp
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@ -451,6 +451,11 @@ set armelftests_nonacl {
{objdump {-s -j.data -j.got} ifunc-16.gd}
{readelf -r ifunc-16.rd}}
"ifunc-16"}
{"IFUNC test 17" "" "" "" {ifunc-17.s}
{{objdump -d ifunc-17.dd}
{objdump {-s -j.data -j.got} ifunc-17.gd}
{readelf -r ifunc-17.rd}}
"ifunc-17"}
}
run_ld_link_tests $armelftests_common

2
ld/testsuite/ld-arm/ifunc-1.rd
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@ -4,5 +4,5 @@ There is no dynamic section in this file\.
Relocation section '\.rel\.dyn' at offset 0x8000 contains 3 entries:
Offset Info Type Sym\.Value Sym\. Name
0001100c ......a0 R_ARM_IRELATIVE
00011010 ......a0 R_ARM_IRELATIVE
00011014 ......a0 R_ARM_IRELATIVE
00011010 ......a0 R_ARM_IRELATIVE

25
ld/testsuite/ld-arm/ifunc-17.dd Normal file
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@ -0,0 +1,25 @@
.*
Disassembly of section \.iplt:
00008084 <.iplt>:
#------------------------------------------------------------------------------
#------ appfunc1's .iplt entry
#------------------------------------------------------------------------------
8084: e28fc600 add ip, pc, #0, 12
8088: e28cca08 add ip, ip, #8, 20 ; 0x8000
808c: e5bcf01c ldr pc, \[ip, #28\]!
Disassembly of section \.text:
00008090 <appfunc1>:
8090: 46f7 mov pc, lr
00008092 <appfunc2>:
8092: 46f7 mov pc, lr
00008094 <_start>:
8094: f7ff eff6 blx 8084 <appfunc1-0xc>
8098: 00000010 \.word 0x00000010

10
ld/testsuite/ld-arm/ifunc-17.gd Normal file
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@ -0,0 +1,10 @@
.*
Contents of section \.got:
#------------------------------------------------------------------------------
#------ 000100a8: 0x8091 (appfunc1)
#------ 000100ac: 0x8093 (appfunc2)
#------------------------------------------------------------------------------
1009c 00000000 00000000 00000000 91800000 .*
100ac 93800000 .*

5
ld/testsuite/ld-arm/ifunc-17.rd Normal file
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@ -0,0 +1,5 @@
Relocation section '\.rel\.dyn' at offset 0x74 contains 2 entries:
Offset Info Type Sym\.Value Sym\. Name
000100a8 ......a0 R_ARM_IRELATIVE
000100ac ......a0 R_ARM_IRELATIVE

24
ld/testsuite/ld-arm/ifunc-17.s Normal file
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@ -0,0 +1,24 @@
.syntax unified
.arch armv6t2
.global appfunc1
.type appfunc1,%gnu_indirect_function
.thumb
appfunc1:
mov pc,lr
.size appfunc1,.-appfunc1
.global appfunc2
.type appfunc2,%gnu_indirect_function
.thumb
appfunc2:
mov pc,lr
.size appfunc2,.-appfunc2
.global _start
.type _start,%function
.thumb
_start:
bl appfunc1(PLT)
.word appfunc2(GOT)
.size _start,.-_start

4
ld/testsuite/ld-arm/ifunc-2.rd
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@ -5,9 +5,9 @@ Relocation section '\.rel\.dyn' at offset 0x8000 contains 8 entries:
Offset Info Type Sym\.Value Sym\. Name
0001100c ......a0 R_ARM_IRELATIVE
00011010 ......a0 R_ARM_IRELATIVE
00011020 ......a0 R_ARM_IRELATIVE
00011028 ......a0 R_ARM_IRELATIVE
00011014 ......a0 R_ARM_IRELATIVE
00011018 ......a0 R_ARM_IRELATIVE
0001101c ......a0 R_ARM_IRELATIVE
00011020 ......a0 R_ARM_IRELATIVE
00011024 ......a0 R_ARM_IRELATIVE
00011028 ......a0 R_ARM_IRELATIVE

2
ld/testsuite/ld-arm/ifunc-5.rd
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@ -4,5 +4,5 @@ There is no dynamic section in this file\.
Relocation section '\.rel\.dyn' at offset 0x8000 contains 3 entries:
Offset Info Type Sym\.Value Sym\. Name
0001100c ......a0 R_ARM_IRELATIVE
00011010 ......a0 R_ARM_IRELATIVE
00011014 ......a0 R_ARM_IRELATIVE
00011010 ......a0 R_ARM_IRELATIVE

6
ld/testsuite/ld-arm/ifunc-6.rd
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@ -3,7 +3,7 @@ There is no dynamic section in this file\.
Relocation section '\.rel\.dyn' at offset 0x8000 contains 4 entries:
Offset Info Type Sym\.Value Sym\. Name
0001100c ......a0 R_ARM_IRELATIVE
00011010 ......a0 R_ARM_IRELATIVE
00011014 ......a0 R_ARM_IRELATIVE
00011018 ......a0 R_ARM_IRELATIVE
00011010 ......a0 R_ARM_IRELATIVE
0001100c ......a0 R_ARM_IRELATIVE
00011014 ......a0 R_ARM_IRELATIVE