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cpu/or1k: Update fpu compare symbols to imply set flag

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The fpu compare symbols where not including 'sf' in the mnemonic.  So
instead of `lf-sfeq` (implying set flag if operands are equal) we were
having `lf-eq`.   This patch adds the 'sf'.  This helps with making the
generated CGEN documentation consistent and ordered correctly.

cpu/ChangeLog:

yyyy-mm-dd  Stafford Horne  <shorne@gmail.com>

	* or1korfpx.cpu (float-setflag-insn-base): Add 'sf' to symbol.
This commit is contained in:
Stafford Horne 2019-06-13 06:16:19 +09:00
parent eb212c84a1
commit a2e4218f23
2 changed files with 7 additions and 3 deletions
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4
cpu/ChangeLog
View File

@ -1,3 +1,7 @@
2019-06-13 Stafford Horne <shorne@gmail.com>
* or1korfpx.cpu (float-setflag-insn-base): Add 'sf' to symbol.
2019-06-13 Stafford Horne <shorne@gmail.com>
* or1k.cpu (or64nd, or32nd, or1200nd): Update comment.a

6
cpu/or1korfpx.cpu
View File

@ -268,7 +268,7 @@
(define-pmacro (float-setflag-insn-base mnemonic rtx-mnemonic symantics)
(begin
(dni (.sym lf- mnemonic -s)
(dni (.sym lf-sf mnemonic -s)
(.str "lf.sf" mnemonic ".s reg/reg")
((MACH ORFPX32-MACHS))
(.str "lf.sf" mnemonic ".s $rASF,$rBSF")
@ -276,7 +276,7 @@
(symantics rtx-mnemonic SF rASF rBSF)
()
)
(dni (.sym lf- mnemonic -d)
(dni (.sym lf-sf mnemonic -d)
(.str "lf.sf" mnemonic ".d reg/reg")
((MACH ORFPX64-MACHS))
(.str "lf.sf" mnemonic ".d $rADF,$rBDF")
@ -284,7 +284,7 @@
(symantics rtx-mnemonic DF rADF rBDF)
()
)
(dni (.sym lf- mnemonic -d32)
(dni (.sym lf-sf mnemonic -d32)
(.str "lf.sf" mnemonic ".d regpair/regpair")
((MACH ORFPX64A32-MACHS))
(.str "lf.sf" mnemonic ".d $rAD32F,$rBD32F")