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x86: correctly handle VMOVD with EVEX.W set outside of 64-bit mode
For the flavors having a GPR operand EVEX.W is ignored outside of 64-bit mode. The mnemonic should therefore not be KMOVQ, the GPR operand should not name a non-existing 64-bit register, just like is already the case for the AVX counterparts, and the Disp8 scaling factor should be 4 rather than 8.
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@ -1,3 +1,9 @@
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2018-11-06 Jan Beulich <jbeulich@suse.com>
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* testsuite/gas/i386/evex-wig.s: Add vmovd cases.
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* testsuite/gas/i386/evex-wig.d,
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testsuite/gas/i386/evex-wig1-intel.d: Adjust expectations.
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2018-11-06 Jan Beulich <jbeulich@suse.com>
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* testsuite/gas/i386/avx-wig.s: Add kmovd cases.
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@ -35,6 +35,12 @@ _start:
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{evex} vextractps $0, %xmm0, %eax
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{evex} vextractps $0, %xmm0, 4(%eax)
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{evex} vmovd %eax, %xmm0
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{evex} vmovd 4(%eax), %xmm0
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{evex} vmovd %xmm0, %eax
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{evex} vmovd %xmm0, 4(%eax)
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{evex} vpextrb $0, %xmm0, %eax
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{evex} vpextrb $0, %xmm0, 1(%eax)
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@ -27,6 +27,10 @@ Disassembly of section .text:
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[ ]*[a-f0-9]+: 62 f1 ff 08 78 c0 vcvttsd2usi eax,xmm0
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[ ]*[a-f0-9]+: 62 f3 fd 08 17 c0 00 vextractps eax,xmm0,0x0
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[ ]*[a-f0-9]+: 62 f3 fd 08 17 40 01 00 vextractps DWORD PTR \[eax\+0x4\],xmm0,0x0
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[ ]*[a-f0-9]+: 62 f1 fd 08 6e c0 vmovd xmm0,eax
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[ ]*[a-f0-9]+: 62 f1 fd 08 6e 40 01 vmovd xmm0,DWORD PTR \[eax\+0x4\]
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[ ]*[a-f0-9]+: 62 f1 fd 08 7e c0 vmovd eax,xmm0
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[ ]*[a-f0-9]+: 62 f1 fd 08 7e 40 01 vmovd DWORD PTR \[eax\+0x4\],xmm0
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[ ]*[a-f0-9]+: 62 f3 fd 08 14 c0 00 vpextrb eax,xmm0,0x0
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[ ]*[a-f0-9]+: 62 f3 fd 08 14 40 01 00 vpextrb BYTE PTR \[eax\+0x1\],xmm0,0x0
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[ ]*[a-f0-9]+: 62 f3 fd 08 16 c0 00 vpextrd eax,xmm0,0x0
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@ -27,6 +27,10 @@ Disassembly of section .text:
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[ ]*[a-f0-9]+: 62 f1 ff 08 78 c0 vcvttsd2usi %xmm0,%eax
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[ ]*[a-f0-9]+: 62 f3 fd 08 17 c0 00 vextractps \$0x0,%xmm0,%eax
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[ ]*[a-f0-9]+: 62 f3 fd 08 17 40 01 00 vextractps \$0x0,%xmm0,0x4\(%eax\)
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[ ]*[a-f0-9]+: 62 f1 fd 08 6e c0 vmovd %eax,%xmm0
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[ ]*[a-f0-9]+: 62 f1 fd 08 6e 40 01 vmovd 0x4\(%eax\),%xmm0
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[ ]*[a-f0-9]+: 62 f1 fd 08 7e c0 vmovd %xmm0,%eax
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[ ]*[a-f0-9]+: 62 f1 fd 08 7e 40 01 vmovd %xmm0,0x4\(%eax\)
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[ ]*[a-f0-9]+: 62 f3 fd 08 14 c0 00 vpextrb \$0x0,%xmm0,%eax
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[ ]*[a-f0-9]+: 62 f3 fd 08 14 40 01 00 vpextrb \$0x0,%xmm0,0x1\(%eax\)
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[ ]*[a-f0-9]+: 62 f3 fd 08 16 c0 00 vpextrd \$0x0,%xmm0,%eax
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@ -1,3 +1,9 @@
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2018-11-06 Jan Beulich <jbeulich@suse.com>
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* i386-dis.c (EVEX_W_0F6E_P_2, EVEX_W_0F7E_P_2): Delete.
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* i386-dis-evex.h (evex_table): Move vmov[dq} with GPR operand
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cases up one level in the hierarchy.
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2018-11-06 Jan Beulich <jbeulich@suse.com>
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* i386-dis.c (MOD_VEX_W_0_0F92_P_3_LEN_0,
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@ -3299,11 +3299,6 @@ static const struct dis386 evex_table[][256] = {
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{ Bad_Opcode },
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{ "vpunpckhqdq", { XM, Vex, EXx }, 0 },
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},
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/* EVEX_W_0F6E_P_2 */
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{
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{ "vmovd", { XMScalar, Ed }, 0 },
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{ "vmovq", { XMScalar, Eq }, 0 },
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},
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/* EVEX_W_0F6F_P_1 */
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{
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{ "vmovdqu32", { XM, EXEvexXNoBcst }, 0 },
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@ -3400,11 +3395,6 @@ static const struct dis386 evex_table[][256] = {
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{ Bad_Opcode },
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{ "vmovq", { XMScalar, EXxmm_mq }, 0 },
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},
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/* EVEX_W_0F7E_P_2 */
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{
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{ "vmovd", { Ed, XMScalar }, 0 },
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{ "vmovq", { Eq, XMScalar }, 0 },
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},
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/* EVEX_W_0F7F_P_1 */
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{
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{ "vmovdqu32", { EXxS, XM }, 0 },
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@ -4093,7 +4083,7 @@ static const struct dis386 evex_table[][256] = {
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#ifdef NEED_EVEX_LEN_TABLE
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/* EVEX_LEN_0F6E_P_2 */
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{
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{ VEX_W_TABLE (EVEX_W_0F6E_P_2) },
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{ "vmovK", { XMScalar, Edq }, 0 },
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},
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/* EVEX_LEN_0F7E_P_1 */
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@ -4103,7 +4093,7 @@ static const struct dis386 evex_table[][256] = {
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/* EVEX_LEN_0F7E_P_2 */
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{
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{ VEX_W_TABLE (EVEX_W_0F7E_P_2) },
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{ "vmovK", { Edq, XMScalar }, 0 },
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},
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/* EVEX_LEN_0FD6_P_2 */
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@ -2100,7 +2100,6 @@ enum
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EVEX_W_0F6B_P_2,
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EVEX_W_0F6C_P_2,
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EVEX_W_0F6D_P_2,
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EVEX_W_0F6E_P_2,
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EVEX_W_0F6F_P_1,
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EVEX_W_0F6F_P_2,
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EVEX_W_0F6F_P_3,
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@ -2121,7 +2120,6 @@ enum
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EVEX_W_0F7B_P_2,
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EVEX_W_0F7B_P_3,
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EVEX_W_0F7E_P_1,
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EVEX_W_0F7E_P_2,
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EVEX_W_0F7F_P_1,
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EVEX_W_0F7F_P_2,
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EVEX_W_0F7F_P_3,
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