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Enable Intel VAES instructions.
Intel has disclosed a set of new instructions. The spec is https://software.intel.com/sites/default/files/managed/c5/15/architecture-instruction-set-extensions-programming-reference.pdf gas/ * config/tc-i386.c (cpu_arch): Add VAES. * doc/c-i386.texi: Document VAES. * testsuite/gas/i386/i386.exp: Run VAES tests. * testsuite/gas/i386/avx512f_vaes-intel.d: New test. * testsuite/gas/i386/avx512f_vaes-wig.s: Ditto. * testsuite/gas/i386/avx512f_vaes-wig1-intel.d: Ditto. * testsuite/gas/i386/avx512f_vaes-wig1.d: Ditto. * testsuite/gas/i386/avx512f_vaes.d: Ditto. * testsuite/gas/i386/avx512f_vaes.s: Ditto. * testsuite/gas/i386/avx512vl_vaes-intel.d: Ditto. * testsuite/gas/i386/avx512vl_vaes-wig.s: Ditto. * testsuite/gas/i386/avx512vl_vaes-wig1-intel.d: Ditto. * testsuite/gas/i386/avx512vl_vaes-wig1.d: Ditto. * testsuite/gas/i386/avx512vl_vaes.d: Ditto. * testsuite/gas/i386/avx512vl_vaes.s: Ditto. * testsuite/gas/i386/vaes-intel.d: Ditto. * testsuite/gas/i386/vaes.d: Ditto. * testsuite/gas/i386/vaes.s: Ditto. * testsuite/gas/i386/x86-64-avx512f_vaes-intel.d: Ditto. * testsuite/gas/i386/x86-64-avx512f_vaes-wig.s: Ditto. * testsuite/gas/i386/x86-64-avx512f_vaes-wig1-intel.d: Ditto. * testsuite/gas/i386/x86-64-avx512f_vaes-wig1.d: Ditto. * testsuite/gas/i386/x86-64-avx512f_vaes.d: Ditto. * testsuite/gas/i386/x86-64-avx512f_vaes.s: Ditto. * testsuite/gas/i386/x86-64-avx512vl_vaes-intel.d: Ditto. * testsuite/gas/i386/x86-64-avx512vl_vaes-wig.s: Ditto. * testsuite/gas/i386/x86-64-avx512vl_vaes-wig1-intel.d: Ditto. * testsuite/gas/i386/x86-64-avx512vl_vaes-wig1.d: Ditto. * testsuite/gas/i386/x86-64-avx512vl_vaes.d: Ditto. * testsuite/gas/i386/x86-64-avx512vl_vaes.s: Ditto. * testsuite/gas/i386/x86-64-vaes-intel.d: Ditto. * testsuite/gas/i386/x86-64-vaes.d: Ditto. * testsuite/gas/i386/x86-64-vaes.s: Ditto. opcodes/ * i386-dis.c (enum): Add PREFIX_EVEX_0F38DC, PREFIX_EVEX_0F38DD, PREFIX_EVEX_0F38DE, PREFIX_EVEX_0F38DF. (enum): Remove VEX_LEN_0F38DC_P_2, VEX_LEN_0F38DD_P_2, VEX_LEN_0F38DE_P_2, VEX_LEN_0F38DF_P_2. (vex_len_table): Ditto. (enum): Remove VEX_W_0F38DC_P_2, VEX_W_0F38DD_P_2, VEX_W_0F38DE_P_2, VEX_W_0F38DF_P_2. (vew_w_table): Ditto. (prefix_table): Adjust instructions (see prefixes above). * i386-dis-evex.h (evex_table): Add new instructions (see prefixes above). * i386-gen.c (cpu_flag_init): Add VAES. (bitfield_cpu_flags): Ditto. * i386-opc.h (enum): Ditto. (i386_cpu_flags): Ditto. * i386-opc.tbl (vaes{enc,dec}{last,}): New instructions. * i386-init.h: Regenerate. * i386-tbl.h: Ditto.
This commit is contained in:
Igor Tsimbalist
parent
48521003d5
commit
8dcf1fadf2
@ -998,6 +998,8 @@ static const arch_entry cpu_arch[] =
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CPU_CET_FLAGS, 0 },
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{ STRING_COMMA_LEN (".gfni"), PROCESSOR_UNKNOWN,
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CPU_GFNI_FLAGS, 0 },
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{ STRING_COMMA_LEN (".vaes"), PROCESSOR_UNKNOWN,
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CPU_VAES_FLAGS, 0 },
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};
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static const noarch_entry cpu_noarch[] =
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@ -169,6 +169,7 @@ accept various extension mnemonics. For example,
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@code{ptwrite},
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@code{cet},
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@code{gfni},
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@code{vaes},
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@code{prefetchwt1},
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@code{clflushopt},
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@code{se1},
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@ -1227,6 +1228,7 @@ supported on the CPU specified. The choices for @var{cpu_type} are:
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@item @samp{.syscall} @tab @samp{.rdtscp} @tab @samp{.svme} @tab @samp{.abm}
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@item @samp{.lwp} @tab @samp{.fma4} @tab @samp{.xop} @tab @samp{.cx16}
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@item @samp{.padlock} @tab @samp{.clzero} @tab @samp{.mwaitx} @tab @samp{.gfni}
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@item @samp{.vaes}
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@end multitable
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Apart from the warning, there are only two other effects on
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36
gas/testsuite/gas/i386/avx512f_vaes-intel.d
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36
gas/testsuite/gas/i386/avx512f_vaes-intel.d
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@ -0,0 +1,36 @@
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#as:
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#objdump: -dw -Mintel
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#name: i386 AVX512F/VAES insns (Intel disassembly)
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#source: avx512f_vaes.s
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.*: +file format .*
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Disassembly of section \.text:
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00000000 <_start>:
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[ ]*[a-f0-9]+:[ ]*62 f2 55 48 de f4[ ]*vaesdec zmm6,zmm5,zmm4
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[ ]*[a-f0-9]+:[ ]*62 f2 55 48 de b4 f4 c0 1d fe ff[ ]*vaesdec zmm6,zmm5,ZMMWORD PTR \[esp\+esi\*8-0x1e240\]
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[ ]*[a-f0-9]+:[ ]*62 f2 55 48 de b2 c0 1f 00 00[ ]*vaesdec zmm6,zmm5,ZMMWORD PTR \[edx\+0x1fc0\]
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[ ]*[a-f0-9]+:[ ]*62 f2 55 48 df f4[ ]*vaesdeclast zmm6,zmm5,zmm4
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[ ]*[a-f0-9]+:[ ]*62 f2 55 48 df b4 f4 c0 1d fe ff[ ]*vaesdeclast zmm6,zmm5,ZMMWORD PTR \[esp\+esi\*8-0x1e240\]
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[ ]*[a-f0-9]+:[ ]*62 f2 55 48 df b2 c0 1f 00 00[ ]*vaesdeclast zmm6,zmm5,ZMMWORD PTR \[edx\+0x1fc0\]
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[ ]*[a-f0-9]+:[ ]*62 f2 55 48 dc f4[ ]*vaesenc zmm6,zmm5,zmm4
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[ ]*[a-f0-9]+:[ ]*62 f2 55 48 dc b4 f4 c0 1d fe ff[ ]*vaesenc zmm6,zmm5,ZMMWORD PTR \[esp\+esi\*8-0x1e240\]
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[ ]*[a-f0-9]+:[ ]*62 f2 55 48 dc b2 c0 1f 00 00[ ]*vaesenc zmm6,zmm5,ZMMWORD PTR \[edx\+0x1fc0\]
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[ ]*[a-f0-9]+:[ ]*62 f2 55 48 dd f4[ ]*vaesenclast zmm6,zmm5,zmm4
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[ ]*[a-f0-9]+:[ ]*62 f2 55 48 dd b4 f4 c0 1d fe ff[ ]*vaesenclast zmm6,zmm5,ZMMWORD PTR \[esp\+esi\*8-0x1e240\]
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[ ]*[a-f0-9]+:[ ]*62 f2 55 48 dd b2 c0 1f 00 00[ ]*vaesenclast zmm6,zmm5,ZMMWORD PTR \[edx\+0x1fc0\]
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[ ]*[a-f0-9]+:[ ]*62 f2 55 48 de f4[ ]*vaesdec zmm6,zmm5,zmm4
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[ ]*[a-f0-9]+:[ ]*62 f2 55 48 de b4 f4 c0 1d fe ff[ ]*vaesdec zmm6,zmm5,ZMMWORD PTR \[esp\+esi\*8-0x1e240\]
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[ ]*[a-f0-9]+:[ ]*62 f2 55 48 de b2 c0 1f 00 00[ ]*vaesdec zmm6,zmm5,ZMMWORD PTR \[edx\+0x1fc0\]
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[ ]*[a-f0-9]+:[ ]*62 f2 55 48 df f4[ ]*vaesdeclast zmm6,zmm5,zmm4
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[ ]*[a-f0-9]+:[ ]*62 f2 55 48 df b4 f4 c0 1d fe ff[ ]*vaesdeclast zmm6,zmm5,ZMMWORD PTR \[esp\+esi\*8-0x1e240\]
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[ ]*[a-f0-9]+:[ ]*62 f2 55 48 df b2 c0 1f 00 00[ ]*vaesdeclast zmm6,zmm5,ZMMWORD PTR \[edx\+0x1fc0\]
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[ ]*[a-f0-9]+:[ ]*62 f2 55 48 dc f4[ ]*vaesenc zmm6,zmm5,zmm4
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[ ]*[a-f0-9]+:[ ]*62 f2 55 48 dc b4 f4 c0 1d fe ff[ ]*vaesenc zmm6,zmm5,ZMMWORD PTR \[esp\+esi\*8-0x1e240\]
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[ ]*[a-f0-9]+:[ ]*62 f2 55 48 dc b2 c0 1f 00 00[ ]*vaesenc zmm6,zmm5,ZMMWORD PTR \[edx\+0x1fc0\]
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[ ]*[a-f0-9]+:[ ]*62 f2 55 48 dd f4[ ]*vaesenclast zmm6,zmm5,zmm4
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[ ]*[a-f0-9]+:[ ]*62 f2 55 48 dd b4 f4 c0 1d fe ff[ ]*vaesenclast zmm6,zmm5,ZMMWORD PTR \[esp\+esi\*8-0x1e240\]
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[ ]*[a-f0-9]+:[ ]*62 f2 55 48 dd b2 c0 1f 00 00[ ]*vaesenclast zmm6,zmm5,ZMMWORD PTR \[edx\+0x1fc0\]
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#pass
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37
gas/testsuite/gas/i386/avx512f_vaes-wig.s
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37
gas/testsuite/gas/i386/avx512f_vaes-wig.s
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@ -0,0 +1,37 @@
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# Check 32bit AVX512F,VAES WIG instructions
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.allow_index_reg
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.text
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_start:
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vaesdec %zmm4, %zmm5, %zmm6 # AVX512F,VAES
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vaesdec -123456(%esp,%esi,8), %zmm5, %zmm6 # AVX512F,VAES
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vaesdec 8128(%edx), %zmm5, %zmm6 # AVX512F,VAES Disp8
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vaesdeclast %zmm4, %zmm5, %zmm6 # AVX512F,VAES
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vaesdeclast -123456(%esp,%esi,8), %zmm5, %zmm6 # AVX512F,VAES
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vaesdeclast 8128(%edx), %zmm5, %zmm6 # AVX512F,VAES Disp8
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vaesenc %zmm4, %zmm5, %zmm6 # AVX512F,VAES
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vaesenc -123456(%esp,%esi,8), %zmm5, %zmm6 # AVX512F,VAES
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vaesenc 8128(%edx), %zmm5, %zmm6 # AVX512F,VAES Disp8
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vaesenclast %zmm4, %zmm5, %zmm6 # AVX512F,VAES
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vaesenclast -123456(%esp,%esi,8), %zmm5, %zmm6 # AVX512F,VAES
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vaesenclast 8128(%edx), %zmm5, %zmm6 # AVX512F,VAES Disp8
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.intel_syntax noprefix
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vaesdec zmm6, zmm5, zmm4 # AVX512F,VAES
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vaesdec zmm6, zmm5, ZMMWORD PTR [esp+esi*8-123456] # AVX512F,VAES
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vaesdec zmm6, zmm5, ZMMWORD PTR [edx+8128] # AVX512F,VAES Disp8
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vaesdeclast zmm6, zmm5, zmm4 # AVX512F,VAES
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vaesdeclast zmm6, zmm5, ZMMWORD PTR [esp+esi*8-123456] # AVX512F,VAES
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vaesdeclast zmm6, zmm5, ZMMWORD PTR [edx+8128] # AVX512F,VAES Disp8
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vaesenc zmm6, zmm5, zmm4 # AVX512F,VAES
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vaesenc zmm6, zmm5, ZMMWORD PTR [esp+esi*8-123456] # AVX512F,VAES
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vaesenc zmm6, zmm5, ZMMWORD PTR [edx+8128] # AVX512F,VAES Disp8
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vaesenclast zmm6, zmm5, zmm4 # AVX512F,VAES
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vaesenclast zmm6, zmm5, ZMMWORD PTR [esp+esi*8-123456] # AVX512F,VAES
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vaesenclast zmm6, zmm5, ZMMWORD PTR [edx+8128] # AVX512F,VAES Disp8
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36
gas/testsuite/gas/i386/avx512f_vaes-wig1-intel.d
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36
gas/testsuite/gas/i386/avx512f_vaes-wig1-intel.d
Normal file
@ -0,0 +1,36 @@
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#as: -mevexwig=1
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#objdump: -dw -Mintel
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#name: i386 AVX512F/VAES wig insns (Intel disassembly)
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#source: avx512f_vaes-wig.s
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.*: +file format .*
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Disassembly of section \.text:
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00000000 <_start>:
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[ ]*[a-f0-9]+:[ ]*62 f2 d5 48 de f4[ ]*vaesdec zmm6,zmm5,zmm4
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[ ]*[a-f0-9]+:[ ]*62 f2 d5 48 de b4 f4 c0 1d fe ff[ ]*vaesdec zmm6,zmm5,ZMMWORD PTR \[esp\+esi\*8-0x1e240\]
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[ ]*[a-f0-9]+:[ ]*62 f2 d5 48 de b2 c0 1f 00 00[ ]*vaesdec zmm6,zmm5,ZMMWORD PTR \[edx\+0x1fc0\]
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[ ]*[a-f0-9]+:[ ]*62 f2 d5 48 df f4[ ]*vaesdeclast zmm6,zmm5,zmm4
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[ ]*[a-f0-9]+:[ ]*62 f2 d5 48 df b4 f4 c0 1d fe ff[ ]*vaesdeclast zmm6,zmm5,ZMMWORD PTR \[esp\+esi\*8-0x1e240\]
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[ ]*[a-f0-9]+:[ ]*62 f2 d5 48 df b2 c0 1f 00 00[ ]*vaesdeclast zmm6,zmm5,ZMMWORD PTR \[edx\+0x1fc0\]
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[ ]*[a-f0-9]+:[ ]*62 f2 d5 48 dc f4[ ]*vaesenc zmm6,zmm5,zmm4
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[ ]*[a-f0-9]+:[ ]*62 f2 d5 48 dc b4 f4 c0 1d fe ff[ ]*vaesenc zmm6,zmm5,ZMMWORD PTR \[esp\+esi\*8-0x1e240\]
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[ ]*[a-f0-9]+:[ ]*62 f2 d5 48 dc b2 c0 1f 00 00[ ]*vaesenc zmm6,zmm5,ZMMWORD PTR \[edx\+0x1fc0\]
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[ ]*[a-f0-9]+:[ ]*62 f2 d5 48 dd f4[ ]*vaesenclast zmm6,zmm5,zmm4
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[ ]*[a-f0-9]+:[ ]*62 f2 d5 48 dd b4 f4 c0 1d fe ff[ ]*vaesenclast zmm6,zmm5,ZMMWORD PTR \[esp\+esi\*8-0x1e240\]
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[ ]*[a-f0-9]+:[ ]*62 f2 d5 48 dd b2 c0 1f 00 00[ ]*vaesenclast zmm6,zmm5,ZMMWORD PTR \[edx\+0x1fc0\]
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[ ]*[a-f0-9]+:[ ]*62 f2 d5 48 de f4[ ]*vaesdec zmm6,zmm5,zmm4
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[ ]*[a-f0-9]+:[ ]*62 f2 d5 48 de b4 f4 c0 1d fe ff[ ]*vaesdec zmm6,zmm5,ZMMWORD PTR \[esp\+esi\*8-0x1e240\]
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[ ]*[a-f0-9]+:[ ]*62 f2 d5 48 de b2 c0 1f 00 00[ ]*vaesdec zmm6,zmm5,ZMMWORD PTR \[edx\+0x1fc0\]
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[ ]*[a-f0-9]+:[ ]*62 f2 d5 48 df f4[ ]*vaesdeclast zmm6,zmm5,zmm4
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[ ]*[a-f0-9]+:[ ]*62 f2 d5 48 df b4 f4 c0 1d fe ff[ ]*vaesdeclast zmm6,zmm5,ZMMWORD PTR \[esp\+esi\*8-0x1e240\]
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[ ]*[a-f0-9]+:[ ]*62 f2 d5 48 df b2 c0 1f 00 00[ ]*vaesdeclast zmm6,zmm5,ZMMWORD PTR \[edx\+0x1fc0\]
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[ ]*[a-f0-9]+:[ ]*62 f2 d5 48 dc f4[ ]*vaesenc zmm6,zmm5,zmm4
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[ ]*[a-f0-9]+:[ ]*62 f2 d5 48 dc b4 f4 c0 1d fe ff[ ]*vaesenc zmm6,zmm5,ZMMWORD PTR \[esp\+esi\*8-0x1e240\]
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[ ]*[a-f0-9]+:[ ]*62 f2 d5 48 dc b2 c0 1f 00 00[ ]*vaesenc zmm6,zmm5,ZMMWORD PTR \[edx\+0x1fc0\]
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[ ]*[a-f0-9]+:[ ]*62 f2 d5 48 dd f4[ ]*vaesenclast zmm6,zmm5,zmm4
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[ ]*[a-f0-9]+:[ ]*62 f2 d5 48 dd b4 f4 c0 1d fe ff[ ]*vaesenclast zmm6,zmm5,ZMMWORD PTR \[esp\+esi\*8-0x1e240\]
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[ ]*[a-f0-9]+:[ ]*62 f2 d5 48 dd b2 c0 1f 00 00[ ]*vaesenclast zmm6,zmm5,ZMMWORD PTR \[edx\+0x1fc0\]
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#pass
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36
gas/testsuite/gas/i386/avx512f_vaes-wig1.d
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36
gas/testsuite/gas/i386/avx512f_vaes-wig1.d
Normal file
@ -0,0 +1,36 @@
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#as: -mevexwig=1
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#objdump: -dw
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#name: i386 AVX512F/VAES wig insns
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#source: avx512f_vaes-wig.s
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.*: +file format .*
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Disassembly of section \.text:
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00000000 <_start>:
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[ ]*[a-f0-9]+:[ ]*62 f2 d5 48 de f4[ ]*vaesdec %zmm4,%zmm5,%zmm6
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[ ]*[a-f0-9]+:[ ]*62 f2 d5 48 de b4 f4 c0 1d fe ff[ ]*vaesdec -0x1e240\(%esp,%esi,8\),%zmm5,%zmm6
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[ ]*[a-f0-9]+:[ ]*62 f2 d5 48 de b2 c0 1f 00 00[ ]*vaesdec 0x1fc0\(%edx\),%zmm5,%zmm6
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[ ]*[a-f0-9]+:[ ]*62 f2 d5 48 df f4[ ]*vaesdeclast %zmm4,%zmm5,%zmm6
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[ ]*[a-f0-9]+:[ ]*62 f2 d5 48 df b4 f4 c0 1d fe ff[ ]*vaesdeclast -0x1e240\(%esp,%esi,8\),%zmm5,%zmm6
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[ ]*[a-f0-9]+:[ ]*62 f2 d5 48 df b2 c0 1f 00 00[ ]*vaesdeclast 0x1fc0\(%edx\),%zmm5,%zmm6
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[ ]*[a-f0-9]+:[ ]*62 f2 d5 48 dc f4[ ]*vaesenc %zmm4,%zmm5,%zmm6
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[ ]*[a-f0-9]+:[ ]*62 f2 d5 48 dc b4 f4 c0 1d fe ff[ ]*vaesenc -0x1e240\(%esp,%esi,8\),%zmm5,%zmm6
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[ ]*[a-f0-9]+:[ ]*62 f2 d5 48 dc b2 c0 1f 00 00[ ]*vaesenc 0x1fc0\(%edx\),%zmm5,%zmm6
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[ ]*[a-f0-9]+:[ ]*62 f2 d5 48 dd f4[ ]*vaesenclast %zmm4,%zmm5,%zmm6
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[ ]*[a-f0-9]+:[ ]*62 f2 d5 48 dd b4 f4 c0 1d fe ff[ ]*vaesenclast -0x1e240\(%esp,%esi,8\),%zmm5,%zmm6
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[ ]*[a-f0-9]+:[ ]*62 f2 d5 48 dd b2 c0 1f 00 00[ ]*vaesenclast 0x1fc0\(%edx\),%zmm5,%zmm6
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[ ]*[a-f0-9]+:[ ]*62 f2 d5 48 de f4[ ]*vaesdec %zmm4,%zmm5,%zmm6
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[ ]*[a-f0-9]+:[ ]*62 f2 d5 48 de b4 f4 c0 1d fe ff[ ]*vaesdec -0x1e240\(%esp,%esi,8\),%zmm5,%zmm6
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[ ]*[a-f0-9]+:[ ]*62 f2 d5 48 de b2 c0 1f 00 00[ ]*vaesdec 0x1fc0\(%edx\),%zmm5,%zmm6
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[ ]*[a-f0-9]+:[ ]*62 f2 d5 48 df f4[ ]*vaesdeclast %zmm4,%zmm5,%zmm6
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[ ]*[a-f0-9]+:[ ]*62 f2 d5 48 df b4 f4 c0 1d fe ff[ ]*vaesdeclast -0x1e240\(%esp,%esi,8\),%zmm5,%zmm6
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[ ]*[a-f0-9]+:[ ]*62 f2 d5 48 df b2 c0 1f 00 00[ ]*vaesdeclast 0x1fc0\(%edx\),%zmm5,%zmm6
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[ ]*[a-f0-9]+:[ ]*62 f2 d5 48 dc f4[ ]*vaesenc %zmm4,%zmm5,%zmm6
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[ ]*[a-f0-9]+:[ ]*62 f2 d5 48 dc b4 f4 c0 1d fe ff[ ]*vaesenc -0x1e240\(%esp,%esi,8\),%zmm5,%zmm6
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[ ]*[a-f0-9]+:[ ]*62 f2 d5 48 dc b2 c0 1f 00 00[ ]*vaesenc 0x1fc0\(%edx\),%zmm5,%zmm6
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[ ]*[a-f0-9]+:[ ]*62 f2 d5 48 dd f4[ ]*vaesenclast %zmm4,%zmm5,%zmm6
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[ ]*[a-f0-9]+:[ ]*62 f2 d5 48 dd b4 f4 c0 1d fe ff[ ]*vaesenclast -0x1e240\(%esp,%esi,8\),%zmm5,%zmm6
|
||||
[ ]*[a-f0-9]+:[ ]*62 f2 d5 48 dd b2 c0 1f 00 00[ ]*vaesenclast 0x1fc0\(%edx\),%zmm5,%zmm6
|
||||
#pass
|
||||
36
gas/testsuite/gas/i386/avx512f_vaes.d
Normal file
36
gas/testsuite/gas/i386/avx512f_vaes.d
Normal file
@ -0,0 +1,36 @@
|
||||
#as:
|
||||
#objdump: -dw
|
||||
#name: i386 AVX512F/VAES insns
|
||||
#source: avx512f_vaes.s
|
||||
|
||||
.*: +file format .*
|
||||
|
||||
|
||||
Disassembly of section \.text:
|
||||
|
||||
00000000 <_start>:
|
||||
[ ]*[a-f0-9]+:[ ]*62 f2 55 48 de f4[ ]*vaesdec %zmm4,%zmm5,%zmm6
|
||||
[ ]*[a-f0-9]+:[ ]*62 f2 55 48 de b4 f4 c0 1d fe ff[ ]*vaesdec -0x1e240\(%esp,%esi,8\),%zmm5,%zmm6
|
||||
[ ]*[a-f0-9]+:[ ]*62 f2 55 48 de b2 c0 1f 00 00[ ]*vaesdec 0x1fc0\(%edx\),%zmm5,%zmm6
|
||||
[ ]*[a-f0-9]+:[ ]*62 f2 55 48 df f4[ ]*vaesdeclast %zmm4,%zmm5,%zmm6
|
||||
[ ]*[a-f0-9]+:[ ]*62 f2 55 48 df b4 f4 c0 1d fe ff[ ]*vaesdeclast -0x1e240\(%esp,%esi,8\),%zmm5,%zmm6
|
||||
[ ]*[a-f0-9]+:[ ]*62 f2 55 48 df b2 c0 1f 00 00[ ]*vaesdeclast 0x1fc0\(%edx\),%zmm5,%zmm6
|
||||
[ ]*[a-f0-9]+:[ ]*62 f2 55 48 dc f4[ ]*vaesenc %zmm4,%zmm5,%zmm6
|
||||
[ ]*[a-f0-9]+:[ ]*62 f2 55 48 dc b4 f4 c0 1d fe ff[ ]*vaesenc -0x1e240\(%esp,%esi,8\),%zmm5,%zmm6
|
||||
[ ]*[a-f0-9]+:[ ]*62 f2 55 48 dc b2 c0 1f 00 00[ ]*vaesenc 0x1fc0\(%edx\),%zmm5,%zmm6
|
||||
[ ]*[a-f0-9]+:[ ]*62 f2 55 48 dd f4[ ]*vaesenclast %zmm4,%zmm5,%zmm6
|
||||
[ ]*[a-f0-9]+:[ ]*62 f2 55 48 dd b4 f4 c0 1d fe ff[ ]*vaesenclast -0x1e240\(%esp,%esi,8\),%zmm5,%zmm6
|
||||
[ ]*[a-f0-9]+:[ ]*62 f2 55 48 dd b2 c0 1f 00 00[ ]*vaesenclast 0x1fc0\(%edx\),%zmm5,%zmm6
|
||||
[ ]*[a-f0-9]+:[ ]*62 f2 55 48 de f4[ ]*vaesdec %zmm4,%zmm5,%zmm6
|
||||
[ ]*[a-f0-9]+:[ ]*62 f2 55 48 de b4 f4 c0 1d fe ff[ ]*vaesdec -0x1e240\(%esp,%esi,8\),%zmm5,%zmm6
|
||||
[ ]*[a-f0-9]+:[ ]*62 f2 55 48 de b2 c0 1f 00 00[ ]*vaesdec 0x1fc0\(%edx\),%zmm5,%zmm6
|
||||
[ ]*[a-f0-9]+:[ ]*62 f2 55 48 df f4[ ]*vaesdeclast %zmm4,%zmm5,%zmm6
|
||||
[ ]*[a-f0-9]+:[ ]*62 f2 55 48 df b4 f4 c0 1d fe ff[ ]*vaesdeclast -0x1e240\(%esp,%esi,8\),%zmm5,%zmm6
|
||||
[ ]*[a-f0-9]+:[ ]*62 f2 55 48 df b2 c0 1f 00 00[ ]*vaesdeclast 0x1fc0\(%edx\),%zmm5,%zmm6
|
||||
[ ]*[a-f0-9]+:[ ]*62 f2 55 48 dc f4[ ]*vaesenc %zmm4,%zmm5,%zmm6
|
||||
[ ]*[a-f0-9]+:[ ]*62 f2 55 48 dc b4 f4 c0 1d fe ff[ ]*vaesenc -0x1e240\(%esp,%esi,8\),%zmm5,%zmm6
|
||||
[ ]*[a-f0-9]+:[ ]*62 f2 55 48 dc b2 c0 1f 00 00[ ]*vaesenc 0x1fc0\(%edx\),%zmm5,%zmm6
|
||||
[ ]*[a-f0-9]+:[ ]*62 f2 55 48 dd f4[ ]*vaesenclast %zmm4,%zmm5,%zmm6
|
||||
[ ]*[a-f0-9]+:[ ]*62 f2 55 48 dd b4 f4 c0 1d fe ff[ ]*vaesenclast -0x1e240\(%esp,%esi,8\),%zmm5,%zmm6
|
||||
[ ]*[a-f0-9]+:[ ]*62 f2 55 48 dd b2 c0 1f 00 00[ ]*vaesenclast 0x1fc0\(%edx\),%zmm5,%zmm6
|
||||
#pass
|
||||
37
gas/testsuite/gas/i386/avx512f_vaes.s
Normal file
37
gas/testsuite/gas/i386/avx512f_vaes.s
Normal file
@ -0,0 +1,37 @@
|
||||
# Check 32bit AVX512F,VAES instructions
|
||||
|
||||
.allow_index_reg
|
||||
.text
|
||||
_start:
|
||||
vaesdec %zmm4, %zmm5, %zmm6 # AVX512F,VAES
|
||||
vaesdec -123456(%esp,%esi,8), %zmm5, %zmm6 # AVX512F,VAES
|
||||
vaesdec 8128(%edx), %zmm5, %zmm6 # AVX512F,VAES Disp8
|
||||
|
||||
vaesdeclast %zmm4, %zmm5, %zmm6 # AVX512F,VAES
|
||||
vaesdeclast -123456(%esp,%esi,8), %zmm5, %zmm6 # AVX512F,VAES
|
||||
vaesdeclast 8128(%edx), %zmm5, %zmm6 # AVX512F,VAES Disp8
|
||||
|
||||
vaesenc %zmm4, %zmm5, %zmm6 # AVX512F,VAES
|
||||
vaesenc -123456(%esp,%esi,8), %zmm5, %zmm6 # AVX512F,VAES
|
||||
vaesenc 8128(%edx), %zmm5, %zmm6 # AVX512F,VAES Disp8
|
||||
|
||||
vaesenclast %zmm4, %zmm5, %zmm6 # AVX512F,VAES
|
||||
vaesenclast -123456(%esp,%esi,8), %zmm5, %zmm6 # AVX512F,VAES
|
||||
vaesenclast 8128(%edx), %zmm5, %zmm6 # AVX512F,VAES Disp8
|
||||
|
||||
.intel_syntax noprefix
|
||||
vaesdec zmm6, zmm5, zmm4 # AVX512F,VAES
|
||||
vaesdec zmm6, zmm5, ZMMWORD PTR [esp+esi*8-123456] # AVX512F,VAES
|
||||
vaesdec zmm6, zmm5, ZMMWORD PTR [edx+8128] # AVX512F,VAES Disp8
|
||||
|
||||
vaesdeclast zmm6, zmm5, zmm4 # AVX512F,VAES
|
||||
vaesdeclast zmm6, zmm5, ZMMWORD PTR [esp+esi*8-123456] # AVX512F,VAES
|
||||
vaesdeclast zmm6, zmm5, ZMMWORD PTR [edx+8128] # AVX512F,VAES Disp8
|
||||
|
||||
vaesenc zmm6, zmm5, zmm4 # AVX512F,VAES
|
||||
vaesenc zmm6, zmm5, ZMMWORD PTR [esp+esi*8-123456] # AVX512F,VAES
|
||||
vaesenc zmm6, zmm5, ZMMWORD PTR [edx+8128] # AVX512F,VAES Disp8
|
||||
|
||||
vaesenclast zmm6, zmm5, zmm4 # AVX512F,VAES
|
||||
vaesenclast zmm6, zmm5, ZMMWORD PTR [esp+esi*8-123456] # AVX512F,VAES
|
||||
vaesenclast zmm6, zmm5, ZMMWORD PTR [edx+8128] # AVX512F,VAES Disp8
|
||||
108
gas/testsuite/gas/i386/avx512vl_vaes-intel.d
Normal file
108
gas/testsuite/gas/i386/avx512vl_vaes-intel.d
Normal file
@ -0,0 +1,108 @@
|
||||
#as:
|
||||
#objdump: -dw -Mintel
|
||||
#name: i386 AVX512VL/VAES insns (Intel disassembly)
|
||||
#source: avx512vl_vaes.s
|
||||
|
||||
.*: +file format .*
|
||||
|
||||
|
||||
Disassembly of section \.text:
|
||||
|
||||
00000000 <_start>:
|
||||
[ ]*[a-f0-9]+:[ ]*c4 e2 51 de f4[ ]*vaesdec xmm6,xmm5,xmm4
|
||||
[ ]*[a-f0-9]+:[ ]*c4 e2 51 de b4 f4 c0 1d fe ff[ ]*vaesdec xmm6,xmm5,XMMWORD PTR \[esp\+esi\*8-0x1e240\]
|
||||
[ ]*[a-f0-9]+:[ ]*c4 e2 51 de b2 f0 07 00 00[ ]*vaesdec xmm6,xmm5,XMMWORD PTR \[edx\+0x7f0\]
|
||||
[ ]*[a-f0-9]+:[ ]*c4 e2 55 de f4[ ]*vaesdec ymm6,ymm5,ymm4
|
||||
[ ]*[a-f0-9]+:[ ]*c4 e2 55 de b4 f4 c0 1d fe ff[ ]*vaesdec ymm6,ymm5,YMMWORD PTR \[esp\+esi\*8-0x1e240\]
|
||||
[ ]*[a-f0-9]+:[ ]*c4 e2 55 de b2 e0 0f 00 00[ ]*vaesdec ymm6,ymm5,YMMWORD PTR \[edx\+0xfe0\]
|
||||
[ ]*[a-f0-9]+:[ ]*c4 e2 51 df f4[ ]*vaesdeclast xmm6,xmm5,xmm4
|
||||
[ ]*[a-f0-9]+:[ ]*c4 e2 51 df b4 f4 c0 1d fe ff[ ]*vaesdeclast xmm6,xmm5,XMMWORD PTR \[esp\+esi\*8-0x1e240\]
|
||||
[ ]*[a-f0-9]+:[ ]*c4 e2 51 df b2 f0 07 00 00[ ]*vaesdeclast xmm6,xmm5,XMMWORD PTR \[edx\+0x7f0\]
|
||||
[ ]*[a-f0-9]+:[ ]*c4 e2 55 df f4[ ]*vaesdeclast ymm6,ymm5,ymm4
|
||||
[ ]*[a-f0-9]+:[ ]*c4 e2 55 df b4 f4 c0 1d fe ff[ ]*vaesdeclast ymm6,ymm5,YMMWORD PTR \[esp\+esi\*8-0x1e240\]
|
||||
[ ]*[a-f0-9]+:[ ]*c4 e2 55 df b2 e0 0f 00 00[ ]*vaesdeclast ymm6,ymm5,YMMWORD PTR \[edx\+0xfe0\]
|
||||
[ ]*[a-f0-9]+:[ ]*c4 e2 51 dc f4[ ]*vaesenc xmm6,xmm5,xmm4
|
||||
[ ]*[a-f0-9]+:[ ]*c4 e2 51 dc b4 f4 c0 1d fe ff[ ]*vaesenc xmm6,xmm5,XMMWORD PTR \[esp\+esi\*8-0x1e240\]
|
||||
[ ]*[a-f0-9]+:[ ]*c4 e2 51 dc b2 f0 07 00 00[ ]*vaesenc xmm6,xmm5,XMMWORD PTR \[edx\+0x7f0\]
|
||||
[ ]*[a-f0-9]+:[ ]*c4 e2 55 dc f4[ ]*vaesenc ymm6,ymm5,ymm4
|
||||
[ ]*[a-f0-9]+:[ ]*c4 e2 55 dc b4 f4 c0 1d fe ff[ ]*vaesenc ymm6,ymm5,YMMWORD PTR \[esp\+esi\*8-0x1e240\]
|
||||
[ ]*[a-f0-9]+:[ ]*c4 e2 55 dc b2 e0 0f 00 00[ ]*vaesenc ymm6,ymm5,YMMWORD PTR \[edx\+0xfe0\]
|
||||
[ ]*[a-f0-9]+:[ ]*c4 e2 51 dd f4[ ]*vaesenclast xmm6,xmm5,xmm4
|
||||
[ ]*[a-f0-9]+:[ ]*c4 e2 51 dd b4 f4 c0 1d fe ff[ ]*vaesenclast xmm6,xmm5,XMMWORD PTR \[esp\+esi\*8-0x1e240\]
|
||||
[ ]*[a-f0-9]+:[ ]*c4 e2 51 dd b2 f0 07 00 00[ ]*vaesenclast xmm6,xmm5,XMMWORD PTR \[edx\+0x7f0\]
|
||||
[ ]*[a-f0-9]+:[ ]*c4 e2 55 dd f4[ ]*vaesenclast ymm6,ymm5,ymm4
|
||||
[ ]*[a-f0-9]+:[ ]*c4 e2 55 dd b4 f4 c0 1d fe ff[ ]*vaesenclast ymm6,ymm5,YMMWORD PTR \[esp\+esi\*8-0x1e240\]
|
||||
[ ]*[a-f0-9]+:[ ]*c4 e2 55 dd b2 e0 0f 00 00[ ]*vaesenclast ymm6,ymm5,YMMWORD PTR \[edx\+0xfe0\]
|
||||
[ ]*[a-f0-9]+:[ ]*62 f2 55 08 de f4[ ]*vaesdec xmm6,xmm5,xmm4
|
||||
[ ]*[a-f0-9]+:[ ]*62 f2 55 08 de b4 f4 c0 1d fe ff[ ]*vaesdec xmm6,xmm5,XMMWORD PTR \[esp\+esi\*8-0x1e240\]
|
||||
[ ]*[a-f0-9]+:[ ]*62 f2 55 08 de b2 f0 07 00 00[ ]*vaesdec xmm6,xmm5,XMMWORD PTR \[edx\+0x7f0\]
|
||||
[ ]*[a-f0-9]+:[ ]*62 f2 55 28 de f4[ ]*vaesdec ymm6,ymm5,ymm4
|
||||
[ ]*[a-f0-9]+:[ ]*62 f2 55 28 de b4 f4 c0 1d fe ff[ ]*vaesdec ymm6,ymm5,YMMWORD PTR \[esp\+esi\*8-0x1e240\]
|
||||
[ ]*[a-f0-9]+:[ ]*62 f2 55 28 de b2 e0 0f 00 00[ ]*vaesdec ymm6,ymm5,YMMWORD PTR \[edx\+0xfe0\]
|
||||
[ ]*[a-f0-9]+:[ ]*62 f2 55 08 df f4[ ]*vaesdeclast xmm6,xmm5,xmm4
|
||||
[ ]*[a-f0-9]+:[ ]*62 f2 55 08 df b4 f4 c0 1d fe ff[ ]*vaesdeclast xmm6,xmm5,XMMWORD PTR \[esp\+esi\*8-0x1e240\]
|
||||
[ ]*[a-f0-9]+:[ ]*62 f2 55 08 df b2 f0 07 00 00[ ]*vaesdeclast xmm6,xmm5,XMMWORD PTR \[edx\+0x7f0\]
|
||||
[ ]*[a-f0-9]+:[ ]*62 f2 55 28 df f4[ ]*vaesdeclast ymm6,ymm5,ymm4
|
||||
[ ]*[a-f0-9]+:[ ]*62 f2 55 28 df b4 f4 c0 1d fe ff[ ]*vaesdeclast ymm6,ymm5,YMMWORD PTR \[esp\+esi\*8-0x1e240\]
|
||||
[ ]*[a-f0-9]+:[ ]*62 f2 55 28 df b2 e0 0f 00 00[ ]*vaesdeclast ymm6,ymm5,YMMWORD PTR \[edx\+0xfe0\]
|
||||
[ ]*[a-f0-9]+:[ ]*62 f2 55 08 dc f4[ ]*vaesenc xmm6,xmm5,xmm4
|
||||
[ ]*[a-f0-9]+:[ ]*62 f2 55 08 dc b4 f4 c0 1d fe ff[ ]*vaesenc xmm6,xmm5,XMMWORD PTR \[esp\+esi\*8-0x1e240\]
|
||||
[ ]*[a-f0-9]+:[ ]*62 f2 55 08 dc b2 f0 07 00 00[ ]*vaesenc xmm6,xmm5,XMMWORD PTR \[edx\+0x7f0\]
|
||||
[ ]*[a-f0-9]+:[ ]*62 f2 55 28 dc f4[ ]*vaesenc ymm6,ymm5,ymm4
|
||||
[ ]*[a-f0-9]+:[ ]*62 f2 55 28 dc b4 f4 c0 1d fe ff[ ]*vaesenc ymm6,ymm5,YMMWORD PTR \[esp\+esi\*8-0x1e240\]
|
||||
[ ]*[a-f0-9]+:[ ]*62 f2 55 28 dc b2 e0 0f 00 00[ ]*vaesenc ymm6,ymm5,YMMWORD PTR \[edx\+0xfe0\]
|
||||
[ ]*[a-f0-9]+:[ ]*62 f2 55 08 dd f4[ ]*vaesenclast xmm6,xmm5,xmm4
|
||||
[ ]*[a-f0-9]+:[ ]*62 f2 55 08 dd b4 f4 c0 1d fe ff[ ]*vaesenclast xmm6,xmm5,XMMWORD PTR \[esp\+esi\*8-0x1e240\]
|
||||
[ ]*[a-f0-9]+:[ ]*62 f2 55 08 dd b2 f0 07 00 00[ ]*vaesenclast xmm6,xmm5,XMMWORD PTR \[edx\+0x7f0\]
|
||||
[ ]*[a-f0-9]+:[ ]*62 f2 55 28 dd f4[ ]*vaesenclast ymm6,ymm5,ymm4
|
||||
[ ]*[a-f0-9]+:[ ]*62 f2 55 28 dd b4 f4 c0 1d fe ff[ ]*vaesenclast ymm6,ymm5,YMMWORD PTR \[esp\+esi\*8-0x1e240\]
|
||||
[ ]*[a-f0-9]+:[ ]*62 f2 55 28 dd b2 e0 0f 00 00[ ]*vaesenclast ymm6,ymm5,YMMWORD PTR \[edx\+0xfe0\]
|
||||
[ ]*[a-f0-9]+:[ ]*c4 e2 51 de f4[ ]*vaesdec xmm6,xmm5,xmm4
|
||||
[ ]*[a-f0-9]+:[ ]*c4 e2 51 de b4 f4 c0 1d fe ff[ ]*vaesdec xmm6,xmm5,XMMWORD PTR \[esp\+esi\*8-0x1e240\]
|
||||
[ ]*[a-f0-9]+:[ ]*c4 e2 51 de b2 f0 07 00 00[ ]*vaesdec xmm6,xmm5,XMMWORD PTR \[edx\+0x7f0\]
|
||||
[ ]*[a-f0-9]+:[ ]*c4 e2 55 de f4[ ]*vaesdec ymm6,ymm5,ymm4
|
||||
[ ]*[a-f0-9]+:[ ]*c4 e2 55 de b4 f4 c0 1d fe ff[ ]*vaesdec ymm6,ymm5,YMMWORD PTR \[esp\+esi\*8-0x1e240\]
|
||||
[ ]*[a-f0-9]+:[ ]*c4 e2 55 de b2 e0 0f 00 00[ ]*vaesdec ymm6,ymm5,YMMWORD PTR \[edx\+0xfe0\]
|
||||
[ ]*[a-f0-9]+:[ ]*c4 e2 51 df f4[ ]*vaesdeclast xmm6,xmm5,xmm4
|
||||
[ ]*[a-f0-9]+:[ ]*c4 e2 51 df b4 f4 c0 1d fe ff[ ]*vaesdeclast xmm6,xmm5,XMMWORD PTR \[esp\+esi\*8-0x1e240\]
|
||||
[ ]*[a-f0-9]+:[ ]*c4 e2 51 df b2 f0 07 00 00[ ]*vaesdeclast xmm6,xmm5,XMMWORD PTR \[edx\+0x7f0\]
|
||||
[ ]*[a-f0-9]+:[ ]*c4 e2 55 df f4[ ]*vaesdeclast ymm6,ymm5,ymm4
|
||||
[ ]*[a-f0-9]+:[ ]*c4 e2 55 df b4 f4 c0 1d fe ff[ ]*vaesdeclast ymm6,ymm5,YMMWORD PTR \[esp\+esi\*8-0x1e240\]
|
||||
[ ]*[a-f0-9]+:[ ]*c4 e2 55 df b2 e0 0f 00 00[ ]*vaesdeclast ymm6,ymm5,YMMWORD PTR \[edx\+0xfe0\]
|
||||
[ ]*[a-f0-9]+:[ ]*c4 e2 51 dc f4[ ]*vaesenc xmm6,xmm5,xmm4
|
||||
[ ]*[a-f0-9]+:[ ]*c4 e2 51 dc b4 f4 c0 1d fe ff[ ]*vaesenc xmm6,xmm5,XMMWORD PTR \[esp\+esi\*8-0x1e240\]
|
||||
[ ]*[a-f0-9]+:[ ]*c4 e2 51 dc b2 f0 07 00 00[ ]*vaesenc xmm6,xmm5,XMMWORD PTR \[edx\+0x7f0\]
|
||||
[ ]*[a-f0-9]+:[ ]*c4 e2 55 dc f4[ ]*vaesenc ymm6,ymm5,ymm4
|
||||
[ ]*[a-f0-9]+:[ ]*c4 e2 55 dc b4 f4 c0 1d fe ff[ ]*vaesenc ymm6,ymm5,YMMWORD PTR \[esp\+esi\*8-0x1e240\]
|
||||
[ ]*[a-f0-9]+:[ ]*c4 e2 55 dc b2 e0 0f 00 00[ ]*vaesenc ymm6,ymm5,YMMWORD PTR \[edx\+0xfe0\]
|
||||
[ ]*[a-f0-9]+:[ ]*c4 e2 51 dd f4[ ]*vaesenclast xmm6,xmm5,xmm4
|
||||
[ ]*[a-f0-9]+:[ ]*c4 e2 51 dd b4 f4 c0 1d fe ff[ ]*vaesenclast xmm6,xmm5,XMMWORD PTR \[esp\+esi\*8-0x1e240\]
|
||||
[ ]*[a-f0-9]+:[ ]*c4 e2 51 dd b2 f0 07 00 00[ ]*vaesenclast xmm6,xmm5,XMMWORD PTR \[edx\+0x7f0\]
|
||||
[ ]*[a-f0-9]+:[ ]*c4 e2 55 dd f4[ ]*vaesenclast ymm6,ymm5,ymm4
|
||||
[ ]*[a-f0-9]+:[ ]*c4 e2 55 dd b4 f4 c0 1d fe ff[ ]*vaesenclast ymm6,ymm5,YMMWORD PTR \[esp\+esi\*8-0x1e240\]
|
||||
[ ]*[a-f0-9]+:[ ]*c4 e2 55 dd b2 e0 0f 00 00[ ]*vaesenclast ymm6,ymm5,YMMWORD PTR \[edx\+0xfe0\]
|
||||
[ ]*[a-f0-9]+:[ ]*62 f2 55 08 de f4[ ]*vaesdec xmm6,xmm5,xmm4
|
||||
[ ]*[a-f0-9]+:[ ]*62 f2 55 08 de b4 f4 c0 1d fe ff[ ]*vaesdec xmm6,xmm5,XMMWORD PTR \[esp\+esi\*8-0x1e240\]
|
||||
[ ]*[a-f0-9]+:[ ]*62 f2 55 08 de b2 f0 07 00 00[ ]*vaesdec xmm6,xmm5,XMMWORD PTR \[edx\+0x7f0\]
|
||||
[ ]*[a-f0-9]+:[ ]*62 f2 55 28 de f4[ ]*vaesdec ymm6,ymm5,ymm4
|
||||
[ ]*[a-f0-9]+:[ ]*62 f2 55 28 de b4 f4 c0 1d fe ff[ ]*vaesdec ymm6,ymm5,YMMWORD PTR \[esp\+esi\*8-0x1e240\]
|
||||
[ ]*[a-f0-9]+:[ ]*62 f2 55 28 de b2 e0 0f 00 00[ ]*vaesdec ymm6,ymm5,YMMWORD PTR \[edx\+0xfe0\]
|
||||
[ ]*[a-f0-9]+:[ ]*62 f2 55 08 df f4[ ]*vaesdeclast xmm6,xmm5,xmm4
|
||||
[ ]*[a-f0-9]+:[ ]*62 f2 55 08 df b4 f4 c0 1d fe ff[ ]*vaesdeclast xmm6,xmm5,XMMWORD PTR \[esp\+esi\*8-0x1e240\]
|
||||
[ ]*[a-f0-9]+:[ ]*62 f2 55 08 df b2 f0 07 00 00[ ]*vaesdeclast xmm6,xmm5,XMMWORD PTR \[edx\+0x7f0\]
|
||||
[ ]*[a-f0-9]+:[ ]*62 f2 55 28 df f4[ ]*vaesdeclast ymm6,ymm5,ymm4
|
||||
[ ]*[a-f0-9]+:[ ]*62 f2 55 28 df b4 f4 c0 1d fe ff[ ]*vaesdeclast ymm6,ymm5,YMMWORD PTR \[esp\+esi\*8-0x1e240\]
|
||||
[ ]*[a-f0-9]+:[ ]*62 f2 55 28 df b2 e0 0f 00 00[ ]*vaesdeclast ymm6,ymm5,YMMWORD PTR \[edx\+0xfe0\]
|
||||
[ ]*[a-f0-9]+:[ ]*62 f2 55 08 dc f4[ ]*vaesenc xmm6,xmm5,xmm4
|
||||
[ ]*[a-f0-9]+:[ ]*62 f2 55 08 dc b4 f4 c0 1d fe ff[ ]*vaesenc xmm6,xmm5,XMMWORD PTR \[esp\+esi\*8-0x1e240\]
|
||||
[ ]*[a-f0-9]+:[ ]*62 f2 55 08 dc b2 f0 07 00 00[ ]*vaesenc xmm6,xmm5,XMMWORD PTR \[edx\+0x7f0\]
|
||||
[ ]*[a-f0-9]+:[ ]*62 f2 55 28 dc f4[ ]*vaesenc ymm6,ymm5,ymm4
|
||||
[ ]*[a-f0-9]+:[ ]*62 f2 55 28 dc b4 f4 c0 1d fe ff[ ]*vaesenc ymm6,ymm5,YMMWORD PTR \[esp\+esi\*8-0x1e240\]
|
||||
[ ]*[a-f0-9]+:[ ]*62 f2 55 28 dc b2 e0 0f 00 00[ ]*vaesenc ymm6,ymm5,YMMWORD PTR \[edx\+0xfe0\]
|
||||
[ ]*[a-f0-9]+:[ ]*62 f2 55 08 dd f4[ ]*vaesenclast xmm6,xmm5,xmm4
|
||||
[ ]*[a-f0-9]+:[ ]*62 f2 55 08 dd b4 f4 c0 1d fe ff[ ]*vaesenclast xmm6,xmm5,XMMWORD PTR \[esp\+esi\*8-0x1e240\]
|
||||
[ ]*[a-f0-9]+:[ ]*62 f2 55 08 dd b2 f0 07 00 00[ ]*vaesenclast xmm6,xmm5,XMMWORD PTR \[edx\+0x7f0\]
|
||||
[ ]*[a-f0-9]+:[ ]*62 f2 55 28 dd f4[ ]*vaesenclast ymm6,ymm5,ymm4
|
||||
[ ]*[a-f0-9]+:[ ]*62 f2 55 28 dd b4 f4 c0 1d fe ff[ ]*vaesenclast ymm6,ymm5,YMMWORD PTR \[esp\+esi\*8-0x1e240\]
|
||||
[ ]*[a-f0-9]+:[ ]*62 f2 55 28 dd b2 e0 0f 00 00[ ]*vaesenclast ymm6,ymm5,YMMWORD PTR \[edx\+0xfe0\]
|
||||
#pass
|
||||
45
gas/testsuite/gas/i386/avx512vl_vaes-wig.s
Normal file
45
gas/testsuite/gas/i386/avx512vl_vaes-wig.s
Normal file
@ -0,0 +1,45 @@
|
||||
# Check 32bit AVX512VL,VAES WIG instructions
|
||||
|
||||
.allow_index_reg
|
||||
.text
|
||||
_start:
|
||||
vaesdec %xmm4, %xmm5, %xmm6 # AVX512VL,VAES
|
||||
vaesdec -123456(%esp,%esi,8), %xmm5, %xmm6 # AVX512VL,VAES
|
||||
vaesdec %ymm4, %ymm5, %ymm6 # AVX512VL,VAES
|
||||
vaesdec -123456(%esp,%esi,8), %ymm5, %ymm6 # AVX512VL,VAES
|
||||
|
||||
vaesdeclast %xmm4, %xmm5, %xmm6 # AVX512VL,VAES
|
||||
vaesdeclast -123456(%esp,%esi,8), %xmm5, %xmm6 # AVX512VL,VAES
|
||||
vaesdeclast %ymm4, %ymm5, %ymm6 # AVX512VL,VAES
|
||||
vaesdeclast -123456(%esp,%esi,8), %ymm5, %ymm6 # AVX512VL,VAES
|
||||
|
||||
vaesenc %xmm4, %xmm5, %xmm6 # AVX512VL,VAES
|
||||
vaesenc -123456(%esp,%esi,8), %xmm5, %xmm6 # AVX512VL,VAES
|
||||
vaesenc %ymm4, %ymm5, %ymm6 # AVX512VL,VAES
|
||||
vaesenc -123456(%esp,%esi,8), %ymm5, %ymm6 # AVX512VL,VAES
|
||||
|
||||
vaesenclast %xmm4, %xmm5, %xmm6 # AVX512VL,VAES
|
||||
vaesenclast -123456(%esp,%esi,8), %xmm5, %xmm6 # AVX512VL,VAES
|
||||
vaesenclast %ymm4, %ymm5, %ymm6 # AVX512VL,VAES
|
||||
vaesenclast -123456(%esp,%esi,8), %ymm5, %ymm6 # AVX512VL,VAES
|
||||
|
||||
.intel_syntax noprefix
|
||||
vaesdec xmm6, xmm5, xmm4 # AVX512VL,VAES
|
||||
vaesdec xmm6, xmm5, XMMWORD PTR [esp+esi*8-123456] # AVX512VL,VAES
|
||||
vaesdec ymm6, ymm5, ymm4 # AVX512VL,VAES
|
||||
vaesdec ymm6, ymm5, YMMWORD PTR [esp+esi*8-123456] # AVX512VL,VAES
|
||||
|
||||
vaesdeclast xmm6, xmm5, xmm4 # AVX512VL,VAES
|
||||
vaesdeclast xmm6, xmm5, XMMWORD PTR [esp+esi*8-123456] # AVX512VL,VAES
|
||||
vaesdeclast ymm6, ymm5, ymm4 # AVX512VL,VAES
|
||||
vaesdeclast ymm6, ymm5, YMMWORD PTR [esp+esi*8-123456] # AVX512VL,VAES
|
||||
|
||||
vaesenc xmm6, xmm5, xmm4 # AVX512VL,VAES
|
||||
vaesenc xmm6, xmm5, XMMWORD PTR [esp+esi*8-123456] # AVX512VL,VAES
|
||||
vaesenc ymm6, ymm5, ymm4 # AVX512VL,VAES
|
||||
vaesenc ymm6, ymm5, YMMWORD PTR [esp+esi*8-123456] # AVX512VL,VAES
|
||||
|
||||
vaesenclast xmm6, xmm5, xmm4 # AVX512VL,VAES
|
||||
vaesenclast xmm6, xmm5, XMMWORD PTR [esp+esi*8-123456] # AVX512VL,VAES
|
||||
vaesenclast ymm6, ymm5, ymm4 # AVX512VL,VAES
|
||||
vaesenclast ymm6, ymm5, YMMWORD PTR [esp+esi*8-123456] # AVX512VL,VAES
|
||||
44
gas/testsuite/gas/i386/avx512vl_vaes-wig1-intel.d
Normal file
44
gas/testsuite/gas/i386/avx512vl_vaes-wig1-intel.d
Normal file
@ -0,0 +1,44 @@
|
||||
#as: -mevexwig=1
|
||||
#objdump: -dw -Mintel
|
||||
#name: i386 AVX512VL/VAES wig insns (Intel disassembly)
|
||||
#source: avx512vl_vaes-wig.s
|
||||
|
||||
.*: +file format .*
|
||||
|
||||
|
||||
Disassembly of section \.text:
|
||||
|
||||
00000000 <_start>:
|
||||
[ ]*[a-f0-9]+:[ ]*c4 e2 51 de f4[ ]*vaesdec xmm6,xmm5,xmm4
|
||||
[ ]*[a-f0-9]+:[ ]*c4 e2 51 de b4 f4 c0 1d fe ff[ ]*vaesdec xmm6,xmm5,XMMWORD PTR \[esp\+esi\*8-0x1e240\]
|
||||
[ ]*[a-f0-9]+:[ ]*c4 e2 55 de f4[ ]*vaesdec ymm6,ymm5,ymm4
|
||||
[ ]*[a-f0-9]+:[ ]*c4 e2 55 de b4 f4 c0 1d fe ff[ ]*vaesdec ymm6,ymm5,YMMWORD PTR \[esp\+esi\*8-0x1e240\]
|
||||
[ ]*[a-f0-9]+:[ ]*c4 e2 51 df f4[ ]*vaesdeclast xmm6,xmm5,xmm4
|
||||
[ ]*[a-f0-9]+:[ ]*c4 e2 51 df b4 f4 c0 1d fe ff[ ]*vaesdeclast xmm6,xmm5,XMMWORD PTR \[esp\+esi\*8-0x1e240\]
|
||||
[ ]*[a-f0-9]+:[ ]*c4 e2 55 df f4[ ]*vaesdeclast ymm6,ymm5,ymm4
|
||||
[ ]*[a-f0-9]+:[ ]*c4 e2 55 df b4 f4 c0 1d fe ff[ ]*vaesdeclast ymm6,ymm5,YMMWORD PTR \[esp\+esi\*8-0x1e240\]
|
||||
[ ]*[a-f0-9]+:[ ]*c4 e2 51 dc f4[ ]*vaesenc xmm6,xmm5,xmm4
|
||||
[ ]*[a-f0-9]+:[ ]*c4 e2 51 dc b4 f4 c0 1d fe ff[ ]*vaesenc xmm6,xmm5,XMMWORD PTR \[esp\+esi\*8-0x1e240\]
|
||||
[ ]*[a-f0-9]+:[ ]*c4 e2 55 dc f4[ ]*vaesenc ymm6,ymm5,ymm4
|
||||
[ ]*[a-f0-9]+:[ ]*c4 e2 55 dc b4 f4 c0 1d fe ff[ ]*vaesenc ymm6,ymm5,YMMWORD PTR \[esp\+esi\*8-0x1e240\]
|
||||
[ ]*[a-f0-9]+:[ ]*c4 e2 51 dd f4[ ]*vaesenclast xmm6,xmm5,xmm4
|
||||
[ ]*[a-f0-9]+:[ ]*c4 e2 51 dd b4 f4 c0 1d fe ff[ ]*vaesenclast xmm6,xmm5,XMMWORD PTR \[esp\+esi\*8-0x1e240\]
|
||||
[ ]*[a-f0-9]+:[ ]*c4 e2 55 dd f4[ ]*vaesenclast ymm6,ymm5,ymm4
|
||||
[ ]*[a-f0-9]+:[ ]*c4 e2 55 dd b4 f4 c0 1d fe ff[ ]*vaesenclast ymm6,ymm5,YMMWORD PTR \[esp\+esi\*8-0x1e240\]
|
||||
[ ]*[a-f0-9]+:[ ]*c4 e2 51 de f4[ ]*vaesdec xmm6,xmm5,xmm4
|
||||
[ ]*[a-f0-9]+:[ ]*c4 e2 51 de b4 f4 c0 1d fe ff[ ]*vaesdec xmm6,xmm5,XMMWORD PTR \[esp\+esi\*8-0x1e240\]
|
||||
[ ]*[a-f0-9]+:[ ]*c4 e2 55 de f4[ ]*vaesdec ymm6,ymm5,ymm4
|
||||
[ ]*[a-f0-9]+:[ ]*c4 e2 55 de b4 f4 c0 1d fe ff[ ]*vaesdec ymm6,ymm5,YMMWORD PTR \[esp\+esi\*8-0x1e240\]
|
||||
[ ]*[a-f0-9]+:[ ]*c4 e2 51 df f4[ ]*vaesdeclast xmm6,xmm5,xmm4
|
||||
[ ]*[a-f0-9]+:[ ]*c4 e2 51 df b4 f4 c0 1d fe ff[ ]*vaesdeclast xmm6,xmm5,XMMWORD PTR \[esp\+esi\*8-0x1e240\]
|
||||
[ ]*[a-f0-9]+:[ ]*c4 e2 55 df f4[ ]*vaesdeclast ymm6,ymm5,ymm4
|
||||
[ ]*[a-f0-9]+:[ ]*c4 e2 55 df b4 f4 c0 1d fe ff[ ]*vaesdeclast ymm6,ymm5,YMMWORD PTR \[esp\+esi\*8-0x1e240\]
|
||||
[ ]*[a-f0-9]+:[ ]*c4 e2 51 dc f4[ ]*vaesenc xmm6,xmm5,xmm4
|
||||
[ ]*[a-f0-9]+:[ ]*c4 e2 51 dc b4 f4 c0 1d fe ff[ ]*vaesenc xmm6,xmm5,XMMWORD PTR \[esp\+esi\*8-0x1e240\]
|
||||
[ ]*[a-f0-9]+:[ ]*c4 e2 55 dc f4[ ]*vaesenc ymm6,ymm5,ymm4
|
||||
[ ]*[a-f0-9]+:[ ]*c4 e2 55 dc b4 f4 c0 1d fe ff[ ]*vaesenc ymm6,ymm5,YMMWORD PTR \[esp\+esi\*8-0x1e240\]
|
||||
[ ]*[a-f0-9]+:[ ]*c4 e2 51 dd f4[ ]*vaesenclast xmm6,xmm5,xmm4
|
||||
[ ]*[a-f0-9]+:[ ]*c4 e2 51 dd b4 f4 c0 1d fe ff[ ]*vaesenclast xmm6,xmm5,XMMWORD PTR \[esp\+esi\*8-0x1e240\]
|
||||
[ ]*[a-f0-9]+:[ ]*c4 e2 55 dd f4[ ]*vaesenclast ymm6,ymm5,ymm4
|
||||
[ ]*[a-f0-9]+:[ ]*c4 e2 55 dd b4 f4 c0 1d fe ff[ ]*vaesenclast ymm6,ymm5,YMMWORD PTR \[esp\+esi\*8-0x1e240\]
|
||||
#pass
|
||||
44
gas/testsuite/gas/i386/avx512vl_vaes-wig1.d
Normal file
44
gas/testsuite/gas/i386/avx512vl_vaes-wig1.d
Normal file
@ -0,0 +1,44 @@
|
||||
#as: -mevexwig=1
|
||||
#objdump: -dw
|
||||
#name: i386 AVX512VL/VAES wig insns
|
||||
#source: avx512vl_vaes-wig.s
|
||||
|
||||
.*: +file format .*
|
||||
|
||||
|
||||
Disassembly of section \.text:
|
||||
|
||||
00000000 <_start>:
|
||||
[ ]*[a-f0-9]+:[ ]*c4 e2 51 de f4[ ]*vaesdec %xmm4,%xmm5,%xmm6
|
||||
[ ]*[a-f0-9]+:[ ]*c4 e2 51 de b4 f4 c0 1d fe ff[ ]*vaesdec -0x1e240\(%esp,%esi,8\),%xmm5,%xmm6
|
||||
[ ]*[a-f0-9]+:[ ]*c4 e2 55 de f4[ ]*vaesdec %ymm4,%ymm5,%ymm6
|
||||
[ ]*[a-f0-9]+:[ ]*c4 e2 55 de b4 f4 c0 1d fe ff[ ]*vaesdec -0x1e240\(%esp,%esi,8\),%ymm5,%ymm6
|
||||
[ ]*[a-f0-9]+:[ ]*c4 e2 51 df f4[ ]*vaesdeclast %xmm4,%xmm5,%xmm6
|
||||
[ ]*[a-f0-9]+:[ ]*c4 e2 51 df b4 f4 c0 1d fe ff[ ]*vaesdeclast -0x1e240\(%esp,%esi,8\),%xmm5,%xmm6
|
||||
[ ]*[a-f0-9]+:[ ]*c4 e2 55 df f4[ ]*vaesdeclast %ymm4,%ymm5,%ymm6
|
||||
[ ]*[a-f0-9]+:[ ]*c4 e2 55 df b4 f4 c0 1d fe ff[ ]*vaesdeclast -0x1e240\(%esp,%esi,8\),%ymm5,%ymm6
|
||||
[ ]*[a-f0-9]+:[ ]*c4 e2 51 dc f4[ ]*vaesenc %xmm4,%xmm5,%xmm6
|
||||
[ ]*[a-f0-9]+:[ ]*c4 e2 51 dc b4 f4 c0 1d fe ff[ ]*vaesenc -0x1e240\(%esp,%esi,8\),%xmm5,%xmm6
|
||||
[ ]*[a-f0-9]+:[ ]*c4 e2 55 dc f4[ ]*vaesenc %ymm4,%ymm5,%ymm6
|
||||
[ ]*[a-f0-9]+:[ ]*c4 e2 55 dc b4 f4 c0 1d fe ff[ ]*vaesenc -0x1e240\(%esp,%esi,8\),%ymm5,%ymm6
|
||||
[ ]*[a-f0-9]+:[ ]*c4 e2 51 dd f4[ ]*vaesenclast %xmm4,%xmm5,%xmm6
|
||||
[ ]*[a-f0-9]+:[ ]*c4 e2 51 dd b4 f4 c0 1d fe ff[ ]*vaesenclast -0x1e240\(%esp,%esi,8\),%xmm5,%xmm6
|
||||
[ ]*[a-f0-9]+:[ ]*c4 e2 55 dd f4[ ]*vaesenclast %ymm4,%ymm5,%ymm6
|
||||
[ ]*[a-f0-9]+:[ ]*c4 e2 55 dd b4 f4 c0 1d fe ff[ ]*vaesenclast -0x1e240\(%esp,%esi,8\),%ymm5,%ymm6
|
||||
[ ]*[a-f0-9]+:[ ]*c4 e2 51 de f4[ ]*vaesdec %xmm4,%xmm5,%xmm6
|
||||
[ ]*[a-f0-9]+:[ ]*c4 e2 51 de b4 f4 c0 1d fe ff[ ]*vaesdec -0x1e240\(%esp,%esi,8\),%xmm5,%xmm6
|
||||
[ ]*[a-f0-9]+:[ ]*c4 e2 55 de f4[ ]*vaesdec %ymm4,%ymm5,%ymm6
|
||||
[ ]*[a-f0-9]+:[ ]*c4 e2 55 de b4 f4 c0 1d fe ff[ ]*vaesdec -0x1e240\(%esp,%esi,8\),%ymm5,%ymm6
|
||||
[ ]*[a-f0-9]+:[ ]*c4 e2 51 df f4[ ]*vaesdeclast %xmm4,%xmm5,%xmm6
|
||||
[ ]*[a-f0-9]+:[ ]*c4 e2 51 df b4 f4 c0 1d fe ff[ ]*vaesdeclast -0x1e240\(%esp,%esi,8\),%xmm5,%xmm6
|
||||
[ ]*[a-f0-9]+:[ ]*c4 e2 55 df f4[ ]*vaesdeclast %ymm4,%ymm5,%ymm6
|
||||
[ ]*[a-f0-9]+:[ ]*c4 e2 55 df b4 f4 c0 1d fe ff[ ]*vaesdeclast -0x1e240\(%esp,%esi,8\),%ymm5,%ymm6
|
||||
[ ]*[a-f0-9]+:[ ]*c4 e2 51 dc f4[ ]*vaesenc %xmm4,%xmm5,%xmm6
|
||||
[ ]*[a-f0-9]+:[ ]*c4 e2 51 dc b4 f4 c0 1d fe ff[ ]*vaesenc -0x1e240\(%esp,%esi,8\),%xmm5,%xmm6
|
||||
[ ]*[a-f0-9]+:[ ]*c4 e2 55 dc f4[ ]*vaesenc %ymm4,%ymm5,%ymm6
|
||||
[ ]*[a-f0-9]+:[ ]*c4 e2 55 dc b4 f4 c0 1d fe ff[ ]*vaesenc -0x1e240\(%esp,%esi,8\),%ymm5,%ymm6
|
||||
[ ]*[a-f0-9]+:[ ]*c4 e2 51 dd f4[ ]*vaesenclast %xmm4,%xmm5,%xmm6
|
||||
[ ]*[a-f0-9]+:[ ]*c4 e2 51 dd b4 f4 c0 1d fe ff[ ]*vaesenclast -0x1e240\(%esp,%esi,8\),%xmm5,%xmm6
|
||||
[ ]*[a-f0-9]+:[ ]*c4 e2 55 dd f4[ ]*vaesenclast %ymm4,%ymm5,%ymm6
|
||||
[ ]*[a-f0-9]+:[ ]*c4 e2 55 dd b4 f4 c0 1d fe ff[ ]*vaesenclast -0x1e240\(%esp,%esi,8\),%ymm5,%ymm6
|
||||
#pass
|
||||
108
gas/testsuite/gas/i386/avx512vl_vaes.d
Normal file
108
gas/testsuite/gas/i386/avx512vl_vaes.d
Normal file
@ -0,0 +1,108 @@
|
||||
#as:
|
||||
#objdump: -dw
|
||||
#name: i386 AVX512VL/VAES insns
|
||||
#source: avx512vl_vaes.s
|
||||
|
||||
.*: +file format .*
|
||||
|
||||
|
||||
Disassembly of section \.text:
|
||||
|
||||
00000000 <_start>:
|
||||
[ ]*[a-f0-9]+:[ ]*c4 e2 51 de f4[ ]*vaesdec %xmm4,%xmm5,%xmm6
|
||||
[ ]*[a-f0-9]+:[ ]*c4 e2 51 de b4 f4 c0 1d fe ff[ ]*vaesdec -0x1e240\(%esp,%esi,8\),%xmm5,%xmm6
|
||||
[ ]*[a-f0-9]+:[ ]*c4 e2 51 de b2 f0 07 00 00[ ]*vaesdec 0x7f0\(%edx\),%xmm5,%xmm6
|
||||
[ ]*[a-f0-9]+:[ ]*c4 e2 55 de f4[ ]*vaesdec %ymm4,%ymm5,%ymm6
|
||||
[ ]*[a-f0-9]+:[ ]*c4 e2 55 de b4 f4 c0 1d fe ff[ ]*vaesdec -0x1e240\(%esp,%esi,8\),%ymm5,%ymm6
|
||||
[ ]*[a-f0-9]+:[ ]*c4 e2 55 de b2 e0 0f 00 00[ ]*vaesdec 0xfe0\(%edx\),%ymm5,%ymm6
|
||||
[ ]*[a-f0-9]+:[ ]*c4 e2 51 df f4[ ]*vaesdeclast %xmm4,%xmm5,%xmm6
|
||||
[ ]*[a-f0-9]+:[ ]*c4 e2 51 df b4 f4 c0 1d fe ff[ ]*vaesdeclast -0x1e240\(%esp,%esi,8\),%xmm5,%xmm6
|
||||
[ ]*[a-f0-9]+:[ ]*c4 e2 51 df b2 f0 07 00 00[ ]*vaesdeclast 0x7f0\(%edx\),%xmm5,%xmm6
|
||||
[ ]*[a-f0-9]+:[ ]*c4 e2 55 df f4[ ]*vaesdeclast %ymm4,%ymm5,%ymm6
|
||||
[ ]*[a-f0-9]+:[ ]*c4 e2 55 df b4 f4 c0 1d fe ff[ ]*vaesdeclast -0x1e240\(%esp,%esi,8\),%ymm5,%ymm6
|
||||
[ ]*[a-f0-9]+:[ ]*c4 e2 55 df b2 e0 0f 00 00[ ]*vaesdeclast 0xfe0\(%edx\),%ymm5,%ymm6
|
||||
[ ]*[a-f0-9]+:[ ]*c4 e2 51 dc f4[ ]*vaesenc %xmm4,%xmm5,%xmm6
|
||||
[ ]*[a-f0-9]+:[ ]*c4 e2 51 dc b4 f4 c0 1d fe ff[ ]*vaesenc -0x1e240\(%esp,%esi,8\),%xmm5,%xmm6
|
||||
[ ]*[a-f0-9]+:[ ]*c4 e2 51 dc b2 f0 07 00 00[ ]*vaesenc 0x7f0\(%edx\),%xmm5,%xmm6
|
||||
[ ]*[a-f0-9]+:[ ]*c4 e2 55 dc f4[ ]*vaesenc %ymm4,%ymm5,%ymm6
|
||||
[ ]*[a-f0-9]+:[ ]*c4 e2 55 dc b4 f4 c0 1d fe ff[ ]*vaesenc -0x1e240\(%esp,%esi,8\),%ymm5,%ymm6
|
||||
[ ]*[a-f0-9]+:[ ]*c4 e2 55 dc b2 e0 0f 00 00[ ]*vaesenc 0xfe0\(%edx\),%ymm5,%ymm6
|
||||
[ ]*[a-f0-9]+:[ ]*c4 e2 51 dd f4[ ]*vaesenclast %xmm4,%xmm5,%xmm6
|
||||
[ ]*[a-f0-9]+:[ ]*c4 e2 51 dd b4 f4 c0 1d fe ff[ ]*vaesenclast -0x1e240\(%esp,%esi,8\),%xmm5,%xmm6
|
||||
[ ]*[a-f0-9]+:[ ]*c4 e2 51 dd b2 f0 07 00 00[ ]*vaesenclast 0x7f0\(%edx\),%xmm5,%xmm6
|
||||
[ ]*[a-f0-9]+:[ ]*c4 e2 55 dd f4[ ]*vaesenclast %ymm4,%ymm5,%ymm6
|
||||
[ ]*[a-f0-9]+:[ ]*c4 e2 55 dd b4 f4 c0 1d fe ff[ ]*vaesenclast -0x1e240\(%esp,%esi,8\),%ymm5,%ymm6
|
||||
[ ]*[a-f0-9]+:[ ]*c4 e2 55 dd b2 e0 0f 00 00[ ]*vaesenclast 0xfe0\(%edx\),%ymm5,%ymm6
|
||||
[ ]*[a-f0-9]+:[ ]*62 f2 55 08 de f4[ ]*vaesdec %xmm4,%xmm5,%xmm6
|
||||
[ ]*[a-f0-9]+:[ ]*62 f2 55 08 de b4 f4 c0 1d fe ff[ ]*vaesdec -0x1e240\(%esp,%esi,8\),%xmm5,%xmm6
|
||||
[ ]*[a-f0-9]+:[ ]*62 f2 55 08 de b2 f0 07 00 00[ ]*vaesdec 0x7f0\(%edx\),%xmm5,%xmm6
|
||||
[ ]*[a-f0-9]+:[ ]*62 f2 55 28 de f4[ ]*vaesdec %ymm4,%ymm5,%ymm6
|
||||
[ ]*[a-f0-9]+:[ ]*62 f2 55 28 de b4 f4 c0 1d fe ff[ ]*vaesdec -0x1e240\(%esp,%esi,8\),%ymm5,%ymm6
|
||||
[ ]*[a-f0-9]+:[ ]*62 f2 55 28 de b2 e0 0f 00 00[ ]*vaesdec 0xfe0\(%edx\),%ymm5,%ymm6
|
||||
[ ]*[a-f0-9]+:[ ]*62 f2 55 08 df f4[ ]*vaesdeclast %xmm4,%xmm5,%xmm6
|
||||
[ ]*[a-f0-9]+:[ ]*62 f2 55 08 df b4 f4 c0 1d fe ff[ ]*vaesdeclast -0x1e240\(%esp,%esi,8\),%xmm5,%xmm6
|
||||
[ ]*[a-f0-9]+:[ ]*62 f2 55 08 df b2 f0 07 00 00[ ]*vaesdeclast 0x7f0\(%edx\),%xmm5,%xmm6
|
||||
[ ]*[a-f0-9]+:[ ]*62 f2 55 28 df f4[ ]*vaesdeclast %ymm4,%ymm5,%ymm6
|
||||
[ ]*[a-f0-9]+:[ ]*62 f2 55 28 df b4 f4 c0 1d fe ff[ ]*vaesdeclast -0x1e240\(%esp,%esi,8\),%ymm5,%ymm6
|
||||
[ ]*[a-f0-9]+:[ ]*62 f2 55 28 df b2 e0 0f 00 00[ ]*vaesdeclast 0xfe0\(%edx\),%ymm5,%ymm6
|
||||
[ ]*[a-f0-9]+:[ ]*62 f2 55 08 dc f4[ ]*vaesenc %xmm4,%xmm5,%xmm6
|
||||
[ ]*[a-f0-9]+:[ ]*62 f2 55 08 dc b4 f4 c0 1d fe ff[ ]*vaesenc -0x1e240\(%esp,%esi,8\),%xmm5,%xmm6
|
||||
[ ]*[a-f0-9]+:[ ]*62 f2 55 08 dc b2 f0 07 00 00[ ]*vaesenc 0x7f0\(%edx\),%xmm5,%xmm6
|
||||
[ ]*[a-f0-9]+:[ ]*62 f2 55 28 dc f4[ ]*vaesenc %ymm4,%ymm5,%ymm6
|
||||
[ ]*[a-f0-9]+:[ ]*62 f2 55 28 dc b4 f4 c0 1d fe ff[ ]*vaesenc -0x1e240\(%esp,%esi,8\),%ymm5,%ymm6
|
||||
[ ]*[a-f0-9]+:[ ]*62 f2 55 28 dc b2 e0 0f 00 00[ ]*vaesenc 0xfe0\(%edx\),%ymm5,%ymm6
|
||||
[ ]*[a-f0-9]+:[ ]*62 f2 55 08 dd f4[ ]*vaesenclast %xmm4,%xmm5,%xmm6
|
||||
[ ]*[a-f0-9]+:[ ]*62 f2 55 08 dd b4 f4 c0 1d fe ff[ ]*vaesenclast -0x1e240\(%esp,%esi,8\),%xmm5,%xmm6
|
||||
[ ]*[a-f0-9]+:[ ]*62 f2 55 08 dd b2 f0 07 00 00[ ]*vaesenclast 0x7f0\(%edx\),%xmm5,%xmm6
|
||||
[ ]*[a-f0-9]+:[ ]*62 f2 55 28 dd f4[ ]*vaesenclast %ymm4,%ymm5,%ymm6
|
||||
[ ]*[a-f0-9]+:[ ]*62 f2 55 28 dd b4 f4 c0 1d fe ff[ ]*vaesenclast -0x1e240\(%esp,%esi,8\),%ymm5,%ymm6
|
||||
[ ]*[a-f0-9]+:[ ]*62 f2 55 28 dd b2 e0 0f 00 00[ ]*vaesenclast 0xfe0\(%edx\),%ymm5,%ymm6
|
||||
[ ]*[a-f0-9]+:[ ]*c4 e2 51 de f4[ ]*vaesdec %xmm4,%xmm5,%xmm6
|
||||
[ ]*[a-f0-9]+:[ ]*c4 e2 51 de b4 f4 c0 1d fe ff[ ]*vaesdec -0x1e240\(%esp,%esi,8\),%xmm5,%xmm6
|
||||
[ ]*[a-f0-9]+:[ ]*c4 e2 51 de b2 f0 07 00 00[ ]*vaesdec 0x7f0\(%edx\),%xmm5,%xmm6
|
||||
[ ]*[a-f0-9]+:[ ]*c4 e2 55 de f4[ ]*vaesdec %ymm4,%ymm5,%ymm6
|
||||
[ ]*[a-f0-9]+:[ ]*c4 e2 55 de b4 f4 c0 1d fe ff[ ]*vaesdec -0x1e240\(%esp,%esi,8\),%ymm5,%ymm6
|
||||
[ ]*[a-f0-9]+:[ ]*c4 e2 55 de b2 e0 0f 00 00[ ]*vaesdec 0xfe0\(%edx\),%ymm5,%ymm6
|
||||
[ ]*[a-f0-9]+:[ ]*c4 e2 51 df f4[ ]*vaesdeclast %xmm4,%xmm5,%xmm6
|
||||
[ ]*[a-f0-9]+:[ ]*c4 e2 51 df b4 f4 c0 1d fe ff[ ]*vaesdeclast -0x1e240\(%esp,%esi,8\),%xmm5,%xmm6
|
||||
[ ]*[a-f0-9]+:[ ]*c4 e2 51 df b2 f0 07 00 00[ ]*vaesdeclast 0x7f0\(%edx\),%xmm5,%xmm6
|
||||
[ ]*[a-f0-9]+:[ ]*c4 e2 55 df f4[ ]*vaesdeclast %ymm4,%ymm5,%ymm6
|
||||
[ ]*[a-f0-9]+:[ ]*c4 e2 55 df b4 f4 c0 1d fe ff[ ]*vaesdeclast -0x1e240\(%esp,%esi,8\),%ymm5,%ymm6
|
||||
[ ]*[a-f0-9]+:[ ]*c4 e2 55 df b2 e0 0f 00 00[ ]*vaesdeclast 0xfe0\(%edx\),%ymm5,%ymm6
|
||||
[ ]*[a-f0-9]+:[ ]*c4 e2 51 dc f4[ ]*vaesenc %xmm4,%xmm5,%xmm6
|
||||
[ ]*[a-f0-9]+:[ ]*c4 e2 51 dc b4 f4 c0 1d fe ff[ ]*vaesenc -0x1e240\(%esp,%esi,8\),%xmm5,%xmm6
|
||||
[ ]*[a-f0-9]+:[ ]*c4 e2 51 dc b2 f0 07 00 00[ ]*vaesenc 0x7f0\(%edx\),%xmm5,%xmm6
|
||||
[ ]*[a-f0-9]+:[ ]*c4 e2 55 dc f4[ ]*vaesenc %ymm4,%ymm5,%ymm6
|
||||
[ ]*[a-f0-9]+:[ ]*c4 e2 55 dc b4 f4 c0 1d fe ff[ ]*vaesenc -0x1e240\(%esp,%esi,8\),%ymm5,%ymm6
|
||||
[ ]*[a-f0-9]+:[ ]*c4 e2 55 dc b2 e0 0f 00 00[ ]*vaesenc 0xfe0\(%edx\),%ymm5,%ymm6
|
||||
[ ]*[a-f0-9]+:[ ]*c4 e2 51 dd f4[ ]*vaesenclast %xmm4,%xmm5,%xmm6
|
||||
[ ]*[a-f0-9]+:[ ]*c4 e2 51 dd b4 f4 c0 1d fe ff[ ]*vaesenclast -0x1e240\(%esp,%esi,8\),%xmm5,%xmm6
|
||||
[ ]*[a-f0-9]+:[ ]*c4 e2 51 dd b2 f0 07 00 00[ ]*vaesenclast 0x7f0\(%edx\),%xmm5,%xmm6
|
||||
[ ]*[a-f0-9]+:[ ]*c4 e2 55 dd f4[ ]*vaesenclast %ymm4,%ymm5,%ymm6
|
||||
[ ]*[a-f0-9]+:[ ]*c4 e2 55 dd b4 f4 c0 1d fe ff[ ]*vaesenclast -0x1e240\(%esp,%esi,8\),%ymm5,%ymm6
|
||||
[ ]*[a-f0-9]+:[ ]*c4 e2 55 dd b2 e0 0f 00 00[ ]*vaesenclast 0xfe0\(%edx\),%ymm5,%ymm6
|
||||
[ ]*[a-f0-9]+:[ ]*62 f2 55 08 de f4[ ]*vaesdec %xmm4,%xmm5,%xmm6
|
||||
[ ]*[a-f0-9]+:[ ]*62 f2 55 08 de b4 f4 c0 1d fe ff[ ]*vaesdec -0x1e240\(%esp,%esi,8\),%xmm5,%xmm6
|
||||
[ ]*[a-f0-9]+:[ ]*62 f2 55 08 de b2 f0 07 00 00[ ]*vaesdec 0x7f0\(%edx\),%xmm5,%xmm6
|
||||
[ ]*[a-f0-9]+:[ ]*62 f2 55 28 de f4[ ]*vaesdec %ymm4,%ymm5,%ymm6
|
||||
[ ]*[a-f0-9]+:[ ]*62 f2 55 28 de b4 f4 c0 1d fe ff[ ]*vaesdec -0x1e240\(%esp,%esi,8\),%ymm5,%ymm6
|
||||
[ ]*[a-f0-9]+:[ ]*62 f2 55 28 de b2 e0 0f 00 00[ ]*vaesdec 0xfe0\(%edx\),%ymm5,%ymm6
|
||||
[ ]*[a-f0-9]+:[ ]*62 f2 55 08 df f4[ ]*vaesdeclast %xmm4,%xmm5,%xmm6
|
||||
[ ]*[a-f0-9]+:[ ]*62 f2 55 08 df b4 f4 c0 1d fe ff[ ]*vaesdeclast -0x1e240\(%esp,%esi,8\),%xmm5,%xmm6
|
||||
[ ]*[a-f0-9]+:[ ]*62 f2 55 08 df b2 f0 07 00 00[ ]*vaesdeclast 0x7f0\(%edx\),%xmm5,%xmm6
|
||||
[ ]*[a-f0-9]+:[ ]*62 f2 55 28 df f4[ ]*vaesdeclast %ymm4,%ymm5,%ymm6
|
||||
[ ]*[a-f0-9]+:[ ]*62 f2 55 28 df b4 f4 c0 1d fe ff[ ]*vaesdeclast -0x1e240\(%esp,%esi,8\),%ymm5,%ymm6
|
||||
[ ]*[a-f0-9]+:[ ]*62 f2 55 28 df b2 e0 0f 00 00[ ]*vaesdeclast 0xfe0\(%edx\),%ymm5,%ymm6
|
||||
[ ]*[a-f0-9]+:[ ]*62 f2 55 08 dc f4[ ]*vaesenc %xmm4,%xmm5,%xmm6
|
||||
[ ]*[a-f0-9]+:[ ]*62 f2 55 08 dc b4 f4 c0 1d fe ff[ ]*vaesenc -0x1e240\(%esp,%esi,8\),%xmm5,%xmm6
|
||||
[ ]*[a-f0-9]+:[ ]*62 f2 55 08 dc b2 f0 07 00 00[ ]*vaesenc 0x7f0\(%edx\),%xmm5,%xmm6
|
||||
[ ]*[a-f0-9]+:[ ]*62 f2 55 28 dc f4[ ]*vaesenc %ymm4,%ymm5,%ymm6
|
||||
[ ]*[a-f0-9]+:[ ]*62 f2 55 28 dc b4 f4 c0 1d fe ff[ ]*vaesenc -0x1e240\(%esp,%esi,8\),%ymm5,%ymm6
|
||||
[ ]*[a-f0-9]+:[ ]*62 f2 55 28 dc b2 e0 0f 00 00[ ]*vaesenc 0xfe0\(%edx\),%ymm5,%ymm6
|
||||
[ ]*[a-f0-9]+:[ ]*62 f2 55 08 dd f4[ ]*vaesenclast %xmm4,%xmm5,%xmm6
|
||||
[ ]*[a-f0-9]+:[ ]*62 f2 55 08 dd b4 f4 c0 1d fe ff[ ]*vaesenclast -0x1e240\(%esp,%esi,8\),%xmm5,%xmm6
|
||||
[ ]*[a-f0-9]+:[ ]*62 f2 55 08 dd b2 f0 07 00 00[ ]*vaesenclast 0x7f0\(%edx\),%xmm5,%xmm6
|
||||
[ ]*[a-f0-9]+:[ ]*62 f2 55 28 dd f4[ ]*vaesenclast %ymm4,%ymm5,%ymm6
|
||||
[ ]*[a-f0-9]+:[ ]*62 f2 55 28 dd b4 f4 c0 1d fe ff[ ]*vaesenclast -0x1e240\(%esp,%esi,8\),%ymm5,%ymm6
|
||||
[ ]*[a-f0-9]+:[ ]*62 f2 55 28 dd b2 e0 0f 00 00[ ]*vaesenclast 0xfe0\(%edx\),%ymm5,%ymm6
|
||||
#pass
|
||||
117
gas/testsuite/gas/i386/avx512vl_vaes.s
Normal file
117
gas/testsuite/gas/i386/avx512vl_vaes.s
Normal file
@ -0,0 +1,117 @@
|
||||
# Check 32bit AVX512VL,VAES instructions
|
||||
|
||||
.allow_index_reg
|
||||
.text
|
||||
_start:
|
||||
vaesdec %xmm4, %xmm5, %xmm6 # AVX512VL,VAES
|
||||
vaesdec -123456(%esp,%esi,8), %xmm5, %xmm6 # AVX512VL,VAES
|
||||
vaesdec 2032(%edx), %xmm5, %xmm6 # AVX512VL,VAES Disp8
|
||||
vaesdec %ymm4, %ymm5, %ymm6 # AVX512VL,VAES
|
||||
vaesdec -123456(%esp,%esi,8), %ymm5, %ymm6 # AVX512VL,VAES
|
||||
vaesdec 4064(%edx), %ymm5, %ymm6 # AVX512VL,VAES Disp8
|
||||
|
||||
vaesdeclast %xmm4, %xmm5, %xmm6 # AVX512VL,VAES
|
||||
vaesdeclast -123456(%esp,%esi,8), %xmm5, %xmm6 # AVX512VL,VAES
|
||||
vaesdeclast 2032(%edx), %xmm5, %xmm6 # AVX512VL,VAES Disp8
|
||||
vaesdeclast %ymm4, %ymm5, %ymm6 # AVX512VL,VAES
|
||||
vaesdeclast -123456(%esp,%esi,8), %ymm5, %ymm6 # AVX512VL,VAES
|
||||
vaesdeclast 4064(%edx), %ymm5, %ymm6 # AVX512VL,VAES Disp8
|
||||
|
||||
vaesenc %xmm4, %xmm5, %xmm6 # AVX512VL,VAES
|
||||
vaesenc -123456(%esp,%esi,8), %xmm5, %xmm6 # AVX512VL,VAES
|
||||
vaesenc 2032(%edx), %xmm5, %xmm6 # AVX512VL,VAES Disp8
|
||||
vaesenc %ymm4, %ymm5, %ymm6 # AVX512VL,VAES
|
||||
vaesenc -123456(%esp,%esi,8), %ymm5, %ymm6 # AVX512VL,VAES
|
||||
vaesenc 4064(%edx), %ymm5, %ymm6 # AVX512VL,VAES Disp8
|
||||
|
||||
vaesenclast %xmm4, %xmm5, %xmm6 # AVX512VL,VAES
|
||||
vaesenclast -123456(%esp,%esi,8), %xmm5, %xmm6 # AVX512VL,VAES
|
||||
vaesenclast 2032(%edx), %xmm5, %xmm6 # AVX512VL,VAES Disp8
|
||||
vaesenclast %ymm4, %ymm5, %ymm6 # AVX512VL,VAES
|
||||
vaesenclast -123456(%esp,%esi,8), %ymm5, %ymm6 # AVX512VL,VAES
|
||||
vaesenclast 4064(%edx), %ymm5, %ymm6 # AVX512VL,VAES Disp8
|
||||
|
||||
{evex} vaesdec %xmm4, %xmm5, %xmm6 # AVX512VL,VAES
|
||||
{evex} vaesdec -123456(%esp,%esi,8), %xmm5, %xmm6 # AVX512VL,VAES
|
||||
{evex} vaesdec 2032(%edx), %xmm5, %xmm6 # AVX512VL,VAES Disp8
|
||||
{evex} vaesdec %ymm4, %ymm5, %ymm6 # AVX512VL,VAES
|
||||
{evex} vaesdec -123456(%esp,%esi,8), %ymm5, %ymm6 # AVX512VL,VAES
|
||||
{evex} vaesdec 4064(%edx), %ymm5, %ymm6 # AVX512VL,VAES Disp8
|
||||
|
||||
{evex} vaesdeclast %xmm4, %xmm5, %xmm6 # AVX512VL,VAES
|
||||
{evex} vaesdeclast -123456(%esp,%esi,8), %xmm5, %xmm6 # AVX512VL,VAES
|
||||
{evex} vaesdeclast 2032(%edx), %xmm5, %xmm6 # AVX512VL,VAES Disp8
|
||||
{evex} vaesdeclast %ymm4, %ymm5, %ymm6 # AVX512VL,VAES
|
||||
{evex} vaesdeclast -123456(%esp,%esi,8), %ymm5, %ymm6 # AVX512VL,VAES
|
||||
{evex} vaesdeclast 4064(%edx), %ymm5, %ymm6 # AVX512VL,VAES Disp8
|
||||
|
||||
{evex} vaesenc %xmm4, %xmm5, %xmm6 # AVX512VL,VAES
|
||||
{evex} vaesenc -123456(%esp,%esi,8), %xmm5, %xmm6 # AVX512VL,VAES
|
||||
{evex} vaesenc 2032(%edx), %xmm5, %xmm6 # AVX512VL,VAES Disp8
|
||||
{evex} vaesenc %ymm4, %ymm5, %ymm6 # AVX512VL,VAES
|
||||
{evex} vaesenc -123456(%esp,%esi,8), %ymm5, %ymm6 # AVX512VL,VAES
|
||||
{evex} vaesenc 4064(%edx), %ymm5, %ymm6 # AVX512VL,VAES Disp8
|
||||
|
||||
{evex} vaesenclast %xmm4, %xmm5, %xmm6 # AVX512VL,VAES
|
||||
{evex} vaesenclast -123456(%esp,%esi,8), %xmm5, %xmm6 # AVX512VL,VAES
|
||||
{evex} vaesenclast 2032(%edx), %xmm5, %xmm6 # AVX512VL,VAES Disp8
|
||||
{evex} vaesenclast %ymm4, %ymm5, %ymm6 # AVX512VL,VAES
|
||||
{evex} vaesenclast -123456(%esp,%esi,8), %ymm5, %ymm6 # AVX512VL,VAES
|
||||
{evex} vaesenclast 4064(%edx), %ymm5, %ymm6 # AVX512VL,VAES Disp8
|
||||
|
||||
.intel_syntax noprefix
|
||||
vaesdec xmm6, xmm5, xmm4 # AVX512VL,VAES
|
||||
vaesdec xmm6, xmm5, XMMWORD PTR [esp+esi*8-123456] # AVX512VL,VAES
|
||||
vaesdec xmm6, xmm5, XMMWORD PTR [edx+2032] # AVX512VL,VAES Disp8
|
||||
vaesdec ymm6, ymm5, ymm4 # AVX512VL,VAES
|
||||
vaesdec ymm6, ymm5, YMMWORD PTR [esp+esi*8-123456] # AVX512VL,VAES
|
||||
vaesdec ymm6, ymm5, YMMWORD PTR [edx+4064] # AVX512VL,VAES Disp8
|
||||
|
||||
vaesdeclast xmm6, xmm5, xmm4 # AVX512VL,VAES
|
||||
vaesdeclast xmm6, xmm5, XMMWORD PTR [esp+esi*8-123456] # AVX512VL,VAES
|
||||
vaesdeclast xmm6, xmm5, XMMWORD PTR [edx+2032] # AVX512VL,VAES Disp8
|
||||
vaesdeclast ymm6, ymm5, ymm4 # AVX512VL,VAES
|
||||
vaesdeclast ymm6, ymm5, YMMWORD PTR [esp+esi*8-123456] # AVX512VL,VAES
|
||||
vaesdeclast ymm6, ymm5, YMMWORD PTR [edx+4064] # AVX512VL,VAES Disp8
|
||||
|
||||
vaesenc xmm6, xmm5, xmm4 # AVX512VL,VAES
|
||||
vaesenc xmm6, xmm5, XMMWORD PTR [esp+esi*8-123456] # AVX512VL,VAES
|
||||
vaesenc xmm6, xmm5, XMMWORD PTR [edx+2032] # AVX512VL,VAES Disp8
|
||||
vaesenc ymm6, ymm5, ymm4 # AVX512VL,VAES
|
||||
vaesenc ymm6, ymm5, YMMWORD PTR [esp+esi*8-123456] # AVX512VL,VAES
|
||||
vaesenc ymm6, ymm5, YMMWORD PTR [edx+4064] # AVX512VL,VAES Disp8
|
||||
|
||||
vaesenclast xmm6, xmm5, xmm4 # AVX512VL,VAES
|
||||
vaesenclast xmm6, xmm5, XMMWORD PTR [esp+esi*8-123456] # AVX512VL,VAES
|
||||
vaesenclast xmm6, xmm5, XMMWORD PTR [edx+2032] # AVX512VL,VAES Disp8
|
||||
vaesenclast ymm6, ymm5, ymm4 # AVX512VL,VAES
|
||||
vaesenclast ymm6, ymm5, YMMWORD PTR [esp+esi*8-123456] # AVX512VL,VAES
|
||||
vaesenclast ymm6, ymm5, YMMWORD PTR [edx+4064] # AVX512VL,VAES Disp8
|
||||
|
||||
{evex} vaesdec xmm6, xmm5, xmm4 # AVX512VL,VAES
|
||||
{evex} vaesdec xmm6, xmm5, XMMWORD PTR [esp+esi*8-123456] # AVX512VL,VAES
|
||||
{evex} vaesdec xmm6, xmm5, XMMWORD PTR [edx+2032] # AVX512VL,VAES Disp8
|
||||
{evex} vaesdec ymm6, ymm5, ymm4 # AVX512VL,VAES
|
||||
{evex} vaesdec ymm6, ymm5, YMMWORD PTR [esp+esi*8-123456] # AVX512VL,VAES
|
||||
{evex} vaesdec ymm6, ymm5, YMMWORD PTR [edx+4064] # AVX512VL,VAES Disp8
|
||||
|
||||
{evex} vaesdeclast xmm6, xmm5, xmm4 # AVX512VL,VAES
|
||||
{evex} vaesdeclast xmm6, xmm5, XMMWORD PTR [esp+esi*8-123456] # AVX512VL,VAES
|
||||
{evex} vaesdeclast xmm6, xmm5, XMMWORD PTR [edx+2032] # AVX512VL,VAES Disp8
|
||||
{evex} vaesdeclast ymm6, ymm5, ymm4 # AVX512VL,VAES
|
||||
{evex} vaesdeclast ymm6, ymm5, YMMWORD PTR [esp+esi*8-123456] # AVX512VL,VAES
|
||||
{evex} vaesdeclast ymm6, ymm5, YMMWORD PTR [edx+4064] # AVX512VL,VAES Disp8
|
||||
|
||||
{evex} vaesenc xmm6, xmm5, xmm4 # AVX512VL,VAES
|
||||
{evex} vaesenc xmm6, xmm5, XMMWORD PTR [esp+esi*8-123456] # AVX512VL,VAES
|
||||
{evex} vaesenc xmm6, xmm5, XMMWORD PTR [edx+2032] # AVX512VL,VAES Disp8
|
||||
{evex} vaesenc ymm6, ymm5, ymm4 # AVX512VL,VAES
|
||||
{evex} vaesenc ymm6, ymm5, YMMWORD PTR [esp+esi*8-123456] # AVX512VL,VAES
|
||||
{evex} vaesenc ymm6, ymm5, YMMWORD PTR [edx+4064] # AVX512VL,VAES Disp8
|
||||
|
||||
{evex} vaesenclast xmm6, xmm5, xmm4 # AVX512VL,VAES
|
||||
{evex} vaesenclast xmm6, xmm5, XMMWORD PTR [esp+esi*8-123456] # AVX512VL,VAES
|
||||
{evex} vaesenclast xmm6, xmm5, XMMWORD PTR [edx+2032] # AVX512VL,VAES Disp8
|
||||
{evex} vaesenclast ymm6, ymm5, ymm4 # AVX512VL,VAES
|
||||
{evex} vaesenclast ymm6, ymm5, YMMWORD PTR [esp+esi*8-123456] # AVX512VL,VAES
|
||||
{evex} vaesenclast ymm6, ymm5, YMMWORD PTR [edx+4064] # AVX512VL,VAES Disp8
|
||||
@ -378,6 +378,14 @@ if [expr ([istarget "i*86-*-*"] || [istarget "x86_64-*-*"]) && [gas_32_check]]
|
||||
run_dump_test "avx512f_gfni-intel"
|
||||
run_dump_test "avx512vl_gfni"
|
||||
run_dump_test "avx512vl_gfni-intel"
|
||||
run_dump_test "avx512f_vaes"
|
||||
run_dump_test "avx512f_vaes-intel"
|
||||
run_dump_test "avx512f_vaes-wig1"
|
||||
run_dump_test "avx512f_vaes-wig1-intel"
|
||||
run_dump_test "avx512vl_vaes"
|
||||
run_dump_test "avx512vl_vaes-intel"
|
||||
run_dump_test "avx512vl_vaes-wig1"
|
||||
run_dump_test "avx512vl_vaes-wig1-intel"
|
||||
run_dump_test "clzero"
|
||||
run_dump_test "disassem"
|
||||
run_dump_test "mwaitx-bdver4"
|
||||
@ -389,6 +397,8 @@ if [expr ([istarget "i*86-*-*"] || [istarget "x86_64-*-*"]) && [gas_32_check]]
|
||||
run_dump_test "ptwrite-intel"
|
||||
run_dump_test "gfni"
|
||||
run_dump_test "gfni-intel"
|
||||
run_dump_test "vaes"
|
||||
run_dump_test "vaes-intel"
|
||||
run_list_test "avx512vl-1" "-al"
|
||||
run_list_test "avx512vl-2" "-al"
|
||||
run_dump_test "fpu-bad"
|
||||
@ -811,6 +821,14 @@ if [expr ([istarget "i*86-*-*"] || [istarget "x86_64-*-*"]) && [gas_64_check]] t
|
||||
run_dump_test "x86-64-avx512f_gfni-intel"
|
||||
run_dump_test "x86-64-avx512vl_gfni"
|
||||
run_dump_test "x86-64-avx512vl_gfni-intel"
|
||||
run_dump_test "x86-64-avx512f_vaes"
|
||||
run_dump_test "x86-64-avx512f_vaes-intel"
|
||||
run_dump_test "x86-64-avx512f_vaes-wig1"
|
||||
run_dump_test "x86-64-avx512f_vaes-wig1-intel"
|
||||
run_dump_test "x86-64-avx512vl_vaes"
|
||||
run_dump_test "x86-64-avx512vl_vaes-intel"
|
||||
run_dump_test "x86-64-avx512vl_vaes-wig1"
|
||||
run_dump_test "x86-64-avx512vl_vaes-wig1-intel"
|
||||
run_dump_test "x86-64-clzero"
|
||||
run_dump_test "x86-64-mwaitx-bdver4"
|
||||
run_list_test "x86-64-mwaitx-reg"
|
||||
@ -821,6 +839,8 @@ if [expr ([istarget "i*86-*-*"] || [istarget "x86_64-*-*"]) && [gas_64_check]] t
|
||||
run_dump_test "x86-64-ptwrite-intel"
|
||||
run_dump_test "x86-64-gfni"
|
||||
run_dump_test "x86-64-gfni-intel"
|
||||
run_dump_test "x86-64-vaes"
|
||||
run_dump_test "x86-64-vaes-intel"
|
||||
run_dump_test "x86-64-fence-as-lock-add-yes"
|
||||
run_dump_test "x86-64-fence-as-lock-add-no"
|
||||
run_dump_test "x86-64-pr20141"
|
||||
|
||||
30
gas/testsuite/gas/i386/vaes-intel.d
Normal file
30
gas/testsuite/gas/i386/vaes-intel.d
Normal file
@ -0,0 +1,30 @@
|
||||
#objdump: -dwMintel
|
||||
#name: i386 VAES (Intel disassembly)
|
||||
#source: vaes.s
|
||||
|
||||
.*: +file format .*
|
||||
|
||||
Disassembly of section .text:
|
||||
|
||||
0+ <_start>:
|
||||
[ ]*[a-f0-9]+: c4 e2 4d dc d4 vaesenc ymm2,ymm6,ymm4
|
||||
[ ]*[a-f0-9]+: c4 e2 4d dc 39 vaesenc ymm7,ymm6,YMMWORD PTR \[ecx\]
|
||||
[ ]*[a-f0-9]+: c4 e2 4d dd d4 vaesenclast ymm2,ymm6,ymm4
|
||||
[ ]*[a-f0-9]+: c4 e2 4d dd 39 vaesenclast ymm7,ymm6,YMMWORD PTR \[ecx\]
|
||||
[ ]*[a-f0-9]+: c4 e2 4d de d4 vaesdec ymm2,ymm6,ymm4
|
||||
[ ]*[a-f0-9]+: c4 e2 4d de 39 vaesdec ymm7,ymm6,YMMWORD PTR \[ecx\]
|
||||
[ ]*[a-f0-9]+: c4 e2 4d df d4 vaesdeclast ymm2,ymm6,ymm4
|
||||
[ ]*[a-f0-9]+: c4 e2 4d df 39 vaesdeclast ymm7,ymm6,YMMWORD PTR \[ecx\]
|
||||
[ ]*[a-f0-9]+: c4 e2 4d dc d4 vaesenc ymm2,ymm6,ymm4
|
||||
[ ]*[a-f0-9]+: c4 e2 4d dc 39 vaesenc ymm7,ymm6,YMMWORD PTR \[ecx\]
|
||||
[ ]*[a-f0-9]+: c4 e2 4d dc 39 vaesenc ymm7,ymm6,YMMWORD PTR \[ecx\]
|
||||
[ ]*[a-f0-9]+: c4 e2 4d dd d4 vaesenclast ymm2,ymm6,ymm4
|
||||
[ ]*[a-f0-9]+: c4 e2 4d dd 39 vaesenclast ymm7,ymm6,YMMWORD PTR \[ecx\]
|
||||
[ ]*[a-f0-9]+: c4 e2 4d dd 39 vaesenclast ymm7,ymm6,YMMWORD PTR \[ecx\]
|
||||
[ ]*[a-f0-9]+: c4 e2 4d de d4 vaesdec ymm2,ymm6,ymm4
|
||||
[ ]*[a-f0-9]+: c4 e2 4d de 39 vaesdec ymm7,ymm6,YMMWORD PTR \[ecx\]
|
||||
[ ]*[a-f0-9]+: c4 e2 4d de 39 vaesdec ymm7,ymm6,YMMWORD PTR \[ecx\]
|
||||
[ ]*[a-f0-9]+: c4 e2 4d df d4 vaesdeclast ymm2,ymm6,ymm4
|
||||
[ ]*[a-f0-9]+: c4 e2 4d df 39 vaesdeclast ymm7,ymm6,YMMWORD PTR \[ecx\]
|
||||
[ ]*[a-f0-9]+: c4 e2 4d df 39 vaesdeclast ymm7,ymm6,YMMWORD PTR \[ecx\]
|
||||
#pass
|
||||
29
gas/testsuite/gas/i386/vaes.d
Normal file
29
gas/testsuite/gas/i386/vaes.d
Normal file
@ -0,0 +1,29 @@
|
||||
#objdump: -dw
|
||||
#name: i386 VAES
|
||||
|
||||
.*: file format .*
|
||||
|
||||
Disassembly of section .text:
|
||||
|
||||
0+ <_start>:
|
||||
[ ]*[a-f0-9]+: c4 e2 4d dc d4 vaesenc %ymm4,%ymm6,%ymm2
|
||||
[ ]*[a-f0-9]+: c4 e2 4d dc 39 vaesenc \(%ecx\),%ymm6,%ymm7
|
||||
[ ]*[a-f0-9]+: c4 e2 4d dd d4 vaesenclast %ymm4,%ymm6,%ymm2
|
||||
[ ]*[a-f0-9]+: c4 e2 4d dd 39 vaesenclast \(%ecx\),%ymm6,%ymm7
|
||||
[ ]*[a-f0-9]+: c4 e2 4d de d4 vaesdec %ymm4,%ymm6,%ymm2
|
||||
[ ]*[a-f0-9]+: c4 e2 4d de 39 vaesdec \(%ecx\),%ymm6,%ymm7
|
||||
[ ]*[a-f0-9]+: c4 e2 4d df d4 vaesdeclast %ymm4,%ymm6,%ymm2
|
||||
[ ]*[a-f0-9]+: c4 e2 4d df 39 vaesdeclast \(%ecx\),%ymm6,%ymm7
|
||||
[ ]*[a-f0-9]+: c4 e2 4d dc d4 vaesenc %ymm4,%ymm6,%ymm2
|
||||
[ ]*[a-f0-9]+: c4 e2 4d dc 39 vaesenc \(%ecx\),%ymm6,%ymm7
|
||||
[ ]*[a-f0-9]+: c4 e2 4d dc 39 vaesenc \(%ecx\),%ymm6,%ymm7
|
||||
[ ]*[a-f0-9]+: c4 e2 4d dd d4 vaesenclast %ymm4,%ymm6,%ymm2
|
||||
[ ]*[a-f0-9]+: c4 e2 4d dd 39 vaesenclast \(%ecx\),%ymm6,%ymm7
|
||||
[ ]*[a-f0-9]+: c4 e2 4d dd 39 vaesenclast \(%ecx\),%ymm6,%ymm7
|
||||
[ ]*[a-f0-9]+: c4 e2 4d de d4 vaesdec %ymm4,%ymm6,%ymm2
|
||||
[ ]*[a-f0-9]+: c4 e2 4d de 39 vaesdec \(%ecx\),%ymm6,%ymm7
|
||||
[ ]*[a-f0-9]+: c4 e2 4d de 39 vaesdec \(%ecx\),%ymm6,%ymm7
|
||||
[ ]*[a-f0-9]+: c4 e2 4d df d4 vaesdeclast %ymm4,%ymm6,%ymm2
|
||||
[ ]*[a-f0-9]+: c4 e2 4d df 39 vaesdeclast \(%ecx\),%ymm6,%ymm7
|
||||
[ ]*[a-f0-9]+: c4 e2 4d df 39 vaesdeclast \(%ecx\),%ymm6,%ymm7
|
||||
#pass
|
||||
30
gas/testsuite/gas/i386/vaes.s
Normal file
30
gas/testsuite/gas/i386/vaes.s
Normal file
@ -0,0 +1,30 @@
|
||||
# Check VAES instructions
|
||||
|
||||
.allow_index_reg
|
||||
.text
|
||||
_start:
|
||||
# Tests for op ymm/mem256, ymm, ymm
|
||||
vaesenc %ymm4,%ymm6,%ymm2
|
||||
vaesenc (%ecx),%ymm6,%ymm7
|
||||
vaesenclast %ymm4,%ymm6,%ymm2
|
||||
vaesenclast (%ecx),%ymm6,%ymm7
|
||||
vaesdec %ymm4,%ymm6,%ymm2
|
||||
vaesdec (%ecx),%ymm6,%ymm7
|
||||
vaesdeclast %ymm4,%ymm6,%ymm2
|
||||
vaesdeclast (%ecx),%ymm6,%ymm7
|
||||
|
||||
.intel_syntax noprefix
|
||||
|
||||
# Tests for op ymm/mem256, ymm, ymm
|
||||
vaesenc ymm2,ymm6,ymm4
|
||||
vaesenc ymm7,ymm6,YMMWORD PTR [ecx]
|
||||
vaesenc ymm7,ymm6,[ecx]
|
||||
vaesenclast ymm2,ymm6,ymm4
|
||||
vaesenclast ymm7,ymm6,YMMWORD PTR [ecx]
|
||||
vaesenclast ymm7,ymm6,[ecx]
|
||||
vaesdec ymm2,ymm6,ymm4
|
||||
vaesdec ymm7,ymm6,YMMWORD PTR [ecx]
|
||||
vaesdec ymm7,ymm6,[ecx]
|
||||
vaesdeclast ymm2,ymm6,ymm4
|
||||
vaesdeclast ymm7,ymm6,YMMWORD PTR [ecx]
|
||||
vaesdeclast ymm7,ymm6,[ecx]
|
||||
28
gas/testsuite/gas/i386/x86-64-avx512f_vaes-intel.d
Normal file
28
gas/testsuite/gas/i386/x86-64-avx512f_vaes-intel.d
Normal file
@ -0,0 +1,28 @@
|
||||
#as:
|
||||
#objdump: -dw -Mintel
|
||||
#name: x86_64 AVX512F/VAES insns (Intel disassembly)
|
||||
#source: x86-64-avx512f_vaes.s
|
||||
|
||||
.*: +file format .*
|
||||
|
||||
|
||||
Disassembly of section \.text:
|
||||
|
||||
0+ <_start>:
|
||||
[ ]*[a-f0-9]+:[ ]*62 02 15 40 de f4[ ]*vaesdec zmm30,zmm29,zmm28
|
||||
[ ]*[a-f0-9]+:[ ]*62 22 15 40 de b4 f0 23 01 00 00[ ]*vaesdec zmm30,zmm29,ZMMWORD PTR \[rax\+r14\*8\+0x123\]
|
||||
[ ]*[a-f0-9]+:[ ]*62 02 15 40 df f4[ ]*vaesdeclast zmm30,zmm29,zmm28
|
||||
[ ]*[a-f0-9]+:[ ]*62 22 15 40 df b4 f0 23 01 00 00[ ]*vaesdeclast zmm30,zmm29,ZMMWORD PTR \[rax\+r14\*8\+0x123\]
|
||||
[ ]*[a-f0-9]+:[ ]*62 02 15 40 dc f4[ ]*vaesenc zmm30,zmm29,zmm28
|
||||
[ ]*[a-f0-9]+:[ ]*62 22 15 40 dc b4 f0 23 01 00 00[ ]*vaesenc zmm30,zmm29,ZMMWORD PTR \[rax\+r14\*8\+0x123\]
|
||||
[ ]*[a-f0-9]+:[ ]*62 02 15 40 dd f4[ ]*vaesenclast zmm30,zmm29,zmm28
|
||||
[ ]*[a-f0-9]+:[ ]*62 22 15 40 dd b4 f0 23 01 00 00[ ]*vaesenclast zmm30,zmm29,ZMMWORD PTR \[rax\+r14\*8\+0x123\]
|
||||
[ ]*[a-f0-9]+:[ ]*62 02 15 40 de f4[ ]*vaesdec zmm30,zmm29,zmm28
|
||||
[ ]*[a-f0-9]+:[ ]*62 22 15 40 de b4 f0 34 12 00 00[ ]*vaesdec zmm30,zmm29,ZMMWORD PTR \[rax\+r14\*8\+0x1234\]
|
||||
[ ]*[a-f0-9]+:[ ]*62 02 15 40 df f4[ ]*vaesdeclast zmm30,zmm29,zmm28
|
||||
[ ]*[a-f0-9]+:[ ]*62 22 15 40 df b4 f0 34 12 00 00[ ]*vaesdeclast zmm30,zmm29,ZMMWORD PTR \[rax\+r14\*8\+0x1234\]
|
||||
[ ]*[a-f0-9]+:[ ]*62 02 15 40 dc f4[ ]*vaesenc zmm30,zmm29,zmm28
|
||||
[ ]*[a-f0-9]+:[ ]*62 22 15 40 dc b4 f0 34 12 00 00[ ]*vaesenc zmm30,zmm29,ZMMWORD PTR \[rax\+r14\*8\+0x1234\]
|
||||
[ ]*[a-f0-9]+:[ ]*62 02 15 40 dd f4[ ]*vaesenclast zmm30,zmm29,zmm28
|
||||
[ ]*[a-f0-9]+:[ ]*62 22 15 40 dd b4 f0 34 12 00 00[ ]*vaesenclast zmm30,zmm29,ZMMWORD PTR \[rax\+r14\*8\+0x1234\]
|
||||
#pass
|
||||
23
gas/testsuite/gas/i386/x86-64-avx512f_vaes-wig.s
Normal file
23
gas/testsuite/gas/i386/x86-64-avx512f_vaes-wig.s
Normal file
@ -0,0 +1,23 @@
|
||||
# Check 64bit AVX512F,VAES WIG instructions
|
||||
|
||||
.allow_index_reg
|
||||
.text
|
||||
_start:
|
||||
vaesdec %zmm28, %zmm29, %zmm30 # AVX512F,VAES
|
||||
vaesdec 0x123(%rax,%r14,8), %zmm29, %zmm30 # AVX512F,VAES
|
||||
vaesdeclast %zmm28, %zmm29, %zmm30 # AVX512F,VAES
|
||||
vaesdeclast 0x123(%rax,%r14,8), %zmm29, %zmm30 # AVX512F,VAES
|
||||
vaesenc %zmm28, %zmm29, %zmm30 # AVX512F,VAES
|
||||
vaesenc 0x123(%rax,%r14,8), %zmm29, %zmm30 # AVX512F,VAES
|
||||
vaesenclast %zmm28, %zmm29, %zmm30 # AVX512F,VAES
|
||||
vaesenclast 0x123(%rax,%r14,8), %zmm29, %zmm30 # AVX512F,VAES
|
||||
|
||||
.intel_syntax noprefix
|
||||
vaesdec zmm30, zmm29, zmm28 # AVX512F,VAES
|
||||
vaesdec zmm30, zmm29, ZMMWORD PTR [rax+r14*8+0x1234] # AVX512F,VAES
|
||||
vaesdeclast zmm30, zmm29, zmm28 # AVX512F,VAES
|
||||
vaesdeclast zmm30, zmm29, ZMMWORD PTR [rax+r14*8+0x1234] # AVX512F,VAES
|
||||
vaesenc zmm30, zmm29, zmm28 # AVX512F,VAES
|
||||
vaesenc zmm30, zmm29, ZMMWORD PTR [rax+r14*8+0x1234] # AVX512F,VAES
|
||||
vaesenclast zmm30, zmm29, zmm28 # AVX512F,VAES
|
||||
vaesenclast zmm30, zmm29, ZMMWORD PTR [rax+r14*8+0x1234] # AVX512F,VAES
|
||||
28
gas/testsuite/gas/i386/x86-64-avx512f_vaes-wig1-intel.d
Normal file
28
gas/testsuite/gas/i386/x86-64-avx512f_vaes-wig1-intel.d
Normal file
@ -0,0 +1,28 @@
|
||||
#as: -mevexwig=1
|
||||
#objdump: -dw -Mintel
|
||||
#name: x86_64 AVX512F/VAES wig insns (Intel disassembly)
|
||||
#source: x86-64-avx512f_vaes-wig.s
|
||||
|
||||
.*: +file format .*
|
||||
|
||||
|
||||
Disassembly of section \.text:
|
||||
|
||||
0+ <_start>:
|
||||
[ ]*[a-f0-9]+:[ ]*62 02 95 40 de f4[ ]*vaesdec zmm30,zmm29,zmm28
|
||||
[ ]*[a-f0-9]+:[ ]*62 22 95 40 de b4 f0 23 01 00 00[ ]*vaesdec zmm30,zmm29,ZMMWORD PTR \[rax\+r14\*8\+0x123\]
|
||||
[ ]*[a-f0-9]+:[ ]*62 02 95 40 df f4[ ]*vaesdeclast zmm30,zmm29,zmm28
|
||||
[ ]*[a-f0-9]+:[ ]*62 22 95 40 df b4 f0 23 01 00 00[ ]*vaesdeclast zmm30,zmm29,ZMMWORD PTR \[rax\+r14\*8\+0x123\]
|
||||
[ ]*[a-f0-9]+:[ ]*62 02 95 40 dc f4[ ]*vaesenc zmm30,zmm29,zmm28
|
||||
[ ]*[a-f0-9]+:[ ]*62 22 95 40 dc b4 f0 23 01 00 00[ ]*vaesenc zmm30,zmm29,ZMMWORD PTR \[rax\+r14\*8\+0x123\]
|
||||
[ ]*[a-f0-9]+:[ ]*62 02 95 40 dd f4[ ]*vaesenclast zmm30,zmm29,zmm28
|
||||
[ ]*[a-f0-9]+:[ ]*62 22 95 40 dd b4 f0 23 01 00 00[ ]*vaesenclast zmm30,zmm29,ZMMWORD PTR \[rax\+r14\*8\+0x123\]
|
||||
[ ]*[a-f0-9]+:[ ]*62 02 95 40 de f4[ ]*vaesdec zmm30,zmm29,zmm28
|
||||
[ ]*[a-f0-9]+:[ ]*62 22 95 40 de b4 f0 34 12 00 00[ ]*vaesdec zmm30,zmm29,ZMMWORD PTR \[rax\+r14\*8\+0x1234\]
|
||||
[ ]*[a-f0-9]+:[ ]*62 02 95 40 df f4[ ]*vaesdeclast zmm30,zmm29,zmm28
|
||||
[ ]*[a-f0-9]+:[ ]*62 22 95 40 df b4 f0 34 12 00 00[ ]*vaesdeclast zmm30,zmm29,ZMMWORD PTR \[rax\+r14\*8\+0x1234\]
|
||||
[ ]*[a-f0-9]+:[ ]*62 02 95 40 dc f4[ ]*vaesenc zmm30,zmm29,zmm28
|
||||
[ ]*[a-f0-9]+:[ ]*62 22 95 40 dc b4 f0 34 12 00 00[ ]*vaesenc zmm30,zmm29,ZMMWORD PTR \[rax\+r14\*8\+0x1234\]
|
||||
[ ]*[a-f0-9]+:[ ]*62 02 95 40 dd f4[ ]*vaesenclast zmm30,zmm29,zmm28
|
||||
[ ]*[a-f0-9]+:[ ]*62 22 95 40 dd b4 f0 34 12 00 00[ ]*vaesenclast zmm30,zmm29,ZMMWORD PTR \[rax\+r14\*8\+0x1234\]
|
||||
#pass
|
||||
28
gas/testsuite/gas/i386/x86-64-avx512f_vaes-wig1.d
Normal file
28
gas/testsuite/gas/i386/x86-64-avx512f_vaes-wig1.d
Normal file
@ -0,0 +1,28 @@
|
||||
#as: -mevexwig=1
|
||||
#objdump: -dw
|
||||
#name: x86_64 AVX512F/VAES wig insns
|
||||
#source: x86-64-avx512f_vaes-wig.s
|
||||
|
||||
.*: +file format .*
|
||||
|
||||
|
||||
Disassembly of section \.text:
|
||||
|
||||
0+ <_start>:
|
||||
[ ]*[a-f0-9]+:[ ]*62 02 95 40 de f4[ ]*vaesdec %zmm28,%zmm29,%zmm30
|
||||
[ ]*[a-f0-9]+:[ ]*62 22 95 40 de b4 f0 23 01 00 00[ ]*vaesdec 0x123\(%rax,%r14,8\),%zmm29,%zmm30
|
||||
[ ]*[a-f0-9]+:[ ]*62 02 95 40 df f4[ ]*vaesdeclast %zmm28,%zmm29,%zmm30
|
||||
[ ]*[a-f0-9]+:[ ]*62 22 95 40 df b4 f0 23 01 00 00[ ]*vaesdeclast 0x123\(%rax,%r14,8\),%zmm29,%zmm30
|
||||
[ ]*[a-f0-9]+:[ ]*62 02 95 40 dc f4[ ]*vaesenc %zmm28,%zmm29,%zmm30
|
||||
[ ]*[a-f0-9]+:[ ]*62 22 95 40 dc b4 f0 23 01 00 00[ ]*vaesenc 0x123\(%rax,%r14,8\),%zmm29,%zmm30
|
||||
[ ]*[a-f0-9]+:[ ]*62 02 95 40 dd f4[ ]*vaesenclast %zmm28,%zmm29,%zmm30
|
||||
[ ]*[a-f0-9]+:[ ]*62 22 95 40 dd b4 f0 23 01 00 00[ ]*vaesenclast 0x123\(%rax,%r14,8\),%zmm29,%zmm30
|
||||
[ ]*[a-f0-9]+:[ ]*62 02 95 40 de f4[ ]*vaesdec %zmm28,%zmm29,%zmm30
|
||||
[ ]*[a-f0-9]+:[ ]*62 22 95 40 de b4 f0 34 12 00 00[ ]*vaesdec 0x1234\(%rax,%r14,8\),%zmm29,%zmm30
|
||||
[ ]*[a-f0-9]+:[ ]*62 02 95 40 df f4[ ]*vaesdeclast %zmm28,%zmm29,%zmm30
|
||||
[ ]*[a-f0-9]+:[ ]*62 22 95 40 df b4 f0 34 12 00 00[ ]*vaesdeclast 0x1234\(%rax,%r14,8\),%zmm29,%zmm30
|
||||
[ ]*[a-f0-9]+:[ ]*62 02 95 40 dc f4[ ]*vaesenc %zmm28,%zmm29,%zmm30
|
||||
[ ]*[a-f0-9]+:[ ]*62 22 95 40 dc b4 f0 34 12 00 00[ ]*vaesenc 0x1234\(%rax,%r14,8\),%zmm29,%zmm30
|
||||
[ ]*[a-f0-9]+:[ ]*62 02 95 40 dd f4[ ]*vaesenclast %zmm28,%zmm29,%zmm30
|
||||
[ ]*[a-f0-9]+:[ ]*62 22 95 40 dd b4 f0 34 12 00 00[ ]*vaesenclast 0x1234\(%rax,%r14,8\),%zmm29,%zmm30
|
||||
#pass
|
||||
28
gas/testsuite/gas/i386/x86-64-avx512f_vaes.d
Normal file
28
gas/testsuite/gas/i386/x86-64-avx512f_vaes.d
Normal file
@ -0,0 +1,28 @@
|
||||
#as:
|
||||
#objdump: -dw
|
||||
#name: x86_64 AVX512F/VAES insns
|
||||
#source: x86-64-avx512f_vaes.s
|
||||
|
||||
.*: +file format .*
|
||||
|
||||
|
||||
Disassembly of section \.text:
|
||||
|
||||
0+ <_start>:
|
||||
[ ]*[a-f0-9]+:[ ]*62 02 15 40 de f4[ ]*vaesdec %zmm28,%zmm29,%zmm30
|
||||
[ ]*[a-f0-9]+:[ ]*62 22 15 40 de b4 f0 23 01 00 00[ ]*vaesdec 0x123\(%rax,%r14,8\),%zmm29,%zmm30
|
||||
[ ]*[a-f0-9]+:[ ]*62 02 15 40 df f4[ ]*vaesdeclast %zmm28,%zmm29,%zmm30
|
||||
[ ]*[a-f0-9]+:[ ]*62 22 15 40 df b4 f0 23 01 00 00[ ]*vaesdeclast 0x123\(%rax,%r14,8\),%zmm29,%zmm30
|
||||
[ ]*[a-f0-9]+:[ ]*62 02 15 40 dc f4[ ]*vaesenc %zmm28,%zmm29,%zmm30
|
||||
[ ]*[a-f0-9]+:[ ]*62 22 15 40 dc b4 f0 23 01 00 00[ ]*vaesenc 0x123\(%rax,%r14,8\),%zmm29,%zmm30
|
||||
[ ]*[a-f0-9]+:[ ]*62 02 15 40 dd f4[ ]*vaesenclast %zmm28,%zmm29,%zmm30
|
||||
[ ]*[a-f0-9]+:[ ]*62 22 15 40 dd b4 f0 23 01 00 00[ ]*vaesenclast 0x123\(%rax,%r14,8\),%zmm29,%zmm30
|
||||
[ ]*[a-f0-9]+:[ ]*62 02 15 40 de f4[ ]*vaesdec %zmm28,%zmm29,%zmm30
|
||||
[ ]*[a-f0-9]+:[ ]*62 22 15 40 de b4 f0 34 12 00 00[ ]*vaesdec 0x1234\(%rax,%r14,8\),%zmm29,%zmm30
|
||||
[ ]*[a-f0-9]+:[ ]*62 02 15 40 df f4[ ]*vaesdeclast %zmm28,%zmm29,%zmm30
|
||||
[ ]*[a-f0-9]+:[ ]*62 22 15 40 df b4 f0 34 12 00 00[ ]*vaesdeclast 0x1234\(%rax,%r14,8\),%zmm29,%zmm30
|
||||
[ ]*[a-f0-9]+:[ ]*62 02 15 40 dc f4[ ]*vaesenc %zmm28,%zmm29,%zmm30
|
||||
[ ]*[a-f0-9]+:[ ]*62 22 15 40 dc b4 f0 34 12 00 00[ ]*vaesenc 0x1234\(%rax,%r14,8\),%zmm29,%zmm30
|
||||
[ ]*[a-f0-9]+:[ ]*62 02 15 40 dd f4[ ]*vaesenclast %zmm28,%zmm29,%zmm30
|
||||
[ ]*[a-f0-9]+:[ ]*62 22 15 40 dd b4 f0 34 12 00 00[ ]*vaesenclast 0x1234\(%rax,%r14,8\),%zmm29,%zmm30
|
||||
#pass
|
||||
23
gas/testsuite/gas/i386/x86-64-avx512f_vaes.s
Normal file
23
gas/testsuite/gas/i386/x86-64-avx512f_vaes.s
Normal file
@ -0,0 +1,23 @@
|
||||
# Check 64bit AVX512F,VAES instructions
|
||||
|
||||
.allow_index_reg
|
||||
.text
|
||||
_start:
|
||||
vaesdec %zmm28, %zmm29, %zmm30 # AVX512F,VAES
|
||||
vaesdec 0x123(%rax,%r14,8), %zmm29, %zmm30 # AVX512F,VAES
|
||||
vaesdeclast %zmm28, %zmm29, %zmm30 # AVX512F,VAES
|
||||
vaesdeclast 0x123(%rax,%r14,8), %zmm29, %zmm30 # AVX512F,VAES
|
||||
vaesenc %zmm28, %zmm29, %zmm30 # AVX512F,VAES
|
||||
vaesenc 0x123(%rax,%r14,8), %zmm29, %zmm30 # AVX512F,VAES
|
||||
vaesenclast %zmm28, %zmm29, %zmm30 # AVX512F,VAES
|
||||
vaesenclast 0x123(%rax,%r14,8), %zmm29, %zmm30 # AVX512F,VAES
|
||||
|
||||
.intel_syntax noprefix
|
||||
vaesdec zmm30, zmm29, zmm28 # AVX512F,VAES
|
||||
vaesdec zmm30, zmm29, ZMMWORD PTR [rax+r14*8+0x1234] # AVX512F,VAES
|
||||
vaesdeclast zmm30, zmm29, zmm28 # AVX512F,VAES
|
||||
vaesdeclast zmm30, zmm29, ZMMWORD PTR [rax+r14*8+0x1234] # AVX512F,VAES
|
||||
vaesenc zmm30, zmm29, zmm28 # AVX512F,VAES
|
||||
vaesenc zmm30, zmm29, ZMMWORD PTR [rax+r14*8+0x1234] # AVX512F,VAES
|
||||
vaesenclast zmm30, zmm29, zmm28 # AVX512F,VAES
|
||||
vaesenclast zmm30, zmm29, ZMMWORD PTR [rax+r14*8+0x1234] # AVX512F,VAES
|
||||
61
gas/testsuite/gas/i386/x86-64-avx512vl_vaes-intel.d
Normal file
61
gas/testsuite/gas/i386/x86-64-avx512vl_vaes-intel.d
Normal file
@ -0,0 +1,61 @@
|
||||
#as:
|
||||
#objdump: -dw -Mintel
|
||||
#name: x86_64 AVX512VL/VAES insns (Intel disassembly)
|
||||
#source: x86-64-avx512vl_vaes.s
|
||||
|
||||
.*: +file format .*
|
||||
|
||||
|
||||
Disassembly of section \.text:
|
||||
|
||||
0+ <_start>:
|
||||
[ ]*[a-f0-9]+:[ ]*62 02 15 00 de f4[ ]*vaesdec xmm30,xmm29,xmm28
|
||||
[ ]*[a-f0-9]+:[ ]*62 22 15 00 de b4 f0 23 01 00 00[ ]*vaesdec xmm30,xmm29,XMMWORD PTR \[rax\+r14\*8\+0x123\]
|
||||
[ ]*[a-f0-9]+:[ ]*62 62 15 00 de b2 f0 07 00 00[ ]*vaesdec xmm30,xmm29,XMMWORD PTR \[rdx\+0x7f0\]
|
||||
[ ]*[a-f0-9]+:[ ]*62 02 15 20 de f4[ ]*vaesdec ymm30,ymm29,ymm28
|
||||
[ ]*[a-f0-9]+:[ ]*62 62 15 20 de 31[ ]*vaesdec ymm30,ymm29,YMMWORD PTR \[rcx\]
|
||||
[ ]*[a-f0-9]+:[ ]*62 22 15 20 de b4 f0 23 01 00 00[ ]*vaesdec ymm30,ymm29,YMMWORD PTR \[rax\+r14\*8\+0x123\]
|
||||
[ ]*[a-f0-9]+:[ ]*62 62 15 20 de b2 e0 0f 00 00[ ]*vaesdec ymm30,ymm29,YMMWORD PTR \[rdx\+0xfe0\]
|
||||
[ ]*[a-f0-9]+:[ ]*62 02 15 00 df f4[ ]*vaesdeclast xmm30,xmm29,xmm28
|
||||
[ ]*[a-f0-9]+:[ ]*62 22 15 00 df b4 f0 23 01 00 00[ ]*vaesdeclast xmm30,xmm29,XMMWORD PTR \[rax\+r14\*8\+0x123\]
|
||||
[ ]*[a-f0-9]+:[ ]*62 62 15 00 df b2 f0 07 00 00[ ]*vaesdeclast xmm30,xmm29,XMMWORD PTR \[rdx\+0x7f0\]
|
||||
[ ]*[a-f0-9]+:[ ]*62 02 15 20 df f4[ ]*vaesdeclast ymm30,ymm29,ymm28
|
||||
[ ]*[a-f0-9]+:[ ]*62 22 15 20 df b4 f0 23 01 00 00[ ]*vaesdeclast ymm30,ymm29,YMMWORD PTR \[rax\+r14\*8\+0x123\]
|
||||
[ ]*[a-f0-9]+:[ ]*62 62 15 20 df b2 e0 0f 00 00[ ]*vaesdeclast ymm30,ymm29,YMMWORD PTR \[rdx\+0xfe0\]
|
||||
[ ]*[a-f0-9]+:[ ]*62 02 15 00 dc f4[ ]*vaesenc xmm30,xmm29,xmm28
|
||||
[ ]*[a-f0-9]+:[ ]*62 22 15 00 dc b4 f0 23 01 00 00[ ]*vaesenc xmm30,xmm29,XMMWORD PTR \[rax\+r14\*8\+0x123\]
|
||||
[ ]*[a-f0-9]+:[ ]*62 62 15 00 dc b2 f0 07 00 00[ ]*vaesenc xmm30,xmm29,XMMWORD PTR \[rdx\+0x7f0\]
|
||||
[ ]*[a-f0-9]+:[ ]*62 02 15 20 dc f4[ ]*vaesenc ymm30,ymm29,ymm28
|
||||
[ ]*[a-f0-9]+:[ ]*62 22 15 20 dc b4 f0 23 01 00 00[ ]*vaesenc ymm30,ymm29,YMMWORD PTR \[rax\+r14\*8\+0x123\]
|
||||
[ ]*[a-f0-9]+:[ ]*62 62 15 20 dc b2 e0 0f 00 00[ ]*vaesenc ymm30,ymm29,YMMWORD PTR \[rdx\+0xfe0\]
|
||||
[ ]*[a-f0-9]+:[ ]*62 02 15 00 dd f4[ ]*vaesenclast xmm30,xmm29,xmm28
|
||||
[ ]*[a-f0-9]+:[ ]*62 22 15 00 dd b4 f0 23 01 00 00[ ]*vaesenclast xmm30,xmm29,XMMWORD PTR \[rax\+r14\*8\+0x123\]
|
||||
[ ]*[a-f0-9]+:[ ]*62 62 15 00 dd b2 f0 07 00 00[ ]*vaesenclast xmm30,xmm29,XMMWORD PTR \[rdx\+0x7f0\]
|
||||
[ ]*[a-f0-9]+:[ ]*62 02 15 20 dd f4[ ]*vaesenclast ymm30,ymm29,ymm28
|
||||
[ ]*[a-f0-9]+:[ ]*62 22 15 20 dd b4 f0 23 01 00 00[ ]*vaesenclast ymm30,ymm29,YMMWORD PTR \[rax\+r14\*8\+0x123\]
|
||||
[ ]*[a-f0-9]+:[ ]*62 62 15 20 dd b2 e0 0f 00 00[ ]*vaesenclast ymm30,ymm29,YMMWORD PTR \[rdx\+0xfe0\]
|
||||
[ ]*[a-f0-9]+:[ ]*62 02 15 00 de f4[ ]*vaesdec xmm30,xmm29,xmm28
|
||||
[ ]*[a-f0-9]+:[ ]*62 22 15 00 de b4 f0 34 12 00 00[ ]*vaesdec xmm30,xmm29,XMMWORD PTR \[rax\+r14\*8\+0x1234\]
|
||||
[ ]*[a-f0-9]+:[ ]*62 62 15 00 de b2 f0 07 00 00[ ]*vaesdec xmm30,xmm29,XMMWORD PTR \[rdx\+0x7f0\]
|
||||
[ ]*[a-f0-9]+:[ ]*62 02 15 20 de f4[ ]*vaesdec ymm30,ymm29,ymm28
|
||||
[ ]*[a-f0-9]+:[ ]*62 22 15 20 de b4 f0 34 12 00 00[ ]*vaesdec ymm30,ymm29,YMMWORD PTR \[rax\+r14\*8\+0x1234\]
|
||||
[ ]*[a-f0-9]+:[ ]*62 62 15 20 de b2 e0 0f 00 00[ ]*vaesdec ymm30,ymm29,YMMWORD PTR \[rdx\+0xfe0\]
|
||||
[ ]*[a-f0-9]+:[ ]*62 02 15 00 df f4[ ]*vaesdeclast xmm30,xmm29,xmm28
|
||||
[ ]*[a-f0-9]+:[ ]*62 22 15 00 df b4 f0 34 12 00 00[ ]*vaesdeclast xmm30,xmm29,XMMWORD PTR \[rax\+r14\*8\+0x1234\]
|
||||
[ ]*[a-f0-9]+:[ ]*62 62 15 00 df b2 f0 07 00 00[ ]*vaesdeclast xmm30,xmm29,XMMWORD PTR \[rdx\+0x7f0\]
|
||||
[ ]*[a-f0-9]+:[ ]*62 02 15 20 df f4[ ]*vaesdeclast ymm30,ymm29,ymm28
|
||||
[ ]*[a-f0-9]+:[ ]*62 22 15 20 df b4 f0 34 12 00 00[ ]*vaesdeclast ymm30,ymm29,YMMWORD PTR \[rax\+r14\*8\+0x1234\]
|
||||
[ ]*[a-f0-9]+:[ ]*62 62 15 20 df b2 e0 0f 00 00[ ]*vaesdeclast ymm30,ymm29,YMMWORD PTR \[rdx\+0xfe0\]
|
||||
[ ]*[a-f0-9]+:[ ]*62 02 15 00 dc f4[ ]*vaesenc xmm30,xmm29,xmm28
|
||||
[ ]*[a-f0-9]+:[ ]*62 22 15 00 dc b4 f0 34 12 00 00[ ]*vaesenc xmm30,xmm29,XMMWORD PTR \[rax\+r14\*8\+0x1234\]
|
||||
[ ]*[a-f0-9]+:[ ]*62 62 15 00 dc b2 f0 07 00 00[ ]*vaesenc xmm30,xmm29,XMMWORD PTR \[rdx\+0x7f0\]
|
||||
[ ]*[a-f0-9]+:[ ]*62 02 15 20 dc f4[ ]*vaesenc ymm30,ymm29,ymm28
|
||||
[ ]*[a-f0-9]+:[ ]*62 22 15 20 dc b4 f0 34 12 00 00[ ]*vaesenc ymm30,ymm29,YMMWORD PTR \[rax\+r14\*8\+0x1234\]
|
||||
[ ]*[a-f0-9]+:[ ]*62 62 15 20 dc b2 e0 0f 00 00[ ]*vaesenc ymm30,ymm29,YMMWORD PTR \[rdx\+0xfe0\]
|
||||
[ ]*[a-f0-9]+:[ ]*62 02 15 00 dd f4[ ]*vaesenclast xmm30,xmm29,xmm28
|
||||
[ ]*[a-f0-9]+:[ ]*62 22 15 00 dd b4 f0 34 12 00 00[ ]*vaesenclast xmm30,xmm29,XMMWORD PTR \[rax\+r14\*8\+0x1234\]
|
||||
[ ]*[a-f0-9]+:[ ]*62 62 15 00 dd b2 f0 07 00 00[ ]*vaesenclast xmm30,xmm29,XMMWORD PTR \[rdx\+0x7f0\]
|
||||
[ ]*[a-f0-9]+:[ ]*62 02 15 20 dd f4[ ]*vaesenclast ymm30,ymm29,ymm28
|
||||
[ ]*[a-f0-9]+:[ ]*62 22 15 20 dd b4 f0 34 12 00 00[ ]*vaesenclast ymm30,ymm29,YMMWORD PTR \[rax\+r14\*8\+0x1234\]
|
||||
[ ]*[a-f0-9]+:[ ]*62 62 15 20 dd b2 e0 0f 00 00[ ]*vaesenclast ymm30,ymm29,YMMWORD PTR \[rdx\+0xfe0\]
|
||||
#pass
|
||||
39
gas/testsuite/gas/i386/x86-64-avx512vl_vaes-wig.s
Normal file
39
gas/testsuite/gas/i386/x86-64-avx512vl_vaes-wig.s
Normal file
@ -0,0 +1,39 @@
|
||||
# Check 64bit AVX512VL,VAES WIG instructions
|
||||
|
||||
.allow_index_reg
|
||||
.text
|
||||
_start:
|
||||
vaesdec %xmm28, %xmm29, %xmm30 # AVX512VL,VAES
|
||||
vaesdec 0x123(%rax,%r14,8), %xmm29, %xmm30 # AVX512VL,VAES
|
||||
vaesdec %ymm28, %ymm29, %ymm30 # AVX512VL,VAES
|
||||
vaesdec 0x123(%rax,%r14,8), %ymm29, %ymm30 # AVX512VL,VAES
|
||||
vaesdeclast %xmm28, %xmm29, %xmm30 # AVX512VL,VAES
|
||||
vaesdeclast 0x123(%rax,%r14,8), %xmm29, %xmm30 # AVX512VL,VAES
|
||||
vaesdeclast %ymm28, %ymm29, %ymm30 # AVX512VL,VAES
|
||||
vaesdeclast 0x123(%rax,%r14,8), %ymm29, %ymm30 # AVX512VL,VAES
|
||||
vaesenc %xmm28, %xmm29, %xmm30 # AVX512VL,VAES
|
||||
vaesenc 0x123(%rax,%r14,8), %xmm29, %xmm30 # AVX512VL,VAES
|
||||
vaesenc %ymm28, %ymm29, %ymm30 # AVX512VL,VAES
|
||||
vaesenc 0x123(%rax,%r14,8), %ymm29, %ymm30 # AVX512VL,VAES
|
||||
vaesenclast %xmm28, %xmm29, %xmm30 # AVX512VL,VAES
|
||||
vaesenclast 0x123(%rax,%r14,8), %xmm29, %xmm30 # AVX512VL,VAES
|
||||
vaesenclast %ymm28, %ymm29, %ymm30 # AVX512VL,VAES
|
||||
vaesenclast 0x123(%rax,%r14,8), %ymm29, %ymm30 # AVX512VL,VAES
|
||||
|
||||
.intel_syntax noprefix
|
||||
vaesdec xmm30, xmm29, xmm28 # AVX512VL,VAES
|
||||
vaesdec xmm30, xmm29, XMMWORD PTR [rax+r14*8+0x1234] # AVX512VL,VAES
|
||||
vaesdec ymm30, ymm29, ymm28 # AVX512VL,VAES
|
||||
vaesdec ymm30, ymm29, YMMWORD PTR [rax+r14*8+0x1234] # AVX512VL,VAES
|
||||
vaesdeclast xmm30, xmm29, xmm28 # AVX512VL,VAES
|
||||
vaesdeclast xmm30, xmm29, XMMWORD PTR [rax+r14*8+0x1234] # AVX512VL,VAES
|
||||
vaesdeclast ymm30, ymm29, ymm28 # AVX512VL,VAES
|
||||
vaesdeclast ymm30, ymm29, YMMWORD PTR [rax+r14*8+0x1234] # AVX512VL,VAES
|
||||
vaesenc xmm30, xmm29, xmm28 # AVX512VL,VAES
|
||||
vaesenc xmm30, xmm29, XMMWORD PTR [rax+r14*8+0x1234] # AVX512VL,VAES
|
||||
vaesenc ymm30, ymm29, ymm28 # AVX512VL,VAES
|
||||
vaesenc ymm30, ymm29, YMMWORD PTR [rax+r14*8+0x1234] # AVX512VL,VAES
|
||||
vaesenclast xmm30, xmm29, xmm28 # AVX512VL,VAES
|
||||
vaesenclast xmm30, xmm29, XMMWORD PTR [rax+r14*8+0x1234] # AVX512VL,VAES
|
||||
vaesenclast ymm30, ymm29, ymm28 # AVX512VL,VAES
|
||||
vaesenclast ymm30, ymm29, YMMWORD PTR [rax+r14*8+0x1234] # AVX512VL,VAES
|
||||
44
gas/testsuite/gas/i386/x86-64-avx512vl_vaes-wig1-intel.d
Normal file
44
gas/testsuite/gas/i386/x86-64-avx512vl_vaes-wig1-intel.d
Normal file
@ -0,0 +1,44 @@
|
||||
#as: -mevexwig=1
|
||||
#objdump: -dw -Mintel
|
||||
#name: x86_64 AVX512VL/VAES wig insns (Intel disassembly)
|
||||
#source: x86-64-avx512vl_vaes-wig.s
|
||||
|
||||
.*: +file format .*
|
||||
|
||||
|
||||
Disassembly of section \.text:
|
||||
|
||||
0+ <_start>:
|
||||
[ ]*[a-f0-9]+:[ ]*62 02 95 00 de f4[ ]*vaesdec xmm30,xmm29,xmm28
|
||||
[ ]*[a-f0-9]+:[ ]*62 22 95 00 de b4 f0 23 01 00 00[ ]*vaesdec xmm30,xmm29,XMMWORD PTR \[rax\+r14\*8\+0x123\]
|
||||
[ ]*[a-f0-9]+:[ ]*62 02 95 20 de f4[ ]*vaesdec ymm30,ymm29,ymm28
|
||||
[ ]*[a-f0-9]+:[ ]*62 22 95 20 de b4 f0 23 01 00 00[ ]*vaesdec ymm30,ymm29,YMMWORD PTR \[rax\+r14\*8\+0x123\]
|
||||
[ ]*[a-f0-9]+:[ ]*62 02 95 00 df f4[ ]*vaesdeclast xmm30,xmm29,xmm28
|
||||
[ ]*[a-f0-9]+:[ ]*62 22 95 00 df b4 f0 23 01 00 00[ ]*vaesdeclast xmm30,xmm29,XMMWORD PTR \[rax\+r14\*8\+0x123\]
|
||||
[ ]*[a-f0-9]+:[ ]*62 02 95 20 df f4[ ]*vaesdeclast ymm30,ymm29,ymm28
|
||||
[ ]*[a-f0-9]+:[ ]*62 22 95 20 df b4 f0 23 01 00 00[ ]*vaesdeclast ymm30,ymm29,YMMWORD PTR \[rax\+r14\*8\+0x123\]
|
||||
[ ]*[a-f0-9]+:[ ]*62 02 95 00 dc f4[ ]*vaesenc xmm30,xmm29,xmm28
|
||||
[ ]*[a-f0-9]+:[ ]*62 22 95 00 dc b4 f0 23 01 00 00[ ]*vaesenc xmm30,xmm29,XMMWORD PTR \[rax\+r14\*8\+0x123\]
|
||||
[ ]*[a-f0-9]+:[ ]*62 02 95 20 dc f4[ ]*vaesenc ymm30,ymm29,ymm28
|
||||
[ ]*[a-f0-9]+:[ ]*62 22 95 20 dc b4 f0 23 01 00 00[ ]*vaesenc ymm30,ymm29,YMMWORD PTR \[rax\+r14\*8\+0x123\]
|
||||
[ ]*[a-f0-9]+:[ ]*62 02 95 00 dd f4[ ]*vaesenclast xmm30,xmm29,xmm28
|
||||
[ ]*[a-f0-9]+:[ ]*62 22 95 00 dd b4 f0 23 01 00 00[ ]*vaesenclast xmm30,xmm29,XMMWORD PTR \[rax\+r14\*8\+0x123\]
|
||||
[ ]*[a-f0-9]+:[ ]*62 02 95 20 dd f4[ ]*vaesenclast ymm30,ymm29,ymm28
|
||||
[ ]*[a-f0-9]+:[ ]*62 22 95 20 dd b4 f0 23 01 00 00[ ]*vaesenclast ymm30,ymm29,YMMWORD PTR \[rax\+r14\*8\+0x123\]
|
||||
[ ]*[a-f0-9]+:[ ]*62 02 95 00 de f4[ ]*vaesdec xmm30,xmm29,xmm28
|
||||
[ ]*[a-f0-9]+:[ ]*62 22 95 00 de b4 f0 34 12 00 00[ ]*vaesdec xmm30,xmm29,XMMWORD PTR \[rax\+r14\*8\+0x1234\]
|
||||
[ ]*[a-f0-9]+:[ ]*62 02 95 20 de f4[ ]*vaesdec ymm30,ymm29,ymm28
|
||||
[ ]*[a-f0-9]+:[ ]*62 22 95 20 de b4 f0 34 12 00 00[ ]*vaesdec ymm30,ymm29,YMMWORD PTR \[rax\+r14\*8\+0x1234\]
|
||||
[ ]*[a-f0-9]+:[ ]*62 02 95 00 df f4[ ]*vaesdeclast xmm30,xmm29,xmm28
|
||||
[ ]*[a-f0-9]+:[ ]*62 22 95 00 df b4 f0 34 12 00 00[ ]*vaesdeclast xmm30,xmm29,XMMWORD PTR \[rax\+r14\*8\+0x1234\]
|
||||
[ ]*[a-f0-9]+:[ ]*62 02 95 20 df f4[ ]*vaesdeclast ymm30,ymm29,ymm28
|
||||
[ ]*[a-f0-9]+:[ ]*62 22 95 20 df b4 f0 34 12 00 00[ ]*vaesdeclast ymm30,ymm29,YMMWORD PTR \[rax\+r14\*8\+0x1234\]
|
||||
[ ]*[a-f0-9]+:[ ]*62 02 95 00 dc f4[ ]*vaesenc xmm30,xmm29,xmm28
|
||||
[ ]*[a-f0-9]+:[ ]*62 22 95 00 dc b4 f0 34 12 00 00[ ]*vaesenc xmm30,xmm29,XMMWORD PTR \[rax\+r14\*8\+0x1234\]
|
||||
[ ]*[a-f0-9]+:[ ]*62 02 95 20 dc f4[ ]*vaesenc ymm30,ymm29,ymm28
|
||||
[ ]*[a-f0-9]+:[ ]*62 22 95 20 dc b4 f0 34 12 00 00[ ]*vaesenc ymm30,ymm29,YMMWORD PTR \[rax\+r14\*8\+0x1234\]
|
||||
[ ]*[a-f0-9]+:[ ]*62 02 95 00 dd f4[ ]*vaesenclast xmm30,xmm29,xmm28
|
||||
[ ]*[a-f0-9]+:[ ]*62 22 95 00 dd b4 f0 34 12 00 00[ ]*vaesenclast xmm30,xmm29,XMMWORD PTR \[rax\+r14\*8\+0x1234\]
|
||||
[ ]*[a-f0-9]+:[ ]*62 02 95 20 dd f4[ ]*vaesenclast ymm30,ymm29,ymm28
|
||||
[ ]*[a-f0-9]+:[ ]*62 22 95 20 dd b4 f0 34 12 00 00[ ]*vaesenclast ymm30,ymm29,YMMWORD PTR \[rax\+r14\*8\+0x1234\]
|
||||
#pass
|
||||
44
gas/testsuite/gas/i386/x86-64-avx512vl_vaes-wig1.d
Normal file
44
gas/testsuite/gas/i386/x86-64-avx512vl_vaes-wig1.d
Normal file
@ -0,0 +1,44 @@
|
||||
#as: -mevexwig=1
|
||||
#objdump: -dw
|
||||
#name: x86_64 AVX512VL/VAES wig insns
|
||||
#source: x86-64-avx512vl_vaes-wig.s
|
||||
|
||||
.*: +file format .*
|
||||
|
||||
|
||||
Disassembly of section \.text:
|
||||
|
||||
0+ <_start>:
|
||||
[ ]*[a-f0-9]+:[ ]*62 02 95 00 de f4[ ]*vaesdec %xmm28,%xmm29,%xmm30
|
||||
[ ]*[a-f0-9]+:[ ]*62 22 95 00 de b4 f0 23 01 00 00[ ]*vaesdec 0x123\(%rax,%r14,8\),%xmm29,%xmm30
|
||||
[ ]*[a-f0-9]+:[ ]*62 02 95 20 de f4[ ]*vaesdec %ymm28,%ymm29,%ymm30
|
||||
[ ]*[a-f0-9]+:[ ]*62 22 95 20 de b4 f0 23 01 00 00[ ]*vaesdec 0x123\(%rax,%r14,8\),%ymm29,%ymm30
|
||||
[ ]*[a-f0-9]+:[ ]*62 02 95 00 df f4[ ]*vaesdeclast %xmm28,%xmm29,%xmm30
|
||||
[ ]*[a-f0-9]+:[ ]*62 22 95 00 df b4 f0 23 01 00 00[ ]*vaesdeclast 0x123\(%rax,%r14,8\),%xmm29,%xmm30
|
||||
[ ]*[a-f0-9]+:[ ]*62 02 95 20 df f4[ ]*vaesdeclast %ymm28,%ymm29,%ymm30
|
||||
[ ]*[a-f0-9]+:[ ]*62 22 95 20 df b4 f0 23 01 00 00[ ]*vaesdeclast 0x123\(%rax,%r14,8\),%ymm29,%ymm30
|
||||
[ ]*[a-f0-9]+:[ ]*62 02 95 00 dc f4[ ]*vaesenc %xmm28,%xmm29,%xmm30
|
||||
[ ]*[a-f0-9]+:[ ]*62 22 95 00 dc b4 f0 23 01 00 00[ ]*vaesenc 0x123\(%rax,%r14,8\),%xmm29,%xmm30
|
||||
[ ]*[a-f0-9]+:[ ]*62 02 95 20 dc f4[ ]*vaesenc %ymm28,%ymm29,%ymm30
|
||||
[ ]*[a-f0-9]+:[ ]*62 22 95 20 dc b4 f0 23 01 00 00[ ]*vaesenc 0x123\(%rax,%r14,8\),%ymm29,%ymm30
|
||||
[ ]*[a-f0-9]+:[ ]*62 02 95 00 dd f4[ ]*vaesenclast %xmm28,%xmm29,%xmm30
|
||||
[ ]*[a-f0-9]+:[ ]*62 22 95 00 dd b4 f0 23 01 00 00[ ]*vaesenclast 0x123\(%rax,%r14,8\),%xmm29,%xmm30
|
||||
[ ]*[a-f0-9]+:[ ]*62 02 95 20 dd f4[ ]*vaesenclast %ymm28,%ymm29,%ymm30
|
||||
[ ]*[a-f0-9]+:[ ]*62 22 95 20 dd b4 f0 23 01 00 00[ ]*vaesenclast 0x123\(%rax,%r14,8\),%ymm29,%ymm30
|
||||
[ ]*[a-f0-9]+:[ ]*62 02 95 00 de f4[ ]*vaesdec %xmm28,%xmm29,%xmm30
|
||||
[ ]*[a-f0-9]+:[ ]*62 22 95 00 de b4 f0 34 12 00 00[ ]*vaesdec 0x1234\(%rax,%r14,8\),%xmm29,%xmm30
|
||||
[ ]*[a-f0-9]+:[ ]*62 02 95 20 de f4[ ]*vaesdec %ymm28,%ymm29,%ymm30
|
||||
[ ]*[a-f0-9]+:[ ]*62 22 95 20 de b4 f0 34 12 00 00[ ]*vaesdec 0x1234\(%rax,%r14,8\),%ymm29,%ymm30
|
||||
[ ]*[a-f0-9]+:[ ]*62 02 95 00 df f4[ ]*vaesdeclast %xmm28,%xmm29,%xmm30
|
||||
[ ]*[a-f0-9]+:[ ]*62 22 95 00 df b4 f0 34 12 00 00[ ]*vaesdeclast 0x1234\(%rax,%r14,8\),%xmm29,%xmm30
|
||||
[ ]*[a-f0-9]+:[ ]*62 02 95 20 df f4[ ]*vaesdeclast %ymm28,%ymm29,%ymm30
|
||||
[ ]*[a-f0-9]+:[ ]*62 22 95 20 df b4 f0 34 12 00 00[ ]*vaesdeclast 0x1234\(%rax,%r14,8\),%ymm29,%ymm30
|
||||
[ ]*[a-f0-9]+:[ ]*62 02 95 00 dc f4[ ]*vaesenc %xmm28,%xmm29,%xmm30
|
||||
[ ]*[a-f0-9]+:[ ]*62 22 95 00 dc b4 f0 34 12 00 00[ ]*vaesenc 0x1234\(%rax,%r14,8\),%xmm29,%xmm30
|
||||
[ ]*[a-f0-9]+:[ ]*62 02 95 20 dc f4[ ]*vaesenc %ymm28,%ymm29,%ymm30
|
||||
[ ]*[a-f0-9]+:[ ]*62 22 95 20 dc b4 f0 34 12 00 00[ ]*vaesenc 0x1234\(%rax,%r14,8\),%ymm29,%ymm30
|
||||
[ ]*[a-f0-9]+:[ ]*62 02 95 00 dd f4[ ]*vaesenclast %xmm28,%xmm29,%xmm30
|
||||
[ ]*[a-f0-9]+:[ ]*62 22 95 00 dd b4 f0 34 12 00 00[ ]*vaesenclast 0x1234\(%rax,%r14,8\),%xmm29,%xmm30
|
||||
[ ]*[a-f0-9]+:[ ]*62 02 95 20 dd f4[ ]*vaesenclast %ymm28,%ymm29,%ymm30
|
||||
[ ]*[a-f0-9]+:[ ]*62 22 95 20 dd b4 f0 34 12 00 00[ ]*vaesenclast 0x1234\(%rax,%r14,8\),%ymm29,%ymm30
|
||||
#pass
|
||||
61
gas/testsuite/gas/i386/x86-64-avx512vl_vaes.d
Normal file
61
gas/testsuite/gas/i386/x86-64-avx512vl_vaes.d
Normal file
@ -0,0 +1,61 @@
|
||||
#as:
|
||||
#objdump: -dw
|
||||
#name: x86_64 AVX512VL/VAES insns
|
||||
#source: x86-64-avx512vl_vaes.s
|
||||
|
||||
.*: +file format .*
|
||||
|
||||
|
||||
Disassembly of section \.text:
|
||||
|
||||
0+ <_start>:
|
||||
[ ]*[a-f0-9]+:[ ]*62 02 15 00 de f4[ ]*vaesdec %xmm28,%xmm29,%xmm30
|
||||
[ ]*[a-f0-9]+:[ ]*62 22 15 00 de b4 f0 23 01 00 00[ ]*vaesdec 0x123\(%rax,%r14,8\),%xmm29,%xmm30
|
||||
[ ]*[a-f0-9]+:[ ]*62 62 15 00 de b2 f0 07 00 00[ ]*vaesdec 0x7f0\(%rdx\),%xmm29,%xmm30
|
||||
[ ]*[a-f0-9]+:[ ]*62 02 15 20 de f4[ ]*vaesdec %ymm28,%ymm29,%ymm30
|
||||
[ ]*[a-f0-9]+:[ ]*62 62 15 20 de 31[ ]*vaesdec \(%rcx\),%ymm29,%ymm30
|
||||
[ ]*[a-f0-9]+:[ ]*62 22 15 20 de b4 f0 23 01 00 00[ ]*vaesdec 0x123\(%rax,%r14,8\),%ymm29,%ymm30
|
||||
[ ]*[a-f0-9]+:[ ]*62 62 15 20 de b2 e0 0f 00 00[ ]*vaesdec 0xfe0\(%rdx\),%ymm29,%ymm30
|
||||
[ ]*[a-f0-9]+:[ ]*62 02 15 00 df f4[ ]*vaesdeclast %xmm28,%xmm29,%xmm30
|
||||
[ ]*[a-f0-9]+:[ ]*62 22 15 00 df b4 f0 23 01 00 00[ ]*vaesdeclast 0x123\(%rax,%r14,8\),%xmm29,%xmm30
|
||||
[ ]*[a-f0-9]+:[ ]*62 62 15 00 df b2 f0 07 00 00[ ]*vaesdeclast 0x7f0\(%rdx\),%xmm29,%xmm30
|
||||
[ ]*[a-f0-9]+:[ ]*62 02 15 20 df f4[ ]*vaesdeclast %ymm28,%ymm29,%ymm30
|
||||
[ ]*[a-f0-9]+:[ ]*62 22 15 20 df b4 f0 23 01 00 00[ ]*vaesdeclast 0x123\(%rax,%r14,8\),%ymm29,%ymm30
|
||||
[ ]*[a-f0-9]+:[ ]*62 62 15 20 df b2 e0 0f 00 00[ ]*vaesdeclast 0xfe0\(%rdx\),%ymm29,%ymm30
|
||||
[ ]*[a-f0-9]+:[ ]*62 02 15 00 dc f4[ ]*vaesenc %xmm28,%xmm29,%xmm30
|
||||
[ ]*[a-f0-9]+:[ ]*62 22 15 00 dc b4 f0 23 01 00 00[ ]*vaesenc 0x123\(%rax,%r14,8\),%xmm29,%xmm30
|
||||
[ ]*[a-f0-9]+:[ ]*62 62 15 00 dc b2 f0 07 00 00[ ]*vaesenc 0x7f0\(%rdx\),%xmm29,%xmm30
|
||||
[ ]*[a-f0-9]+:[ ]*62 02 15 20 dc f4[ ]*vaesenc %ymm28,%ymm29,%ymm30
|
||||
[ ]*[a-f0-9]+:[ ]*62 22 15 20 dc b4 f0 23 01 00 00[ ]*vaesenc 0x123\(%rax,%r14,8\),%ymm29,%ymm30
|
||||
[ ]*[a-f0-9]+:[ ]*62 62 15 20 dc b2 e0 0f 00 00[ ]*vaesenc 0xfe0\(%rdx\),%ymm29,%ymm30
|
||||
[ ]*[a-f0-9]+:[ ]*62 02 15 00 dd f4[ ]*vaesenclast %xmm28,%xmm29,%xmm30
|
||||
[ ]*[a-f0-9]+:[ ]*62 22 15 00 dd b4 f0 23 01 00 00[ ]*vaesenclast 0x123\(%rax,%r14,8\),%xmm29,%xmm30
|
||||
[ ]*[a-f0-9]+:[ ]*62 62 15 00 dd b2 f0 07 00 00[ ]*vaesenclast 0x7f0\(%rdx\),%xmm29,%xmm30
|
||||
[ ]*[a-f0-9]+:[ ]*62 02 15 20 dd f4[ ]*vaesenclast %ymm28,%ymm29,%ymm30
|
||||
[ ]*[a-f0-9]+:[ ]*62 22 15 20 dd b4 f0 23 01 00 00[ ]*vaesenclast 0x123\(%rax,%r14,8\),%ymm29,%ymm30
|
||||
[ ]*[a-f0-9]+:[ ]*62 62 15 20 dd b2 e0 0f 00 00[ ]*vaesenclast 0xfe0\(%rdx\),%ymm29,%ymm30
|
||||
[ ]*[a-f0-9]+:[ ]*62 02 15 00 de f4[ ]*vaesdec %xmm28,%xmm29,%xmm30
|
||||
[ ]*[a-f0-9]+:[ ]*62 22 15 00 de b4 f0 34 12 00 00[ ]*vaesdec 0x1234\(%rax,%r14,8\),%xmm29,%xmm30
|
||||
[ ]*[a-f0-9]+:[ ]*62 62 15 00 de b2 f0 07 00 00[ ]*vaesdec 0x7f0\(%rdx\),%xmm29,%xmm30
|
||||
[ ]*[a-f0-9]+:[ ]*62 02 15 20 de f4[ ]*vaesdec %ymm28,%ymm29,%ymm30
|
||||
[ ]*[a-f0-9]+:[ ]*62 22 15 20 de b4 f0 34 12 00 00[ ]*vaesdec 0x1234\(%rax,%r14,8\),%ymm29,%ymm30
|
||||
[ ]*[a-f0-9]+:[ ]*62 62 15 20 de b2 e0 0f 00 00[ ]*vaesdec 0xfe0\(%rdx\),%ymm29,%ymm30
|
||||
[ ]*[a-f0-9]+:[ ]*62 02 15 00 df f4[ ]*vaesdeclast %xmm28,%xmm29,%xmm30
|
||||
[ ]*[a-f0-9]+:[ ]*62 22 15 00 df b4 f0 34 12 00 00[ ]*vaesdeclast 0x1234\(%rax,%r14,8\),%xmm29,%xmm30
|
||||
[ ]*[a-f0-9]+:[ ]*62 62 15 00 df b2 f0 07 00 00[ ]*vaesdeclast 0x7f0\(%rdx\),%xmm29,%xmm30
|
||||
[ ]*[a-f0-9]+:[ ]*62 02 15 20 df f4[ ]*vaesdeclast %ymm28,%ymm29,%ymm30
|
||||
[ ]*[a-f0-9]+:[ ]*62 22 15 20 df b4 f0 34 12 00 00[ ]*vaesdeclast 0x1234\(%rax,%r14,8\),%ymm29,%ymm30
|
||||
[ ]*[a-f0-9]+:[ ]*62 62 15 20 df b2 e0 0f 00 00[ ]*vaesdeclast 0xfe0\(%rdx\),%ymm29,%ymm30
|
||||
[ ]*[a-f0-9]+:[ ]*62 02 15 00 dc f4[ ]*vaesenc %xmm28,%xmm29,%xmm30
|
||||
[ ]*[a-f0-9]+:[ ]*62 22 15 00 dc b4 f0 34 12 00 00[ ]*vaesenc 0x1234\(%rax,%r14,8\),%xmm29,%xmm30
|
||||
[ ]*[a-f0-9]+:[ ]*62 62 15 00 dc b2 f0 07 00 00[ ]*vaesenc 0x7f0\(%rdx\),%xmm29,%xmm30
|
||||
[ ]*[a-f0-9]+:[ ]*62 02 15 20 dc f4[ ]*vaesenc %ymm28,%ymm29,%ymm30
|
||||
[ ]*[a-f0-9]+:[ ]*62 22 15 20 dc b4 f0 34 12 00 00[ ]*vaesenc 0x1234\(%rax,%r14,8\),%ymm29,%ymm30
|
||||
[ ]*[a-f0-9]+:[ ]*62 62 15 20 dc b2 e0 0f 00 00[ ]*vaesenc 0xfe0\(%rdx\),%ymm29,%ymm30
|
||||
[ ]*[a-f0-9]+:[ ]*62 02 15 00 dd f4[ ]*vaesenclast %xmm28,%xmm29,%xmm30
|
||||
[ ]*[a-f0-9]+:[ ]*62 22 15 00 dd b4 f0 34 12 00 00[ ]*vaesenclast 0x1234\(%rax,%r14,8\),%xmm29,%xmm30
|
||||
[ ]*[a-f0-9]+:[ ]*62 62 15 00 dd b2 f0 07 00 00[ ]*vaesenclast 0x7f0\(%rdx\),%xmm29,%xmm30
|
||||
[ ]*[a-f0-9]+:[ ]*62 02 15 20 dd f4[ ]*vaesenclast %ymm28,%ymm29,%ymm30
|
||||
[ ]*[a-f0-9]+:[ ]*62 22 15 20 dd b4 f0 34 12 00 00[ ]*vaesenclast 0x1234\(%rax,%r14,8\),%ymm29,%ymm30
|
||||
[ ]*[a-f0-9]+:[ ]*62 62 15 20 dd b2 e0 0f 00 00[ ]*vaesenclast 0xfe0\(%rdx\),%ymm29,%ymm30
|
||||
#pass
|
||||
56
gas/testsuite/gas/i386/x86-64-avx512vl_vaes.s
Normal file
56
gas/testsuite/gas/i386/x86-64-avx512vl_vaes.s
Normal file
@ -0,0 +1,56 @@
|
||||
# Check 64bit AVX512VL,VAES instructions
|
||||
|
||||
.allow_index_reg
|
||||
.text
|
||||
_start:
|
||||
vaesdec %xmm28, %xmm29, %xmm30 # AVX512VL,VAES
|
||||
vaesdec 0x123(%rax,%r14,8), %xmm29, %xmm30 # AVX512VL,VAES
|
||||
vaesdec 2032(%rdx), %xmm29, %xmm30 # AVX512VL,VAES Disp8
|
||||
vaesdec %ymm28, %ymm29, %ymm30 # AVX512VL,VAES
|
||||
vaesdec (%rcx), %ymm29, %ymm30 # AVX512VL,VAES
|
||||
vaesdec 0x123(%rax,%r14,8), %ymm29, %ymm30 # AVX512VL,VAES
|
||||
vaesdec 4064(%rdx), %ymm29, %ymm30 # AVX512VL,VAES Disp8
|
||||
vaesdeclast %xmm28, %xmm29, %xmm30 # AVX512VL,VAES
|
||||
vaesdeclast 0x123(%rax,%r14,8), %xmm29, %xmm30 # AVX512VL,VAES
|
||||
vaesdeclast 2032(%rdx), %xmm29, %xmm30 # AVX512VL,VAES Disp8
|
||||
vaesdeclast %ymm28, %ymm29, %ymm30 # AVX512VL,VAES
|
||||
vaesdeclast 0x123(%rax,%r14,8), %ymm29, %ymm30 # AVX512VL,VAES
|
||||
vaesdeclast 4064(%rdx), %ymm29, %ymm30 # AVX512VL,VAES Disp8
|
||||
vaesenc %xmm28, %xmm29, %xmm30 # AVX512VL,VAES
|
||||
vaesenc 0x123(%rax,%r14,8), %xmm29, %xmm30 # AVX512VL,VAES
|
||||
vaesenc 2032(%rdx), %xmm29, %xmm30 # AVX512VL,VAES Disp8
|
||||
vaesenc %ymm28, %ymm29, %ymm30 # AVX512VL,VAES
|
||||
vaesenc 0x123(%rax,%r14,8), %ymm29, %ymm30 # AVX512VL,VAES
|
||||
vaesenc 4064(%rdx), %ymm29, %ymm30 # AVX512VL,VAES Disp8
|
||||
vaesenclast %xmm28, %xmm29, %xmm30 # AVX512VL,VAES
|
||||
vaesenclast 0x123(%rax,%r14,8), %xmm29, %xmm30 # AVX512VL,VAES
|
||||
vaesenclast 2032(%rdx), %xmm29, %xmm30 # AVX512VL,VAES Disp8
|
||||
vaesenclast %ymm28, %ymm29, %ymm30 # AVX512VL,VAES
|
||||
vaesenclast 0x123(%rax,%r14,8), %ymm29, %ymm30 # AVX512VL,VAES
|
||||
vaesenclast 4064(%rdx), %ymm29, %ymm30 # AVX512VL,VAES Disp8
|
||||
|
||||
.intel_syntax noprefix
|
||||
vaesdec xmm30, xmm29, xmm28 # AVX512VL,VAES
|
||||
vaesdec xmm30, xmm29, XMMWORD PTR [rax+r14*8+0x1234] # AVX512VL,VAES
|
||||
vaesdec xmm30, xmm29, XMMWORD PTR [rdx+2032] # AVX512VL,VAES Disp8
|
||||
vaesdec ymm30, ymm29, ymm28 # AVX512VL,VAES
|
||||
vaesdec ymm30, ymm29, YMMWORD PTR [rax+r14*8+0x1234] # AVX512VL,VAES
|
||||
vaesdec ymm30, ymm29, YMMWORD PTR [rdx+4064] # AVX512VL,VAES Disp8
|
||||
vaesdeclast xmm30, xmm29, xmm28 # AVX512VL,VAES
|
||||
vaesdeclast xmm30, xmm29, XMMWORD PTR [rax+r14*8+0x1234] # AVX512VL,VAES
|
||||
vaesdeclast xmm30, xmm29, XMMWORD PTR [rdx+2032] # AVX512VL,VAES Disp8
|
||||
vaesdeclast ymm30, ymm29, ymm28 # AVX512VL,VAES
|
||||
vaesdeclast ymm30, ymm29, YMMWORD PTR [rax+r14*8+0x1234] # AVX512VL,VAES
|
||||
vaesdeclast ymm30, ymm29, YMMWORD PTR [rdx+4064] # AVX512VL,VAES Disp8
|
||||
vaesenc xmm30, xmm29, xmm28 # AVX512VL,VAES
|
||||
vaesenc xmm30, xmm29, XMMWORD PTR [rax+r14*8+0x1234] # AVX512VL,VAES
|
||||
vaesenc xmm30, xmm29, XMMWORD PTR [rdx+2032] # AVX512VL,VAES Disp8
|
||||
vaesenc ymm30, ymm29, ymm28 # AVX512VL,VAES
|
||||
vaesenc ymm30, ymm29, YMMWORD PTR [rax+r14*8+0x1234] # AVX512VL,VAES
|
||||
vaesenc ymm30, ymm29, YMMWORD PTR [rdx+4064] # AVX512VL,VAES Disp8
|
||||
vaesenclast xmm30, xmm29, xmm28 # AVX512VL,VAES
|
||||
vaesenclast xmm30, xmm29, XMMWORD PTR [rax+r14*8+0x1234] # AVX512VL,VAES
|
||||
vaesenclast xmm30, xmm29, XMMWORD PTR [rdx+2032] # AVX512VL,VAES Disp8
|
||||
vaesenclast ymm30, ymm29, ymm28 # AVX512VL,VAES
|
||||
vaesenclast ymm30, ymm29, YMMWORD PTR [rax+r14*8+0x1234] # AVX512VL,VAES
|
||||
vaesenclast ymm30, ymm29, YMMWORD PTR [rdx+4064] # AVX512VL,VAES Disp8
|
||||
30
gas/testsuite/gas/i386/x86-64-vaes-intel.d
Normal file
30
gas/testsuite/gas/i386/x86-64-vaes-intel.d
Normal file
@ -0,0 +1,30 @@
|
||||
#objdump: -dwMintel
|
||||
#name: x86-64 VAES (Intel disassembly)
|
||||
#source: x86-64-vaes.s
|
||||
|
||||
.*: +file format .*
|
||||
|
||||
Disassembly of section .text:
|
||||
|
||||
0+ <_start>:
|
||||
[ ]*[a-f0-9]+: c4 e2 4d dc d4 vaesenc ymm2,ymm6,ymm4
|
||||
[ ]*[a-f0-9]+: c4 e2 4d dc 39 vaesenc ymm7,ymm6,YMMWORD PTR \[rcx\]
|
||||
[ ]*[a-f0-9]+: c4 e2 4d dd d4 vaesenclast ymm2,ymm6,ymm4
|
||||
[ ]*[a-f0-9]+: c4 e2 4d dd 39 vaesenclast ymm7,ymm6,YMMWORD PTR \[rcx\]
|
||||
[ ]*[a-f0-9]+: c4 e2 4d de d4 vaesdec ymm2,ymm6,ymm4
|
||||
[ ]*[a-f0-9]+: c4 e2 4d de 39 vaesdec ymm7,ymm6,YMMWORD PTR \[rcx\]
|
||||
[ ]*[a-f0-9]+: c4 e2 4d df d4 vaesdeclast ymm2,ymm6,ymm4
|
||||
[ ]*[a-f0-9]+: c4 e2 4d df 39 vaesdeclast ymm7,ymm6,YMMWORD PTR \[rcx\]
|
||||
[ ]*[a-f0-9]+: c4 e2 4d dc d4 vaesenc ymm2,ymm6,ymm4
|
||||
[ ]*[a-f0-9]+: c4 e2 4d dc 39 vaesenc ymm7,ymm6,YMMWORD PTR \[rcx\]
|
||||
[ ]*[a-f0-9]+: c4 e2 4d dc 39 vaesenc ymm7,ymm6,YMMWORD PTR \[rcx\]
|
||||
[ ]*[a-f0-9]+: c4 e2 4d dd d4 vaesenclast ymm2,ymm6,ymm4
|
||||
[ ]*[a-f0-9]+: c4 e2 4d dd 39 vaesenclast ymm7,ymm6,YMMWORD PTR \[rcx\]
|
||||
[ ]*[a-f0-9]+: c4 e2 4d dd 39 vaesenclast ymm7,ymm6,YMMWORD PTR \[rcx\]
|
||||
[ ]*[a-f0-9]+: c4 e2 4d de d4 vaesdec ymm2,ymm6,ymm4
|
||||
[ ]*[a-f0-9]+: c4 e2 4d de 39 vaesdec ymm7,ymm6,YMMWORD PTR \[rcx\]
|
||||
[ ]*[a-f0-9]+: c4 e2 4d de 39 vaesdec ymm7,ymm6,YMMWORD PTR \[rcx\]
|
||||
[ ]*[a-f0-9]+: c4 e2 4d df d4 vaesdeclast ymm2,ymm6,ymm4
|
||||
[ ]*[a-f0-9]+: c4 e2 4d df 39 vaesdeclast ymm7,ymm6,YMMWORD PTR \[rcx\]
|
||||
[ ]*[a-f0-9]+: c4 e2 4d df 39 vaesdeclast ymm7,ymm6,YMMWORD PTR \[rcx\]
|
||||
#pass
|
||||
29
gas/testsuite/gas/i386/x86-64-vaes.d
Normal file
29
gas/testsuite/gas/i386/x86-64-vaes.d
Normal file
@ -0,0 +1,29 @@
|
||||
#objdump: -dw
|
||||
#name: x86-64 VAES
|
||||
|
||||
.*: file format .*
|
||||
|
||||
Disassembly of section .text:
|
||||
|
||||
0+ <_start>:
|
||||
[ ]*[a-f0-9]+: c4 e2 4d dc d4 vaesenc %ymm4,%ymm6,%ymm2
|
||||
[ ]*[a-f0-9]+: c4 e2 4d dc 39 vaesenc \(%rcx\),%ymm6,%ymm7
|
||||
[ ]*[a-f0-9]+: c4 e2 4d dd d4 vaesenclast %ymm4,%ymm6,%ymm2
|
||||
[ ]*[a-f0-9]+: c4 e2 4d dd 39 vaesenclast \(%rcx\),%ymm6,%ymm7
|
||||
[ ]*[a-f0-9]+: c4 e2 4d de d4 vaesdec %ymm4,%ymm6,%ymm2
|
||||
[ ]*[a-f0-9]+: c4 e2 4d de 39 vaesdec \(%rcx\),%ymm6,%ymm7
|
||||
[ ]*[a-f0-9]+: c4 e2 4d df d4 vaesdeclast %ymm4,%ymm6,%ymm2
|
||||
[ ]*[a-f0-9]+: c4 e2 4d df 39 vaesdeclast \(%rcx\),%ymm6,%ymm7
|
||||
[ ]*[a-f0-9]+: c4 e2 4d dc d4 vaesenc %ymm4,%ymm6,%ymm2
|
||||
[ ]*[a-f0-9]+: c4 e2 4d dc 39 vaesenc \(%rcx\),%ymm6,%ymm7
|
||||
[ ]*[a-f0-9]+: c4 e2 4d dc 39 vaesenc \(%rcx\),%ymm6,%ymm7
|
||||
[ ]*[a-f0-9]+: c4 e2 4d dd d4 vaesenclast %ymm4,%ymm6,%ymm2
|
||||
[ ]*[a-f0-9]+: c4 e2 4d dd 39 vaesenclast \(%rcx\),%ymm6,%ymm7
|
||||
[ ]*[a-f0-9]+: c4 e2 4d dd 39 vaesenclast \(%rcx\),%ymm6,%ymm7
|
||||
[ ]*[a-f0-9]+: c4 e2 4d de d4 vaesdec %ymm4,%ymm6,%ymm2
|
||||
[ ]*[a-f0-9]+: c4 e2 4d de 39 vaesdec \(%rcx\),%ymm6,%ymm7
|
||||
[ ]*[a-f0-9]+: c4 e2 4d de 39 vaesdec \(%rcx\),%ymm6,%ymm7
|
||||
[ ]*[a-f0-9]+: c4 e2 4d df d4 vaesdeclast %ymm4,%ymm6,%ymm2
|
||||
[ ]*[a-f0-9]+: c4 e2 4d df 39 vaesdeclast \(%rcx\),%ymm6,%ymm7
|
||||
[ ]*[a-f0-9]+: c4 e2 4d df 39 vaesdeclast \(%rcx\),%ymm6,%ymm7
|
||||
#pass
|
||||
30
gas/testsuite/gas/i386/x86-64-vaes.s
Normal file
30
gas/testsuite/gas/i386/x86-64-vaes.s
Normal file
@ -0,0 +1,30 @@
|
||||
# Check 64bit VAES instructions
|
||||
|
||||
.allow_index_reg
|
||||
.text
|
||||
_start:
|
||||
# Tests for op ymm/mem256, ymm, ymm
|
||||
vaesenc %ymm4,%ymm6,%ymm2
|
||||
vaesenc (%rcx),%ymm6,%ymm7
|
||||
vaesenclast %ymm4,%ymm6,%ymm2
|
||||
vaesenclast (%rcx),%ymm6,%ymm7
|
||||
vaesdec %ymm4,%ymm6,%ymm2
|
||||
vaesdec (%rcx),%ymm6,%ymm7
|
||||
vaesdeclast %ymm4,%ymm6,%ymm2
|
||||
vaesdeclast (%rcx),%ymm6,%ymm7
|
||||
|
||||
.intel_syntax noprefix
|
||||
|
||||
# Tests for op ymm/mem256, ymm, ymm
|
||||
vaesenc ymm2,ymm6,ymm4
|
||||
vaesenc ymm7,ymm6,YMMWORD PTR [rcx]
|
||||
vaesenc ymm7,ymm6,[rcx]
|
||||
vaesenclast ymm2,ymm6,ymm4
|
||||
vaesenclast ymm7,ymm6,YMMWORD PTR [rcx]
|
||||
vaesenclast ymm7,ymm6,[rcx]
|
||||
vaesdec ymm2,ymm6,ymm4
|
||||
vaesdec ymm7,ymm6,YMMWORD PTR [rcx]
|
||||
vaesdec ymm7,ymm6,[rcx]
|
||||
vaesdeclast ymm2,ymm6,ymm4
|
||||
vaesdeclast ymm7,ymm6,YMMWORD PTR [rcx]
|
||||
vaesdeclast ymm7,ymm6,[rcx]
|
||||
@ -542,10 +542,10 @@ static const struct dis386 evex_table[][256] = {
|
||||
{ Bad_Opcode },
|
||||
{ Bad_Opcode },
|
||||
{ Bad_Opcode },
|
||||
{ Bad_Opcode },
|
||||
{ Bad_Opcode },
|
||||
{ Bad_Opcode },
|
||||
{ Bad_Opcode },
|
||||
{ PREFIX_TABLE (PREFIX_EVEX_0F38DC) },
|
||||
{ PREFIX_TABLE (PREFIX_EVEX_0F38DD) },
|
||||
{ PREFIX_TABLE (PREFIX_EVEX_0F38DE) },
|
||||
{ PREFIX_TABLE (PREFIX_EVEX_0F38DF) },
|
||||
/* E0 */
|
||||
{ Bad_Opcode },
|
||||
{ Bad_Opcode },
|
||||
@ -2539,6 +2539,30 @@ static const struct dis386 evex_table[][256] = {
|
||||
{ Bad_Opcode },
|
||||
{ "vgf2p8mulb", { XM, Vex, EXx }, 0 },
|
||||
},
|
||||
/* PREFIX_EVEX_0F38DC */
|
||||
{
|
||||
{ Bad_Opcode },
|
||||
{ Bad_Opcode },
|
||||
{ "vaesenc", { XM, Vex, EXx }, 0 },
|
||||
},
|
||||
/* PREFIX_EVEX_0F38DD */
|
||||
{
|
||||
{ Bad_Opcode },
|
||||
{ Bad_Opcode },
|
||||
{ "vaesenclast", { XM, Vex, EXx }, 0 },
|
||||
},
|
||||
/* PREFIX_EVEX_0F38DE */
|
||||
{
|
||||
{ Bad_Opcode },
|
||||
{ Bad_Opcode },
|
||||
{ "vaesdec", { XM, Vex, EXx }, 0 },
|
||||
},
|
||||
/* PREFIX_EVEX_0F38DF */
|
||||
{
|
||||
{ Bad_Opcode },
|
||||
{ Bad_Opcode },
|
||||
{ "vaesdeclast", { XM, Vex, EXx }, 0 },
|
||||
},
|
||||
/* PREFIX_EVEX_0F3A00 */
|
||||
{
|
||||
{ Bad_Opcode },
|
||||
@ -4040,3 +4064,4 @@ static const struct dis386 evex_table[][256] = {
|
||||
{ PREFIX_TABLE (PREFIX_EVEX_0F38C7_REG_6) },
|
||||
},
|
||||
#endif /* NEED_MOD_TABLE */
|
||||
|
||||
|
||||
@ -1660,6 +1660,10 @@ enum
|
||||
PREFIX_EVEX_0F38CC,
|
||||
PREFIX_EVEX_0F38CD,
|
||||
PREFIX_EVEX_0F38CF,
|
||||
PREFIX_EVEX_0F38DC,
|
||||
PREFIX_EVEX_0F38DD,
|
||||
PREFIX_EVEX_0F38DE,
|
||||
PREFIX_EVEX_0F38DF,
|
||||
|
||||
PREFIX_EVEX_0F3A00,
|
||||
PREFIX_EVEX_0F3A01,
|
||||
@ -1865,10 +1869,6 @@ enum
|
||||
VEX_LEN_0F3841_P_2,
|
||||
VEX_LEN_0F385A_P_2_M_0,
|
||||
VEX_LEN_0F38DB_P_2,
|
||||
VEX_LEN_0F38DC_P_2,
|
||||
VEX_LEN_0F38DD_P_2,
|
||||
VEX_LEN_0F38DE_P_2,
|
||||
VEX_LEN_0F38DF_P_2,
|
||||
VEX_LEN_0F38F2_P_0,
|
||||
VEX_LEN_0F38F3_R_1_P_0,
|
||||
VEX_LEN_0F38F3_R_2_P_0,
|
||||
@ -2191,10 +2191,6 @@ enum
|
||||
VEX_W_0F3879_P_2,
|
||||
VEX_W_0F38CF_P_2,
|
||||
VEX_W_0F38DB_P_2,
|
||||
VEX_W_0F38DC_P_2,
|
||||
VEX_W_0F38DD_P_2,
|
||||
VEX_W_0F38DE_P_2,
|
||||
VEX_W_0F38DF_P_2,
|
||||
VEX_W_0F3A00_P_2,
|
||||
VEX_W_0F3A01_P_2,
|
||||
VEX_W_0F3A02_P_2,
|
||||
@ -6394,28 +6390,28 @@ static const struct dis386 prefix_table[][4] = {
|
||||
{
|
||||
{ Bad_Opcode },
|
||||
{ Bad_Opcode },
|
||||
{ VEX_LEN_TABLE (VEX_LEN_0F38DC_P_2) },
|
||||
{ "vaesenc", { XM, Vex, EXx }, 0 },
|
||||
},
|
||||
|
||||
/* PREFIX_VEX_0F38DD */
|
||||
{
|
||||
{ Bad_Opcode },
|
||||
{ Bad_Opcode },
|
||||
{ VEX_LEN_TABLE (VEX_LEN_0F38DD_P_2) },
|
||||
{ "vaesenclast", { XM, Vex, EXx }, 0 },
|
||||
},
|
||||
|
||||
/* PREFIX_VEX_0F38DE */
|
||||
{
|
||||
{ Bad_Opcode },
|
||||
{ Bad_Opcode },
|
||||
{ VEX_LEN_TABLE (VEX_LEN_0F38DE_P_2) },
|
||||
{ "vaesdec", { XM, Vex, EXx }, 0 },
|
||||
},
|
||||
|
||||
/* PREFIX_VEX_0F38DF */
|
||||
{
|
||||
{ Bad_Opcode },
|
||||
{ Bad_Opcode },
|
||||
{ VEX_LEN_TABLE (VEX_LEN_0F38DF_P_2) },
|
||||
{ "vaesdeclast", { XM, Vex, EXx }, 0 },
|
||||
},
|
||||
|
||||
/* PREFIX_VEX_0F38F2 */
|
||||
@ -9940,26 +9936,6 @@ static const struct dis386 vex_len_table[][2] = {
|
||||
{ VEX_W_TABLE (VEX_W_0F38DB_P_2) },
|
||||
},
|
||||
|
||||
/* VEX_LEN_0F38DC_P_2 */
|
||||
{
|
||||
{ VEX_W_TABLE (VEX_W_0F38DC_P_2) },
|
||||
},
|
||||
|
||||
/* VEX_LEN_0F38DD_P_2 */
|
||||
{
|
||||
{ VEX_W_TABLE (VEX_W_0F38DD_P_2) },
|
||||
},
|
||||
|
||||
/* VEX_LEN_0F38DE_P_2 */
|
||||
{
|
||||
{ VEX_W_TABLE (VEX_W_0F38DE_P_2) },
|
||||
},
|
||||
|
||||
/* VEX_LEN_0F38DF_P_2 */
|
||||
{
|
||||
{ VEX_W_TABLE (VEX_W_0F38DF_P_2) },
|
||||
},
|
||||
|
||||
/* VEX_LEN_0F38F2_P_0 */
|
||||
{
|
||||
{ "andnS", { Gdq, VexGdq, Edq }, 0 },
|
||||
@ -11330,22 +11306,6 @@ static const struct dis386 vex_w_table[][2] = {
|
||||
/* VEX_W_0F38DB_P_2 */
|
||||
{ "vaesimc", { XM, EXx }, 0 },
|
||||
},
|
||||
{
|
||||
/* VEX_W_0F38DC_P_2 */
|
||||
{ "vaesenc", { XM, Vex128, EXx }, 0 },
|
||||
},
|
||||
{
|
||||
/* VEX_W_0F38DD_P_2 */
|
||||
{ "vaesenclast", { XM, Vex128, EXx }, 0 },
|
||||
},
|
||||
{
|
||||
/* VEX_W_0F38DE_P_2 */
|
||||
{ "vaesdec", { XM, Vex128, EXx }, 0 },
|
||||
},
|
||||
{
|
||||
/* VEX_W_0F38DF_P_2 */
|
||||
{ "vaesdeclast", { XM, Vex128, EXx }, 0 },
|
||||
},
|
||||
{
|
||||
/* VEX_W_0F3A00_P_2 */
|
||||
{ Bad_Opcode },
|
||||
|
||||
@ -269,6 +269,8 @@ static initializer cpu_flag_init[] =
|
||||
"CpuCET" },
|
||||
{ "CPU_GFNI_FLAGS",
|
||||
"CpuGFNI" },
|
||||
{ "CPU_VAES_FLAGS",
|
||||
"CpuVAES" },
|
||||
{ "CPU_ANY_X87_FLAGS",
|
||||
"CPU_ANY_287_FLAGS|Cpu8087" },
|
||||
{ "CPU_ANY_287_FLAGS",
|
||||
@ -535,6 +537,7 @@ static bitfield cpu_flags[] =
|
||||
BITFIELD (CpuPTWRITE),
|
||||
BITFIELD (CpuCET),
|
||||
BITFIELD (CpuGFNI),
|
||||
BITFIELD (CpuVAES),
|
||||
BITFIELD (CpuRegMMX),
|
||||
BITFIELD (CpuRegXMM),
|
||||
BITFIELD (CpuRegYMM),
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
@ -214,6 +214,8 @@ enum
|
||||
CpuCET,
|
||||
/* GFNI instructions required */
|
||||
CpuGFNI,
|
||||
/* VAES instructions required */
|
||||
CpuVAES,
|
||||
/* MMX register support required */
|
||||
CpuRegMMX,
|
||||
/* XMM register support required */
|
||||
@ -338,6 +340,7 @@ typedef union i386_cpu_flags
|
||||
unsigned int cpuptwrite:1;
|
||||
unsigned int cpucet:1;
|
||||
unsigned int cpugfni:1;
|
||||
unsigned int cpuvaes:1;
|
||||
unsigned int cpuregmmx:1;
|
||||
unsigned int cpuregxmm:1;
|
||||
unsigned int cpuregymm:1;
|
||||
|
||||
@ -1793,6 +1793,13 @@ aesimc, 2, 0x660f38db, None, 3, CpuAES, Modrm|IgnoreSize|No_bSuf|No_wSuf|No_lSuf
|
||||
aeskeygenassist, 3, 0x66df, None, 1, CpuAVX|CpuAES, Modrm|Vex|VexOpcode=2|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|SSE2AVX, { Imm8, Xmmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM, RegXMM }
|
||||
aeskeygenassist, 3, 0x660f3adf, None, 3, CpuAES, Modrm|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Imm8, Xmmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM, RegXMM }
|
||||
|
||||
// VAES
|
||||
|
||||
vaesdec, 3, 0x66de, None, 1, CpuVAES, Modrm|Vex=2|VexOpcode=1|VexVVVV=1|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Ymmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegYMM, RegYMM, RegYMM }
|
||||
vaesdeclast, 3, 0x66df, None, 1, CpuVAES, Modrm|Vex=2|VexOpcode=1|VexVVVV=1|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Ymmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegYMM, RegYMM, RegYMM }
|
||||
vaesenc, 3, 0x66dc, None, 1, CpuVAES, Modrm|Vex=2|VexOpcode=1|VexVVVV=1|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Ymmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegYMM, RegYMM, RegYMM }
|
||||
vaesenclast, 3, 0x66dd, None, 1, CpuVAES, Modrm|Vex=2|VexOpcode=1|VexVVVV=1|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Ymmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegYMM, RegYMM, RegYMM }
|
||||
|
||||
// PCLMUL
|
||||
|
||||
pclmulqdq, 3, 0x6644, None, 1, CpuAVX|CpuPCLMUL, Modrm|Vex|VexOpcode=2|VexVVVV=1|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|SSE2AVX, { Imm8, Xmmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM, RegXMM }
|
||||
@ -6078,6 +6085,23 @@ vgf2p8mulb, 3, 0x66cf, None, 1, CpuGFNI|CpuAVX512VL, Modrm|EVex=3|Masking=3|VexO
|
||||
|
||||
// AVX512 + GFNI instructions end
|
||||
|
||||
// AVX512 + VAES instructions
|
||||
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vaesdec, 3, 0x66de, None, 1, CpuAVX512F|CpuVAES, Modrm|EVex=1|VexOpcode=1|VexVVVV=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { RegZMM|ZMMword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|Vec_Disp8, RegZMM, RegZMM }
|
||||
vaesdec, 3, 0x66de, None, 1, CpuVAES|CpuAVX512VL, Modrm|EVex=2|VexOpcode=1|VexVVVV=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { RegXMM|XMMword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|Vec_Disp8, RegXMM, RegXMM }
|
||||
vaesdec, 3, 0x66de, None, 1, CpuVAES|CpuAVX512VL, Modrm|EVex=3|VexOpcode=1|VexVVVV=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { RegYMM|YMMword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|Vec_Disp8, RegYMM, RegYMM }
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||||
vaesdeclast, 3, 0x66df, None, 1, CpuAVX512F|CpuVAES, Modrm|EVex=1|VexOpcode=1|VexVVVV=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { RegZMM|ZMMword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|Vec_Disp8, RegZMM, RegZMM }
|
||||
vaesdeclast, 3, 0x66df, None, 1, CpuVAES|CpuAVX512VL, Modrm|EVex=2|VexOpcode=1|VexVVVV=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { RegXMM|XMMword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|Vec_Disp8, RegXMM, RegXMM }
|
||||
vaesdeclast, 3, 0x66df, None, 1, CpuVAES|CpuAVX512VL, Modrm|EVex=3|VexOpcode=1|VexVVVV=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { RegYMM|YMMword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|Vec_Disp8, RegYMM, RegYMM }
|
||||
vaesenc, 3, 0x66dc, None, 1, CpuAVX512F|CpuVAES, Modrm|EVex=1|VexOpcode=1|VexVVVV=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { RegZMM|ZMMword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|Vec_Disp8, RegZMM, RegZMM }
|
||||
vaesenc, 3, 0x66dc, None, 1, CpuVAES|CpuAVX512VL, Modrm|EVex=2|VexOpcode=1|VexVVVV=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { RegXMM|XMMword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|Vec_Disp8, RegXMM, RegXMM }
|
||||
vaesenc, 3, 0x66dc, None, 1, CpuVAES|CpuAVX512VL, Modrm|EVex=3|VexOpcode=1|VexVVVV=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { RegYMM|YMMword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|Vec_Disp8, RegYMM, RegYMM }
|
||||
vaesenclast, 3, 0x66dd, None, 1, CpuAVX512F|CpuVAES, Modrm|EVex=1|VexOpcode=1|VexVVVV=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { RegZMM|ZMMword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|Vec_Disp8, RegZMM, RegZMM }
|
||||
vaesenclast, 3, 0x66dd, None, 1, CpuVAES|CpuAVX512VL, Modrm|EVex=2|VexOpcode=1|VexVVVV=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { RegXMM|XMMword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|Vec_Disp8, RegXMM, RegXMM }
|
||||
vaesenclast, 3, 0x66dd, None, 1, CpuVAES|CpuAVX512VL, Modrm|EVex=3|VexOpcode=1|VexVVVV=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { RegYMM|YMMword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|Vec_Disp8, RegYMM, RegYMM }
|
||||
|
||||
// AVX512 + VAES instructions end
|
||||
|
||||
// CLZERO instructions
|
||||
|
||||
clzero, 0, 0xf01fc, None, 3, CpuCLZERO, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { 0 }
|
||||
|
||||
11076
opcodes/i386-tbl.h
11076
opcodes/i386-tbl.h
File diff suppressed because it is too large
Load Diff
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Reference in New Issue
Block a user