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gas/
2005-03-28 David Mosberger <davidm@hpl.hp.com> H.J. Lu <hongjiu.lu@intel.com> PR 803 NEWS: Mention "-mtune=[itanium1|itanium2]". * config/tc-ia64.c (md): Add tune. (md_parse_option): Accepted "-mtune=[itanium1|itanium2]". (md_show_usage): Add "-mtune=[itanium1|itanium2]". (extra_goodness): Prefer M- and I-unit NOPs for itanium2. F and B unit NOPs are discouraged for McKinley-derived cores. (md_begin): Don't hardcode the "extra_goodness()" function in the comment... (ia64_init): Set md.tune to itanium2. * doc/as.texinfo: Add -mtune=[itanium1|itanium2]". * doc/c-ia64.texi: Likewise. gas/testsuite/ 2005-03-28 H.J. Lu <hongjiu.lu@intel.com> PR 803 * gas/ia64/dv-imply.d: Pass -mtune=itanium1 to as. * gas/ia64/dv-mutex.d : Likewise. * gas/ia64/dv-safe.d: Likewise. * gas/ia64/dv-srlz.d.nop: Likewise. * gas/ia64/ldxmov-1.d: Likewise. * gas/ia64/opc-b.d: Likewise. * gas/ia64/opc-f.d: Likewise. * gas/ia64/opc-i.d: Likewise. * gas/ia64/opc-m.d: Likewise. * gas/ia64/operand-or.d: Likewise. * gas/ia64/pcrel.d: Likewise. * gas/ia64/pseudo.d: Likewise. * gas/ia64/tls.d: Likewise. ld/testsuite/ 2005-03-28 H.J. Lu <hongjiu.lu@intel.com> PR 803 * ld-ia64/ia64.exp: Pass -mtune=itanium1 to as.
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2005-03-28 David Mosberger <davidm@hpl.hp.com>
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H.J. Lu <hongjiu.lu@intel.com>
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PR 803
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NEWS: Mention "-mtune=[itanium1|itanium2]".
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* config/tc-ia64.c (md): Add tune.
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(md_parse_option): Accepted "-mtune=[itanium1|itanium2]".
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(md_show_usage): Add "-mtune=[itanium1|itanium2]".
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(extra_goodness): Prefer M- and I-unit NOPs for itanium2. F and
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B unit NOPs are discouraged for McKinley-derived cores.
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(md_begin): Don't hardcode the "extra_goodness()" function in
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the comment...
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(ia64_init): Set md.tune to itanium2.
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* doc/as.texinfo: Add -mtune=[itanium1|itanium2]".
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* doc/c-ia64.texi: Likewise.
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2005-03-27 Ian Lance Taylor <ian@airs.com>
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* config/obj-coff.c (coff_frob_symbol): When crashing because of a
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2
gas/NEWS
2
gas/NEWS
@ -1,5 +1,7 @@
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-*- text -*-
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* New command line option -mtune=[itanium1|itanium2] for IA64 targets.
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Changes in 2.16:
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* Redefinition of macros now results in an error.
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@ -229,6 +229,13 @@ static struct
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that are predicatable. */
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expressionS qp;
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/* Optimize for which CPU. */
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enum
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{
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itanium1,
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itanium2
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} tune;
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/* What to do when hint.b is used. */
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enum
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{
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@ -6957,6 +6964,16 @@ md_parse_option (c, arg)
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else
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return 0;
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}
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else if (strncmp (arg, "tune=", 5) == 0)
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{
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arg += 5;
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if (strcmp (arg, "itanium1") == 0)
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md.tune = itanium1;
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else if (strcmp (arg, "itanium2") == 0)
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md.tune = itanium2;
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else
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return 0;
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}
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else
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return 0;
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break;
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@ -7069,6 +7086,8 @@ IA-64 options:\n\
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EF_IA_64_NOFUNCDESC_CONS_GP)\n\
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-milp32|-milp64|-mlp64|-mp64 select data model (default -mlp64)\n\
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-mle | -mbe select little- or big-endian byte order (default -mle)\n\
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-mtune=[itanium1|itanium2]\n\
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tune for a specific CPU (default -mtune=itanium2)\n\
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-munwind-check=[warning|error]\n\
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unwind directive check (default -munwind-check=warning)\n\
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-mhint.b=[ok|warning|error]\n\
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@ -7122,11 +7141,30 @@ match (int templ, int type, int slot)
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static inline int
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extra_goodness (int templ, int slot)
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{
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if (slot == 1 && match (templ, IA64_TYPE_F, slot))
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return 2;
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if (slot == 2 && match (templ, IA64_TYPE_B, slot))
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return 1;
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return 0;
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switch (md.tune)
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{
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case itanium1:
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if (slot == 1 && match (templ, IA64_TYPE_F, slot))
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return 2;
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else if (slot == 2 && match (templ, IA64_TYPE_B, slot))
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return 1;
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else
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return 0;
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break;
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case itanium2:
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if (match (templ, IA64_TYPE_M, slot)
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|| match (templ, IA64_TYPE_I, slot))
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/* Favor M- and I-unit NOPs. We definitely want to avoid
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F-unit and B-unit may cause split-issue or less-than-optimal
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branch-prediction. */
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return 2;
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else
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return 0;
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break;
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default:
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abort ();
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return 0;
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}
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}
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/* This function is called once, at assembler startup time. It sets
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@ -7222,10 +7260,9 @@ md_begin ()
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&zero_address_frag);
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/* Compute the table of best templates. We compute goodness as a
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base 4 value, in which each match counts for 3, each F counts
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for 2, each B counts for 1. This should maximize the number of
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F and B nops in the chosen bundles, which is good because these
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pipelines are least likely to be overcommitted. */
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base 4 value, in which each match counts for 3. Match-failures
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result in NOPs and we use extra_goodness() to pick the execution
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units that are best suited for issuing the NOP. */
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for (i = 0; i < IA64_NUM_TYPES; ++i)
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for (j = 0; j < IA64_NUM_TYPES; ++j)
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for (k = 0; k < IA64_NUM_TYPES; ++k)
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@ -7426,6 +7463,7 @@ ia64_init (argc, argv)
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/* FIXME: We should change it to unwind_check_error someday. */
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md.unwind_check = unwind_check_warning;
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md.hint_b = hint_b_error;
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md.tune = itanium2;
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}
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/* Return a string for the target object file format. */
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@ -315,6 +315,7 @@ gcc(1), ld(1), and the Info entries for @file{binutils} and @file{ld}.
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[@b{-mconstant-gp}|@b{-mauto-pic}]
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[@b{-milp32}|@b{-milp64}|@b{-mlp64}|@b{-mp64}]
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[@b{-mle}|@b{mbe}]
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[@b{-mtune=itanium1}|@b{-mtune=itanium2}]
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[@b{-munwind-check=warning}|@b{-munwind-check=error}]
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[@b{-mhint.b=ok}|@b{-mhint.b=warning}|@b{-mhint.b=error}]
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[@b{-x}|@b{-xexplicit}] [@b{-xauto}] [@b{-xdebug}]
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@ -65,6 +65,11 @@ These options select the byte order. The @code{-mle} option selects little-endi
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byte order (default) and @code{-mbe} selects big-endian byte order. Note that
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IA-64 machine code always uses little-endian byte order.
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@item -mtune=itanium1
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@item -mtune=itanium2
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Tune for a particular IA-64 CPU, @var{itanium1} or @var{itanium2}. The
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default is @var{itanium2}.
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@item -munwind-check=warning
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@item -munwind-check=error
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These options control what the assembler will do when performing
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@ -1,3 +1,20 @@
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2005-03-28 H.J. Lu <hongjiu.lu@intel.com>
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PR 803
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* gas/ia64/dv-imply.d: Pass -mtune=itanium1 to as.
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* gas/ia64/dv-mutex.d : Likewise.
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* gas/ia64/dv-safe.d: Likewise.
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* gas/ia64/dv-srlz.d.nop: Likewise.
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* gas/ia64/ldxmov-1.d: Likewise.
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* gas/ia64/opc-b.d: Likewise.
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* gas/ia64/opc-f.d: Likewise.
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* gas/ia64/opc-i.d: Likewise.
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* gas/ia64/opc-m.d: Likewise.
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* gas/ia64/operand-or.d: Likewise.
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* gas/ia64/pcrel.d: Likewise.
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* gas/ia64/pseudo.d: Likewise.
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* gas/ia64/tls.d: Likewise.
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2005-03-24 Hans-Peter Nilsson <hp@axis.com>
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* gas/cris/range-err-1.s: Adjust expected messages for hosts with
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# as: -xexplicit
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# as: -xexplicit -mtune=itanium1
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# objdump: -d
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# name ia64 dv-mutex
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# as: -xexplicit
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# as: -xexplicit -mtune=itanium1
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# objdump: -d
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# name ia64 dv-mutex
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# as: -xexplicit
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# as: -xexplicit -mtune=itanium1
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# objdump: -d
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# name ia64 dv-safe
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# as: -xauto
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# as: -xauto -mtune=itanium1
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# objdump: -d
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# name ia64 dv-srlz
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#as: -mtune=itanium1
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#objdump: -dr
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#name: ia64 ldxmov-1
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#as: -xnone -mhint.b=ok
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#as: -xnone -mhint.b=ok -mtune=itanium1
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#objdump: -d
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#name: ia64 opc-b
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# as: -xnone
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# as: -xnone -mtune=itanium1
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# objdump: -d --disassemble-zeroes
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# name: ia64 opc-f
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# as: -xnone
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# as: -xnone -mtune=itanium1
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# objdump: -d
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# name: ia64 opc-i
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# as: -xnone
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# as: -xnone -mtune=itanium1
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# objdump: -d
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# name: ia64 opc-m
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# as: -xnone
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# as: -xnone -mtune=itanium1
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# objdump: -d --disassemble-zeroes
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# name: ia64 operand-or
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#as: -mtune=itanium1
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#objdump: -rs
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#name: ia64 pcrel
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# as: -xnone
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# as: -xnone -mtune=itanium1
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# objdump: -d
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# name: ia64 pseudo-ops
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#as: -xnone
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#as: -xnone -mtune=itanium1
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#objdump: -dr
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#name: ia64 tls
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@ -1,3 +1,8 @@
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2005-03-28 H.J. Lu <hongjiu.lu@intel.com>
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PR 803
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* ld-ia64/ia64.exp: Pass -mtune=itanium1 to as.
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2005-03-24 Mark Mitchell <mark@codesourcery.com>
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* config/default.exp: Do not load libpath.exp if it does not
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set ia64tests {
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{"TLS -fpic -shared" "-shared"
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"" {tlspic1.s tlspic2.s}
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"-mtune=itanium1" {tlspic1.s tlspic2.s}
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{{readelf -WSsrl tlspic.rd} {objdump -drj.text tlspic.dd}
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{objdump -sj.got tlspic.sd} {objdump -sj.tdata tlspic.td}}
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"libtlspic.so"}
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{"Helper shared library" "-shared"
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"" {tlslib.s} {} "libtlslib.so"}
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{"TLS -fpic and -fno-pic exec"
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"tmpdir/libtlslib.so" "" {tlsbinpic.s tlsbin.s}
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"tmpdir/libtlslib.so" "-mtune=itanium1" {tlsbinpic.s tlsbin.s}
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{{readelf -WSsrl tlsbin.rd} {objdump -drj.text tlsbin.dd}
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{objdump -sj.got tlsbin.sd} {objdump -sj.tdata tlsbin.td}}
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"tlsbin"}
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