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2002-03-05 Chris Demetriou <cgd@broadcom.com>
* mips.igen: Fix formatting of all SignalException calls.
This commit is contained in:
parent
b43df9952b
commit
86b77b471b
@ -1,3 +1,7 @@
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2002-03-05 Chris Demetriou <cgd@broadcom.com>
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* mips.igen: Fix formatting of all SignalException calls.
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2002-02-05 Chris Demetriou <cgd@broadcom.com>
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* sim-main.h (SIGNEXTEND): Remove.
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@ -825,14 +825,14 @@
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PC = cia - 4; /* reference the branch instruction */
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else
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PC = cia;
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SignalException(BreakPoint, instruction_0);
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SignalException (BreakPoint, instruction_0);
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}
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else
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{
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/* If we get this far, we're not an instruction reserved by the sim. Raise
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the exception. */
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SignalException(BreakPoint, instruction_0);
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SignalException (BreakPoint, instruction_0);
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}
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}
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@ -2746,7 +2746,7 @@
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*vr5000:
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*r3900:
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{
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SignalException(SystemCall, instruction_0);
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SignalException (SystemCall, instruction_0);
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}
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@ -2760,7 +2760,7 @@
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*vr5000:
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{
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if ((signed_word) GPR[RS] == (signed_word) GPR[RT])
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SignalException(Trap, instruction_0);
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SignalException (Trap, instruction_0);
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}
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@ -2774,7 +2774,7 @@
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*vr5000:
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{
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if ((signed_word) GPR[RS] == (signed_word) EXTEND16 (IMMEDIATE))
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SignalException(Trap, instruction_0);
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SignalException (Trap, instruction_0);
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}
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@ -2788,7 +2788,7 @@
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*vr5000:
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{
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if ((signed_word) GPR[RS] >= (signed_word) GPR[RT])
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SignalException(Trap, instruction_0);
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SignalException (Trap, instruction_0);
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}
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@ -2802,7 +2802,7 @@
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*vr5000:
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{
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if ((signed_word) GPR[RS] >= (signed_word) EXTEND16 (IMMEDIATE))
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SignalException(Trap, instruction_0);
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SignalException (Trap, instruction_0);
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}
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@ -2816,7 +2816,7 @@
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*vr5000:
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{
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if ((unsigned_word) GPR[RS] >= (unsigned_word) EXTEND16 (IMMEDIATE))
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SignalException(Trap, instruction_0);
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SignalException (Trap, instruction_0);
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}
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@ -2830,7 +2830,7 @@
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*vr5000:
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{
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if ((unsigned_word) GPR[RS] >= (unsigned_word) GPR[RT])
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SignalException(Trap, instruction_0);
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SignalException (Trap, instruction_0);
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}
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@ -2844,7 +2844,7 @@
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*vr5000:
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{
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if ((signed_word) GPR[RS] < (signed_word) GPR[RT])
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SignalException(Trap, instruction_0);
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SignalException (Trap, instruction_0);
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}
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@ -2858,7 +2858,7 @@
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*vr5000:
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{
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if ((signed_word) GPR[RS] < (signed_word) EXTEND16 (IMMEDIATE))
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SignalException(Trap, instruction_0);
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SignalException (Trap, instruction_0);
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}
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@ -2872,7 +2872,7 @@
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*vr5000:
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{
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if ((unsigned_word) GPR[RS] < (unsigned_word) EXTEND16 (IMMEDIATE))
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SignalException(Trap, instruction_0);
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SignalException (Trap, instruction_0);
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}
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@ -2886,7 +2886,7 @@
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*vr5000:
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{
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if ((unsigned_word) GPR[RS] < (unsigned_word) GPR[RT])
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SignalException(Trap, instruction_0);
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SignalException (Trap, instruction_0);
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}
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@ -2900,7 +2900,7 @@
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*vr5000:
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{
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if ((signed_word) GPR[RS] != (signed_word) GPR[RT])
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SignalException(Trap, instruction_0);
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SignalException (Trap, instruction_0);
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}
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@ -2914,7 +2914,7 @@
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*vr5000:
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{
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if ((signed_word) GPR[RS] != (signed_word) EXTEND16 (IMMEDIATE))
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SignalException(Trap, instruction_0);
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SignalException (Trap, instruction_0);
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}
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@ -3380,7 +3380,7 @@
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check_fpu (SD_);
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{
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if ((fmt == fmt_double) | 0)
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SignalException(ReservedInstruction,instruction_0);
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SignalException (ReservedInstruction, instruction_0);
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else
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StoreFPR(FD,fmt_double,Convert(GETRM(),ValueFPR(FS,fmt),fmt,fmt_double));
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}
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@ -3400,7 +3400,7 @@
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check_fpu (SD_);
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{
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if ((fmt == fmt_long) | ((fmt == fmt_long) || (fmt == fmt_word)))
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SignalException(ReservedInstruction,instruction_0);
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SignalException (ReservedInstruction, instruction_0);
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else
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StoreFPR(FD,fmt_long,Convert(GETRM(),ValueFPR(FS,fmt),fmt,fmt_long));
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}
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@ -3425,7 +3425,7 @@
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check_fpu (SD_);
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{
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if ((fmt == fmt_single) | 0)
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SignalException(ReservedInstruction,instruction_0);
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SignalException (ReservedInstruction, instruction_0);
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else
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StoreFPR(FD,fmt_single,Convert(GETRM(),ValueFPR(FS,fmt),fmt,fmt_single));
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}
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@ -3447,7 +3447,7 @@
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check_fpu (SD_);
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{
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if ((fmt == fmt_word) | ((fmt == fmt_long) || (fmt == fmt_word)))
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SignalException(ReservedInstruction,instruction_0);
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SignalException (ReservedInstruction, instruction_0);
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else
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StoreFPR(FD,fmt_word,Convert(GETRM(),ValueFPR(FS,fmt),fmt,fmt_word));
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}
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