2008-08-08 Richard Sandiford <rdsandiford@googlemail.com>

Daniel Jacobowitz  <dan@codesourcery.com>
	    Catherine Moore  <clm@codesourcery.com>
	    Mark Shinwell  <shinwell@codesourcery.com>
	    Maxim Kuvyrkov  <maxim@codesourcery.com>

	* elf32-mips.c (mips_vxworks_copy_howto_rela): Replace with...
	(elf_mips_copy_howto): ...this howto.  Clear the size fields.
	(mips_vxworks_jump_slot_howto_rela): Replace with...
	(elf_mips_jump_slot_howto): ...this howto.
	(bfd_elf32_bfd_reloc_type_lookup): Handle BFD_RELOC_MIPS_COPY
	and BFD_RELOC_MIPS_JUMP_SLOT.
	(bfd_elf32_bfd_reloc_name_lookup): Handle "R_MIPS_COPY" and
	"R_MIPS_JUMP_SLOT".
	(mips_elf32_rtype_to_howto): Handle R_MIPS_COPY and R_MIPS_JUMP_SLOT.
	(elf_backend_plt_readonly): Define.
	(elf_backend_plt_sym_val): Define for non-VxWorks targets.
	(mips_vxworks_bfd_reloc_type_lookup): Delete.
	(mips_vxworks_bfd_reloc_name_lookup): Likewise.
	(mips_vxworks_rtype_to_howto): Likewise.
	(elf_backend_want_dynbss): Don't define for VxWorks.
	(elf_backend_plt_readonly): Likewise.
	(bfd_elf32_bfd_reloc_type_lookup): Likewise.
	(bfd_elf32_bfd_reloc_name_lookup): Likewise.
	(elf_backend_mips_rtype_to_howto): Likewise.
	(elf_backend_adjust_dynamic_symbol): Likewise.
	(elf_backend_got_symbol_offset): Don't define.
	* elfn32-mips.c (elf_mips_copy_howto, elf_mips_jump_slot_howto): New.
	(bfd_elf32_bfd_reloc_type_lookup): Handle BFD_RELOC_MIPS_COPY
	and BFD_RELOC_MIPS_JUMP_SLOT.
	(bfd_elf32_bfd_reloc_name_lookup): Handle "R_MIPS_COPY" and
	"R_MIPS_JUMP_SLOT".
	(mips_elf32_n32_rtype_to_howto): Handle R_MIPS_COPY and
	R_MIPS_JUMP_SLOT.
	(elf_backend_rela_plts_and_copies_p, elf_backend_plt_readonly)
	(elf_backend_plt_sym_val): Define.
	* elf64-mips.c (elf_mips_copy_howto, elf_mips_jump_slot_howto): New.
	(bfd_elf64_bfd_reloc_type_lookup): Handle BFD_RELOC_MIPS_COPY
	and BFD_RELOC_MIPS_JUMP_SLOT.
	(bfd_elf64_bfd_reloc_name_lookup): Handle "R_MIPS_COPY" and
	"R_MIPS_JUMP_SLOT".
	(mips_elf64_rtype_to_howto): Handle R_MIPS_COPY and R_MIPS_JUMP_SLOT.
	(elf_backend_rela_plts_and_copies_p, elf_backend_plt_readonly)
	(elf_backend_plt_sym_val): Define.
	* elfxx-mips.h (_bfd_mips_vxworks_adjust_dynamic_symbol): Delete.
	(_bfd_mips_elf_use_plts_and_copy_relocs, _bfd_mips_elf_init_stubs)
	(_bfd_mips_elf_plt_sym_val, _bfd_mips_post_process_headers): Declare.
	* elfxx-mips.c (mips_elf_la25_stub): New structure.
	(LA25_LUI, LA25_J, LA25_ADDIU): New macros.
	(mips_elf_link_hash_entry): Add "la25_stubs", "has_static_relocs"
	and "has_nonpic_branches" fields.  Remove "is_relocation_target" and
	"is_branch_target".
	(mips_elf_link_hash_table): Add blank lines.  Add
	"use_plts_and_copy_relocs", "reserved_gotno", "strampoline",
	"la25_stubs" and "add_stub_section" fields.
	(mips_htab_traverse_info): New structure.
	(PIC_OBJECT_P, MIPS_ELF_LOAD_WORD): New macros.
	(MIPS_RESERVED_GOTNO): Delete.
	(mips_o32_exec_plt0_entry, mips_n32_exec_plt0_entry)
	(mips_n64_exec_plt0_entry, mips_exec_plt_entry): New tables.
	(mips_elf_link_hash_newfunc): Update after the changes to
	mips_elf_link_hash_entry.
	(mips_elf_check_mips16_stubs): Replace the DATA parameter with
	an INFO parameter.  Don't look through warnings symbols here;
	do it in mips_elf_check_symbols instead.
	(mips_elf_create_stub_symbol): New function.
	(mips_elf_la25_stub_hash, mips_elf_la25_stub_eq): New functions.
	(_bfd_mips_elf_init_stubs, mips_elf_local_pic_function_p): Likewise.
	(mips_elf_add_la25_intro, mips_elf_add_la25_trampoline): Likewise.
	(mips_elf_add_la25_stub, mips_elf_check_symbols): New functions.
	(mips_elf_gotplt_index): Check for VxWorks.
	(mips_elf_output_dynamic_relocation): Take the relocation index
	as an extra parameter.  Do not increment reloc_count here.
	(mips_elf_initialize_tls_slots): Update the calls to
	mips_elf_output_dynamic_relocation accordingly.
	(mips_elf_multi_got): Use htab->reserved_gotno instead of
	MIPS_RESERVED_GOTNO.
	(mips_elf_create_got_section): Don't allocate reserved GOT
	entries here.  Unconditionally create .got.plt, but don't
	set its alignment here.
	(mips_elf_relocation_needs_la25_stub): New function.
	(mips_elf_calculate_relocation): Redirect branches and jumps to
	a non-PIC stub if one exists.  Check !h->has_static_relocs instead
	of !htab->is_vxworks when deciding whether to create dynamic
	relocations for R_MIPS_32, R_MIPS_REL32 and R_MIPS_64.
	(_bfd_mips_elf_create_dynamic_sections): Unconditionally call
	_bfd_elf_create_dynamic_sections.  Unconditionally set up
	htab->splt and htab->sdynbss.  Set htab->srelplt to ".rel.plt"
	if !htab->is_vxworks.  Add non-VxWorks values of
	htab->plt_header_size and htab->plt_entry_size.
	(_bfd_mips_elf_check_relocs): Set pointer_equality_needed for
	non-branch static relocations.  Set has_nonpic_branches when an la25
	stub might be required.  Set can_make_dynamic_p to TRUE if R_MIPS_32,
	R_MIPS_REL32 and R_MIPS_64 relocations can be made dynamic,
	rather than duplicating the condition.  Do not make them dynamic
	for read-only sections in non-PIC executable objects.
	Do not protect this code with dynobj == NULL || htab->sgot == NULL;
	handle each group of cases separately.  Add a default case that
	sets has_static_relocs for non-GOT relocations that cannot be
	made dynamic.  Don't set is_relocation_target and is_branch_target.
	Reject non-PIC static relocations in shared objects.
	(_bfd_mips_vxworks_adjust_dynamic_symbol): Fold into...
	(_bfd_mips_elf_adjust_dynamic_symbol): ...here, using
	htab->use_plts_and_copy_relocs instead of htab->is_vxworks
	to select PLT and copy-reloc handling.  Set the alignment of
	.plt and .got.plt when allocating the first entry.  Generalize
	code to handle REL as well as RELA sections and 64-bit as well as
	32-bit GOT entries.  Complain if we find a static-only reloc
	against an externally-defined symbol and if we cannot create
	dynamic relocations for it.  Allocate copy relocs using
	mips_elf_allocate_dynamic_relocations on non-VxWorks targets.
	Set possibly_dynamic_relocs to 0 when using PLTs or copy relocs.
	Skip reserved .got.plt entries.
	(_bfd_mips_elf_always_size_sections): Use mips_elf_check_symbols
	instead of mips_elf_check_mips16_stubs to process each symbol.
	Do the traversal for relocatable objects too.
	(mips_elf_lay_out_got): Use htab->reserved_gotno instead of
	MIPS_RESERVED_GOTNO.
	(_bfd_mips_elf_size_dynamic_sections): Exclude sdynbss if it
	is empty.  Extend the DT_PLTREL, DT_JMPREL and DT_PLTRELSZ handling
	to non-VxWorks targets.  Only add DT_REL{,A}, DT_REL{,A}SZ and
	DT_REL{,A}ENT if .rel.dyn is nonempty.  Create a symbol for the
	PLT.  Allocate a nop at the end of the PLT.  Allocate DT_MIPS_PLTGOT.
	(mips_elf_create_la25_stub_info): New function.
	(_bfd_mips_elf_finish_dynamic_symbol): Write out PLT entries
	and copy relocs where necessary.  Check pointer_equality_needed.
	(mips_finish_exec_plt): New function.
	(_bfd_mips_elf_finish_dynamic_sections): Always set DT_PLTGOT
	to the beginning of htab->sgot.  Use htab->reserved_gotno instead
	of MIPS_RESERVED_GOTNO.  Assert htab->use_plts_and_copy_relocs
	instead of htab->is_vxworks for DT_PLTREL, DT_PLTRELSZ and DT_JMPREL.
	Set DT_PLTREL to DT_REL instead of DT_RELA on non-VxWorks targets.
	Use mips_finish_exec_plt to create non-VxWorks PLT headers.  Set
	DT_MIPS_PLTGOT.
	(_bfd_mips_elf_copy_indirect_symbol): Copy has_static_relocs
	from the indirect symbol to the direct symbol.  Also copy
	has_nonpic_branches for indirect symbols.
	(_bfd_mips_elf_get_target_dtag): Handle DT_MIPS_PLTGOT and
	DT_MIPS_RWPLT.
	(_bfd_mips_elf_link_hash_table_create): Initialize the new
	mips_elf_link_hash_table fields.
	(_bfd_mips_vxworks_link_hash_table_create): Set
	use_plts_and_copy_relocs to TRUE.  Use TRUE rather than 1
	when setting is_vxworks.
	(_bfd_mips_elf_use_plts_and_copy_relocs): New function.
	(_bfd_mips_elf_final_link): Call mips_elf_create_la25_stub for
	each la25_stub.
	(_bfd_mips_elf_merge_private_bfd_data): Treat dynamic objects
	as PIC.  Generalize message about linking PIC and non-PIC.
	(_bfd_mips_elf_plt_sym_val, _bfd_mips_post_process_headers): New
	functions.
	* reloc.c: Update comment near BFD_RELOC_MIPS_JUMP_SLOT.
	* bfd-in2.h: Regenerated.

2008-08-08  Richard Sandiford  <rdsandiford@googlemail.com>
	    Daniel Jacobowitz  <dan@codesourcery.com>
	    Catherine Moore  <clm@codesourcery.com>
	    Mark Shinwell  <shinwell@codesourcery.com>

	* readelf.c (get_mips_symbol_other): Handle STO_MIPS_PLT and
	STO_MIPS_PIC.
	(slurp_rela_relocs, slurp_rel_relocs): Handle MIPS ELF64 here.
	(dump_relocations, debug_apply_relocations): Don't handle it here.
	(get_mips_dynamic_type): Handle DT_MIPS_PLTGOT and DT_MIPS_RWPLT.
	(print_mips_pltgot_entry): New function.
	(process_mips_specific): Dump the PLT GOT.

2008-08-08  Richard Sandiford  <rdsandiford@googlemail.com>
	    Daniel Jacobowitz  <dan@codesourcery.com>

	* config/tc-mips.c (OPTION_CALL_NONPIC): New macro.
	(OPTION_NON_SHARED, OPTION_XGOT, OPTION_MABI, OPTION_32)
	(OPTION_N32, OPTION_64, OPTION_MDEBUG, OPTION_NO_MDEBUG)
	(OPTION_PDR, OPTION_NO_PDR, OPTION_MVXWORKS_PIC): Bump by 1.
	(md_longopts): Add -call_nonpic.
	(md_parse_option): Handle OPTION_CALL_NONPIC.
	(md_show_usage): Add -call_nonpic.

2008-08-08  Richard Sandiford  <rdsandiford@googlemail.com>

	* gas/mips/call-nonpic-1.s, gas/mips/call-nonpic-1.d: New test.
	* gas/mips/mips.exp: Run it.

2008-08-08  Richard Sandiford  <rdsandiford@googlemail.com>
	    Daniel Jacobowitz  <dan@codesourcery.com>
	    Catherine Moore  <clm@codesourcery.com>
	    Mark Shinwell  <shinwell@codesourcery.com>

	* mips.h (STO_MIPS_PLT, ELF_ST_IS_MIPS_PLT, ELF_ST_SET_MIPS_PLT)
	(STO_MIPS_PIC, DT_MIPS_PLTGOT, DT_MIPS_RWPLT): New macros.

2008-08-08  Richard Sandiford  <rdsandiford@googlemail.com>
	    Daniel Jacobowitz  <dan@codesourcery.com>

	* emulparams/elf32bmip.sh (GOT): Define, moving .got.plt to...
	(OTHER_RELRO_SECTIONS, OTHER_READWRITE_SECTIONS): ...one of these
	two variables.
	* emulparams/elf32bmipn32-defs.sh: Likewise.
	* emultempl/mipself.em: Include ldctor.h, elf/mips.h and elfxx-mips.h.
	(is_mips_elf): New macro.
	(stub_file, stub_bfd): New variables.
	(hook_stub_info): New structure.
	(hook_in_stub): New function.
	(mips_add_stub_section): Likewise.
	(mips_create_output_section_statements): Likewise.
	(mips_before_allocation): Likewise.
	(real_func): New variable.
	(mips_for_each_input_file_wrapper): New function.
	(mips_lang_for_each_input_file): Likewise.
	(lang_for_each_input_file): Define.
	(LDEMUL_BEFORE_ALLOCATION): Likewise.
	(LDEMUL_CREATE_OUTPUT_SECTION_STATEMENTS): Likewise.

2008-08-08  Richard Sandiford  <rdsandiford@googlemail.com>
	    Daniel Jacobowitz  <dan@codesourcery.com>

	* ld-mips-elf/mips16-pic-3a.s,
	ld-mips-elf/mips16-pic-3b.s,
	ld-mips-elf/mips16-pic-3.dd,
	ld-mips-elf/mips16-pic-3.gd,
	ld-mips-elf/mips16-pic-3.rd,
	ld-mips-elf/mips16-pic-3.inc,
	ld-mips-elf/pic-and-nonpic-1a.s,
	ld-mips-elf/pic-and-nonpic-1b.s,
	ld-mips-elf/pic-and-nonpic-1.ld,
	ld-mips-elf/pic-and-nonpic-1.dd,
	ld-mips-elf/pic-and-nonpic-1.nd,
	ld-mips-elf/pic-and-nonpic-1-rel.dd,
	ld-mips-elf/pic-and-nonpic-1-rel.nd,
	ld-mips-elf/pic-and-nonpic-2a.s,
	ld-mips-elf/pic-and-nonpic-2b.s,
	ld-mips-elf/pic-and-nonpic-2.d,
	ld-mips-elf/pic-and-nonpic-3a.s,
	ld-mips-elf/pic-and-nonpic-3a.ld,
	ld-mips-elf/pic-and-nonpic-3a.dd,
	ld-mips-elf/pic-and-nonpic-3a.gd,
	ld-mips-elf/pic-and-nonpic-3a.sd,
	ld-mips-elf/pic-and-nonpic-3b.s,
	ld-mips-elf/pic-and-nonpic-3b.ld,
	ld-mips-elf/pic-and-nonpic-3b.ad,
	ld-mips-elf/pic-and-nonpic-3b.dd,
	ld-mips-elf/pic-and-nonpic-3b.gd,
	ld-mips-elf/pic-and-nonpic-3b.nd,
	ld-mips-elf/pic-and-nonpic-3b.pd,
	ld-mips-elf/pic-and-nonpic-3b.rd,
	ld-mips-elf/pic-and-nonpic-3b.sd,
	ld-mips-elf/pic-and-nonpic-3-error.d,
	ld-mips-elf/pic-and-nonpic-4a.s,
	ld-mips-elf/pic-and-nonpic-4b.s,
	ld-mips-elf/pic-and-nonpic-4b.ld,
	ld-mips-elf/pic-and-nonpic-4b.ad,
	ld-mips-elf/pic-and-nonpic-4b.dd,
	ld-mips-elf/pic-and-nonpic-4b.gd,
	ld-mips-elf/pic-and-nonpic-4b.nd,
	ld-mips-elf/pic-and-nonpic-4b.rd,
	ld-mips-elf/pic-and-nonpic-4b.sd,
	ld-mips-elf/pic-and-nonpic-4-error.d,
	ld-mips-elf/pic-and-nonpic-5a.s,
	ld-mips-elf/pic-and-nonpic-5b.s,
	ld-mips-elf/pic-and-nonpic-5b.ld,
	ld-mips-elf/pic-and-nonpic-5b.ad,
	ld-mips-elf/pic-and-nonpic-5b.dd,
	ld-mips-elf/pic-and-nonpic-5b.gd,
	ld-mips-elf/pic-and-nonpic-5b.nd,
	ld-mips-elf/pic-and-nonpic-5b.rd,
	ld-mips-elf/pic-and-nonpic-5b.sd,
	ld-mips-elf/pic-and-nonpic-5b.pd,
	ld-mips-elf/pic-and-nonpic-6.ld,
	ld-mips-elf/pic-and-nonpic-6-o32a.s,
	ld-mips-elf/pic-and-nonpic-6-o32b.s,
	ld-mips-elf/pic-and-nonpic-6-o32c.s,
	ld-mips-elf/pic-and-nonpic-6-o32.ad,
	ld-mips-elf/pic-and-nonpic-6-o32.dd,
	ld-mips-elf/pic-and-nonpic-6-o32.gd,
	ld-mips-elf/pic-and-nonpic-6-o32.nd,
	ld-mips-elf/pic-and-nonpic-6-o32.pd,
	ld-mips-elf/pic-and-nonpic-6-o32.rd,
	ld-mips-elf/pic-and-nonpic-6-o32.sd,
	ld-mips-elf/pic-and-nonpic-6-n32a.s,
	ld-mips-elf/pic-and-nonpic-6-n32b.s,
	ld-mips-elf/pic-and-nonpic-6-n32c.s,
	ld-mips-elf/pic-and-nonpic-6-n32.ad,
	ld-mips-elf/pic-and-nonpic-6-n32.dd,
	ld-mips-elf/pic-and-nonpic-6-n32.gd,
	ld-mips-elf/pic-and-nonpic-6-n32.nd,
	ld-mips-elf/pic-and-nonpic-6-n32.pd,
	ld-mips-elf/pic-and-nonpic-6-n32.rd,
	ld-mips-elf/pic-and-nonpic-6-n32.sd,
	ld-mips-elf/pic-and-nonpic-6-n64a.s,
	ld-mips-elf/pic-and-nonpic-6-n64b.s,
	ld-mips-elf/pic-and-nonpic-6-n64c.s,
	ld-mips-elf/pic-and-nonpic-6-n64.ad,
	ld-mips-elf/pic-and-nonpic-6-n64.dd,
	ld-mips-elf/pic-and-nonpic-6-n64.gd,
	ld-mips-elf/pic-and-nonpic-6-n64.nd,
	ld-mips-elf/pic-and-nonpic-6-n64.pd,
	ld-mips-elf/pic-and-nonpic-6-n64.rd,
	ld-mips-elf/pic-and-nonpic-6-n64.sd: New tests.
	* ld-mips-elf/mips-elf.exp: Run them.
This commit is contained in:
Daniel Jacobowitz 2008-08-08 19:24:49 +00:00
parent 532f93bd8e
commit 861fb55ab5
106 changed files with 4489 additions and 439 deletions

View File

@ -1,3 +1,157 @@
2008-08-08 Richard Sandiford <rdsandiford@googlemail.com>
Daniel Jacobowitz <dan@codesourcery.com>
Catherine Moore <clm@codesourcery.com>
Mark Shinwell <shinwell@codesourcery.com>
Maxim Kuvyrkov <maxim@codesourcery.com>
* elf32-mips.c (mips_vxworks_copy_howto_rela): Replace with...
(elf_mips_copy_howto): ...this howto. Clear the size fields.
(mips_vxworks_jump_slot_howto_rela): Replace with...
(elf_mips_jump_slot_howto): ...this howto.
(bfd_elf32_bfd_reloc_type_lookup): Handle BFD_RELOC_MIPS_COPY
and BFD_RELOC_MIPS_JUMP_SLOT.
(bfd_elf32_bfd_reloc_name_lookup): Handle "R_MIPS_COPY" and
"R_MIPS_JUMP_SLOT".
(mips_elf32_rtype_to_howto): Handle R_MIPS_COPY and R_MIPS_JUMP_SLOT.
(elf_backend_plt_readonly): Define.
(elf_backend_plt_sym_val): Define for non-VxWorks targets.
(mips_vxworks_bfd_reloc_type_lookup): Delete.
(mips_vxworks_bfd_reloc_name_lookup): Likewise.
(mips_vxworks_rtype_to_howto): Likewise.
(elf_backend_want_dynbss): Don't define for VxWorks.
(elf_backend_plt_readonly): Likewise.
(bfd_elf32_bfd_reloc_type_lookup): Likewise.
(bfd_elf32_bfd_reloc_name_lookup): Likewise.
(elf_backend_mips_rtype_to_howto): Likewise.
(elf_backend_adjust_dynamic_symbol): Likewise.
(elf_backend_got_symbol_offset): Don't define.
* elfn32-mips.c (elf_mips_copy_howto, elf_mips_jump_slot_howto): New.
(bfd_elf32_bfd_reloc_type_lookup): Handle BFD_RELOC_MIPS_COPY
and BFD_RELOC_MIPS_JUMP_SLOT.
(bfd_elf32_bfd_reloc_name_lookup): Handle "R_MIPS_COPY" and
"R_MIPS_JUMP_SLOT".
(mips_elf32_n32_rtype_to_howto): Handle R_MIPS_COPY and
R_MIPS_JUMP_SLOT.
(elf_backend_rela_plts_and_copies_p, elf_backend_plt_readonly)
(elf_backend_plt_sym_val): Define.
* elf64-mips.c (elf_mips_copy_howto, elf_mips_jump_slot_howto): New.
(bfd_elf64_bfd_reloc_type_lookup): Handle BFD_RELOC_MIPS_COPY
and BFD_RELOC_MIPS_JUMP_SLOT.
(bfd_elf64_bfd_reloc_name_lookup): Handle "R_MIPS_COPY" and
"R_MIPS_JUMP_SLOT".
(mips_elf64_rtype_to_howto): Handle R_MIPS_COPY and R_MIPS_JUMP_SLOT.
(elf_backend_rela_plts_and_copies_p, elf_backend_plt_readonly)
(elf_backend_plt_sym_val): Define.
* elfxx-mips.h (_bfd_mips_vxworks_adjust_dynamic_symbol): Delete.
(_bfd_mips_elf_use_plts_and_copy_relocs, _bfd_mips_elf_init_stubs)
(_bfd_mips_elf_plt_sym_val, _bfd_mips_post_process_headers): Declare.
* elfxx-mips.c (mips_elf_la25_stub): New structure.
(LA25_LUI, LA25_J, LA25_ADDIU): New macros.
(mips_elf_link_hash_entry): Add "la25_stubs", "has_static_relocs"
and "has_nonpic_branches" fields. Remove "is_relocation_target" and
"is_branch_target".
(mips_elf_link_hash_table): Add blank lines. Add
"use_plts_and_copy_relocs", "reserved_gotno", "strampoline",
"la25_stubs" and "add_stub_section" fields.
(mips_htab_traverse_info): New structure.
(PIC_OBJECT_P, MIPS_ELF_LOAD_WORD): New macros.
(MIPS_RESERVED_GOTNO): Delete.
(mips_o32_exec_plt0_entry, mips_n32_exec_plt0_entry)
(mips_n64_exec_plt0_entry, mips_exec_plt_entry): New tables.
(mips_elf_link_hash_newfunc): Update after the changes to
mips_elf_link_hash_entry.
(mips_elf_check_mips16_stubs): Replace the DATA parameter with
an INFO parameter. Don't look through warnings symbols here;
do it in mips_elf_check_symbols instead.
(mips_elf_create_stub_symbol): New function.
(mips_elf_la25_stub_hash, mips_elf_la25_stub_eq): New functions.
(_bfd_mips_elf_init_stubs, mips_elf_local_pic_function_p): Likewise.
(mips_elf_add_la25_intro, mips_elf_add_la25_trampoline): Likewise.
(mips_elf_add_la25_stub, mips_elf_check_symbols): New functions.
(mips_elf_gotplt_index): Check for VxWorks.
(mips_elf_output_dynamic_relocation): Take the relocation index
as an extra parameter. Do not increment reloc_count here.
(mips_elf_initialize_tls_slots): Update the calls to
mips_elf_output_dynamic_relocation accordingly.
(mips_elf_multi_got): Use htab->reserved_gotno instead of
MIPS_RESERVED_GOTNO.
(mips_elf_create_got_section): Don't allocate reserved GOT
entries here. Unconditionally create .got.plt, but don't
set its alignment here.
(mips_elf_relocation_needs_la25_stub): New function.
(mips_elf_calculate_relocation): Redirect branches and jumps to
a non-PIC stub if one exists. Check !h->has_static_relocs instead
of !htab->is_vxworks when deciding whether to create dynamic
relocations for R_MIPS_32, R_MIPS_REL32 and R_MIPS_64.
(_bfd_mips_elf_create_dynamic_sections): Unconditionally call
_bfd_elf_create_dynamic_sections. Unconditionally set up
htab->splt and htab->sdynbss. Set htab->srelplt to ".rel.plt"
if !htab->is_vxworks. Add non-VxWorks values of
htab->plt_header_size and htab->plt_entry_size.
(_bfd_mips_elf_check_relocs): Set pointer_equality_needed for
non-branch static relocations. Set has_nonpic_branches when an la25
stub might be required. Set can_make_dynamic_p to TRUE if R_MIPS_32,
R_MIPS_REL32 and R_MIPS_64 relocations can be made dynamic,
rather than duplicating the condition. Do not make them dynamic
for read-only sections in non-PIC executable objects.
Do not protect this code with dynobj == NULL || htab->sgot == NULL;
handle each group of cases separately. Add a default case that
sets has_static_relocs for non-GOT relocations that cannot be
made dynamic. Don't set is_relocation_target and is_branch_target.
Reject non-PIC static relocations in shared objects.
(_bfd_mips_vxworks_adjust_dynamic_symbol): Fold into...
(_bfd_mips_elf_adjust_dynamic_symbol): ...here, using
htab->use_plts_and_copy_relocs instead of htab->is_vxworks
to select PLT and copy-reloc handling. Set the alignment of
.plt and .got.plt when allocating the first entry. Generalize
code to handle REL as well as RELA sections and 64-bit as well as
32-bit GOT entries. Complain if we find a static-only reloc
against an externally-defined symbol and if we cannot create
dynamic relocations for it. Allocate copy relocs using
mips_elf_allocate_dynamic_relocations on non-VxWorks targets.
Set possibly_dynamic_relocs to 0 when using PLTs or copy relocs.
Skip reserved .got.plt entries.
(_bfd_mips_elf_always_size_sections): Use mips_elf_check_symbols
instead of mips_elf_check_mips16_stubs to process each symbol.
Do the traversal for relocatable objects too.
(mips_elf_lay_out_got): Use htab->reserved_gotno instead of
MIPS_RESERVED_GOTNO.
(_bfd_mips_elf_size_dynamic_sections): Exclude sdynbss if it
is empty. Extend the DT_PLTREL, DT_JMPREL and DT_PLTRELSZ handling
to non-VxWorks targets. Only add DT_REL{,A}, DT_REL{,A}SZ and
DT_REL{,A}ENT if .rel.dyn is nonempty. Create a symbol for the
PLT. Allocate a nop at the end of the PLT. Allocate DT_MIPS_PLTGOT.
(mips_elf_create_la25_stub_info): New function.
(_bfd_mips_elf_finish_dynamic_symbol): Write out PLT entries
and copy relocs where necessary. Check pointer_equality_needed.
(mips_finish_exec_plt): New function.
(_bfd_mips_elf_finish_dynamic_sections): Always set DT_PLTGOT
to the beginning of htab->sgot. Use htab->reserved_gotno instead
of MIPS_RESERVED_GOTNO. Assert htab->use_plts_and_copy_relocs
instead of htab->is_vxworks for DT_PLTREL, DT_PLTRELSZ and DT_JMPREL.
Set DT_PLTREL to DT_REL instead of DT_RELA on non-VxWorks targets.
Use mips_finish_exec_plt to create non-VxWorks PLT headers. Set
DT_MIPS_PLTGOT.
(_bfd_mips_elf_copy_indirect_symbol): Copy has_static_relocs
from the indirect symbol to the direct symbol. Also copy
has_nonpic_branches for indirect symbols.
(_bfd_mips_elf_get_target_dtag): Handle DT_MIPS_PLTGOT and
DT_MIPS_RWPLT.
(_bfd_mips_elf_link_hash_table_create): Initialize the new
mips_elf_link_hash_table fields.
(_bfd_mips_vxworks_link_hash_table_create): Set
use_plts_and_copy_relocs to TRUE. Use TRUE rather than 1
when setting is_vxworks.
(_bfd_mips_elf_use_plts_and_copy_relocs): New function.
(_bfd_mips_elf_final_link): Call mips_elf_create_la25_stub for
each la25_stub.
(_bfd_mips_elf_merge_private_bfd_data): Treat dynamic objects
as PIC. Generalize message about linking PIC and non-PIC.
(_bfd_mips_elf_plt_sym_val, _bfd_mips_post_process_headers): New
functions.
* reloc.c: Update comment near BFD_RELOC_MIPS_JUMP_SLOT.
* bfd-in2.h: Regenerated.
2008-08-08 Alan Modra <amodra@bigpond.net.au>
* elf.c (bfd_elf_get_elf_syms): Don't leak memory on error.

View File

@ -2661,7 +2661,7 @@ to compensate for the borrow when the low bits are added. */
BFD_RELOC_MIPS_TLS_TPREL_LO16,
/* MIPS ELF relocations (VxWorks extensions). */
/* MIPS ELF relocations (VxWorks and PLT extensions). */
BFD_RELOC_MIPS_COPY,
BFD_RELOC_MIPS_JUMP_SLOT,

View File

@ -899,6 +899,38 @@ static reloc_howto_type elf_mips_gnu_vtentry_howto =
0, /* dst_mask */
FALSE); /* pcrel_offset */
/* Originally a VxWorks extension, but now used for other systems too. */
static reloc_howto_type elf_mips_copy_howto =
HOWTO (R_MIPS_COPY, /* type */
0, /* rightshift */
0, /* this one is variable size */
0, /* bitsize */
FALSE, /* pc_relative */
0, /* bitpos */
complain_overflow_bitfield, /* complain_on_overflow */
bfd_elf_generic_reloc, /* special_function */
"R_MIPS_COPY", /* name */
FALSE, /* partial_inplace */
0x0, /* src_mask */
0x0, /* dst_mask */
FALSE); /* pcrel_offset */
/* Originally a VxWorks extension, but now used for other systems too. */
static reloc_howto_type elf_mips_jump_slot_howto =
HOWTO (R_MIPS_JUMP_SLOT, /* type */
0, /* rightshift */
2, /* size (0 = byte, 1 = short, 2 = long) */
32, /* bitsize */
FALSE, /* pc_relative */
0, /* bitpos */
complain_overflow_bitfield, /* complain_on_overflow */
bfd_elf_generic_reloc, /* special_function */
"R_MIPS_JUMP_SLOT", /* name */
FALSE, /* partial_inplace */
0x0, /* src_mask */
0x0, /* dst_mask */
FALSE); /* pcrel_offset */
/* Set the GP value for OUTPUT_BFD. Returns FALSE if this is a
dangerous relocation. */
@ -1299,6 +1331,10 @@ bfd_elf32_bfd_reloc_type_lookup (bfd *abfd, bfd_reloc_code_real_type code)
return &elf_mips_gnu_vtentry_howto;
case BFD_RELOC_32_PCREL:
return &elf_mips_gnu_pcrel32;
case BFD_RELOC_MIPS_COPY:
return &elf_mips_copy_howto;
case BFD_RELOC_MIPS_JUMP_SLOT:
return &elf_mips_jump_slot_howto;
}
}
@ -1332,6 +1368,10 @@ bfd_elf32_bfd_reloc_name_lookup (bfd *abfd ATTRIBUTE_UNUSED,
return &elf_mips_gnu_vtinherit_howto;
if (strcasecmp (elf_mips_gnu_vtentry_howto.name, r_name) == 0)
return &elf_mips_gnu_vtentry_howto;
if (strcasecmp (elf_mips_copy_howto.name, r_name) == 0)
return &elf_mips_copy_howto;
if (strcasecmp (elf_mips_jump_slot_howto.name, r_name) == 0)
return &elf_mips_jump_slot_howto;
return NULL;
}
@ -1352,6 +1392,10 @@ mips_elf32_rtype_to_howto (unsigned int r_type,
return &elf_mips_gnu_rel16_s2;
case R_MIPS_PC32:
return &elf_mips_gnu_pcrel32;
case R_MIPS_COPY:
return &elf_mips_copy_howto;
case R_MIPS_JUMP_SLOT:
return &elf_mips_jump_slot_howto;
default:
if (r_type >= R_MIPS16_min && r_type < R_MIPS16_max)
return &elf_mips16_howto_table_rel[r_type - R_MIPS16_min];
@ -1615,6 +1659,8 @@ static const struct ecoff_debug_swap mips_elf32_ecoff_debug_swap = {
#define elf_backend_may_use_rela_p 0
#define elf_backend_default_use_rela_p 0
#define elf_backend_sign_extend_vma TRUE
#define elf_backend_plt_readonly 1
#define elf_backend_plt_sym_val _bfd_mips_elf_plt_sym_val
#define elf_backend_discard_info _bfd_mips_elf_discard_info
#define elf_backend_ignore_discarded_relocs \
@ -1679,82 +1725,6 @@ static const struct ecoff_debug_swap mips_elf32_ecoff_debug_swap = {
/* Include the target file again for this target. */
#include "elf32-target.h"
/* Specific to VxWorks. */
static reloc_howto_type mips_vxworks_copy_howto_rela =
HOWTO (R_MIPS_COPY, /* type */
0, /* rightshift */
2, /* size (0 = byte, 1 = short, 2 = long) */
32, /* bitsize */
FALSE, /* pc_relative */
0, /* bitpos */
complain_overflow_bitfield, /* complain_on_overflow */
bfd_elf_generic_reloc, /* special_function */
"R_MIPS_COPY", /* name */
FALSE, /* partial_inplace */
0x0, /* src_mask */
0x0, /* dst_mask */
FALSE); /* pcrel_offset */
/* Specific to VxWorks. */
static reloc_howto_type mips_vxworks_jump_slot_howto_rela =
HOWTO (R_MIPS_JUMP_SLOT, /* type */
0, /* rightshift */
2, /* size (0 = byte, 1 = short, 2 = long) */
32, /* bitsize */
FALSE, /* pc_relative */
0, /* bitpos */
complain_overflow_bitfield, /* complain_on_overflow */
bfd_elf_generic_reloc, /* special_function */
"R_MIPS_JUMP_SLOT", /* name */
FALSE, /* partial_inplace */
0x0, /* src_mask */
0x0, /* dst_mask */
FALSE); /* pcrel_offset */
/* Implement elf_backend_bfd_reloc_type_lookup for VxWorks. */
static reloc_howto_type *
mips_vxworks_bfd_reloc_type_lookup (bfd *abfd, bfd_reloc_code_real_type code)
{
switch (code)
{
case BFD_RELOC_MIPS_COPY:
return &mips_vxworks_copy_howto_rela;
case BFD_RELOC_MIPS_JUMP_SLOT:
return &mips_vxworks_jump_slot_howto_rela;
default:
return bfd_elf32_bfd_reloc_type_lookup (abfd, code);
}
}
static reloc_howto_type *
mips_vxworks_bfd_reloc_name_lookup (bfd *abfd, const char *r_name)
{
if (strcasecmp (mips_vxworks_copy_howto_rela.name, r_name) == 0)
return &mips_vxworks_copy_howto_rela;
if (strcasecmp (mips_vxworks_jump_slot_howto_rela.name, r_name) == 0)
return &mips_vxworks_jump_slot_howto_rela;
return bfd_elf32_bfd_reloc_name_lookup (abfd, r_name);
}
/* Implement elf_backend_mips_rtype_to_lookup for VxWorks. */
static reloc_howto_type *
mips_vxworks_rtype_to_howto (unsigned int r_type, bfd_boolean rela_p)
{
switch (r_type)
{
case R_MIPS_COPY:
return &mips_vxworks_copy_howto_rela;
case R_MIPS_JUMP_SLOT:
return &mips_vxworks_jump_slot_howto_rela;
default:
return mips_elf32_rtype_to_howto (r_type, rela_p);
}
}
/* Implement elf_backend_final_write_processing for VxWorks. */
static void
@ -1787,10 +1757,6 @@ mips_vxworks_final_write_processing (bfd *abfd, bfd_boolean linker)
#define elf_backend_want_got_plt 1
#undef elf_backend_want_plt_sym
#define elf_backend_want_plt_sym 1
#undef elf_backend_got_symbol_offset
#define elf_backend_got_symbol_offset 0
#undef elf_backend_want_dynbss
#define elf_backend_want_dynbss 1
#undef elf_backend_may_use_rel_p
#define elf_backend_may_use_rel_p 0
#undef elf_backend_may_use_rela_p
@ -1799,21 +1765,8 @@ mips_vxworks_final_write_processing (bfd *abfd, bfd_boolean linker)
#define elf_backend_default_use_rela_p 1
#undef elf_backend_got_header_size
#define elf_backend_got_header_size (4 * 3)
#undef elf_backend_plt_readonly
#define elf_backend_plt_readonly 1
#undef elf_backend_plt_sym_val
#undef bfd_elf32_bfd_reloc_type_lookup
#define bfd_elf32_bfd_reloc_type_lookup \
mips_vxworks_bfd_reloc_type_lookup
#undef bfd_elf32_bfd_reloc_name_lookup
#define bfd_elf32_bfd_reloc_name_lookup \
mips_vxworks_bfd_reloc_name_lookup
#undef elf_backend_mips_rtype_to_howto
#define elf_backend_mips_rtype_to_howto \
mips_vxworks_rtype_to_howto
#undef elf_backend_adjust_dynamic_symbol
#define elf_backend_adjust_dynamic_symbol \
_bfd_mips_vxworks_adjust_dynamic_symbol
#undef elf_backend_finish_dynamic_symbol
#define elf_backend_finish_dynamic_symbol \
_bfd_mips_vxworks_finish_dynamic_symbol

View File

@ -1724,6 +1724,38 @@ static reloc_howto_type elf_mips_gnu_rela16_s2 =
0x0000ffff, /* dst_mask */
TRUE); /* pcrel_offset */
/* Originally a VxWorks extension, but now used for other systems too. */
static reloc_howto_type elf_mips_copy_howto =
HOWTO (R_MIPS_COPY, /* type */
0, /* rightshift */
0, /* this one is variable size */
0, /* bitsize */
FALSE, /* pc_relative */
0, /* bitpos */
complain_overflow_bitfield, /* complain_on_overflow */
bfd_elf_generic_reloc, /* special_function */
"R_MIPS_COPY", /* name */
FALSE, /* partial_inplace */
0x0, /* src_mask */
0x0, /* dst_mask */
FALSE); /* pcrel_offset */
/* Originally a VxWorks extension, but now used for other systems too. */
static reloc_howto_type elf_mips_jump_slot_howto =
HOWTO (R_MIPS_JUMP_SLOT, /* type */
0, /* rightshift */
4, /* size (0 = byte, 1 = short, 2 = long) */
64, /* bitsize */
FALSE, /* pc_relative */
0, /* bitpos */
complain_overflow_bitfield, /* complain_on_overflow */
bfd_elf_generic_reloc, /* special_function */
"R_MIPS_JUMP_SLOT", /* name */
FALSE, /* partial_inplace */
0x0, /* src_mask */
0x0, /* dst_mask */
FALSE); /* pcrel_offset */
/* Swap in a MIPS 64-bit Rel reloc. */
static void
@ -2283,6 +2315,10 @@ bfd_elf64_bfd_reloc_type_lookup (bfd *abfd ATTRIBUTE_UNUSED,
return &elf_mips_gnu_vtinherit_howto;
case BFD_RELOC_VTABLE_ENTRY:
return &elf_mips_gnu_vtentry_howto;
case BFD_RELOC_MIPS_COPY:
return &elf_mips_copy_howto;
case BFD_RELOC_MIPS_JUMP_SLOT:
return &elf_mips_jump_slot_howto;
default:
bfd_set_error (bfd_error_bad_value);
return NULL;
@ -2318,6 +2354,10 @@ bfd_elf64_bfd_reloc_name_lookup (bfd *abfd ATTRIBUTE_UNUSED,
return &elf_mips_gnu_rel16_s2;
if (strcasecmp (elf_mips_gnu_rela16_s2.name, r_name) == 0)
return &elf_mips_gnu_rela16_s2;
if (strcasecmp (elf_mips_copy_howto.name, r_name) == 0)
return &elf_mips_copy_howto;
if (strcasecmp (elf_mips_jump_slot_howto.name, r_name) == 0)
return &elf_mips_jump_slot_howto;
return NULL;
}
@ -2338,6 +2378,10 @@ mips_elf64_rtype_to_howto (unsigned int r_type, bfd_boolean rela_p)
return &elf_mips_gnu_rela16_s2;
else
return &elf_mips_gnu_rel16_s2;
case R_MIPS_COPY:
return &elf_mips_copy_howto;
case R_MIPS_JUMP_SLOT:
return &elf_mips_jump_slot_howto;
default:
if (r_type >= R_MIPS16_min && r_type < R_MIPS16_max)
{
@ -3196,6 +3240,9 @@ const struct elf_size_info mips_elf64_size_info =
#define elf_backend_may_use_rel_p 1
#define elf_backend_may_use_rela_p 1
#define elf_backend_default_use_rela_p 1
#define elf_backend_rela_plts_and_copies_p 0
#define elf_backend_plt_readonly 1
#define elf_backend_plt_sym_val _bfd_mips_elf_plt_sym_val
#define elf_backend_sign_extend_vma TRUE

View File

@ -1717,6 +1717,38 @@ static reloc_howto_type elf_mips_gnu_rela16_s2 =
0x0000ffff, /* dst_mask */
TRUE); /* pcrel_offset */
/* Originally a VxWorks extension, but now used for other systems too. */
static reloc_howto_type elf_mips_copy_howto =
HOWTO (R_MIPS_COPY, /* type */
0, /* rightshift */
0, /* this one is variable size */
0, /* bitsize */
FALSE, /* pc_relative */
0, /* bitpos */
complain_overflow_bitfield, /* complain_on_overflow */
bfd_elf_generic_reloc, /* special_function */
"R_MIPS_COPY", /* name */
FALSE, /* partial_inplace */
0x0, /* src_mask */
0x0, /* dst_mask */
FALSE); /* pcrel_offset */
/* Originally a VxWorks extension, but now used for other systems too. */
static reloc_howto_type elf_mips_jump_slot_howto =
HOWTO (R_MIPS_JUMP_SLOT, /* type */
0, /* rightshift */
2, /* size (0 = byte, 1 = short, 2 = long) */
32, /* bitsize */
FALSE, /* pc_relative */
0, /* bitpos */
complain_overflow_bitfield, /* complain_on_overflow */
bfd_elf_generic_reloc, /* special_function */
"R_MIPS_JUMP_SLOT", /* name */
FALSE, /* partial_inplace */
0x0, /* src_mask */
0x0, /* dst_mask */
FALSE); /* pcrel_offset */
/* Set the GP value for OUTPUT_BFD. Returns FALSE if this is a
dangerous relocation. */
@ -2127,6 +2159,10 @@ bfd_elf32_bfd_reloc_type_lookup (bfd *abfd ATTRIBUTE_UNUSED,
return &elf_mips_gnu_vtinherit_howto;
case BFD_RELOC_VTABLE_ENTRY:
return &elf_mips_gnu_vtentry_howto;
case BFD_RELOC_MIPS_COPY:
return &elf_mips_copy_howto;
case BFD_RELOC_MIPS_JUMP_SLOT:
return &elf_mips_jump_slot_howto;
default:
bfd_set_error (bfd_error_bad_value);
return NULL;
@ -2163,6 +2199,10 @@ bfd_elf32_bfd_reloc_name_lookup (bfd *abfd ATTRIBUTE_UNUSED,
return &elf_mips_gnu_rel16_s2;
if (strcasecmp (elf_mips_gnu_rela16_s2.name, r_name) == 0)
return &elf_mips_gnu_rela16_s2;
if (strcasecmp (elf_mips_copy_howto.name, r_name) == 0)
return &elf_mips_copy_howto;
if (strcasecmp (elf_mips_jump_slot_howto.name, r_name) == 0)
return &elf_mips_jump_slot_howto;
return NULL;
}
@ -2183,6 +2223,10 @@ mips_elf_n32_rtype_to_howto (unsigned int r_type, bfd_boolean rela_p)
return &elf_mips_gnu_rela16_s2;
else
return &elf_mips_gnu_rel16_s2;
case R_MIPS_COPY:
return &elf_mips_copy_howto;
case R_MIPS_JUMP_SLOT:
return &elf_mips_jump_slot_howto;
default:
if (r_type >= R_MIPS16_min && r_type < R_MIPS16_max)
{
@ -2444,7 +2488,10 @@ static const struct ecoff_debug_swap mips_elf32_ecoff_debug_swap = {
#define elf_backend_may_use_rel_p 1
#define elf_backend_may_use_rela_p 1
#define elf_backend_default_use_rela_p 1
#define elf_backend_rela_plts_and_copies_p 0
#define elf_backend_sign_extend_vma TRUE
#define elf_backend_plt_readonly 1
#define elf_backend_plt_sym_val _bfd_mips_elf_plt_sym_val
#define elf_backend_discard_info _bfd_mips_elf_discard_info
#define elf_backend_ignore_discarded_relocs \

File diff suppressed because it is too large Load Diff

View File

@ -50,8 +50,6 @@ extern bfd_boolean _bfd_mips_elf_check_relocs
(bfd *, struct bfd_link_info *, asection *, const Elf_Internal_Rela *);
extern bfd_boolean _bfd_mips_elf_adjust_dynamic_symbol
(struct bfd_link_info *, struct elf_link_hash_entry *);
extern bfd_boolean _bfd_mips_vxworks_adjust_dynamic_symbol
(struct bfd_link_info *, struct elf_link_hash_entry *);
extern bfd_boolean _bfd_mips_elf_always_size_sections
(bfd *, struct bfd_link_info *);
extern bfd_boolean _bfd_mips_elf_size_dynamic_sections
@ -141,6 +139,15 @@ extern void _bfd_mips_elf_merge_symbol_attribute
extern char *_bfd_mips_elf_get_target_dtag (bfd_vma);
extern bfd_boolean _bfd_mips_elf_ignore_undef_symbol
(struct elf_link_hash_entry *);
extern void _bfd_mips_elf_use_plts_and_copy_relocs
(struct bfd_link_info *);
extern bfd_boolean _bfd_mips_elf_init_stubs
(struct bfd_link_info *,
asection *(*) (const char *, asection *, asection *));
extern bfd_vma _bfd_mips_elf_plt_sym_val
(bfd_vma, const asection *, const arelent *rel);
extern void _bfd_mips_post_process_headers
(bfd *abfd, struct bfd_link_info *link_info);
extern const struct bfd_elf_special_section _bfd_mips_elf_special_sections [];
@ -153,3 +160,4 @@ extern bfd_boolean _bfd_mips_elf_common_definition (Elf_Internal_Sym *);
#define elf_backend_eh_frame_address_size _bfd_mips_elf_eh_frame_address_size
#define elf_backend_merge_symbol_attribute _bfd_mips_elf_merge_symbol_attribute
#define elf_backend_ignore_undef_symbol _bfd_mips_elf_ignore_undef_symbol
#define elf_backend_post_process_headers _bfd_mips_post_process_headers

View File

@ -2258,7 +2258,7 @@ ENUM
ENUMX
BFD_RELOC_MIPS_JUMP_SLOT
ENUMDOC
MIPS ELF relocations (VxWorks extensions).
MIPS ELF relocations (VxWorks and PLT extensions).
COMMENT
ENUM

View File

@ -1,3 +1,16 @@
2008-08-08 Richard Sandiford <rdsandiford@googlemail.com>
Daniel Jacobowitz <dan@codesourcery.com>
Catherine Moore <clm@codesourcery.com>
Mark Shinwell <shinwell@codesourcery.com>
* readelf.c (get_mips_symbol_other): Handle STO_MIPS_PLT and
STO_MIPS_PIC.
(slurp_rela_relocs, slurp_rel_relocs): Handle MIPS ELF64 here.
(dump_relocations, debug_apply_relocations): Don't handle it here.
(get_mips_dynamic_type): Handle DT_MIPS_PLTGOT and DT_MIPS_RWPLT.
(print_mips_pltgot_entry): New function.
(process_mips_specific): Dump the PLT GOT.
2008-08-08 Alan Modra <amodra@bigpond.net.au>
* readelf.c (is_64bit_abs_reloc): Return true for R_MIPS_64.

View File

@ -707,6 +707,28 @@ slurp_rela_relocs (FILE *file,
relas[i].r_offset = BYTE_GET (erelas[i].r_offset);
relas[i].r_info = BYTE_GET (erelas[i].r_info);
relas[i].r_addend = BYTE_GET (erelas[i].r_addend);
/* The #ifdef BFD64 below is to prevent a compile time
warning. We know that if we do not have a 64 bit data
type that we will never execute this code anyway. */
#ifdef BFD64
if (elf_header.e_machine == EM_MIPS
&& elf_header.e_ident[EI_DATA] != ELFDATA2MSB)
{
/* In little-endian objects, r_info isn't really a
64-bit little-endian value: it has a 32-bit
little-endian symbol index followed by four
individual byte fields. Reorder INFO
accordingly. */
bfd_vma info = relas[i].r_info;
info = (((info & 0xffffffff) << 32)
| ((info >> 56) & 0xff)
| ((info >> 40) & 0xff00)
| ((info >> 24) & 0xff0000)
| ((info >> 8) & 0xff000000));
relas[i].r_info = info;
}
#endif /* BFD64 */
}
free (erelas);
@ -779,6 +801,28 @@ slurp_rel_relocs (FILE *file,
rels[i].r_offset = BYTE_GET (erels[i].r_offset);
rels[i].r_info = BYTE_GET (erels[i].r_info);
rels[i].r_addend = 0;
/* The #ifdef BFD64 below is to prevent a compile time
warning. We know that if we do not have a 64 bit data
type that we will never execute this code anyway. */
#ifdef BFD64
if (elf_header.e_machine == EM_MIPS
&& elf_header.e_ident[EI_DATA] != ELFDATA2MSB)
{
/* In little-endian objects, r_info isn't really a
64-bit little-endian value: it has a 32-bit
little-endian symbol index followed by four
individual byte fields. Reorder INFO
accordingly. */
bfd_vma info = rels[i].r_info;
info = (((info & 0xffffffff) << 32)
| ((info >> 56) & 0xff)
| ((info >> 40) & 0xff00)
| ((info >> 24) & 0xff0000)
| ((info >> 8) & 0xff000000));
rels[i].r_info = info;
}
#endif /* BFD64 */
}
free (erels);
@ -895,26 +939,6 @@ dump_relocations (FILE *file,
offset = rels[i].r_offset;
info = rels[i].r_info;
/* The #ifdef BFD64 below is to prevent a compile time warning.
We know that if we do not have a 64 bit data type that we
will never execute this code anyway. */
#ifdef BFD64
if (!is_32bit_elf
&& elf_header.e_machine == EM_MIPS
&& elf_header.e_ident[EI_DATA] != ELFDATA2MSB)
{
/* In little-endian objects, r_info isn't really a 64-bit
little-endian value: it has a 32-bit little-endian
symbol index followed by four individual byte fields.
Reorder INFO accordingly. */
info = (((info & 0xffffffff) << 32)
| ((info >> 56) & 0xff)
| ((info >> 40) & 0xff00)
| ((info >> 24) & 0xff0000)
| ((info >> 8) & 0xff000000));
}
#endif /* BFD64 */
type = get_reloc_type (info);
symtab_index = get_reloc_symindex (info);
@ -1366,6 +1390,8 @@ get_mips_dynamic_type (unsigned long type)
case DT_MIPS_COMPACT_SIZE: return "MIPS_COMPACT_SIZE";
case DT_MIPS_GP_VALUE: return "MIPS_GP_VALUE";
case DT_MIPS_AUX_DYNAMIC: return "MIPS_AUX_DYNAMIC";
case DT_MIPS_PLTGOT: return "MIPS_PLTGOT";
case DT_MIPS_RWPLT: return "MIPS_RWPLT";
default:
return NULL;
}
@ -7020,6 +7046,8 @@ get_mips_symbol_other (unsigned int other)
{
case STO_OPTIONAL: return "OPTIONAL";
case STO_MIPS16: return "MIPS16";
case STO_MIPS_PLT: return "MIPS PLT";
case STO_MIPS_PIC: return "MIPS PIC";
default: return NULL;
}
}
@ -8359,19 +8387,6 @@ debug_apply_relocations (void *file,
unsigned int reloc_size;
unsigned char * loc;
/* In MIPS little-endian objects, r_info isn't really a
64-bit little-endian value: it has a 32-bit little-endian
symbol index followed by four individual byte fields.
Reorder INFO accordingly. */
if (!is_32bit_elf
&& elf_header.e_machine == EM_MIPS
&& elf_header.e_ident[EI_DATA] != ELFDATA2MSB)
rp->r_info = (((rp->r_info & 0xffffffff) << 32)
| ((rp->r_info >> 56) & 0xff)
| ((rp->r_info >> 40) & 0xff00)
| ((rp->r_info >> 24) & 0xff0000)
| ((rp->r_info >> 8) & 0xff000000));
reloc_type = get_reloc_type (rp->r_info);
if (is_32bit_abs_reloc (reloc_type)
@ -9204,6 +9219,28 @@ print_mips_got_entry (unsigned char *data, bfd_vma pltgot, bfd_vma addr)
return addr + (is_32bit_elf ? 4 : 8);
}
/* DATA points to the contents of a MIPS PLT GOT that starts at VMA
PLTGOT. Print the Address and Initial fields of an entry at VMA
ADDR and return the VMA of the next entry. */
static bfd_vma
print_mips_pltgot_entry (unsigned char *data, bfd_vma pltgot, bfd_vma addr)
{
printf (" ");
print_vma (addr, LONG_HEX);
printf (" ");
if (data == NULL)
printf ("%*s", is_32bit_elf ? 8 : 16, "<unknown>");
else
{
bfd_vma entry;
entry = byte_get (data + addr - pltgot, is_32bit_elf ? 4 : 8);
print_vma (entry, LONG_HEX);
}
return addr + (is_32bit_elf ? 4 : 8);
}
static int
process_mips_specific (FILE *file)
{
@ -9213,7 +9250,11 @@ process_mips_specific (FILE *file)
size_t conflictsno = 0;
size_t options_offset = 0;
size_t conflicts_offset = 0;
size_t pltrelsz = 0;
size_t pltrel = 0;
bfd_vma pltgot = 0;
bfd_vma mips_pltgot = 0;
bfd_vma jmprel = 0;
bfd_vma local_gotno = 0;
bfd_vma gotsym = 0;
bfd_vma symtabno = 0;
@ -9249,7 +9290,8 @@ process_mips_specific (FILE *file)
conflictsno = entry->d_un.d_val;
break;
case DT_PLTGOT:
pltgot = entry->d_un.d_val;
pltgot = entry->d_un.d_ptr;
break;
case DT_MIPS_LOCAL_GOTNO:
local_gotno = entry->d_un.d_val;
break;
@ -9259,6 +9301,18 @@ process_mips_specific (FILE *file)
case DT_MIPS_SYMTABNO:
symtabno = entry->d_un.d_val;
break;
case DT_MIPS_PLTGOT:
mips_pltgot = entry->d_un.d_ptr;
break;
case DT_PLTREL:
pltrel = entry->d_un.d_val;
break;
case DT_PLTRELSZ:
pltrelsz = entry->d_un.d_val;
break;
case DT_JMPREL:
jmprel = entry->d_un.d_ptr;
break;
default:
break;
}
@ -9691,6 +9745,73 @@ process_mips_specific (FILE *file)
free (data);
}
if (mips_pltgot != 0 && jmprel != 0 && pltrel != 0 && pltrelsz != 0)
{
bfd_vma entry, end;
size_t offset, rel_offset;
unsigned long count, i;
unsigned char *data;
int addr_size, sym_width;
Elf_Internal_Rela *rels;
rel_offset = offset_from_vma (file, jmprel, pltrelsz);
if (pltrel == DT_RELA)
{
if (!slurp_rela_relocs (file, rel_offset, pltrelsz, &rels, &count))
return 0;
}
else
{
if (!slurp_rel_relocs (file, rel_offset, pltrelsz, &rels, &count))
return 0;
}
entry = mips_pltgot;
addr_size = (is_32bit_elf ? 4 : 8);
end = mips_pltgot + (2 + count) * addr_size;
offset = offset_from_vma (file, mips_pltgot, end - mips_pltgot);
data = get_data (NULL, file, offset, end - mips_pltgot, 1, _("PLT GOT"));
printf (_("\nPLT GOT:\n\n"));
printf (_(" Reserved entries:\n"));
printf (_(" %*s %*s Purpose\n"),
addr_size * 2, "Address", addr_size * 2, "Initial");
entry = print_mips_pltgot_entry (data, mips_pltgot, entry);
printf (" PLT lazy resolver\n");
entry = print_mips_pltgot_entry (data, mips_pltgot, entry);
printf (" Module pointer\n");
printf ("\n");
printf (_(" Entries:\n"));
printf (_(" %*s %*s %*s %-7s %3s %s\n"),
addr_size * 2, "Address",
addr_size * 2, "Initial",
addr_size * 2, "Sym.Val.", "Type", "Ndx", "Name");
sym_width = (is_32bit_elf ? 80 : 160) - 17 - addr_size * 6 - 1;
for (i = 0; i < count; i++)
{
Elf_Internal_Sym *psym;
psym = dynamic_symbols + get_reloc_symindex (rels[i].r_info);
entry = print_mips_pltgot_entry (data, mips_pltgot, entry);
printf (" ");
print_vma (psym->st_value, LONG_HEX);
printf (" %-7s %3s ",
get_symbol_type (ELF_ST_TYPE (psym->st_info)),
get_symbol_index_type (psym->st_shndx));
if (VALID_DYNAMIC_NAME (psym->st_name))
print_symbol (sym_width, GET_DYNAMIC_NAME (psym->st_name));
else
printf ("<corrupt: %14ld>", psym->st_name);
printf ("\n");
}
printf ("\n");
if (data)
free (data);
free (rels);
}
return 1;
}

View File

@ -1,3 +1,14 @@
2008-08-08 Richard Sandiford <rdsandiford@googlemail.com>
Daniel Jacobowitz <dan@codesourcery.com>
* config/tc-mips.c (OPTION_CALL_NONPIC): New macro.
(OPTION_NON_SHARED, OPTION_XGOT, OPTION_MABI, OPTION_32)
(OPTION_N32, OPTION_64, OPTION_MDEBUG, OPTION_NO_MDEBUG)
(OPTION_PDR, OPTION_NO_PDR, OPTION_MVXWORKS_PIC): Bump by 1.
(md_longopts): Add -call_nonpic.
(md_parse_option): Handle OPTION_CALL_NONPIC.
(md_show_usage): Add -call_nonpic.
2008-08-08 Sterling Augustine <sterling@tensilica.com>
* config/tc-xtensa.c (exclude_section_from_property_tables): New.

View File

@ -11231,27 +11231,29 @@ struct option md_longopts[] =
#define OPTION_CALL_SHARED (OPTION_ELF_BASE + 0)
{"KPIC", no_argument, NULL, OPTION_CALL_SHARED},
{"call_shared", no_argument, NULL, OPTION_CALL_SHARED},
#define OPTION_NON_SHARED (OPTION_ELF_BASE + 1)
#define OPTION_CALL_NONPIC (OPTION_ELF_BASE + 1)
{"call_nonpic", no_argument, NULL, OPTION_CALL_NONPIC},
#define OPTION_NON_SHARED (OPTION_ELF_BASE + 2)
{"non_shared", no_argument, NULL, OPTION_NON_SHARED},
#define OPTION_XGOT (OPTION_ELF_BASE + 2)
#define OPTION_XGOT (OPTION_ELF_BASE + 3)
{"xgot", no_argument, NULL, OPTION_XGOT},
#define OPTION_MABI (OPTION_ELF_BASE + 3)
#define OPTION_MABI (OPTION_ELF_BASE + 4)
{"mabi", required_argument, NULL, OPTION_MABI},
#define OPTION_32 (OPTION_ELF_BASE + 4)
#define OPTION_32 (OPTION_ELF_BASE + 5)
{"32", no_argument, NULL, OPTION_32},
#define OPTION_N32 (OPTION_ELF_BASE + 5)
#define OPTION_N32 (OPTION_ELF_BASE + 6)
{"n32", no_argument, NULL, OPTION_N32},
#define OPTION_64 (OPTION_ELF_BASE + 6)
#define OPTION_64 (OPTION_ELF_BASE + 7)
{"64", no_argument, NULL, OPTION_64},
#define OPTION_MDEBUG (OPTION_ELF_BASE + 7)
#define OPTION_MDEBUG (OPTION_ELF_BASE + 8)
{"mdebug", no_argument, NULL, OPTION_MDEBUG},
#define OPTION_NO_MDEBUG (OPTION_ELF_BASE + 8)
#define OPTION_NO_MDEBUG (OPTION_ELF_BASE + 9)
{"no-mdebug", no_argument, NULL, OPTION_NO_MDEBUG},
#define OPTION_PDR (OPTION_ELF_BASE + 9)
#define OPTION_PDR (OPTION_ELF_BASE + 10)
{"mpdr", no_argument, NULL, OPTION_PDR},
#define OPTION_NO_PDR (OPTION_ELF_BASE + 10)
#define OPTION_NO_PDR (OPTION_ELF_BASE + 11)
{"mno-pdr", no_argument, NULL, OPTION_NO_PDR},
#define OPTION_MVXWORKS_PIC (OPTION_ELF_BASE + 11)
#define OPTION_MVXWORKS_PIC (OPTION_ELF_BASE + 12)
{"mvxworks-pic", no_argument, NULL, OPTION_MVXWORKS_PIC},
#endif /* OBJ_ELF */
@ -11515,6 +11517,16 @@ md_parse_option (int c, char *arg)
mips_abicalls = TRUE;
break;
case OPTION_CALL_NONPIC:
if (!IS_ELF)
{
as_bad (_("-call_nonpic is supported only for ELF format"));
return 0;
}
mips_pic = NO_PIC;
mips_abicalls = TRUE;
break;
case OPTION_NON_SHARED:
if (!IS_ELF)
{
@ -15401,8 +15413,9 @@ MIPS options:\n\
#ifdef OBJ_ELF
fprintf (stream, _("\
-KPIC, -call_shared generate SVR4 position independent code\n\
-call_nonpic generate non-PIC code that can operate with DSOs\n\
-mvxworks-pic generate VxWorks position independent code\n\
-non_shared do not generate position independent code\n\
-non_shared do not generate code that can operate with DSOs\n\
-xgot assume a 32 bit GOT\n\
-mpdr, -mno-pdr enable/disable creation of .pdr sections\n\
-mshared, -mno-shared disable/enable .cpload optimization for\n\

View File

@ -1,3 +1,8 @@
2008-08-08 Richard Sandiford <rdsandiford@googlemail.com>
* gas/mips/call-nonpic-1.s, gas/mips/call-nonpic-1.d: New test.
* gas/mips/mips.exp: Run it.
2008-08-06 Richard Sandiford <rdsandiford@googlemail.com>
* gas/mips/elf-rel8-mips16.d, gas/mips/elf-rel8-mips16.s,

View File

@ -0,0 +1,16 @@
#as: -mabi=32 -mips2 -call_nonpic
#objdump: -pdr
.*
private flags = 10001004: .*
Disassembly of section \.text:
0+0 <\.text>:
.* lui t9,0x0
.*: R_MIPS_HI16 foo
.* addiu t9,t9,0
.*: R_MIPS_LO16 foo
.* jalr t9
.* nop

View File

@ -0,0 +1,2 @@
la $25,foo
jalr $25

View File

@ -832,4 +832,5 @@ if { [istarget mips*-*-vxworks*] } {
[mips_arch_list_matching mips1]
run_dump_test "mips16-vis-1"
run_dump_test "call-nonpic-1"
}

View File

@ -1,3 +1,11 @@
2008-08-08 Richard Sandiford <rdsandiford@googlemail.com>
Daniel Jacobowitz <dan@codesourcery.com>
Catherine Moore <clm@codesourcery.com>
Mark Shinwell <shinwell@codesourcery.com>
* mips.h (STO_MIPS_PLT, ELF_ST_IS_MIPS_PLT, ELF_ST_SET_MIPS_PLT)
(STO_MIPS_PIC, DT_MIPS_PLTGOT, DT_MIPS_RWPLT): New macros.
2008-08-04 Markus Weiss <weissms@aros.org>
* common.h (ELFOSABI_AROS): Update comment.

View File

@ -662,6 +662,12 @@ extern void bfd_mips_elf32_swap_reginfo_out
/* Address of auxiliary .dynamic. */
#define DT_MIPS_AUX_DYNAMIC 0x70000031
/* Address of the base of the PLTGOT. */
#define DT_MIPS_PLTGOT 0x70000032
/* Points to the base of a writable PLT. */
#define DT_MIPS_RWPLT 0x70000034
/* Flags which may appear in a DT_MIPS_FLAGS entry. */
@ -723,6 +729,20 @@ extern void bfd_mips_elf32_swap_reginfo_out
#define STO_HIDDEN STV_HIDDEN
#define STO_PROTECTED STV_PROTECTED
/* The MIPS psABI was updated in 2008 with support for PLTs and copy
relocs. There are therefore two types of nonzero SHN_UNDEF functions:
PLT entries and traditional MIPS lazy binding stubs. We mark the former
with STO_MIPS_PLT to distinguish them from the latter. */
#define STO_MIPS_PLT 0x8
/* This value is used to mark PIC functions in an object that mixes
PIC and non-PIC. */
#define STO_MIPS_PIC 0x20
#define ELF_ST_IS_MIPS_PIC(OTHER) \
(((OTHER) & ~ELF_ST_VISIBILITY (-1)) == STO_MIPS_PIC)
#define ELF_ST_SET_MIPS_PIC(OTHER) \
(STO_MIPS_PIC | ELF_ST_VISIBILITY (OTHER))
/* This value is used for a mips16 .text symbol. */
#define STO_MIPS16 0xf0
#define ELF_ST_IS_MIPS16(OTHER) (((OTHER) & 0xf0) == STO_MIPS16)

View File

@ -1,3 +1,25 @@
2008-08-08 Richard Sandiford <rdsandiford@googlemail.com>
Daniel Jacobowitz <dan@codesourcery.com>
* emulparams/elf32bmip.sh (GOT): Define, moving .got.plt to...
(OTHER_RELRO_SECTIONS, OTHER_READWRITE_SECTIONS): ...one of these
two variables.
* emulparams/elf32bmipn32-defs.sh: Likewise.
* emultempl/mipself.em: Include ldctor.h, elf/mips.h and elfxx-mips.h.
(is_mips_elf): New macro.
(stub_file, stub_bfd): New variables.
(hook_stub_info): New structure.
(hook_in_stub): New function.
(mips_add_stub_section): Likewise.
(mips_create_output_section_statements): Likewise.
(mips_before_allocation): Likewise.
(real_func): New variable.
(mips_for_each_input_file_wrapper): New function.
(mips_lang_for_each_input_file): Likewise.
(lang_for_each_input_file): Define.
(LDEMUL_BEFORE_ALLOCATION): Likewise.
(LDEMUL_CREATE_OUTPUT_SECTION_STATEMENTS): Likewise.
2008-08-08 Alan Modra <amodra@bigpond.net.au>
* ldfile.c (ldfile_open_file_search): Use concat.

View File

@ -35,6 +35,25 @@ OTHER_GOT_SYMBOLS='
. = .;
_gp = ALIGN(16) + 0x7ff0;
'
# .got.plt is only used for the PLT psABI extension. It should not be
# included in the .sdata block with .got, as there is no need to access
# the section from _gp. Note that the traditional:
#
# . = .
# _gp = ALIGN (16) + 0x7ff0;
# .got : { *(.got.plt) *(.got) }
#
# would set _gp to the wrong value; _gp - 0x7ff0 must point to the start
# of *(.got).
GOT=".got ${RELOCATING-0} : { *(.got) }"
unset OTHER_READWRITE_SECTIONS
unset OTHER_RELRO_SECTIONS
if test -n "$RELRO_NOW"; then
OTHER_RELRO_SECTIONS=".got.plt ${RELOCATING-0} : { *(.got.plt) }"
else
OTHER_READWRITE_SECTIONS=".got.plt ${RELOCATING-0} : { *(.got.plt) }"
fi
OTHER_SDATA_SECTIONS="
.lit8 ${RELOCATING-0} : { *(.lit8) }
.lit4 ${RELOCATING-0} : { *(.lit4) }

View File

@ -53,6 +53,25 @@ OTHER_GOT_SYMBOLS='
. = .;
_gp = ALIGN(16) + 0x7ff0;
'
# .got.plt is only used for the PLT psABI extension. It should not be
# included in the .sdata block with .got, as there is no need to access
# the section from _gp. Note that the traditional:
#
# . = .
# _gp = ALIGN (16) + 0x7ff0;
# .got : { *(.got.plt) *(.got) }
#
# would set _gp to the wrong value; _gp - 0x7ff0 must point to the start
# of *(.got).
GOT=".got ${RELOCATING-0} : { *(.got) }"
unset OTHER_READWRITE_SECTIONS
unset OTHER_RELRO_SECTIONS
if test -n "$RELRO_NOW"; then
OTHER_RELRO_SECTIONS=".got.plt ${RELOCATING-0} : { *(.got.plt) }"
else
OTHER_READWRITE_SECTIONS=".got.plt ${RELOCATING-0} : { *(.got.plt) }"
fi
OTHER_SDATA_SECTIONS="
.lit8 ${RELOCATING-0} : { *(.lit8) }
.lit4 ${RELOCATING-0} : { *(.lit4) }

View File

@ -19,6 +19,20 @@
# MA 02110-1301, USA.
fragment <<EOF
#include "ldctor.h"
#include "elf/mips.h"
#include "elfxx-mips.h"
#define is_mips_elf(bfd) \
(bfd_get_flavour (bfd) == bfd_target_elf_flavour \
&& elf_tdata (bfd) != NULL \
&& elf_object_id (bfd) == MIPS_ELF_TDATA)
/* Fake input file for stubs. */
static lang_input_statement_type *stub_file;
static bfd *stub_bfd;
static void
mips_after_parse (void)
{
@ -33,6 +47,195 @@ mips_after_parse (void)
}
after_parse_default ();
}
struct hook_stub_info
{
lang_statement_list_type add;
asection *input_section;
};
/* Traverse the linker tree to find the spot where the stub goes. */
static bfd_boolean
hook_in_stub (struct hook_stub_info *info, lang_statement_union_type **lp)
{
lang_statement_union_type *l;
bfd_boolean ret;
for (; (l = *lp) != NULL; lp = &l->header.next)
{
switch (l->header.type)
{
case lang_constructors_statement_enum:
ret = hook_in_stub (info, &constructor_list.head);
if (ret)
return ret;
break;
case lang_output_section_statement_enum:
ret = hook_in_stub (info,
&l->output_section_statement.children.head);
if (ret)
return ret;
break;
case lang_wild_statement_enum:
ret = hook_in_stub (info, &l->wild_statement.children.head);
if (ret)
return ret;
break;
case lang_group_statement_enum:
ret = hook_in_stub (info, &l->group_statement.children.head);
if (ret)
return ret;
break;
case lang_input_section_enum:
if (info->input_section == NULL
|| l->input_section.section == info->input_section)
{
/* We've found our section. Insert the stub immediately
before its associated input section. */
*lp = info->add.head;
*(info->add.tail) = l;
return TRUE;
}
break;
case lang_data_statement_enum:
case lang_reloc_statement_enum:
case lang_object_symbols_statement_enum:
case lang_output_statement_enum:
case lang_target_statement_enum:
case lang_input_statement_enum:
case lang_assignment_statement_enum:
case lang_padding_statement_enum:
case lang_address_statement_enum:
case lang_fill_statement_enum:
break;
default:
FAIL ();
break;
}
}
return FALSE;
}
/* Create a new stub section called STUB_SEC_NAME and arrange for it to
be linked in OUTPUT_SECTION. The section should go at the beginning of
OUTPUT_SECTION if INPUT_SECTION is null, otherwise it must go immediately
before INPUT_SECTION. */
static asection *
mips_add_stub_section (const char *stub_sec_name, asection *input_section,
asection *output_section)
{
asection *stub_sec;
flagword flags;
const char *secname;
lang_output_section_statement_type *os;
struct hook_stub_info info;
/* Create the stub file, if we haven't already. */
if (stub_file == NULL)
{
stub_file = lang_add_input_file ("linker stubs",
lang_input_file_is_fake_enum,
NULL);
stub_bfd = bfd_create ("linker stubs", link_info.output_bfd);
if (stub_bfd == NULL
|| !bfd_set_arch_mach (stub_bfd,
bfd_get_arch (link_info.output_bfd),
bfd_get_mach (link_info.output_bfd)))
{
einfo ("%F%P: can not create BFD %E\n");
return NULL;
}
stub_bfd->flags |= BFD_LINKER_CREATED;
stub_file->the_bfd = stub_bfd;
ldlang_add_file (stub_file);
}
/* Create the section. */
stub_sec = bfd_make_section_anyway (stub_bfd, stub_sec_name);
if (stub_sec == NULL)
goto err_ret;
/* Set the flags. */
flags = (SEC_ALLOC | SEC_LOAD | SEC_READONLY | SEC_CODE
| SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_KEEP);
if (!bfd_set_section_flags (stub_bfd, stub_sec, flags))
goto err_ret;
/* Create an output section statement. */
secname = bfd_get_section_name (output_section->owner, output_section);
os = lang_output_section_find (secname);
/* Initialize a statement list that contains only the new statement. */
lang_list_init (&info.add);
lang_add_section (&info.add, stub_sec, os);
if (info.add.head == NULL)
goto err_ret;
/* Insert the new statement in the appropriate place. */
info.input_section = input_section;
if (hook_in_stub (&info, &os->children.head))
return stub_sec;
err_ret:
einfo ("%X%P: can not make stub section: %E\n");
return NULL;
}
/* This is called before the input files are opened. */
static void
mips_create_output_section_statements (void)
{
if (is_mips_elf (link_info.output_bfd))
_bfd_mips_elf_init_stubs (&link_info, mips_add_stub_section);
}
/* This is called after we have merged the private data of the input bfds. */
static void
mips_before_allocation (void)
{
flagword flags;
flags = elf_elfheader (link_info.output_bfd)->e_flags;
if (!link_info.shared
&& !link_info.nocopyreloc
&& (flags & (EF_MIPS_PIC | EF_MIPS_CPIC)) == EF_MIPS_CPIC)
_bfd_mips_elf_use_plts_and_copy_relocs (&link_info);
gld${EMULATION_NAME}_before_allocation ();
}
/* Avoid processing the fake stub_file in vercheck, stat_needed and
check_needed routines. */
static void (*real_func) (lang_input_statement_type *);
static void mips_for_each_input_file_wrapper (lang_input_statement_type *l)
{
if (l != stub_file)
(*real_func) (l);
}
static void
mips_lang_for_each_input_file (void (*func) (lang_input_statement_type *))
{
real_func = func;
lang_for_each_input_file (&mips_for_each_input_file_wrapper);
}
#define lang_for_each_input_file mips_lang_for_each_input_file
EOF
LDEMUL_AFTER_PARSE=mips_after_parse
LDEMUL_BEFORE_ALLOCATION=mips_before_allocation
LDEMUL_CREATE_OUTPUT_SECTION_STATEMENTS=mips_create_output_section_statements

View File

@ -1,3 +1,90 @@
2008-08-08 Richard Sandiford <rdsandiford@googlemail.com>
Daniel Jacobowitz <dan@codesourcery.com>
* ld-mips-elf/mips16-pic-3a.s,
ld-mips-elf/mips16-pic-3b.s,
ld-mips-elf/mips16-pic-3.dd,
ld-mips-elf/mips16-pic-3.gd,
ld-mips-elf/mips16-pic-3.rd,
ld-mips-elf/mips16-pic-3.inc,
ld-mips-elf/pic-and-nonpic-1a.s,
ld-mips-elf/pic-and-nonpic-1b.s,
ld-mips-elf/pic-and-nonpic-1.ld,
ld-mips-elf/pic-and-nonpic-1.dd,
ld-mips-elf/pic-and-nonpic-1.nd,
ld-mips-elf/pic-and-nonpic-1-rel.dd,
ld-mips-elf/pic-and-nonpic-1-rel.nd,
ld-mips-elf/pic-and-nonpic-2a.s,
ld-mips-elf/pic-and-nonpic-2b.s,
ld-mips-elf/pic-and-nonpic-2.d,
ld-mips-elf/pic-and-nonpic-3a.s,
ld-mips-elf/pic-and-nonpic-3a.ld,
ld-mips-elf/pic-and-nonpic-3a.dd,
ld-mips-elf/pic-and-nonpic-3a.gd,
ld-mips-elf/pic-and-nonpic-3a.sd,
ld-mips-elf/pic-and-nonpic-3b.s,
ld-mips-elf/pic-and-nonpic-3b.ld,
ld-mips-elf/pic-and-nonpic-3b.ad,
ld-mips-elf/pic-and-nonpic-3b.dd,
ld-mips-elf/pic-and-nonpic-3b.gd,
ld-mips-elf/pic-and-nonpic-3b.nd,
ld-mips-elf/pic-and-nonpic-3b.pd,
ld-mips-elf/pic-and-nonpic-3b.rd,
ld-mips-elf/pic-and-nonpic-3b.sd,
ld-mips-elf/pic-and-nonpic-3-error.d,
ld-mips-elf/pic-and-nonpic-4a.s,
ld-mips-elf/pic-and-nonpic-4b.s,
ld-mips-elf/pic-and-nonpic-4b.ld,
ld-mips-elf/pic-and-nonpic-4b.ad,
ld-mips-elf/pic-and-nonpic-4b.dd,
ld-mips-elf/pic-and-nonpic-4b.gd,
ld-mips-elf/pic-and-nonpic-4b.nd,
ld-mips-elf/pic-and-nonpic-4b.rd,
ld-mips-elf/pic-and-nonpic-4b.sd,
ld-mips-elf/pic-and-nonpic-4-error.d,
ld-mips-elf/pic-and-nonpic-5a.s,
ld-mips-elf/pic-and-nonpic-5b.s,
ld-mips-elf/pic-and-nonpic-5b.ld,
ld-mips-elf/pic-and-nonpic-5b.ad,
ld-mips-elf/pic-and-nonpic-5b.dd,
ld-mips-elf/pic-and-nonpic-5b.gd,
ld-mips-elf/pic-and-nonpic-5b.nd,
ld-mips-elf/pic-and-nonpic-5b.rd,
ld-mips-elf/pic-and-nonpic-5b.sd,
ld-mips-elf/pic-and-nonpic-5b.pd,
ld-mips-elf/pic-and-nonpic-6.ld,
ld-mips-elf/pic-and-nonpic-6-o32a.s,
ld-mips-elf/pic-and-nonpic-6-o32b.s,
ld-mips-elf/pic-and-nonpic-6-o32c.s,
ld-mips-elf/pic-and-nonpic-6-o32.ad,
ld-mips-elf/pic-and-nonpic-6-o32.dd,
ld-mips-elf/pic-and-nonpic-6-o32.gd,
ld-mips-elf/pic-and-nonpic-6-o32.nd,
ld-mips-elf/pic-and-nonpic-6-o32.pd,
ld-mips-elf/pic-and-nonpic-6-o32.rd,
ld-mips-elf/pic-and-nonpic-6-o32.sd,
ld-mips-elf/pic-and-nonpic-6-n32a.s,
ld-mips-elf/pic-and-nonpic-6-n32b.s,
ld-mips-elf/pic-and-nonpic-6-n32c.s,
ld-mips-elf/pic-and-nonpic-6-n32.ad,
ld-mips-elf/pic-and-nonpic-6-n32.dd,
ld-mips-elf/pic-and-nonpic-6-n32.gd,
ld-mips-elf/pic-and-nonpic-6-n32.nd,
ld-mips-elf/pic-and-nonpic-6-n32.pd,
ld-mips-elf/pic-and-nonpic-6-n32.rd,
ld-mips-elf/pic-and-nonpic-6-n32.sd,
ld-mips-elf/pic-and-nonpic-6-n64a.s,
ld-mips-elf/pic-and-nonpic-6-n64b.s,
ld-mips-elf/pic-and-nonpic-6-n64c.s,
ld-mips-elf/pic-and-nonpic-6-n64.ad,
ld-mips-elf/pic-and-nonpic-6-n64.dd,
ld-mips-elf/pic-and-nonpic-6-n64.gd,
ld-mips-elf/pic-and-nonpic-6-n64.nd,
ld-mips-elf/pic-and-nonpic-6-n64.pd,
ld-mips-elf/pic-and-nonpic-6-n64.rd,
ld-mips-elf/pic-and-nonpic-6-n64.sd: New tests.
* ld-mips-elf/mips-elf.exp: Run them.
2008-08-07 Richard Sandiford <rdsandiford@googlemail.com>
* ld-mips-elf/tls-hidden4.got, ld-mips-elf/tls-hidden4.r: We have

View File

@ -77,7 +77,14 @@ if { $linux_gnu } {
{ readelf --symbols mips16-pic-2.nd } \
{ readelf --relocs mips16-pic-2.rd } \
{ readelf -d mips16-pic-2.ad } } \
"mips16-pic-2"]]
"mips16-pic-2"] \
[list "MIPS16 PIC test 3" \
"-melf32btsmip -T mips16-pic-1.ld tmpdir/mips16-pic-1-dummy.so" \
"-EB -32 -I $srcdir/$subdir" { mips16-pic-3a.s mips16-pic-3b.s } \
{ { objdump -dr mips16-pic-3.dd } \
{ readelf --relocs mips16-pic-3.rd } \
{ readelf -A mips16-pic-3.gd } } \
"mips16-pic-3"]]
}
if { [istarget mips64*-linux-gnu] } {
@ -133,6 +140,114 @@ if { $linux_gnu } {
run_dump_test "rel32-o32"
run_dump_test "rel32-n32"
run_dump_test "rel64"
# The first test checks that a mixed PIC/non-PIC relocatable link
# will not introduce any stubs itself, but will flag PIC functions
# for the final link.
#
# The second test checks that we insert stubs for calls from
# non-PIC functions to PIC functions when linking the original
# two objects together.
#
# The third test checks that we do the same when linking the
# result of the first link (with no other source files).
run_ld_link_tests {
{"PIC and non-PIC test 1 (relocatable)" "-r -melf32btsmip"
"-32 -EB -mips2" {pic-and-nonpic-1a.s pic-and-nonpic-1b.s}
{{objdump -dr pic-and-nonpic-1-rel.dd}
{readelf --symbols pic-and-nonpic-1-rel.nd}}
"pic-and-nonpic-1-rel.o"}
{"PIC and non-PIC test 1 (static 1)"
"-melf32btsmip -Tpic-and-nonpic-1.ld"
"-32 -EB -mips2" {pic-and-nonpic-1a.s pic-and-nonpic-1b.s}
{{objdump -dr pic-and-nonpic-1.dd}
{readelf --symbols pic-and-nonpic-1.nd}}
"pic-and-nonpic-1-static1.o"}
{"PIC and non-PIC test 1 (static 2)"
"-melf32btsmip -Tpic-and-nonpic-1.ld tmpdir/pic-and-nonpic-1-rel.o"
"" {}
{{objdump -dr pic-and-nonpic-1.dd}
{readelf --symbols pic-and-nonpic-1.nd}}
"pic-and-nonpic-1-static2.o"}
}
run_dump_test "pic-and-nonpic-2"
run_ld_link_tests {
{"PIC and non-PIC test 3 (shared library)"
"-melf32btsmip -shared -Tpic-and-nonpic-3a.ld"
"-32 -EB -mips2" {pic-and-nonpic-3a.s}
{{readelf --segments pic-and-nonpic-3a.sd}
{readelf -A pic-and-nonpic-3a.gd}
{objdump -dr pic-and-nonpic-3a.dd}}
"pic-and-nonpic-3a.so"}
{"PIC and non-PIC test 3 (executable)"
"-melf32btsmip -Tpic-and-nonpic-3b.ld tmpdir/pic-and-nonpic-3a.so"
"-32 -EB -mips2" {pic-and-nonpic-3b.s}
{{readelf --segments pic-and-nonpic-3b.sd}
{objdump -dr pic-and-nonpic-3b.dd}
{objdump {-s -j.got.plt} pic-and-nonpic-3b.pd}
{readelf -A pic-and-nonpic-3b.gd}
{readelf --relocs pic-and-nonpic-3b.rd}
{readelf --symbols pic-and-nonpic-3b.nd}
{readelf -d pic-and-nonpic-3b.ad}}
"pic-and-nonpic-3b"}
}
run_dump_test "pic-and-nonpic-3-error"
run_ld_link_tests {
{"PIC and non-PIC test 4 (shared library)"
"-melf32btsmip -shared -Tpic-and-nonpic-3a.ld"
"-32 -EB -mips2" {pic-and-nonpic-4a.s}
{}
"pic-and-nonpic-4a.so"}
{"PIC and non-PIC test 4 (executable)"
"-melf32btsmip -Tpic-and-nonpic-4b.ld tmpdir/pic-and-nonpic-4a.so"
"-32 -EB -mips2" {pic-and-nonpic-4b.s}
{{readelf --segments pic-and-nonpic-4b.sd}
{objdump -dr pic-and-nonpic-4b.dd}
{objdump {-s -j.got -j.data} pic-and-nonpic-4b.gd}
{readelf --relocs pic-and-nonpic-4b.rd}
{readelf --symbols pic-and-nonpic-4b.nd}
{readelf -d pic-and-nonpic-4b.ad}}
"pic-and-nonpic-4b"}
}
run_dump_test "pic-and-nonpic-4-error"
run_ld_link_tests {
{"PIC and non-PIC test 5 (executable)"
"-melf32btsmip -Tpic-and-nonpic-5b.ld tmpdir/pic-and-nonpic-3a.so tmpdir/pic-and-nonpic-4a.so"
"-32 -EB -mips2" {pic-and-nonpic-5a.s pic-and-nonpic-5b.s}
{{readelf --segments pic-and-nonpic-5b.sd}
{objdump -dr pic-and-nonpic-5b.dd}
{objdump {-s -j.got.plt -j.data} pic-and-nonpic-5b.pd}
{readelf -A pic-and-nonpic-5b.gd}
{readelf --relocs pic-and-nonpic-5b.rd}
{readelf --symbols pic-and-nonpic-5b.nd}
{readelf -d pic-and-nonpic-5b.ad}}
"pic-and-nonpic-5b"}
}
set abis { o32 -32 elf32btsmip }
if $has_newabi {
lappend abis n32 -n32 elf32btsmipn32
lappend abis n64 -64 elf64btsmip
}
foreach { abi flag emul } $abis {
run_ld_link_tests [list \
[list "PIC and non-PIC test 6 ($abi shared library)" \
"-m$emul -shared -Tpic-and-nonpic-3a.ld" \
"$flag -EB -mips3" \
[list "pic-and-nonpic-6-${abi}a.s"] {} \
"pic-and-nonpic-6-${abi}.so"] \
[list "PIC and non-PIC test 6 ($abi executable)" \
"-m$emul -Tpic-and-nonpic-6.ld tmpdir/pic-and-nonpic-6-${abi}.so" \
"$flag -EB -mips3" \
[list "pic-and-nonpic-6-${abi}b.s" \
"pic-and-nonpic-6-${abi}c.s"] \
[list "readelf {--wide --segments} pic-and-nonpic-6-${abi}.sd" \
"objdump -dr pic-and-nonpic-6-${abi}.dd" \
"objdump {-s -j.got.plt} pic-and-nonpic-6-${abi}.pd" \
"readelf -A pic-and-nonpic-6-${abi}.gd" \
"readelf --relocs pic-and-nonpic-6-${abi}.rd" \
"readelf --symbols pic-and-nonpic-6-${abi}.nd" \
"readelf -d pic-and-nonpic-6-${abi}.ad"] \
"pic-and-nonpic-6-${abi}"]]
}
}
if { $embedded_elf } {

View File

@ -0,0 +1,265 @@
.*
Disassembly of section \.text:
00040400 <unused1>:
.*: e820 jr ra
.*: 6500 nop
00040404 <unused2>:
.*: e820 jr ra
.*: 6500 nop
00040408 <unused3>:
.*: e820 jr ra
.*: 6500 nop
0004040c <unused4>:
.*: e820 jr ra
.*: 6500 nop
00040410 <used1>:
.*: 03e00008 jr ra
.*: 00000000 nop
00040418 <used2>:
.*: 03e00008 jr ra
.*: 00000000 nop
00040420 <used3>:
.*: 03e00008 jr ra
.*: 00000000 nop
00040428 <used4>:
.*: 03e00008 jr ra
.*: 00000000 nop
00040430 <used5>:
.*: 03e00008 jr ra
.*: 00000000 nop
00040438 <used6>:
.*: 03e00008 jr ra
.*: 00000000 nop
00040440 <used7>:
.*: 03e00008 jr ra
.*: 00000000 nop
00040448 <used8>:
.*: 03e00008 jr ra
.*: 00000000 nop
00040450 <used9>:
.*: 03e00008 jr ra
.*: 00000000 nop
00040458 <used10>:
.*: 03e00008 jr ra
.*: 00000000 nop
00040460 <test_unused1>:
.*: .* jal .* <unused1>
00040464 <test_used1>:
.*: .* jalx .* <__call_used1>
00040468 <test_used3>:
.*: .* jalx .* <__call_used3>
0004046c <test_used7>:
.*: .* jalx .* <__call_used7>
00040470 <test_extern1>:
.*: .* jalx .* <__call_extern1>
00040474 <test_unused2>:
.*: .* jal .* <unused2>
00040478 <test_used2>:
.*: .* jalx .* <__call_fp_used2>
0004047c <test_used4>:
.*: .* jalx .* <__call_fp_used4>
00040480 <test_used8>:
.*: .* jalx .* <__call_fp_used8>
00040484 <test_extern2>:
.*: .* jalx .* <__call_fp_extern2>
#...
00040490 <test_unused3>:
.*: .* jal .* <unused3>
00040494 <test_used5>:
.*: .* jalx .* <__call_used5>
00040498 <test_used9>:
.*: .* jalx .* <__call_used9>
0004049c <test_extern3>:
.*: .* jalx .* <__call_extern3>
000404a0 <test_unused4>:
.*: .* jal .* <unused4>
000404a4 <test_used6>:
.*: .* jalx .* <__call_fp_used6>
000404a8 <test_used10>:
.*: .* jalx .* <__call_fp_used10>
000404ac <test_extern4>:
.*: .* jalx .* <__call_fp_extern4>
000404b0 <__call_used1>:
.*: 3c190004 lui t9,.*
.*: 27390410 addiu t9,t9,.*
.*: 03200008 jr t9
.*: 44846000 mtc1 a0,\$f12
000404c0 <__call_used3>:
.*: 3c190004 lui t9,.*
.*: 27390420 addiu t9,t9,.*
.*: 03200008 jr t9
.*: 44846000 mtc1 a0,\$f12
000404d0 <__call_used7>:
.*: 3c190004 lui t9,.*
.*: 27390440 addiu t9,t9,.*
.*: 03200008 jr t9
.*: 44846000 mtc1 a0,\$f12
000404e0 <__call_extern1>:
.*: 3c190004 lui t9,.*
.*: 27390650 addiu t9,t9,.*
.*: 03200008 jr t9
.*: 44846000 mtc1 a0,\$f12
000404f0 <__call_fp_used2>:
.*: 03e09021 move s2,ra
.*: 3c190004 lui t9,.*
.*: 27390418 addiu t9,t9,.*
.*: 0320f809 jalr t9
.*: 44846000 mtc1 a0,\$f12
.*: 44020000 mfc1 v0,\$f0
.*: 02400008 jr s2
.*: 00000000 nop
00040510 <__call_fp_used4>:
.*: 03e09021 move s2,ra
.*: 3c190004 lui t9,.*
.*: 27390428 addiu t9,t9,.*
.*: 0320f809 jalr t9
.*: 44846000 mtc1 a0,\$f12
.*: 44020000 mfc1 v0,\$f0
.*: 02400008 jr s2
.*: 00000000 nop
00040530 <__call_fp_used8>:
.*: 03e09021 move s2,ra
.*: 3c190004 lui t9,.*
.*: 27390448 addiu t9,t9,.*
.*: 0320f809 jalr t9
.*: 44846000 mtc1 a0,\$f12
.*: 44020000 mfc1 v0,\$f0
.*: 02400008 jr s2
.*: 00000000 nop
00040550 <__call_fp_extern2>:
.*: 03e09021 move s2,ra
.*: 3c190004 lui t9,.*
.*: 27390630 addiu t9,t9,.*
.*: 0320f809 jalr t9
.*: 44846000 mtc1 a0,\$f12
.*: 44020000 mfc1 v0,\$f0
.*: 02400008 jr s2
.*: 00000000 nop
00040570 <__call_used5>:
.*: 3c190004 lui t9,.*
.*: 27390430 addiu t9,t9,.*
.*: 03200008 jr t9
.*: 44846000 mtc1 a0,\$f12
00040580 <__call_used9>:
.*: 3c190004 lui t9,.*
.*: 27390450 addiu t9,t9,.*
.*: 03200008 jr t9
.*: 44846000 mtc1 a0,\$f12
00040590 <__call_extern3>:
.*: 3c190004 lui t9,.*
.*: 27390620 addiu t9,t9,.*
.*: 03200008 jr t9
.*: 44846000 mtc1 a0,\$f12
000405a0 <__call_fp_used6>:
.*: 03e09021 move s2,ra
.*: 3c190004 lui t9,.*
.*: 27390438 addiu t9,t9,.*
.*: 0320f809 jalr t9
.*: 44846000 mtc1 a0,\$f12
.*: 44020000 mfc1 v0,\$f0
.*: 02400008 jr s2
.*: 00000000 nop
000405c0 <__call_fp_used10>:
.*: 03e09021 move s2,ra
.*: 3c190004 lui t9,.*
.*: 27390458 addiu t9,t9,.*
.*: 0320f809 jalr t9
.*: 44846000 mtc1 a0,\$f12
.*: 44020000 mfc1 v0,\$f0
.*: 02400008 jr s2
.*: 00000000 nop
000405e0 <__call_fp_extern4>:
.*: 03e09021 move s2,ra
.*: 3c190004 lui t9,.*
.*: 27390640 addiu t9,t9,.*
.*: 0320f809 jalr t9
.*: 44846000 mtc1 a0,\$f12
.*: 44020000 mfc1 v0,\$f0
.*: 02400008 jr s2
.*: 00000000 nop
Disassembly of section \.plt:
00040600 <.*>:
.*: 3c1c0005 lui gp,0x5
.*: 8f990400 lw t9,1024\(gp\)
.*: 279c0400 addiu gp,gp,1024
.*: 031cc023 subu t8,t8,gp
.*: 03e07821 move t7,ra
.*: 0018c082 srl t8,t8,0x2
.*: 0320f809 jalr t9
.*: 2718fffe addiu t8,t8,-2
00040620 <extern3@plt>:
.*: 3c0f0005 lui t7,0x5
.*: 8df90408 lw t9,1032\(t7\)
.*: 25f80408 addiu t8,t7,1032
.*: 03200008 jr t9
00040630 <extern2@plt>:
.*: 3c0f0005 lui t7,0x5
.*: 8df9040c lw t9,1036\(t7\)
.*: 25f8040c addiu t8,t7,1036
.*: 03200008 jr t9
00040640 <extern4@plt>:
.*: 3c0f0005 lui t7,0x5
.*: 8df90410 lw t9,1040\(t7\)
.*: 25f80410 addiu t8,t7,1040
.*: 03200008 jr t9
00040650 <extern1@plt>:
.*: 3c0f0005 lui t7,0x5
.*: 8df90414 lw t9,1044\(t7\)
.*: 25f80414 addiu t8,t7,1044
.*: 03200008 jr t9
.*: 00000000 nop

View File

@ -0,0 +1,23 @@
Primary GOT:
Canonical gp value: 00057ff0
Reserved entries:
Address Access Initial Purpose
00050000 -32752\(gp\) 00000000 Lazy resolver
00050004 -32748\(gp\) 80000000 Module pointer \(GNU extension\)
PLT GOT:
Reserved entries:
Address Initial Purpose
00050400 00000000 PLT lazy resolver
00050404 00000000 Module pointer
Entries:
Address Initial Sym.Val. Type Ndx Name
00050408 00040600 00040620 FUNC UND extern3
0005040c 00040600 00040630 FUNC UND extern2
00050410 00040600 00040640 FUNC UND extern4
00050414 00040600 00040650 FUNC UND extern1

View File

@ -0,0 +1,59 @@
.macro test_call,name
.set mips16
.text
.ent test_\name
test_\name:
jal \name
.end test_\name
.endm
.macro call_stub,name
.set nomips16
.section .mips16.call.\name, "ax", @progbits
.ent __call_\name
__call_\name:
la $25,\name
jr $25
mtc1 $4,$f12
.end __call_\name
test_call \name
.endm
.macro call_fp_stub,name
.set nomips16
.section .mips16.call.fp.\name, "ax", @progbits
.ent __call_fp_\name
__call_fp_\name:
move $18,$31
la $25,\name
jalr $25
mtc1 $4,$f12
mfc1 $2,$f0
jr $18
nop
.end __call_fp_\name
test_call \name
.endm
.macro lstub,name,mode
.set \mode
.text
.ent \name
\name:
jr $31
nop
.end \name
.endm
.macro hstub,name,mode
.globl \name
.hidden \name
lstub \name, \mode
.endm
.macro gstub,name,mode
.globl \name
lstub \name, \mode
.endm

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Relocation section '\.rel\.plt' at offset .* contains 4 entries:
Offset Info Type Sym\.Value Sym\. Name
00050408 .*7f R_MIPS_JUMP_SLOT 00040620 extern3
0005040c .*7f R_MIPS_JUMP_SLOT 00040630 extern2
00050410 .*7f R_MIPS_JUMP_SLOT 00040640 extern4
00050414 .*7f R_MIPS_JUMP_SLOT 00040650 extern1

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.abicalls
.option pic0
.set noreorder
.include "mips16-pic-3.inc"
# For symbols called by a .call stub in this file.
hstub unused1,mips16
# For symbols called by a .call.fp stub in this file.
hstub unused2,mips16
# For symbols called by a .call stub in another file.
hstub unused3,mips16
# For symbols called by a .call.fp stub in another file.
hstub unused4,mips16
# For symbols called by a .call stub in this file.
lstub used1,nomips16
# For symbols called by a .call.fp stub in this file.
lstub used2,nomips16
# For symbols called by a .call stub in this file.
hstub used3,nomips16
# For symbols called by a .call.fp stub in this file.
hstub used4,nomips16
# For symbols called by a .call stub in another file.
hstub used5,nomips16
# For symbols called by a .call.fp stub in another file.
hstub used6,nomips16
# For symbols called by a .call stub in this file.
gstub used7,nomips16
# For symbols called by a .call.fp stub in this file.
gstub used8,nomips16
# For symbols called by a .call stub in another file.
gstub used9,nomips16
# For symbols called by a .call.fp stub in another file.
gstub used10,nomips16
call_stub unused1
call_stub used1
call_stub used3
call_stub used7
call_stub extern1
call_fp_stub unused2
call_fp_stub used2
call_fp_stub used4
call_fp_stub used8
call_fp_stub extern2

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.abicalls
.option pic0
.set noreorder
.include "mips16-pic-3.inc"
call_stub unused3
call_stub used5
call_stub used9
call_stub extern3
call_fp_stub unused4
call_fp_stub used6
call_fp_stub used10
call_fp_stub extern4

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.*
Disassembly of section \.text:
00000000 <f1>:
0: 3c1c0000 lui gp,0x0
0: R_MIPS_HI16 _gp_disp
4: 279c0000 addiu gp,gp,0
4: R_MIPS_LO16 _gp_disp
8: 0399e021 addu gp,gp,t9
c: 0c000000 jal 0 .*
c: R_MIPS_26 f3
10: 00000000 nop
14: 03e00008 jr ra
18: 00000000 nop
0000001c <f2>:
1c: 3c1c0000 lui gp,0x0
1c: R_MIPS_HI16 _gp_disp
20: 279c0000 addiu gp,gp,0
20: R_MIPS_LO16 _gp_disp
24: 0399e021 addu gp,gp,t9
28: 03e00008 jr ra
2c: 00000000 nop
00000030 <f3>:
30: f000 6a00 li v0,0
30: R_MIPS16_HI16 _gp_disp
34: f000 0b00 la v1,34 .*
34: R_MIPS16_LO16 _gp_disp
38: f400 3240 sll v0,16
3c: e269 addu v0,v1
3e: 6500 nop
00000040 <__start>:
40: 0c000000 jal 0 .*
40: R_MIPS_26 f1
44: 00000000 nop
48: 0c000000 jal 0 .*
48: R_MIPS_26 f2
4c: 00000000 nop
50: 0c000000 jal 0 .*
50: R_MIPS_26 f3
54: 00000000 nop
...

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#...
.*: 00000030 14 FUNC GLOBAL DEFAULT \[MIPS16\] .* f3
.*: 00000040 24 FUNC GLOBAL DEFAULT .* __start
.*: 0000001c 20 FUNC GLOBAL DEFAULT \[MIPS PIC\] .* f2
.*: 00000000 28 FUNC GLOBAL DEFAULT \[MIPS PIC\] .* f1

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.*
Disassembly of section \.text:
00041000 <\.pic\.f2>:
41000: 3c190004 lui t9,0x4
41004: 0801040f j 4103c <f2>
41008: 2739103c addiu t9,t9,4156
\.\.\.
00041018 <\.pic\.f1>:
41018: 3c190004 lui t9,0x4
4101c: 27391020 addiu t9,t9,4128
00041020 <f1>:
41020: 3c1c0002 lui gp,0x2
41024: 279c6fe0 addiu gp,gp,28640
41028: 0399e021 addu gp,gp,t9
4102c: 74010414 jalx 41050 <f3>
41030: 00000000 nop
41034: 03e00008 jr ra
41038: 00000000 nop
0004103c <f2>:
4103c: 3c1c0002 lui gp,0x2
41040: 279c6fc4 addiu gp,gp,28612
41044: 0399e021 addu gp,gp,t9
41048: 03e00008 jr ra
4104c: 00000000 nop
00041050 <f3>:
41050: f000 6a02 li v0,2
41054: f7ad 0b0c la v1,48000 .*
41058: f400 3240 sll v0,16
4105c: e269 addu v0,v1
4105e: 6500 nop
00041060 <__start>:
41060: 0c010406 jal 41018 <\.pic\.f1>
41064: 00000000 nop
41068: 0c010400 jal 41000 <\.pic\.f2>
4106c: 00000000 nop
41070: 74010414 jalx 41050 <f3>
41074: 00000000 nop
\.\.\.

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SECTIONS
{
. = 0x40000;
.reginfo : { *(.reginfo) }
.pdr : { *(.pdr) }
. = 0x41000;
.text : { *(.text) }
_gp = 0x68000;
}

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#...
.*: 00041018 8 FUNC LOCAL DEFAULT .* .pic.f1
.*: 00041000 16 FUNC LOCAL DEFAULT .* .pic.f2
.*: 00000000 0 OBJECT GLOBAL DEFAULT UND _gp_disp
.*: 00068000 0 NOTYPE GLOBAL DEFAULT ABS _gp
.*: 00041050 14 FUNC GLOBAL DEFAULT \[MIPS16\] .* f3
.*: 00041060 24 FUNC GLOBAL DEFAULT .* __start
.*: 0004103c 20 FUNC GLOBAL DEFAULT .* f2
.*: 00041020 28 FUNC GLOBAL DEFAULT .* f1

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.abicalls
.global f1
.global f2
.global f3
.ent f1
f1:
.set noreorder
.cpload $25
.set reorder
.option pic0
jal f3
.option pic2
jr $31
.end f1
.ent f2
f2:
.set noreorder
.cpload $25
.set reorder
jr $31
.end f2
.set mips16
.ent f3
f3:
li $2,%hi(_gp_disp)
addiu $3,$pc,%lo(_gp_disp)
sll $2,16
addu $2,$2,$3
.end f3

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.abicalls
.option pic0
.global __start
.ent __start
__start:
jal f1
jal f2
jal f3
.end __start

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#source: pic-and-nonpic-2a.s
#source: pic-and-nonpic-2b.s
#as: -32 -EB
#ld: -melf32btsmip -Tpic-and-nonpic-1.ld
#objdump: -dr
.*
Disassembly of section \.text:
00041000 <__start>:
41000: 0c010406 jal 41018 <\.pic\.foo@@V2>
41004: 00000000 nop
\.\.\.
00041018 <\.pic\.foo@@V2>:
41018: 3c190004 lui t9,0x4
4101c: 27391020 addiu t9,t9,4128
00041020 <foo2>:
41020: 03e00008 jr ra
41024: 00000000 nop
\.\.\.

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.abicalls
.option pic0
.global __start
.ent __start
__start:
jal foo
.end __start

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.abicalls
.symver foo2,foo@@V2
.global foo2
.ent foo2
foo2: jr $31
.end foo2

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#name: PIC and non-PIC test 3 (error)
#source: pic-and-nonpic-3b.s
#as: -EB -32 -mips2
#ld: tmpdir/pic-and-nonpic-3a.so -melf32btsmip -znocopyreloc
#error: .*: non-dynamic relocations refer to dynamic symbol foo

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# GOT layout:
#
# -32752: lazy resolution function
# -32748: reserved for module pointer
# -32744: the GOT page entry
# -32740: foo's GOT entry
# -32736: ext's GOT entry
.*
Disassembly of section \.text:
00000800 <foo>:
800: 3c1c0001 lui gp,0x1
804: 279c7bf0 addiu gp,gp,31728
808: 0399e021 addu gp,gp,t9
80c: 8f99801c lw t9,-32740\(gp\)
810: 8f828018 lw v0,-32744\(gp\)
814: 03200008 jr t9
818: 24420000 addiu v0,v0,0
0000081c <bar>:
81c: f000 6a01 li v0,1
820: f3cf 0a10 la v0,83f0 .*
824: f400 3240 sll v0,16
828: e269 addu v0,v1
82a: f030 9a60 lw v1,-32736\(v0\)
82e: 659a move gp,v0
830: eb00 jr v1
832: 653b move t9,v1
#...
Disassembly of section \.MIPS\.stubs:
00000c00 <.MIPS.stubs>:
c00: 8f998010 lw t9,-32752\(gp\)
c04: 03e07821 move t7,ra
c08: 0320f809 jalr t9
c0c: 24180007 li t8,7
\.\.\.

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Primary GOT:
Canonical gp value: 000183f0
Reserved entries:
Address Access Initial Purpose
00010400 -32752\(gp\) 00000000 Lazy resolver
00010404 -32748\(gp\) 80000000 Module pointer \(GNU extension\)
Local entries:
Address Access Initial
00010408 -32744\(gp\) 00010000
Global entries:
Address Access Initial Sym\.Val\. Type Ndx Name
0001040c -32740\(gp\) 00000800 00000800 FUNC 6 foo
00010410 -32736\(gp\) 00000c00 00000c00 FUNC UND ext

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SECTIONS
{
. = 0;
.reginfo : { *(.reginfo) }
. = ALIGN (0x400);
.dynamic : { *(.dynamic) }
.dynsym : { *(.dynsym) }
.dynstr : { *(.dynstr) }
. = ALIGN (0x400);
.text : { *(.text) }
. = ALIGN (0x400);
.MIPS.stubs : { *(.MIPS.stubs) }
. = ALIGN (0x10000);
.data : { *(.data) }
. = ALIGN (0x400);
_gp = . + 0x7ff0;
.got : { *(.got) }
}

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.abicalls
.set noreorder
.set nomips16
.global foo
.ent foo
foo:
.cpload $25
lw $25,%call16(foo)($28)
lw $2,%got(data)($28)
jr $25
addiu $2,$2,%lo(data)
.end foo
.set mips16
.global bar
.ent bar
bar:
li $2,%hi(_gp_disp)
addiu $2,$pc,%lo(_gp_disp)
sll $2,16
addu $2,$2,$3
lw $3,%call16(ext)($2)
move $28,$2
jr $3
move $25,$3
.end bar
.data
data: .word 0x12345678

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Elf file type is DYN \(Shared object file\)
Entry point .*
There are 5 program headers, starting at offset .*
Program Headers:
* Type * Offset * VirtAddr * PhysAddr * FileSiz * MemSiz * Flg * Align
* REGINFO * [^ ]+ * 0x0+00000 * 0x0+00000 [^ ]+ * [^ ]+ * R * 0x.*
* LOAD * [^ ]+ * 0x0+00000 * 0x0+00000 [^ ]+ * [^ ]+ * R E * 0x.*
* LOAD * [^ ]+ * 0x0+10000 * 0x0+10000 [^ ]+ * [^ ]+ * RW * 0x.*
* DYNAMIC * [^ ]+ * 0x0+00400 * 0x0+00400 .*
* NULL * .*
*Section to Segment mapping:
*Segment Sections\.\.\.
*0*0 * \.reginfo *
*0*1 * \.reginfo \.dynamic \.dynsym \.dynstr \.hash \.text \.MIPS.stubs *
*0*2 * \.data \.got *
*0*3 * \.dynamic *
*0*4 *

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Dynamic section at offset .* contains .*:
* Tag * Type * Name/Value
0x00000001 \(NEEDED\) .*
0x00000004 \(HASH\) .*
0x00000005 \(STRTAB\) .*
0x00000006 \(SYMTAB\) .*
0x0000000a \(STRSZ\) .*
0x0000000b \(SYMENT\) .*
0x70000016 \(MIPS_RLD_MAP\) * 0x80000
0x00000015 \(DEBUG\) * 0x0
0x00000003 \(PLTGOT\) * 0xa0000
0x70000001 \(MIPS_RLD_VERSION\) * 1
0x70000005 \(MIPS_FLAGS\) * NOTPOT
0x70000006 \(MIPS_BASE_ADDRESS\) * 0x40000
# This must be the number of GOT entries - 1, the last entry being for "bar".
0x7000000a \(MIPS_LOCAL_GOTNO\) * 3
# This must be MIPS_GOTSYM + 1.
0x70000011 \(MIPS_SYMTABNO\) * 8
0x70000012 \(MIPS_UNREFEXTNO\) .*
# This must be the index of "bar".
0x70000013 \(MIPS_GOTSYM\) * 0x7
0x00000014 \(PLTREL\) * REL
0x00000017 \(JMPREL\) * 0x43000
0x00000002 \(PLTRELSZ\) * 8 \(bytes\)
0x70000032 \(MIPS_PLTGOT\) * 0x81000
0x00000000 \(NULL\) * 0x0

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# GOT layout:
#
# -32752: lazy resolution function
# -32748: reserved for module pointer
# -32744: GOT page entry.
# -32740: bar's GOT entry
.*
Disassembly of section \.plt:
00043020 <.*>:
.*: 3c1c0008 lui gp,0x8
.*: 8f991000 lw t9,4096\(gp\)
.*: 279c1000 addiu gp,gp,4096
.*: 031cc023 subu t8,t8,gp
.*: 03e07821 move t7,ra
.*: 0018c082 srl t8,t8,0x2
.*: 0320f809 jalr t9
.*: 2718fffe addiu t8,t8,-2
00043040 <foo@plt>:
.*: 3c0f0008 lui t7,0x8
.*: 8df91008 lw t9,4104\(t7\)
.*: 25f81008 addiu t8,t7,4104
.*: 03200008 jr t9
.*: 00000000 nop
Disassembly of section \.text:
00044000 <__start>:
.*: 0c010c10 jal 43040 <foo@plt>
.*: 00000000 nop
.*: 08011004 j 44010 <ext>
.*: 00000000 nop
00044010 <ext>:
.*: 3c1c000a lui gp,0xa
.*: 279c7ff0 addiu gp,gp,32752
.*: 8f828018 lw v0,-32744\(gp\)
.*: 24421000 addiu v0,v0,4096
.*: 8f99801c lw t9,-32740\(gp\)
.*: 03200008 jr t9
.*: 00000000 nop
.*: 00000000 nop
Disassembly of section .MIPS.stubs:
00044030 <\.MIPS\.stubs>:
.*: 8f998010 lw t9,-32752\(gp\)
.*: 03e07821 move t7,ra
.*: 0320f809 jalr t9
.*: 24180007 li t8,7
\.\.\.

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Primary GOT:
Canonical gp value: 000a7ff0
Reserved entries:
Address Access Initial Purpose
000a0000 -32752\(gp\) 00000000 Lazy resolver
000a0004 -32748\(gp\) 80000000 Module pointer \(GNU extension\)
Local entries:
Address Access Initial
000a0008 -32744\(gp\) 000a0000
Global entries:
Address Access Initial Sym\.Val\. Type Ndx Name
000a000c -32740\(gp\) 00044030 00044030 FUNC UND bar
PLT GOT:
Reserved entries:
Address Initial Purpose
00081000 00000000 PLT lazy resolver
00081004 00000000 Module pointer
Entries:
Address Initial Sym.Val. Type Ndx Name
00081008 00043020 00000000 FUNC UND foo

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SECTIONS
{
. = 0x40000 + SIZEOF_HEADERS;
.interp : { *(.interp) }
. = 0x41000;
.reginfo : { *(.reginfo) }
.hash : { *(.hash) }
.dynsym : { *(.dynsym) }
.dynstr : { *(.dynstr) }
. = 0x42000;
.dynamic : { *(.dynamic) }
. = 0x43000;
.rel.plt : { *(.rel.plt) }
.plt : { *(.plt) }
. = 0x44000;
.text : { *(.text) }
.MIPS.stubs : { *(.MIPS.stubs) }
. = 0x80000;
.rld_map : { *(.rld_map) }
. = 0x81000;
.got.plt : { *(.got.plt) }
. = 0xa0000;
_gp = . + 0x7ff0;
.got : { *(.got) }
. = 0xa1000;
.data : { *(.data) }
}

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@ -0,0 +1,9 @@
Symbol table '\.dynsym' contains .*:
#...
.*: 00000000 * 0 * FUNC * GLOBAL * DEFAULT * UND * foo
# The index on the next line should correspond to MIPS_GOTSYM.
#...
*7: 00044030 * 0 * FUNC * GLOBAL * DEFAULT * UND * bar
#pass

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.*
Contents of section \.got\.plt:
81000 00000000 00000000 00043020 .*

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@ -0,0 +1,4 @@
Relocation section '\.rel\.plt' at offset .* contains .*:
* Offset * Info * Type * Sym\.Value * Sym\. Name
00081008 * 0000057f * R_MIPS_JUMP_SLOT * 00000000 * foo

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.abicalls
.option pic0
.global __start
.ent __start
__start:
jal foo
j ext
.end __start
.global ext
.ent ext
ext:
lui $gp,%hi(__gnu_local_gp)
addiu $gp,$gp,%lo(__gnu_local_gp)
lw $2,%got(local)($gp)
addiu $2,$2,%lo(local)
lw $25,%call16(bar)($gp)
jr $25
.end ext
.data
local: .word 1

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Elf file type is EXEC \(Executable file\)
Entry point 0x44000
There are 8 program headers, starting at offset .*
Program Headers:
* Type * Offset * VirtAddr * PhysAddr * FileSiz * MemSiz * Flg * Align
* PHDR * .*
* INTERP * .*
.*
* REGINFO * [^ ]+ * 0x0+41000 * 0x0+41000 * [^ ]+ * [^ ]+ * R * 0x.*
* LOAD * [^ ]+ * 0x0+40000 * 0x0+40000 [^ ]+ * [^ ]+ * R E * 0x.*
* LOAD * [^ ]+ * 0x0+80000 * 0x0+80000 [^ ]+ * [^ ]+ * RW * 0x.*
* LOAD * [^ ]+ * 0x0+a0000 * 0x0+a0000 [^ ]+ * [^ ]+ * RW * 0x.*
* DYNAMIC * [^ ]+ * 0x0+42000 * 0x0+42000 .*
* NULL * .*
*Section to Segment mapping:
*Segment Sections\.\.\.
*0*0 *
*0*1 *\.interp *
*0*2 *\.reginfo *
*0*3 *\.interp \.reginfo \.hash \.dynsym \.dynstr \.dynamic \.rel\.plt \.plt \.text \.MIPS.stubs *
*0*4 *\.rld_map \.got\.plt *
*0*5 *\.got \.data *
*0*6 *\.dynamic *
*0*7 *

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#name: PIC and non-PIC test 4 (error)
#source: pic-and-nonpic-4b.s
#as: -EB -32 -mips2
#ld: tmpdir/pic-and-nonpic-4a.so -melf32btsmip -znocopyreloc
#error: .*: non-dynamic relocations refer to dynamic symbol obj1

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.abicalls
.option pic0
.global obj1
.global obj2
.global obj3
.type obj1,%object
.type obj2,%object
.type obj3,%object
.size obj1,8
.size obj2,4
.size obj3,16
.data
obj1:
.word 1, 2
obj2:
.word 3
obj3:
.word 5, 6, 7, 8

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Dynamic section at offset .* contains .*:
* Tag * Type * Name/Value
0x00000001 \(NEEDED\) .*
0x00000004 \(HASH\) .*
0x00000005 \(STRTAB\) .*
0x00000006 \(SYMTAB\) .*
0x0000000a \(STRSZ\) .*
0x0000000b \(SYMENT\) .*
0x70000016 \(MIPS_RLD_MAP\) * 0x80000
0x00000015 \(DEBUG\) * 0x0
0x00000003 \(PLTGOT\) * 0xa0000
0x00000011 \(REL\) * 0x43000
0x00000012 \(RELSZ\) * 32 \(bytes\)
0x00000013 \(RELENT\) * 8 \(bytes\)
0x70000001 \(MIPS_RLD_VERSION\) * 1
0x70000005 \(MIPS_FLAGS\) * NOTPOT
0x70000006 \(MIPS_BASE_ADDRESS\) * 0x40000
# This must be the number of GOT entries - 1, the last entry being for "obj3".
0x7000000a \(MIPS_LOCAL_GOTNO\) * 2
# This must be MIPS_GOTSYM + 1.
0x70000011 \(MIPS_SYMTABNO\) * 8
0x70000012 \(MIPS_UNREFEXTNO\) .*
# This must be the index of "obj3".
0x70000013 \(MIPS_GOTSYM\) * 0x7
0x00000000 \(NULL\) * 0x0

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@ -0,0 +1,10 @@
.*
Disassembly of section \.text:
00044000 <__start>:
44000: 3c02000a lui v0,0xa
44004: 24422000 addiu v0,v0,8192
44008: 000a2008 .*
4400c: 00000000 nop

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@ -0,0 +1,7 @@
.*
Contents of section \.got:
a0000 00000000 80000000 00000000 .*
Contents of section \.data:
a1000 000a2008 00000000 00000000 00000000 .*

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SECTIONS
{
. = 0x40000 + SIZEOF_HEADERS;
.interp : { *(.interp) }
. = 0x41000;
.reginfo : { *(.reginfo) }
.hash : { *(.hash) }
.dynsym : { *(.dynsym) }
.dynstr : { *(.dynstr) }
. = 0x42000;
.dynamic : { *(.dynamic) }
. = 0x43000;
.rel.dyn : { *(.rel.dyn) }
. = 0x44000;
.text : { *(.text) }
. = 0x80000;
.rld_map : { *(.rld_map) }
. = 0xa0000;
_gp = . + 0x7ff0;
.got : { *(.got) }
. = 0xa1000;
.data : { *(.data) }
. = 0xa2000;
.bss : { *(.dynbss) }
}

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Symbol table '\.dynsym' contains .*:
# The order of the next two symbols is not important.
#...
.*: 000a2000 * 8 * OBJECT * GLOBAL * DEFAULT * [0-9]+ * obj1
#...
.*: 000a2008 * 4 * OBJECT * GLOBAL * DEFAULT * [0-9]+ * obj2
# The index on the next line should correspond to MIPS_GOTSYM.
#...
*7: 0+ * 0 * OBJECT * GLOBAL * DEFAULT * UND * obj3
#pass

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Relocation section '\.rel\.dyn' at offset .* contains .*:
* Offset * Info * Type * Sym\.Value * Sym\. Name
00000000 * 00000000 * R_MIPS_NONE *
000a2000 * 0000017e * R_MIPS_COPY * 000a2000 * obj1
000a2008 * 0000047e * R_MIPS_COPY * 000a2008 * obj2
000a1004 * 00000703 * R_MIPS_REL32 * 00000000 * obj3

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@ -0,0 +1,13 @@
.abicalls
.option pic0
.global __start
.ent __start
__start:
lui $2,%hi(obj1)
addiu $2,$2,%lo(obj1)
.end __start
.word obj2
.data
.word obj2
.word obj3

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Elf file type is EXEC \(Executable file\)
Entry point 0x44000
There are 8 program headers, starting at offset .*
Program Headers:
* Type * Offset * VirtAddr * PhysAddr * FileSiz * MemSiz * Flg * Align
* PHDR * .*
* INTERP * .*
.*
* REGINFO * [^ ]+ * 0x0+41000 * 0x0+41000 * [^ ]+ * [^ ]+ * R * 0x.*
* LOAD * [^ ]+ * 0x0+40000 * 0x0+40000 [^ ]+ * [^ ]+ * R E * 0x.*
* LOAD * [^ ]+ * 0x0+80000 * 0x0+80000 [^ ]+ * [^ ]+ * RW * 0x.*
* LOAD * [^ ]+ * 0x0+a0000 * 0x0+a0000 [^ ]+ * [^ ]+ * RW * 0x.*
* DYNAMIC * [^ ]+ * 0x0+42000 * 0x0+42000 .*
* NULL * .*
*Section to Segment mapping:
*Segment Sections\.\.\.
*0*0 *
*0*1 * \.interp *
*0*2 * \.reginfo *
*0*3 * \.interp \.reginfo \.hash \.dynsym \.dynstr \.dynamic \.rel\.dyn \.text *
*0*4 * \.rld_map *
*0*5 * \.got \.data \.bss *
*0*6 * \.dynamic *
*0*7 *

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.abicalls
.option pic0
.global __start
.ent __start
__start:
lui $2,%hi(foo)
addiu $2,$2,%lo(foo)
lui $2,%hi(obj1)
addiu $2,$2,%lo(obj1)
.end __start
.data
.word foo
.word bar
.word obj1
.word obj2

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Dynamic section at offset .* contains .*:
* Tag * Type * Name/Value
0x00000001 \(NEEDED\) .*
0x00000001 \(NEEDED\) .*
0x00000004 \(HASH\) .*
0x00000005 \(STRTAB\) .*
0x00000006 \(SYMTAB\) .*
0x0000000a \(STRSZ\) .*
0x0000000b \(SYMENT\) .*
0x70000016 \(MIPS_RLD_MAP\) * 0x80000
0x00000015 \(DEBUG\) * 0x0
0x00000016 \(TEXTREL\) * 0x0
0x00000003 \(PLTGOT\) * 0xa0000
0x00000011 \(REL\) * 0x43000
0x00000012 \(RELSZ\) * 48 \(bytes\)
0x00000013 \(RELENT\) * 8 \(bytes\)
0x70000001 \(MIPS_RLD_VERSION\) * 1
0x70000005 \(MIPS_FLAGS\) * NOTPOT
0x70000006 \(MIPS_BASE_ADDRESS\) * 0x40000
# This must be the number of GOT entries - 2. The last two entries are
# for "bar" and "obj2".
0x7000000a \(MIPS_LOCAL_GOTNO\) * 2
# This must be MIPS_GOTSYM + 2.
0x70000011 \(MIPS_SYMTABNO\) * 10
0x70000012 \(MIPS_UNREFEXTNO\) * .*
0x70000013 \(MIPS_GOTSYM\) * 0x8
0x00000014 \(PLTREL\) * REL
0x00000017 \(JMPREL\) * 0x43030
0x00000002 \(PLTRELSZ\) * 8 \(bytes\)
0x70000032 \(MIPS_PLTGOT\) * 0x81000
0x00000000 \(NULL\) * 0x0

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.*
Disassembly of section \.plt:
00043040 <.*>:
.*: 3c1c0008 lui gp,0x8
.*: 8f991000 lw t9,4096\(gp\)
.*: 279c1000 addiu gp,gp,4096
.*: 031cc023 subu t8,t8,gp
.*: 03e07821 move t7,ra
.*: 0018c082 srl t8,t8,0x2
.*: 0320f809 jalr t9
.*: 2718fffe addiu t8,t8,-2
00043060 <foo@plt>:
.*: 3c0f0008 lui t7,0x8
.*: 8df91008 lw t9,4104\(t7\)
.*: 25f81008 addiu t8,t7,4104
.*: 03200008 jr t9
.*: 00000000 nop
Disassembly of section .text:
00044000 <__start>:
44000: 3c020004 lui v0,0x4
44004: 24423060 addiu v0,v0,12384
44008: 3c02000a lui v0,0xa
4400c: 24422000 addiu v0,v0,8192
00044010 <ext>:
44010: 00043060 .*
44014: 00000000 .*
44018: 000a2000 .*
4401c: 00000000 .*

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Primary GOT:
Canonical gp value: 000a7ff0
Reserved entries:
Address Access Initial Purpose
000a0000 -32752\(gp\) 00000000 Lazy resolver
000a0004 -32748\(gp\) 80000000 Module pointer \(GNU extension\)
# There must be GOT entries for the R_MIPS_REL32 relocation symbols.
Global entries:
Address Access Initial Sym\.Val\. Type Ndx Name
000a0008 -32744\(gp\) 00000000 00000000 OBJECT UND obj2
000a000c -32740\(gp\) 00000000 00000000 FUNC UND bar
PLT GOT:
Reserved entries:
Address Initial Purpose
00081000 00000000 PLT lazy resolver
00081004 00000000 Module pointer
Entries:
Address Initial Sym.Val. Type Ndx Name
00081008 00043040 00043060 FUNC UND foo

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SECTIONS
{
. = 0x40000 + SIZEOF_HEADERS;
.interp : { *(.interp) }
. = 0x41000;
.reginfo : { *(.reginfo) }
.hash : { *(.hash) }
.dynsym : { *(.dynsym) }
.dynstr : { *(.dynstr) }
. = 0x42000;
.dynamic : { *(.dynamic) }
. = 0x43000;
.rel.dyn : { *(.rel.dyn) }
.rel.plt : { *(.rel.plt) }
.plt : { *(.plt) }
. = 0x44000;
.text : { *(.text) }
. = 0x80000;
.rld_map : { *(.rld_map) }
. = 0x81000;
.got.plt : { *(.got.plt) }
. = 0xa0000;
_gp = . + 0x7ff0;
.got : { *(.got) }
. = 0xa1000;
.data : { *(.data) }
. = 0xa2000;
.bss : { *(.dynbss) }
}

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Symbol table '\.dynsym' contains .*:
#...
.*: 00043060 * 0 * FUNC * GLOBAL * DEFAULT * \[MIPS PLT\] * UND * foo
# The index on the next line should correspond to MIPS_GOTSYM.
#...
*8: 0+ * 0 * OBJECT * GLOBAL * DEFAULT * UND * obj2
*9: 0+ * 0 * FUNC * GLOBAL * DEFAULT * UND * bar
#pass

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.*
Contents of section \.got\.plt:
81000 00000000 00000000 00043040 .*
Contents of section \.data:
a1000 00043060 00000000 000a2000 00000000 .*

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Relocation section '\.rel\.dyn' at offset .* contains .*:
* Offset * Info * Type * Sym\.Value * Sym\. Name
00000000 * 00000000 * R_MIPS_NONE *
000a2000 * [^ ]*7e * R_MIPS_COPY * 000a2000 * obj1
0004401c * [^ ]*03 * R_MIPS_REL32 * 00000000 * obj2
000a100c * [^ ]*03 * R_MIPS_REL32 * 00000000 * obj2
00044014 * [^ ]*03 * R_MIPS_REL32 * 00000000 * bar
000a1004 * [^ ]*03 * R_MIPS_REL32 * 00000000 * bar
Relocation section '\.rel\.plt' at offset .* contains .*:
* Offset * Info * Type * Sym\.Value * Sym\. Name
00081008 * [^ ]*7f * R_MIPS_JUMP_SLOT * 00043060 * foo

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.abicalls
.global ext
.ent ext
ext:
.word foo
.word bar
.word obj1
.word obj2
.end ext

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Elf file type is EXEC \(Executable file\)
Entry point 0x44000
There are 8 program headers, starting at offset .*
Program Headers:
* Type * Offset * VirtAddr * PhysAddr * FileSiz * MemSiz * Flg * Align
* PHDR * .*
* INTERP * .*
.*
* REGINFO * [^ ]+ * 0x0+41000 * 0x0+41000 * [^ ]+ * [^ ]+ * R * 0x.*
* LOAD * [^ ]+ * 0x0+40000 * 0x0+40000 [^ ]+ * [^ ]+ * R E * 0x.*
* LOAD * [^ ]+ * 0x0+80000 * 0x0+80000 [^ ]+ * [^ ]+ * RW * 0x.*
* LOAD * [^ ]+ * 0x0+a0000 * 0x0+a0000 [^ ]+ * [^ ]+ * RW * 0x.*
* DYNAMIC * [^ ]+ * 0x0+42000 * 0x0+42000 .*
* NULL * .*
*Section to Segment mapping:
*Segment Sections\.\.\.
*0*0 *
*0*1 * \.interp *
*0*2 * \.reginfo *
*0*3 * \.interp \.reginfo \.hash \.dynsym \.dynstr \.dynamic \.rel\.dyn \.rel\.plt \.plt \.text *
*0*4 * \.rld_map \.got\.plt *
*0*5 * \.got \.data \.bss *
*0*6 * \.dynamic *
*0*7 *

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Dynamic section at offset .* contains .*:
* Tag * Type * Name/Value
0x00000001 \(NEEDED\) .*
0x00000004 \(HASH\) .*
0x00000005 \(STRTAB\) .*
0x00000006 \(SYMTAB\) .*
0x0000000a \(STRSZ\) .*
0x0000000b \(SYMENT\) .*
0x70000016 \(MIPS_RLD_MAP\) * 0x80000
0x00000015 \(DEBUG\) * 0x0
0x00000003 \(PLTGOT\) * 0xa0000
0x00000011 \(REL\) * 0x43000
0x00000012 \(RELSZ\) * 40 \(bytes\)
0x00000013 \(RELENT\) * 8 \(bytes\)
0x70000001 \(MIPS_RLD_VERSION\) * 1
0x70000005 \(MIPS_FLAGS\) * NOTPOT
0x70000006 \(MIPS_BASE_ADDRESS\) * 0x40000
0x7000000a \(MIPS_LOCAL_GOTNO\) * 2
0x70000011 \(MIPS_SYMTABNO\) * 14
0x70000012 \(MIPS_UNREFEXTNO\) * .*
0x70000013 \(MIPS_GOTSYM\) * 0x7
0x00000014 \(PLTREL\) * REL
0x00000017 \(JMPREL\) * 0x43028
0x00000002 \(PLTRELSZ\) * 24 \(bytes\)
0x70000032 \(MIPS_PLTGOT\) * 0x81000
0x00000000 \(NULL\) * 0x0

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# GOT layout:
#
# -32752: lazy resolution function
# -32748: reserved for module pointer
# -32744: extf2's GOT entry (undefined 0)
# -32740: extf3's GOT entry (PLT entry)
# -32736: extd2's GOT entry (copy reloc)
# -32732: extf1's GOT entry (.MIPS.stubs entry)
# -32728: extd1's GOT entry (undefined 0)
# -32724: extf4's GOT entry (PLT entry)
# -32620: extd4's GOT entry (undefined 0, reloc only)
.*
Disassembly of section \.plt:
00043040 <.*>:
.*: 3c0e0008 lui t2,0x8
.*: 8dd91000 lw t9,4096\(t2\)
.*: 25ce1000 addiu t2,t2,4096
.*: 030ec023 subu t8,t8,t2
.*: 03e07821 move t3,ra
.*: 0018c082 srl t8,t8,0x2
.*: 0320f809 jalr t9
.*: 2718fffe addiu t8,t8,-2
00043060 <extf4@plt>:
.*: 3c0f0008 lui t3,0x8
.*: 8df91008 lw t9,4104\(t3\)
.*: 25f81008 addiu t8,t3,4104
.*: 03200008 jr t9
00043070 <extf5@plt>:
.*: 3c0f0008 lui t3,0x8
.*: 8df9100c lw t9,4108\(t3\)
.*: 25f8100c addiu t8,t3,4108
.*: 03200008 jr t9
00043080 <extf3@plt>:
.*: 3c0f0008 lui t3,0x8
.*: 8df91010 lw t9,4112\(t3\)
.*: 25f81010 addiu t8,t3,4112
.*: 03200008 jr t9
.*: 00000000 nop
Disassembly of section \.text:
00044000 <.*>:
\.\.\.
00044008 <\.pic\.f1>:
44008: 3c190004 lui t9,0x4
4400c: 27394010 addiu t9,t9,16400
00044010 <f1>:
44010: 0c011013 jal 4404c <f3>
44014: 3c020004 lui v0,0x4
44018: 03e00008 jr ra
4401c: 24424020 addiu v0,v0,16416
00044020 <f2>:
44020: 3c1c0006 lui gp,0x6
44024: 0399e021 addu gp,gp,t9
44028: 279c3fd0 addiu gp,gp,16336
4402c: 8f998024 lw t9,-32732\(gp\)
44030: 8f848018 lw a0,-32744\(gp\)
44034: 8f858028 lw a1,-32728\(gp\)
44038: 0320f809 jalr t9
4403c: 8f868020 lw a2,-32736\(gp\)
44040: 8f99801c lw t9,-32740\(gp\)
44044: 03200008 jr t9
44048: 8f84802c lw a0,-32724\(gp\)
0004404c <f3>:
4404c: 03e00008 jr ra
44050: 00000000 nop
\.\.\.
00044060 <__start>:
44060: 0c011002 jal 44008 <\.pic\.f1>
44064: 00000000 nop
44068: 3c020004 lui v0,0x4
4406c: 24424020 addiu v0,v0,16416
44070: 0c010c20 jal 43080 <extf3@plt>
44074: 00000000 nop
44078: 0c010c18 jal 43060 <extf4@plt>
4407c: 00000000 nop
44080: 0c010c1c jal 43070 <extf5@plt>
44084: 00000000 nop
44088: 3c02000a lui v0,0xa
4408c: 24422000 addiu v0,v0,8192
44090: 3c02000a lui v0,0xa
44094: 24422018 addiu v0,v0,8216
\.\.\.
Disassembly of section \.MIPS\.stubs:
000440a0 <\.MIPS\.stubs>:
440a0: 8f998010 lw t9,-32752\(gp\)
440a4: 03e07821 move t3,ra
440a8: 0320f809 jalr t9
440ac: 2418000a li t8,10
\.\.\.

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Primary GOT:
Canonical gp value: 000a7ff0
Reserved entries:
Address Access Initial Purpose
000a0000 -32752\(gp\) 00000000 Lazy resolver
000a0004 -32748\(gp\) 80000000 Module pointer \(GNU extension\)
Global entries:
Address Access Initial Sym\.Val\. Type Ndx Name
000a0008 -32744\(gp\) 00000000 00000000 FUNC UND extf2
000a000c -32740\(gp\) 00000000 00000000 FUNC UND extf3
000a0010 -32736\(gp\) 000a2000 000a2000 OBJECT 16 extd2
000a0014 -32732\(gp\) 000440a0 000440a0 FUNC UND extf1
000a0018 -32728\(gp\) 00000000 00000000 OBJECT UND extd1
000a001c -32724\(gp\) 00000000 00000000 FUNC UND extf4
000a0020 -32720\(gp\) 00000000 00000000 OBJECT UND extd4
PLT GOT:
Reserved entries:
Address Initial Purpose
00081000 00000000 PLT lazy resolver
00081004 00000000 Module pointer
Entries:
Address Initial Sym.Val. Type Ndx Name
00081008 00043040 00000000 FUNC UND extf4
0008100c 00043040 00000000 FUNC UND extf5
00081010 00043040 00000000 FUNC UND extf3

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Symbol table '\.dynsym' contains .*:
#...
.*: 00000000 * 0 * FUNC * GLOBAL * DEFAULT * UND * extf5
# The index on the next line should correspond to MIPS_GOTSYM,
# and the remaining symbols should have the same order as the
# GOT layout given in the *.dd dump.
#...
*7: 0+ * 0 * FUNC * GLOBAL * DEFAULT * UND * extf2
*8: 0+ * 0 * * FUNC * GLOBAL * DEFAULT * UND * extf3
*9: 0+a2000 * 24 * OBJECT * GLOBAL * DEFAULT * [0-9]+ * extd2
*10: 0+440a0 * 0 * FUNC * GLOBAL * DEFAULT * UND * extf1
*11: 0+ * 0 * OBJECT * GLOBAL * DEFAULT * UND * extd1
*12: 0+ * 0 * FUNC * GLOBAL * DEFAULT * UND * extf4
*13: 0+ * 0 * OBJECT * GLOBAL * DEFAULT * UND * extd4
#pass

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.*
Contents of section \.got\.plt:
81000 00000000 00000000 00043040 00043040 .*
81010 00043040 .*

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Relocation section '\.rel\.dyn' at offset .* contains .*:
* Offset * Info * Type * Sym\.Value * Sym\. Name
00000000 * 00000000 * R_MIPS_NONE *
000a2018 * [^ ]*7e * R_MIPS_COPY * 000a2018 * extd3
000a2000 * [^ ]*7e * R_MIPS_COPY * 000a2000 * extd2
000a1000 * [^ ]*03 * R_MIPS_REL32 * 00000000 * extd1
000a1014 * [^ ]*03 * R_MIPS_REL32 * 00000000 * extd4
Relocation section '\.rel\.plt' at offset .* contains .*:
* Offset * Info * Type * Sym\.Value * Sym\. Name
00081008 * [^ ]*7f * R_MIPS_JUMP_SLOT * 00000000 * extf4
0008100c * [^ ]*7f * R_MIPS_JUMP_SLOT * 00000000 * extf5
00081010 * [^ ]*7f * R_MIPS_JUMP_SLOT * 00000000 * extf3

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Elf file type is EXEC \(Executable file\)
Entry point 0x44000
There are 8 program headers, starting at offset .*
Program Headers:
* Type * Offset * VirtAddr * PhysAddr * FileSiz * MemSiz * Flg * Align
* PHDR * .*
* INTERP * .*
.*
* REGINFO * [^ ]+ * 0x0+41000 * 0x0+41000 * [^ ]+ * [^ ]+ * R * 0x.*
* LOAD * [^ ]+ * 0x0+40000 * 0x0+40000 [^ ]+ * [^ ]+ * R E * 0x.*
* LOAD * [^ ]+ * 0x0+80000 * 0x0+80000 [^ ]+ * [^ ]+ * RW * 0x.*
* LOAD * [^ ]+ * 0x0+a0000 * 0x0+a0000 [^ ]+ * [^ ]+ * RW * 0x.*
* DYNAMIC * [^ ]+ * 0x0+42000 * 0x0+42000 .*
* NULL * .*
*Section to Segment mapping:
*Segment Sections\.\.\.
*0*0 *
*0*1 * \.interp *
*0*2 * \.reginfo *
*0*3 * \.interp \.reginfo \.hash \.dynsym \.dynstr \.dynamic \.rel\.dyn \.rel\.plt \.plt \.text \.MIPS\.stubs *
*0*4 * \.rld_map \.got\.plt *
*0*5 * \.got \.data \.bss *
*0*6 * \.dynamic *
*0*7 *

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.abicalls
.global extf1
.ent extf1
extf1:
jr $31
.end extf1
.global extf2
.ent extf2
extf2:
jr $31
.end extf2
.global extf3
.ent extf3
extf3:
jr $31
.end extf3
.global extf4
.ent extf4
extf4:
jr $31
.end extf4
.global extf5
.ent extf5
extf5:
jr $31
.end extf5
.data
.global extd1
.global extd2
.global extd3
.global extd4
.type extd1,%object
.type extd2,%object
.type extd3,%object
.type extd4,%object
.size extd1,20
.size extd2,24
.size extd3,28
.size extd4,8
extd1: .space 20
extd2: .space 24
extd3: .space 28
extd4: .space 8

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.set noreorder
.abicalls
.global f1
.ent f1
f1:
.option pic0
jal f3
.option pic2
lui $2,%hi(f2)
jr $31
addiu $2,$2,%lo(f2)
.end f1
.global f2
.ent f2
f2:
lui $28,%hi(%neg(%gp_rel(f2)))
addu $28,$28,$25
addiu $28,$28,%lo(%neg(%gp_rel(f2)))
lw $25,%call16(extf1)($28)
lw $4,%got_disp(extf2)($28)
lw $5,%got_disp(extd1)($28)
jalr $25
lw $6,%got_disp(extd2)($28)
lw $25,%call16(extf3)($28)
jr $25
lw $4,%got_disp(extf4)($28)
.end f2
.global f3
.ent f3
f3:
jr $31
nop
.end f3
.data
.word extd1
.word extd3

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.abicalls
.option pic0
.set noreorder
.global __start
.ent __start
__start:
jal f1
nop
lui $2,%hi(f2)
addiu $2,$2,%lo(f2)
jal extf3
nop
jal extf4
nop
jal extf5
nop
lui $2,%hi(extd2)
addiu $2,$2,%lo(extd2)
lui $2,%hi(extd3)
addiu $2,$2,%lo(extd3)
.end __start
.data
.word extd2
.word extd4

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Dynamic section at offset .* contains .*:
* Tag * Type * Name/Value
0x0+00000001 \(NEEDED\) .*
0x0+00000004 \(HASH\) .*
0x0+00000005 \(STRTAB\) .*
0x0+00000006 \(SYMTAB\) .*
0x0+0000000a \(STRSZ\) .*
0x0+0000000b \(SYMENT\) .*
0x0+70000016 \(MIPS_RLD_MAP\) * 0x80000
0x0+00000015 \(DEBUG\) * 0x0
0x0+00000003 \(PLTGOT\) * 0xa0000
0x0+00000011 \(REL\) * 0x43000
0x0+00000012 \(RELSZ\) * 80 \(bytes\)
0x0+00000013 \(RELENT\) * 16 \(bytes\)
0x0+70000001 \(MIPS_RLD_VERSION\) * 1
0x0+70000005 \(MIPS_FLAGS\) * NOTPOT
0x0+70000006 \(MIPS_BASE_ADDRESS\) * 0x40000
0x0+7000000a \(MIPS_LOCAL_GOTNO\) * 2
0x0+70000011 \(MIPS_SYMTABNO\) * 14
0x0+70000012 \(MIPS_UNREFEXTNO\) * .*
0x0+70000013 \(MIPS_GOTSYM\) * 0x7
0x0+00000014 \(PLTREL\) * REL
0x0+00000017 \(JMPREL\) * 0x43050
0x0+00000002 \(PLTRELSZ\) * 48 \(bytes\)
0x0+70000032 \(MIPS_PLTGOT\) * 0x81000
0x0+00000000 \(NULL\) * 0x0

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# GOT layout:
#
# -32752: lazy resolution function
# -32744: reserved for module pointer
# -32736: extf2's GOT entry (undefined 0)
# -32728: extf3's GOT entry (PLT entry)
# -32720: extd2's GOT entry (copy reloc)
# -32712: extf1's GOT entry (.MIPS.stubs entry)
# -32704: extd1's GOT entry (undefined 0)
# -32696: extf4's GOT entry (PLT entry)
# -32688: extd4's GOT entry (undefined 0, reloc only)
.*
Disassembly of section \.plt:
0+43080 <.*>:
.*: 3c0e0008 lui t2,0x8
.*: ddd91000 ld t9,4096\(t2\)
.*: 25ce1000 addiu t2,t2,4096
.*: 030ec023 subu t8,t8,t2
.*: 03e07821 move t3,ra
.*: 0018c0c2 srl t8,t8,0x3
.*: 0320f809 jalr t9
.*: 2718fffe addiu t8,t8,-2
0+430a0 <extf4@plt>:
.*: 3c0f0008 lui t3,0x8
.*: ddf91010 ld t9,4112\(t3\)
.*: 25f81010 addiu t8,t3,4112
.*: 03200008 jr t9
0+430b0 <extf5@plt>:
.*: 3c0f0008 lui t3,0x8
.*: ddf91018 ld t9,4120\(t3\)
.*: 25f81018 addiu t8,t3,4120
.*: 03200008 jr t9
0+430c0 <extf3@plt>:
.*: 3c0f0008 lui t3,0x8
.*: ddf91020 ld t9,4128\(t3\)
.*: 25f81020 addiu t8,t3,4128
.*: 03200008 jr t9
.*: 00000000 nop
Disassembly of section \.text:
0+44000 <.*>:
\.\.\.
0+44008 <\.pic\.f1>:
44008: 3c190004 lui t9,0x4
4400c: 27394010 addiu t9,t9,16400
0+44010 <f1>:
44010: 0c011013 jal 4404c <f3>
44014: 3c020004 lui v0,0x4
44018: 03e00008 jr ra
4401c: 24424020 addiu v0,v0,16416
0+44020 <f2>:
44020: 3c1c0006 lui gp,0x6
44024: 0399e021 addu gp,gp,t9
44028: 279c3fd0 addiu gp,gp,16336
4402c: df998038 ld t9,-32712\(gp\)
44030: df848020 ld a0,-32736\(gp\)
44034: df858040 ld a1,-32704\(gp\)
44038: 0320f809 jalr t9
4403c: df868030 ld a2,-32720\(gp\)
44040: df998028 ld t9,-32728\(gp\)
44044: 03200008 jr t9
44048: df848048 ld a0,-32696\(gp\)
0+4404c <f3>:
4404c: 03e00008 jr ra
44050: 00000000 nop
\.\.\.
0+44060 <__start>:
44060: 0c011002 jal 44008 <\.pic\.f1>
44064: 00000000 nop
44068: 3c020004 lui v0,0x4
4406c: 24424020 addiu v0,v0,16416
44070: 0c010c30 jal 430c0 <extf3@plt>
44074: 00000000 nop
44078: 0c010c28 jal 430a0 <extf4@plt>
4407c: 00000000 nop
44080: 0c010c2c jal 430b0 <extf5@plt>
44084: 00000000 nop
44088: 3c02000a lui v0,0xa
4408c: 24422000 addiu v0,v0,8192
44090: 3c02000a lui v0,0xa
44094: 24422018 addiu v0,v0,8216
\.\.\.
Disassembly of section \.MIPS\.stubs:
0+440a0 <\.MIPS\.stubs>:
440a0: df998010 ld t9,-32752\(gp\)
440a4: 03e0782d move t3,ra
440a8: 0320f809 jalr t9
440ac: 6418000a daddiu t8,zero,10
\.\.\.

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Primary GOT:
Canonical gp value: 00000000000a7ff0
Reserved entries:
Address Access Initial Purpose
00000000000a0000 -32752\(gp\) 0000000000000000 Lazy resolver
00000000000a0008 -32744\(gp\) 8000000000000000 Module pointer \(GNU extension\)
Global entries:
Address Access Initial Sym\.Val\. Type Ndx Name
00000000000a0010 -32736\(gp\) 0000000000000000 0000000000000000 FUNC UND extf2
00000000000a0018 -32728\(gp\) 0000000000000000 0000000000000000 FUNC UND extf3
00000000000a0020 -32720\(gp\) 00000000000a2000 00000000000a2000 OBJECT 16 extd2
00000000000a0028 -32712\(gp\) 00000000000440a0 00000000000440a0 FUNC UND extf1
00000000000a0030 -32704\(gp\) 0000000000000000 0000000000000000 OBJECT UND extd1
00000000000a0038 -32696\(gp\) 0000000000000000 0000000000000000 FUNC UND extf4
00000000000a0040 -32688\(gp\) 0000000000000000 0000000000000000 OBJECT UND extd4
PLT GOT:
Reserved entries:
Address Initial Purpose
0000000000081000 0000000000000000 PLT lazy resolver
0000000000081008 0000000000000000 Module pointer
Entries:
Address Initial Sym.Val. Type Ndx Name
0000000000081010 0000000000043080 0000000000000000 FUNC UND extf4
0000000000081018 0000000000043080 0000000000000000 FUNC UND extf5
0000000000081020 0000000000043080 0000000000000000 FUNC UND extf3

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Symbol table '\.dynsym' contains .*:
#...
.*: 0+ * 0 * FUNC * GLOBAL * DEFAULT * UND * extf5
# The index on the next line should correspond to MIPS_GOTSYM,
# and the remaining symbols should have the same order as the
# GOT layout given in the *.dd dump.
#...
*7: 0+ * 0 * FUNC * GLOBAL * DEFAULT * UND * extf2
*8: 0+ * 0 * FUNC * GLOBAL * DEFAULT * UND * extf3
*9: 0+a2000 * 24 * OBJECT * GLOBAL * DEFAULT * [0-9]+ * extd2
*10: 0+440a0 * 0 * FUNC * GLOBAL * DEFAULT * UND * extf1
*11: 0+ * 0 * OBJECT * GLOBAL * DEFAULT * UND * extd1
*12: 0+ * 0 * FUNC * GLOBAL * DEFAULT * UND * extf4
*13: 0+ * 0 * OBJECT * GLOBAL * DEFAULT * UND * extd4
#pass

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.*
Contents of section \.got\.plt:
81000 00000000 00000000 00000000 00000000 .*
81010 00000000 00043080 00000000 00043080 .*
81020 00000000 00043080 .*

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Relocation section '\.rel\.dyn' at offset .* contains .*:
* Offset * Info * Type * Sym\. Value * Sym\. Name
0+00000 * 0+ * R_MIPS_NONE *
*Type2: R_MIPS_NONE *
*Type3: R_MIPS_NONE *
0+a2018 * [^ ]*7e * R_MIPS_COPY * 0+a2018 * extd3
*Type2: R_MIPS_NONE *
*Type3: R_MIPS_NONE *
0+a2000 * [^ ]*7e * R_MIPS_COPY * 0+a2000 * extd2
*Type2: R_MIPS_NONE *
*Type3: R_MIPS_NONE *
0+a1000 * [^ ]*03 * R_MIPS_REL32 * 0+00000 * extd1
*Type2: R_MIPS_64 *
*Type3: R_MIPS_NONE *
0+a1014 * [^ ]*03 * R_MIPS_REL32 * 0+00000 * extd4
*Type2: R_MIPS_64 *
*Type3: R_MIPS_NONE *
Relocation section '\.rel\.plt' at offset .* contains .*:
* Offset * Info * Type * Sym\. Value * Sym\. Name
0+81010 * [^ ]*7f * R_MIPS_JUMP_SLOT * 0+00000 * extf4
*Type2: R_MIPS_NONE *
*Type3: R_MIPS_NONE *
0+81018 * [^ ]*7f * R_MIPS_JUMP_SLOT * 0+00000 * extf5
*Type2: R_MIPS_NONE *
*Type3: R_MIPS_NONE *
0+81020 * [^ ]*7f * R_MIPS_JUMP_SLOT * 0+00000 * extf3
*Type2: R_MIPS_NONE *
*Type3: R_MIPS_NONE *

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Elf file type is EXEC \(Executable file\)
Entry point 0x44000
There are 7 program headers, starting at offset .*
Program Headers:
* Type * Offset * VirtAddr * PhysAddr * FileSiz * MemSiz * Flg * Align
* PHDR * .*
* INTERP * .*
.*
* LOAD * [^ ]+ * 0x0+40000 * 0x0+40000 [^ ]+ * [^ ]+ * R E * 0x.*
* LOAD * [^ ]+ * 0x0+80000 * 0x0+80000 [^ ]+ * [^ ]+ * RW * 0x.*
* LOAD * [^ ]+ * 0x0+a0000 * 0x0+a0000 [^ ]+ * [^ ]+ * RW * 0x.*
* DYNAMIC * [^ ]+ * 0x0+42000 * 0x0+42000 .*
* NULL * .*
*Section to Segment mapping:
*Segment Sections\.\.\.
*0*0 *
*0*1 * \.interp *
*0*2 * \.interp \.hash \.dynsym \.dynstr \.dynamic \.rel\.dyn \.rel\.plt \.plt \.text \.MIPS\.stubs \.MIPS\.options *
*0*3 * \.rld_map \.got\.plt *
*0*4 * \.got \.data \.bss *
*0*5 * \.dynamic *
*0*6 *

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.abicalls
.global extf1
.ent extf1
extf1:
jr $31
.end extf1
.global extf2
.ent extf2
extf2:
jr $31
.end extf2
.global extf3
.ent extf3
extf3:
jr $31
.end extf3
.global extf4
.ent extf4
extf4:
jr $31
.end extf4
.global extf5
.ent extf5
extf5:
jr $31
.end extf5
.data
.global extd1
.global extd2
.global extd3
.global extd4
.type extd1,%object
.type extd2,%object
.type extd3,%object
.type extd4,%object
.size extd1,20
.size extd2,24
.size extd3,28
.size extd4,8
extd1: .space 20
extd2: .space 24
extd3: .space 28
extd4: .space 8

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.set noreorder
.abicalls
.global f1
.ent f1
f1:
.option pic0
jal f3
.option pic2
lui $2,%hi(f2)
jr $31
addiu $2,$2,%lo(f2)
.end f1
.global f2
.ent f2
f2:
lui $28,%hi(%neg(%gp_rel(f2)))
addu $28,$28,$25
addiu $28,$28,%lo(%neg(%gp_rel(f2)))
ld $25,%call16(extf1)($28)
ld $4,%got_disp(extf2)($28)
ld $5,%got_disp(extd1)($28)
jalr $25
ld $6,%got_disp(extd2)($28)
ld $25,%call16(extf3)($28)
jr $25
ld $4,%got_disp(extf4)($28)
.end f2
.global f3
.ent f3
f3:
jr $31
nop
.end f3
.data
.word extd1
.word extd3

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.abicalls
.option pic0
.set noreorder
.global __start
.ent __start
__start:
jal f1
nop
lui $2,%hi(f2)
addiu $2,$2,%lo(f2)
jal extf3
nop
jal extf4
nop
jal extf5
nop
lui $2,%hi(extd2)
addiu $2,$2,%lo(extd2)
lui $2,%hi(extd3)
addiu $2,$2,%lo(extd3)
.end __start
.data
.word extd2
.word extd4

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Dynamic section at offset .* contains .*:
* Tag * Type * Name/Value
0x00000001 \(NEEDED\) .*
0x00000004 \(HASH\) .*
0x00000005 \(STRTAB\) .*
0x00000006 \(SYMTAB\) .*
0x0000000a \(STRSZ\) .*
0x0000000b \(SYMENT\) .*
0x70000016 \(MIPS_RLD_MAP\) * 0x80000
0x00000015 \(DEBUG\) * 0x0
0x00000003 \(PLTGOT\) * 0xa0000
0x00000011 \(REL\) * 0x43000
0x00000012 \(RELSZ\) * 40 \(bytes\)
0x00000013 \(RELENT\) * 8 \(bytes\)
0x70000001 \(MIPS_RLD_VERSION\) * 1
0x70000005 \(MIPS_FLAGS\) * NOTPOT
0x70000006 \(MIPS_BASE_ADDRESS\) * 0x40000
0x7000000a \(MIPS_LOCAL_GOTNO\) * 2
0x70000011 \(MIPS_SYMTABNO\) * 14
0x70000012 \(MIPS_UNREFEXTNO\) * .*
0x70000013 \(MIPS_GOTSYM\) * 0x7
0x00000014 \(PLTREL\) * REL
0x00000017 \(JMPREL\) * 0x43028
0x00000002 \(PLTRELSZ\) * 24 \(bytes\)
0x70000032 \(MIPS_PLTGOT\) * 0x81000
0x00000000 \(NULL\) * 0x0

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# GOT layout:
#
# -32752: lazy resolution function
# -32748: reserved for module pointer
# -32744: extf2's GOT entry (undefined 0)
# -32740: extf3's GOT entry (PLT entry)
# -32736: extd2's GOT entry (copy reloc)
# -32732: extf1's GOT entry (.MIPS.stubs entry)
# -32728: extd1's GOT entry (undefined 0)
# -32724: extf4's GOT entry (PLT entry)
# -32620: extd4's GOT entry (undefined 0, reloc only)
.*
Disassembly of section \.plt:
00043040 <.*>:
.*: 3c1c0008 lui gp,0x8
.*: 8f991000 lw t9,4096\(gp\)
.*: 279c1000 addiu gp,gp,4096
.*: 031cc023 subu t8,t8,gp
.*: 03e07821 move t7,ra
.*: 0018c082 srl t8,t8,0x2
.*: 0320f809 jalr t9
.*: 2718fffe addiu t8,t8,-2
00043060 <extf4@plt>:
.*: 3c0f0008 lui t7,0x8
.*: 8df91008 lw t9,4104\(t7\)
.*: 25f81008 addiu t8,t7,4104
.*: 03200008 jr t9
00043070 <extf5@plt>:
.*: 3c0f0008 lui t7,0x8
.*: 8df9100c lw t9,4108\(t7\)
.*: 25f8100c addiu t8,t7,4108
.*: 03200008 jr t9
00043080 <extf3@plt>:
.*: 3c0f0008 lui t7,0x8
.*: 8df91010 lw t9,4112\(t7\)
.*: 25f81010 addiu t8,t7,4112
.*: 03200008 jr t9
.*: 00000000 nop
Disassembly of section \.text:
00044000 <.*>:
\.\.\.
00044008 <\.pic\.f1>:
44008: 3c190004 lui t9,0x4
4400c: 27394010 addiu t9,t9,16400
00044010 <f1>:
44010: 0c011013 jal 4404c <f3>
44014: 3c020004 lui v0,0x4
44018: 03e00008 jr ra
4401c: 24424020 addiu v0,v0,16416
00044020 <f2>:
44020: 3c1c0006 lui gp,0x6
44024: 279c3fd0 addiu gp,gp,16336
44028: 0399e021 addu gp,gp,t9
4402c: 8f998024 lw t9,-32732\(gp\)
44030: 8f848018 lw a0,-32744\(gp\)
44034: 8f858028 lw a1,-32728\(gp\)
44038: 0320f809 jalr t9
4403c: 8f868020 lw a2,-32736\(gp\)
44040: 8f99801c lw t9,-32740\(gp\)
44044: 03200008 jr t9
44048: 8f84802c lw a0,-32724\(gp\)
0004404c <f3>:
4404c: 03e00008 jr ra
44050: 00000000 nop
\.\.\.
00044060 <__start>:
44060: 0c011002 jal 44008 <\.pic\.f1>
44064: 00000000 nop
44068: 3c020004 lui v0,0x4
4406c: 24424020 addiu v0,v0,16416
44070: 0c010c20 jal 43080 <extf3@plt>
44074: 00000000 nop
44078: 0c010c18 jal 43060 <extf4@plt>
4407c: 00000000 nop
44080: 0c010c1c jal 43070 <extf5@plt>
44084: 00000000 nop
44088: 3c02000a lui v0,0xa
4408c: 24422000 addiu v0,v0,8192
44090: 3c02000a lui v0,0xa
44094: 24422018 addiu v0,v0,8216
\.\.\.
Disassembly of section \.MIPS\.stubs:
000440a0 <\.MIPS\.stubs>:
440a0: 8f998010 lw t9,-32752\(gp\)
440a4: 03e07821 move t7,ra
440a8: 0320f809 jalr t9
440ac: 2418000a li t8,10
\.\.\.

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Primary GOT:
Canonical gp value: 000a7ff0
Reserved entries:
Address Access Initial Purpose
000a0000 -32752\(gp\) 00000000 Lazy resolver
000a0004 -32748\(gp\) 80000000 Module pointer \(GNU extension\)
Global entries:
Address Access Initial Sym\.Val\. Type Ndx Name
000a0008 -32744\(gp\) 00000000 00000000 FUNC UND extf2
000a000c -32740\(gp\) 00000000 00000000 FUNC UND extf3
000a0010 -32736\(gp\) 000a2000 000a2000 OBJECT 16 extd2
000a0014 -32732\(gp\) 000440a0 000440a0 FUNC UND extf1
000a0018 -32728\(gp\) 00000000 00000000 OBJECT UND extd1
000a001c -32724\(gp\) 00000000 00000000 FUNC UND extf4
000a0020 -32720\(gp\) 00000000 00000000 OBJECT UND extd4
PLT GOT:
Reserved entries:
Address Initial Purpose
00081000 00000000 PLT lazy resolver
00081004 00000000 Module pointer
Entries:
Address Initial Sym.Val. Type Ndx Name
00081008 00043040 00000000 FUNC UND extf4
0008100c 00043040 00000000 FUNC UND extf5
00081010 00043040 00000000 FUNC UND extf3

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Symbol table '\.dynsym' contains .*:
#...
.*: 00000000 * 0 * FUNC * GLOBAL * DEFAULT * UND * extf5
# The index on the next line should correspond to MIPS_GOTSYM,
# and the remaining symbols should have the same order as the
# GOT layout given in the *.dd dump.
#...
*7: 0+ * 0 * FUNC * GLOBAL * DEFAULT * UND * extf2
*8: 0+ * 0 * FUNC * GLOBAL * DEFAULT * UND * extf3
*9: 0+a2000 * 24 * OBJECT * GLOBAL * DEFAULT * [0-9]+ * extd2
*10: 0+440a0 * 0 * FUNC * GLOBAL * DEFAULT * UND * extf1
*11: 0+ * 0 * OBJECT * GLOBAL * DEFAULT * UND * extd1
*12: 0+ * 0 * FUNC * GLOBAL * DEFAULT * UND * extf4
*13: 0+ * 0 * OBJECT * GLOBAL * DEFAULT * UND * extd4
#pass

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.*
Contents of section \.got\.plt:
81000 00000000 00000000 00043040 00043040 .*
81010 00043040 .*

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