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* mcore-dis.c: Fix formatting.
* mips-dis.c: Likewise. * pj-dis.c: Likewise. * z8k-dis.c: Likewise.
This commit is contained in:
Kazu Hirata
parent
198ce79b6b
commit
7f6621cdd7
@ -1,3 +1,10 @@
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2001-08-13 Kazu Hirata <kazu@hxi.com>
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* mcore-dis.c: Fix formatting.
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* mips-dis.c: Likewise.
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* pj-dis.c: Likewise.
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* z8k-dis.c: Likewise.
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2001-08-12 Richard Henderson <rth@redhat.com>
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* cgen-ibld.in (extract_normal): Match type of VALUE and MASK
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@ -24,8 +24,7 @@ Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
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#include "dis-asm.h"
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/* Mask for each mcore_opclass: */
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static const unsigned short imsk[] =
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{
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static const unsigned short imsk[] = {
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/* O0 */ 0xFFFF,
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/* OT */ 0xFFFC,
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/* O1 */ 0xFFF0,
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@ -66,19 +65,17 @@ static const unsigned short imsk[] =
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/* JL */ 0,
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/* RSI */ 0,
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/* DO21*/ 0,
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/* OB2 */ 0 /* OB2 won't appear in object. */
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/* OB2 */ 0 /* OB2 won't appear in object. */
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};
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static const char * grname[] =
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{
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static const char *grname[] = {
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"r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
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"r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15"
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};
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static const char X[] = "??";
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static const char * crname[] =
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{
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static const char *crname[] = {
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"psr", "vbr", "epsr", "fpsr", "epc", "fpc", "ss0", "ss1",
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"ss2", "ss3", "ss4", "gcr", "gsr", X, X, X,
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X, X, X, X, X, X, X, X,
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@ -90,7 +87,7 @@ static const unsigned isiz[] = { 2, 0, 1, 0 };
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int
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print_insn_mcore (memaddr, info)
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bfd_vma memaddr;
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struct disassemble_info * info;
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struct disassemble_info *info;
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{
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unsigned char ibytes[4];
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fprintf_ftype fprintf = info->fprintf_func;
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@ -117,7 +114,7 @@ print_insn_mcore (memaddr, info)
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abort ();
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/* Just a linear search of the table. */
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for (op = mcore_table; op->name != 0; op ++)
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for (op = mcore_table; op->name != 0; op++)
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if (op->inst == (inst & imsk[op->opclass]))
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break;
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@ -125,7 +122,7 @@ print_insn_mcore (memaddr, info)
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fprintf (stream, ".short 0x%04x", inst);
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else
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{
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const char * name = grname[inst & 0x0F];
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const char *name = grname[inst & 0x0F];
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fprintf (stream, "%s", op->name);
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@ -165,7 +162,7 @@ print_insn_mcore (memaddr, info)
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if (inst & 0x400)
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val |= 0xFFFFFC00;
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fprintf (stream, "\t0x%x", memaddr + 2 + (val<<1));
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fprintf (stream, "\t0x%x", memaddr + 2 + (val << 1));
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if (strcmp (op->name, "bsr") == 0)
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{
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@ -186,7 +183,7 @@ print_insn_mcore (memaddr, info)
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long val;
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val = (inst & 0x000F);
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fprintf (stream, "\t%s, 0x%x",
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grname[(inst >> 4) & 0xF], memaddr - (val << 1));
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grname[(inst >> 4) & 0xF], memaddr - (val << 1));
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}
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break;
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@ -257,8 +254,7 @@ print_insn_mcore (memaddr, info)
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case OPSR:
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{
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static char * fields[] =
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{
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static char *fields[] = {
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"af", "ie", "fe", "fe,ie",
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"ee", "ee,ie", "ee,fe", "ee,fe,ie"
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};
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@ -28,7 +28,7 @@ Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
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/* FIXME: These are needed to figure out if the code is mips16 or
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not. The low bit of the address is often a good indicator. No
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symbol table is available when this code runs out in an embedded
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system as when it is used for disassembler support in a monitor. */
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system as when it is used for disassembler support in a monitor. */
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#if !defined(EMBEDDED_ENV)
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#define SYMTAB_AVAILABLE 1
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@ -54,13 +54,11 @@ static void print_mips16_insn_arg
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/* FIXME: These should be shared with gdb somehow. */
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/* The mips16 register names. */
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static const char * const mips16_reg_names[] =
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{
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static const char * const mips16_reg_names[] = {
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"s0", "s1", "v0", "v1", "a0", "a1", "a2", "a3"
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};
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static const char * const mips32_reg_names[] =
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{
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static const char * const mips32_reg_names[] = {
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"zero", "at", "v0", "v1", "a0", "a1", "a2", "a3",
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"t0", "t1", "t2", "t3", "t4", "t5", "t6", "t7",
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"s0", "s1", "s2", "s3", "s4", "s5", "s6", "s7",
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@ -74,8 +72,7 @@ static const char * const mips32_reg_names[] =
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"epc", "prid"
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};
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static const char * const mips64_reg_names[] =
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{
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static const char * const mips64_reg_names[] = {
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"zero", "at", "v0", "v1", "a0", "a1", "a2", "a3",
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"a4", "a5", "a6", "a7", "t0", "t1", "t2", "t3",
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"s0", "s1", "s2", "s3", "s4", "s5", "s6", "s7",
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@ -93,7 +90,7 @@ static const char * const mips64_reg_names[] =
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table to use. */
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static const char * const *reg_names = NULL;
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/* Print insn arguments for 32/64-bit code */
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/* Print insn arguments for 32/64-bit code. */
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static void
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print_insn_arg (d, l, pc, info)
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@ -129,10 +126,10 @@ print_insn_arg (d, l, pc, info)
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case 'i':
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case 'u':
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(*info->fprintf_func) (info->stream, "0x%x",
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(l >> OP_SH_IMMEDIATE) & OP_MASK_IMMEDIATE);
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(l >> OP_SH_IMMEDIATE) & OP_MASK_IMMEDIATE);
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break;
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case 'j': /* same as i, but sign-extended */
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case 'j': /* Same as i, but sign-extended. */
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case 'o':
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delta = (l >> OP_SH_DELTA) & OP_MASK_DELTA;
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if (delta & 0x8000)
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@ -155,13 +152,13 @@ print_insn_arg (d, l, pc, info)
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case 'a':
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(*info->print_address_func)
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((((pc + 4) & ~ (bfd_vma) 0x0fffffff)
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((((pc + 4) & ~(bfd_vma) 0x0fffffff)
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| (((l >> OP_SH_TARGET) & OP_MASK_TARGET) << 2)),
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info);
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break;
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case 'p':
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/* sign extend the displacement */
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/* Sign extend the displacement. */
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delta = (l >> OP_SH_DELTA) & OP_MASK_DELTA;
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if (delta & 0x8000)
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delta |= ~0xffff;
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@ -177,25 +174,25 @@ print_insn_arg (d, l, pc, info)
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case 'U':
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{
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/* First check for both rd and rt being equal. */
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unsigned int reg = (l >> OP_SH_RD) & OP_MASK_RD;
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if (reg == ((l >> OP_SH_RT) & OP_MASK_RT))
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(*info->fprintf_func) (info->stream, "%s",
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reg_names[reg]);
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else
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{
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/* If one is zero use the other. */
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if (reg == 0)
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(*info->fprintf_func) (info->stream, "%s",
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reg_names[(l >> OP_SH_RT) & OP_MASK_RT]);
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else if (((l >> OP_SH_RT) & OP_MASK_RT) == 0)
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(*info->fprintf_func) (info->stream, "%s",
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reg_names[reg]);
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else /* Bogus, result depends on processor. */
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(*info->fprintf_func) (info->stream, "%s or %s",
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reg_names[reg],
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reg_names[(l >> OP_SH_RT) & OP_MASK_RT]);
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}
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/* First check for both rd and rt being equal. */
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unsigned int reg = (l >> OP_SH_RD) & OP_MASK_RD;
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if (reg == ((l >> OP_SH_RT) & OP_MASK_RT))
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(*info->fprintf_func) (info->stream, "%s",
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reg_names[reg]);
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else
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{
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/* If one is zero use the other. */
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if (reg == 0)
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(*info->fprintf_func) (info->stream, "%s",
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reg_names[(l >> OP_SH_RT) & OP_MASK_RT]);
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else if (((l >> OP_SH_RT) & OP_MASK_RT) == 0)
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(*info->fprintf_func) (info->stream, "%s",
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reg_names[reg]);
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else /* Bogus, result depends on processor. */
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(*info->fprintf_func) (info->stream, "%s or %s",
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reg_names[reg],
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reg_names[(l >> OP_SH_RT) & OP_MASK_RT]);
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}
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}
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break;
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@ -294,7 +291,7 @@ print_insn_arg (d, l, pc, info)
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}
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}
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/* Figure out the MIPS ISA and CPU based on the machine number. */
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/* Figure out the MIPS ISA and CPU based on the machine number. */
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static void
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mips_isa_type (mach, isa, cputype)
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@ -398,7 +395,7 @@ mips_isa_type (mach, isa, cputype)
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/* Check if the object uses NewABI conventions. */
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static int
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is_newabi(header)
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is_newabi (header)
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Elf_Internal_Ehdr *header;
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{
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if ((header->e_flags
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@ -443,7 +440,7 @@ print_insn_mips (memaddr, word, info)
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break;
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}
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}
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}
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}
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init = 1;
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}
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@ -477,9 +474,9 @@ print_insn_mips (memaddr, word, info)
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d = op->args;
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if (d != NULL && *d != '\0')
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{
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(*info->fprintf_func) (info->stream, "\t");
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(*info->fprintf_func) (info->stream, "\t");
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for (; *d != '\0'; d++)
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print_insn_arg (d, word, memaddr, info);
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print_insn_arg (d, word, memaddr, info);
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}
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return INSNLEN;
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@ -530,8 +527,8 @@ _print_insn_mips (memaddr, info, endianness)
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{
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Elf_Internal_Ehdr *header;
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header = elf_elfheader(bfd_asymbol_bfd(*(info->symbols)));
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if (is_newabi(header))
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header = elf_elfheader (bfd_asymbol_bfd (*(info->symbols)));
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if (is_newabi (header))
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reg_names = mips64_reg_names;
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}
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@ -541,7 +538,7 @@ _print_insn_mips (memaddr, info, endianness)
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unsigned long insn;
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if (endianness == BFD_ENDIAN_BIG)
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insn = (unsigned long) bfd_getb32 (buffer);
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insn = (unsigned long) bfd_getb32 (buffer);
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else
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insn = (unsigned long) bfd_getl32 (buffer);
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@ -791,7 +788,7 @@ print_mips16_insn_arg (type, op, l, use_extend, extend, memaddr, info)
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case 'X':
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(*info->fprintf_func) (info->stream, "%s",
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mips32_reg_names[((l >> MIPS16OP_SH_REGR32)
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& MIPS16OP_MASK_REGR32)]);
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& MIPS16OP_MASK_REGR32)]);
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break;
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case 'Y':
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@ -1051,7 +1048,7 @@ print_mips16_insn_arg (type, op, l, use_extend, extend, memaddr, info)
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baseaddr = memaddr - 2;
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}
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}
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val = (baseaddr & ~ ((1 << shift) - 1)) + immed;
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val = (baseaddr & ~((1 << shift) - 1)) + immed;
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(*info->print_address_func) (val, info);
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info->target = val;
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}
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@ -1,5 +1,5 @@
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/* pj-dis.c -- Disassemble picoJava instructions.
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Copyright 1999, 2000 Free Software Foundation, Inc.
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Copyright 1999, 2000, 2001 Free Software Foundation, Inc.
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Contributed by Steve Chamberlain, of Transmeta (sac@pobox.com).
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This program is free software; you can redistribute it and/or modify
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@ -36,7 +36,7 @@ get_int (memaddr, iptr, info)
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*iptr = (ival[0] << 24)
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| (ival[1] << 16)
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| (ival[2] << 8)
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| (ival[3] << 0) ;
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| (ival[3] << 0);
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return status;
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}
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@ -72,7 +72,7 @@ print_insn_pj (addr, info)
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fprintf_fn (stream, "%s", op->name);
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/* The tableswitch instruction is followed by the default
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address, low value, high value and the destinations. */
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address, low value, high value and the destinations. */
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if (strcmp (op->name, "tableswitch") == 0)
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{
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@ -111,7 +111,7 @@ print_insn_pj (addr, info)
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/* The lookupswitch instruction is followed by the default
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address, element count and pairs of values and
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addresses. */
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addresses. */
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if (strcmp (op->name, "lookupswitch") == 0)
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{
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@ -1,5 +1,5 @@
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/* Disassemble z8000 code.
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Copyright 1992, 1993, 1998, 2000
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Copyright 1992, 1993, 1998, 2000, 2001
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Free Software Foundation, Inc.
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This file is part of GNU Binutils.
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@ -269,7 +269,6 @@ z8k_lookup_instr (nibbles, info)
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tabl_index++;
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}
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return -1;
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}
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static void
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@ -334,22 +333,22 @@ unpack_instr (instr_data, is_segmented, info)
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switch (datum_value)
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{
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case ARG_DISP16:
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instr_data->displacement = instr_data->insn_start + 4 +
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(signed short) (instr_word & 0xffff);
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instr_data->displacement = instr_data->insn_start + 4
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+ (signed short) (instr_word & 0xffff);
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nibl_count += 3;
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break;
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case ARG_DISP12:
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if (instr_word & 0x800)
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if (instr_word & 0x800)
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{
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/* neg. 12 bit displacement */
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instr_data->displacement = instr_data->insn_start + 2
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- (signed short) ((instr_word & 0xfff) | 0xf000) * 2;
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}
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else
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else
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{
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instr_data->displacement = instr_data->insn_start + 2
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- (instr_word & 0x0fff) * 2;
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}
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}
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nibl_count += 2;
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break;
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default:
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@ -411,15 +410,15 @@ unpack_instr (instr_data, is_segmented, info)
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FETCH_DATA (info, nibl_count + 8);
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instr_long = (instr_data->words[nibl_count] << 16)
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| (instr_data->words[nibl_count + 4]);
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instr_data->address = ((instr_word & 0x7f00) << 8) +
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(instr_long & 0xffff);
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instr_data->address = ((instr_word & 0x7f00) << 8)
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+ (instr_long & 0xffff);
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nibl_count += 7;
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seg_length = 2;
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seg_length = 2;
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}
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else
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{
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instr_data->address = ((instr_word & 0x7f00) << 8) +
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(instr_word & 0x00ff);
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instr_data->address = ((instr_word & 0x7f00) << 8)
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+ (instr_word & 0x00ff);
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nibl_count += 3;
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}
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}
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@ -434,11 +433,13 @@ unpack_instr (instr_data, is_segmented, info)
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instr_data->ctrl_code = instr_nibl & 0x7;
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break;
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case CLASS_0DISP7:
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instr_data->displacement = instr_data->insn_start + 2 - (instr_byte & 0x7f) * 2;
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instr_data->displacement =
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instr_data->insn_start + 2 - (instr_byte & 0x7f) * 2;
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nibl_count += 1;
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break;
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case CLASS_1DISP7:
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instr_data->displacement = instr_data->insn_start + 2 - (instr_byte & 0x7f) * 2;
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instr_data->displacement =
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instr_data->insn_start + 2 - (instr_byte & 0x7f) * 2;
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nibl_count += 1;
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break;
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case CLASS_01II:
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@ -459,12 +460,13 @@ unpack_instr (instr_data, is_segmented, info)
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case CLASS_REGN0:
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instr_data->arg_reg[datum_value] = instr_nibl;
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break;
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case CLASS_DISP8:
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instr_data->displacement = instr_data->insn_start + 2 + (signed char)instr_byte * 2;
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case CLASS_DISP8:
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instr_data->displacement =
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instr_data->insn_start + 2 + (signed char) instr_byte * 2;
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nibl_count += 1;
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break;
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break;
|
||||
default:
|
||||
abort ();
|
||||
abort ();
|
||||
break;
|
||||
}
|
||||
|
||||
@ -566,14 +568,14 @@ unparse_instr (instr_data, is_segmented)
|
||||
strcat (out_str, tmp_str);
|
||||
break;
|
||||
case CLASS_PR:
|
||||
if (is_segmented)
|
||||
sprintf (tmp_str, "rr%ld", instr_data->arg_reg[datum_value]);
|
||||
else
|
||||
sprintf (tmp_str, "r%ld", instr_data->arg_reg[datum_value]);
|
||||
if (is_segmented)
|
||||
sprintf (tmp_str, "rr%ld", instr_data->arg_reg[datum_value]);
|
||||
else
|
||||
sprintf (tmp_str, "r%ld", instr_data->arg_reg[datum_value]);
|
||||
strcat (out_str, tmp_str);
|
||||
break;
|
||||
default:
|
||||
abort ();
|
||||
abort ();
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
Loading…
Reference in New Issue
Block a user