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* config/tc-xtensa.c (use_longcalls): Delete.
(xg_symbolic_immeds_fit): Check for direct calls and return TRUE if the use_longcalls flag is set. Do this before checking the segment. (xg_expand_assembly_insn): Rearrange to use new do_expand flag. Never expand direct calls at this point. (xtensa_set_frag_assembly_state): Set use_longcalls flag. (xtensa_find_unmarked_state_frags): Likewise. (md_assemble): Do not disable longcalls by setting is_specific_opcode. (xg_assemble_vliw_tokens): Switch frags when use_longcalls changes. (convert_frag_immed): Remove unnecessary check of is_specific_opcode. * config/tc-xtensa.h (xtensa_frag_type): Add use_longcalls flag.
This commit is contained in:
Bob Wilson
parent
9d2f1968d4
commit
7c834684b6
@ -1,3 +1,17 @@
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2005-03-25 Bob Wilson <bob.wilson@acm.org>
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* config/tc-xtensa.c (use_longcalls): Delete.
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(xg_symbolic_immeds_fit): Check for direct calls and return TRUE if
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the use_longcalls flag is set. Do this before checking the segment.
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(xg_expand_assembly_insn): Rearrange to use new do_expand flag. Never
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expand direct calls at this point.
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(xtensa_set_frag_assembly_state): Set use_longcalls flag.
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(xtensa_find_unmarked_state_frags): Likewise.
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(md_assemble): Do not disable longcalls by setting is_specific_opcode.
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(xg_assemble_vliw_tokens): Switch frags when use_longcalls changes.
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(convert_frag_immed): Remove unnecessary check of is_specific_opcode.
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* config/tc-xtensa.h (xtensa_frag_type): Add use_longcalls flag.
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2005-03-25 Hans-Peter Nilsson <hp@bitrange.com>
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* config/tc-mmix.c, config/tc-mmix.h: Convert to ISO C90.
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@ -1030,16 +1030,6 @@ use_transform (void)
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}
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static bfd_boolean
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use_longcalls (void)
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{
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/* After md_end, you should be checking frag by frag, rather
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than state directives. */
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assert (!past_xtensa_end);
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return directive_state[directive_longcalls] && use_transform ();
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}
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static bfd_boolean
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do_align_targets (void)
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{
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@ -3312,24 +3302,30 @@ xg_symbolic_immeds_fit (const TInsn *insn,
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break;
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case O_symbol:
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/* We only allow symbols for pc-relative stuff.
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/* We only allow symbols for PC-relative references.
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If pc_frag == 0, then we don't have frag locations yet. */
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if (pc_frag == 0)
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if (pc_frag == 0
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|| xtensa_operand_is_PCrelative (isa, insn->opcode, i) == 0)
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return FALSE;
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/* If it is PC-relative and the symbol is not in the same
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segment as the PC.... */
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if (xtensa_operand_is_PCrelative (isa, insn->opcode, i) == 0
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|| S_GET_SEGMENT (expr->X_add_symbol) != pc_seg)
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return FALSE;
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/* If it is a weak symbol, then assume it won't reach. This will
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only affect calls when longcalls are enabled, because if
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longcalls are disabled, then the call is marked as a specific
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opcode. */
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/* If it is a weak symbol, then assume it won't reach. */
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if (S_IS_WEAK (expr->X_add_symbol))
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return FALSE;
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if (is_direct_call_opcode (insn->opcode)
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&& ! pc_frag->tc_frag_data.use_longcalls)
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{
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/* If callee is undefined or in a different segment, be
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optimistic and assume it will be in range. */
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if (S_GET_SEGMENT (expr->X_add_symbol) != pc_seg)
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return TRUE;
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}
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/* Only references within a segment can be known to fit in the
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operands at assembly time. */
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if (S_GET_SEGMENT (expr->X_add_symbol) != pc_seg)
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return FALSE;
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symbolP = expr->X_add_symbol;
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sym_frag = symbol_get_frag (symbolP);
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target = S_GET_VALUE (symbolP) + expr->X_add_number;
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@ -3645,7 +3641,7 @@ xg_assembly_relax (IStack *istack,
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}
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current_insn = *insn;
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/* Walk through all of the single instruction expansions. */
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/* Walk through all of the single instruction expansions. */
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while (xg_is_single_relaxable_insn (¤t_insn))
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{
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int error_val = xg_expand_narrow (&single_target, ¤t_insn);
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@ -3943,15 +3939,16 @@ xg_simplify_insn (TInsn *old_insn, TInsn *new_insn)
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/* xg_expand_assembly_insn: (1) Simplify the instruction, i.e., l32i ->
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l32i.n. (2) Check the number of operands. (3) Place the instruction
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tokens into the stack or if we can relax it at assembly time, place
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multiple instructions/literals onto the stack. Return FALSE if no
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error. */
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tokens into the stack or relax it and place multiple
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instructions/literals onto the stack. Return FALSE if no error. */
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static bfd_boolean
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xg_expand_assembly_insn (IStack *istack, TInsn *orig_insn)
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{
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int noperands;
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TInsn new_insn;
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bfd_boolean do_expand;
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memset (&new_insn, 0, sizeof (TInsn));
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/* Narrow it if we can. xg_simplify_insn now does all the
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@ -3977,50 +3974,37 @@ xg_expand_assembly_insn (IStack *istack, TInsn *orig_insn)
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/* If there are not enough operands, we will assert above. If there
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are too many, just cut out the extras here. */
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orig_insn->ntok = noperands;
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/* Cases:
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Instructions with all constant immeds:
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Assemble them and relax the instruction if possible.
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Give error if not possible; no fixup needed.
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Instructions with symbolic immeds:
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Assemble them with a Fix up (that may cause instruction expansion).
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Also close out the fragment if the fixup may cause instruction expansion.
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There are some other special cases where we need alignment.
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1) before certain instructions with required alignment (OPCODE_ALIGN)
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2) before labels that have jumps (LABEL_ALIGN)
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3) after call instructions (RETURN_ALIGN)
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Multiple of these may be possible on the same fragment.
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If so, make sure to satisfy the required alignment.
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Then try to get the desired alignment. */
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if (tinsn_has_invalid_symbolic_operands (orig_insn))
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return TRUE;
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if (orig_insn->is_specific_opcode || !use_transform ())
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{
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istack_push (istack, orig_insn);
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return FALSE;
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}
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/* If the instruction will definitely need to be relaxed, it is better
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to expand it now for better scheduling. Decide whether to expand
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now.... */
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do_expand = (!orig_insn->is_specific_opcode && use_transform ());
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/* Calls should be expanded to longcalls only in the backend relaxation
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so that the assembly scheduler will keep the L32R/CALLX instructions
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adjacent. */
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if (is_direct_call_opcode (orig_insn->opcode))
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do_expand = FALSE;
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if (tinsn_has_symbolic_operands (orig_insn))
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{
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if (tinsn_has_complex_operands (orig_insn))
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xg_assembly_relax (istack, orig_insn, 0, 0, 0, 0, 0);
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else
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istack_push (istack, orig_insn);
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/* The values of symbolic operands are not known yet, so only expand
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now if an operand is "complex" (e.g., difference of symbols) and
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will have to be stored as a literal regardless of the value. */
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if (!tinsn_has_complex_operands (orig_insn))
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do_expand = FALSE;
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}
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else if (xg_immeds_fit (orig_insn))
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do_expand = FALSE;
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if (do_expand)
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xg_assembly_relax (istack, orig_insn, 0, 0, 0, 0, 0);
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else
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{
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if (xg_immeds_fit (orig_insn))
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istack_push (istack, orig_insn);
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else
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xg_assembly_relax (istack, orig_insn, 0, 0, 0, 0, 0);
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}
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istack_push (istack, orig_insn);
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return FALSE;
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}
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@ -4789,6 +4773,8 @@ xtensa_set_frag_assembly_state (fragS *fragP)
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"use_schedule" here. */
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if (!directive_state[directive_transform])
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fragP->tc_frag_data.is_no_transform = TRUE;
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if (directive_state[directive_longcalls])
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fragP->tc_frag_data.use_longcalls = TRUE;
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fragP->tc_frag_data.use_absolute_literals =
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directive_state[directive_absolute_literals];
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fragP->tc_frag_data.is_assembly_state_set = TRUE;
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@ -4847,6 +4833,8 @@ xtensa_find_unmarked_state_frags (void)
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last_fragP->tc_frag_data.is_no_density;
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fragP->tc_frag_data.is_no_transform =
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last_fragP->tc_frag_data.is_no_transform;
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fragP->tc_frag_data.use_longcalls =
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last_fragP->tc_frag_data.use_longcalls;
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fragP->tc_frag_data.use_absolute_literals =
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last_fragP->tc_frag_data.use_absolute_literals;
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}
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@ -5300,11 +5288,6 @@ md_assemble (char *str)
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return;
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}
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/* Special case: The call instructions should be marked "specific opcode"
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to keep them from expanding. */
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if (!use_longcalls () && is_direct_call_opcode (orig_insn.opcode))
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orig_insn.is_specific_opcode = TRUE;
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/* Parse the arguments. */
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if (parse_arguments (&orig_insn, num_args, arg_strings))
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{
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@ -6760,6 +6743,8 @@ xg_assemble_vliw_tokens (vliw_insn *vinsn)
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&& (! frag_now->tc_frag_data.is_insn
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|| (vinsn_has_specific_opcodes (vinsn) && use_transform ())
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|| !use_transform () != frag_now->tc_frag_data.is_no_transform
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|| (directive_state[directive_longcalls]
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!= frag_now->tc_frag_data.use_longcalls)
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|| (directive_state[directive_absolute_literals]
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!= frag_now->tc_frag_data.use_absolute_literals)))
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{
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@ -6877,9 +6862,9 @@ xg_assemble_vliw_tokens (vliw_insn *vinsn)
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{
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TInsn *tinsn = &vinsn->slots[slot];
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frag_now->tc_frag_data.slot_subtypes[slot] = tinsn->subtype;
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frag_now->tc_frag_data.slot_symbols[slot] = tinsn->symbol;
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frag_now->tc_frag_data.slot_sub_symbols[slot] = tinsn->sub_symbol;
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frag_now->tc_frag_data.slot_offsets[slot] = tinsn->offset;
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frag_now->tc_frag_data.slot_symbols[slot] = tinsn->symbol;
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frag_now->tc_frag_data.slot_sub_symbols[slot] = tinsn->sub_symbol;
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frag_now->tc_frag_data.slot_offsets[slot] = tinsn->offset;
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frag_now->tc_frag_data.literal_frags[slot] = tinsn->literal_frag;
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if (tinsn->literal_space != 0)
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xg_assemble_literal_space (tinsn->literal_space, slot);
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@ -9371,7 +9356,7 @@ convert_frag_immed (segT segP,
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xtensa_insnbuf_to_chars (isa, orig_vinsn.insnbuf, fr_opcode, 0);
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fragP->fr_var = 0;
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}
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else if (!orig_tinsn.is_specific_opcode)
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else
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{
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/* Here is the fun stuff: Get the immediate field from this
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instruction. If it fits, we're done. If not, find the next
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@ -195,6 +195,7 @@ struct xtensa_frag_type
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unsigned int is_assembly_state_set : 1;
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unsigned int is_no_density : 1;
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unsigned int is_no_transform : 1;
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unsigned int use_longcalls : 1;
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unsigned int use_absolute_literals : 1;
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/* Inhibits relaxation of machine-dependent alignment frags the
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