mirror of
https://sourceware.org/git/binutils-gdb.git
synced 2024-12-11 19:33:33 +08:00
gas/
* config/tc-mips.c (macro): Fix unsupported opcode message capitalization. (mips_ip, mips16_ip): Likewise. gas/testsuite/ * gas/mips/mips-double-float-flag.l: Adjust according to unsupported opcode message capitalization fix. * gas/mips/mips-hard-float-flag.l: Likewise. * gas/mips/mips-macro-ill-nofp.l: Likewise. * gas/mips/mips-macro-ill-sfp.l: Likewise. * gas/mips/mips1-fp.l: Likewise. * gas/mips/mips16e-64.l: Likewise. * gas/mips/mips32-sf32.l: Likewise. * gas/mips/mips32r2-fp32.l: Likewise. * gas/mips/mips4-branch-likely.l: Likewise. * gas/mips/mips4-fp.l: Likewise. * gas/mips/octeon-ill.l: Likewise.
This commit is contained in:
parent
9ddc84cc26
commit
7bd942df4a
@ -1,3 +1,9 @@
|
||||
2011-11-16 Maciej W. Rozycki <macro@codesourcery.com>
|
||||
|
||||
* config/tc-mips.c (macro): Fix unsupported opcode message
|
||||
capitalization.
|
||||
(mips_ip, mips16_ip): Likewise.
|
||||
|
||||
2011-11-16 Maciej W. Rozycki <macro@codesourcery.com>
|
||||
|
||||
* config/tc-mips.c (ISA_SUPPORTS_MCU_ASE): Also set if microMIPS
|
||||
|
@ -9151,7 +9151,7 @@ macro (struct mips_cl_insn *ip)
|
||||
if (NO_ISA_COP (mips_opts.arch)
|
||||
&& (ip->insn_mo->pinfo2 & INSN2_M_FP_S) == 0)
|
||||
{
|
||||
as_bad (_("opcode not supported on this processor: %s"),
|
||||
as_bad (_("Opcode not supported on this processor: %s"),
|
||||
mips_cpu_info_from_arch (mips_opts.arch)->name);
|
||||
break;
|
||||
}
|
||||
@ -10700,7 +10700,7 @@ mips_ip (char *str, struct mips_cl_insn *ip)
|
||||
return;
|
||||
|
||||
if (!ok)
|
||||
sprintf (buf, _("opcode not supported on this processor: %s (%s)"),
|
||||
sprintf (buf, _("Opcode not supported on this processor: %s (%s)"),
|
||||
mips_cpu_info_from_arch (mips_opts.arch)->name,
|
||||
mips_cpu_info_from_isa (mips_opts.isa)->name);
|
||||
else
|
||||
@ -13229,7 +13229,7 @@ mips16_ip (char *str, struct mips_cl_insn *ip)
|
||||
{
|
||||
static char buf[100];
|
||||
sprintf (buf,
|
||||
_("opcode not supported on this processor: %s (%s)"),
|
||||
_("Opcode not supported on this processor: %s (%s)"),
|
||||
mips_cpu_info_from_arch (mips_opts.arch)->name,
|
||||
mips_cpu_info_from_isa (mips_opts.isa)->name);
|
||||
insn_error = buf;
|
||||
|
@ -1,3 +1,18 @@
|
||||
2011-11-16 Maciej W. Rozycki <macro@codesourcery.com>
|
||||
|
||||
* gas/mips/mips-double-float-flag.l: Adjust according to
|
||||
unsupported opcode message capitalization fix.
|
||||
* gas/mips/mips-hard-float-flag.l: Likewise.
|
||||
* gas/mips/mips-macro-ill-nofp.l: Likewise.
|
||||
* gas/mips/mips-macro-ill-sfp.l: Likewise.
|
||||
* gas/mips/mips1-fp.l: Likewise.
|
||||
* gas/mips/mips16e-64.l: Likewise.
|
||||
* gas/mips/mips32-sf32.l: Likewise.
|
||||
* gas/mips/mips32r2-fp32.l: Likewise.
|
||||
* gas/mips/mips4-branch-likely.l: Likewise.
|
||||
* gas/mips/mips4-fp.l: Likewise.
|
||||
* gas/mips/octeon-ill.l: Likewise.
|
||||
|
||||
2011-11-14 Maciej W. Rozycki <macro@codesourcery.com>
|
||||
|
||||
* gas/mips/relax-swap3.d: New test.
|
||||
|
@ -1,3 +1,3 @@
|
||||
.*: Assembler messages:
|
||||
.*:8: Error: opcode not supported on this processor: .* \(.*\) `add.d \$f2,\$f2,\$f2'
|
||||
.*:17: Error: opcode not supported on this processor: .* \(.*\) `add.d \$f2,\$f2,\$f2'
|
||||
.*:8: Error: Opcode not supported on this processor: .* \(.*\) `add.d \$f2,\$f2,\$f2'
|
||||
.*:17: Error: Opcode not supported on this processor: .* \(.*\) `add.d \$f2,\$f2,\$f2'
|
||||
|
@ -1,5 +1,5 @@
|
||||
.*: Assembler messages:
|
||||
.*:7: Error: opcode not supported on this processor: .* \(.*\) `add.s \$f2,\$f2,\$f2'
|
||||
.*:8: Error: opcode not supported on this processor: .* \(.*\) `add.d \$f2,\$f2,\$f2'
|
||||
.*:16: Error: opcode not supported on this processor: .* \(.*\) `add.s \$f2,\$f2,\$f2'
|
||||
.*:17: Error: opcode not supported on this processor: .* \(.*\) `add.d \$f2,\$f2,\$f2'
|
||||
.*:7: Error: Opcode not supported on this processor: .* \(.*\) `add.s \$f2,\$f2,\$f2'
|
||||
.*:8: Error: Opcode not supported on this processor: .* \(.*\) `add.d \$f2,\$f2,\$f2'
|
||||
.*:16: Error: Opcode not supported on this processor: .* \(.*\) `add.s \$f2,\$f2,\$f2'
|
||||
.*:17: Error: Opcode not supported on this processor: .* \(.*\) `add.d \$f2,\$f2,\$f2'
|
||||
|
@ -1,19 +1,19 @@
|
||||
.*: Assembler messages:
|
||||
.*:5: Error: opcode not supported on this processor: .* \(.*\) `ldc1 \$f2,d'
|
||||
.*:6: Error: opcode not supported on this processor: .* \(.*\) `ldc1 \$22,d'
|
||||
.*:7: Error: opcode not supported on this processor: .* \(.*\) `l.d \$f2,d'
|
||||
.*:8: Error: opcode not supported on this processor: .* \(.*\) `li.d \$f2,1.2'
|
||||
.*:9: Error: opcode not supported on this processor: .* \(.*\) `li.d \$22,1.2'
|
||||
.*:11: Error: opcode not supported on this processor: .* \(.*\) `sdc1 \$f2,d'
|
||||
.*:12: Error: opcode not supported on this processor: .* \(.*\) `sdc1 \$22,d'
|
||||
.*:13: Error: opcode not supported on this processor: .* \(.*\) `s.d \$f2,d'
|
||||
.*:15: Error: opcode not supported on this processor: .* \(.*\) `trunc.w.d \$f4,\$f6,\$4'
|
||||
.*:18: Error: opcode not supported on this processor: .* \(.*\) `lwc1 \$f2,d'
|
||||
.*:19: Error: opcode not supported on this processor: .* \(.*\) `lwc1 \$22,d'
|
||||
.*:20: Error: opcode not supported on this processor: .* \(.*\) `l.s \$f2,d'
|
||||
.*:21: Error: opcode not supported on this processor: .* \(.*\) `li.s \$f2,1.2'
|
||||
.*:22: Error: opcode not supported on this processor: .* \(.*\) `li.s \$22,1.2'
|
||||
.*:24: Error: opcode not supported on this processor: .* \(.*\) `sdc1 \$f2,d'
|
||||
.*:25: Error: opcode not supported on this processor: .* \(.*\) `sdc1 \$22,d'
|
||||
.*:26: Error: opcode not supported on this processor: .* \(.*\) `s.d \$f2,d'
|
||||
.*:28: Error: opcode not supported on this processor: .* \(.*\) `trunc.w.s \$f4,\$f6,\$4'
|
||||
.*:5: Error: Opcode not supported on this processor: .* \(.*\) `ldc1 \$f2,d'
|
||||
.*:6: Error: Opcode not supported on this processor: .* \(.*\) `ldc1 \$22,d'
|
||||
.*:7: Error: Opcode not supported on this processor: .* \(.*\) `l.d \$f2,d'
|
||||
.*:8: Error: Opcode not supported on this processor: .* \(.*\) `li.d \$f2,1.2'
|
||||
.*:9: Error: Opcode not supported on this processor: .* \(.*\) `li.d \$22,1.2'
|
||||
.*:11: Error: Opcode not supported on this processor: .* \(.*\) `sdc1 \$f2,d'
|
||||
.*:12: Error: Opcode not supported on this processor: .* \(.*\) `sdc1 \$22,d'
|
||||
.*:13: Error: Opcode not supported on this processor: .* \(.*\) `s.d \$f2,d'
|
||||
.*:15: Error: Opcode not supported on this processor: .* \(.*\) `trunc.w.d \$f4,\$f6,\$4'
|
||||
.*:18: Error: Opcode not supported on this processor: .* \(.*\) `lwc1 \$f2,d'
|
||||
.*:19: Error: Opcode not supported on this processor: .* \(.*\) `lwc1 \$22,d'
|
||||
.*:20: Error: Opcode not supported on this processor: .* \(.*\) `l.s \$f2,d'
|
||||
.*:21: Error: Opcode not supported on this processor: .* \(.*\) `li.s \$f2,1.2'
|
||||
.*:22: Error: Opcode not supported on this processor: .* \(.*\) `li.s \$22,1.2'
|
||||
.*:24: Error: Opcode not supported on this processor: .* \(.*\) `sdc1 \$f2,d'
|
||||
.*:25: Error: Opcode not supported on this processor: .* \(.*\) `sdc1 \$22,d'
|
||||
.*:26: Error: Opcode not supported on this processor: .* \(.*\) `s.d \$f2,d'
|
||||
.*:28: Error: Opcode not supported on this processor: .* \(.*\) `trunc.w.s \$f4,\$f6,\$4'
|
||||
|
@ -1,10 +1,10 @@
|
||||
.*: Assembler messages:
|
||||
.*:5: Error: opcode not supported on this processor: .* \(.*\) `ldc1 \$f2,d'
|
||||
.*:6: Error: opcode not supported on this processor: .* \(.*\) `ldc1 \$22,d'
|
||||
.*:7: Error: opcode not supported on this processor: .* \(.*\) `l.d \$f2,d'
|
||||
.*:8: Error: opcode not supported on this processor: .* \(.*\) `li.d \$f2,1.2'
|
||||
.*:9: Error: opcode not supported on this processor: .* \(.*\) `li.d \$22,1.2'
|
||||
.*:11: Error: opcode not supported on this processor: .* \(.*\) `sdc1 \$f2,d'
|
||||
.*:12: Error: opcode not supported on this processor: .* \(.*\) `sdc1 \$22,d'
|
||||
.*:13: Error: opcode not supported on this processor: .* \(.*\) `s.d \$f2,d'
|
||||
.*:15: Error: opcode not supported on this processor: .* \(.*\) `trunc.w.d \$f4,\$f6,\$4'
|
||||
.*:5: Error: Opcode not supported on this processor: .* \(.*\) `ldc1 \$f2,d'
|
||||
.*:6: Error: Opcode not supported on this processor: .* \(.*\) `ldc1 \$22,d'
|
||||
.*:7: Error: Opcode not supported on this processor: .* \(.*\) `l.d \$f2,d'
|
||||
.*:8: Error: Opcode not supported on this processor: .* \(.*\) `li.d \$f2,1.2'
|
||||
.*:9: Error: Opcode not supported on this processor: .* \(.*\) `li.d \$22,1.2'
|
||||
.*:11: Error: Opcode not supported on this processor: .* \(.*\) `sdc1 \$f2,d'
|
||||
.*:12: Error: Opcode not supported on this processor: .* \(.*\) `sdc1 \$22,d'
|
||||
.*:13: Error: Opcode not supported on this processor: .* \(.*\) `s.d \$f2,d'
|
||||
.*:15: Error: Opcode not supported on this processor: .* \(.*\) `trunc.w.d \$f4,\$f6,\$4'
|
||||
|
@ -1,3 +1,3 @@
|
||||
.*: Assembler messages:
|
||||
.*:6: Error: opcode not supported on this processor: .* \(.*\) `add.s \$f0,\$f2,\$f4'
|
||||
.*:7: Error: opcode not supported on this processor: .* \(.*\) `cfc1 \$2,\$0'
|
||||
.*:6: Error: Opcode not supported on this processor: .* \(.*\) `add.s \$f0,\$f2,\$f4'
|
||||
.*:7: Error: Opcode not supported on this processor: .* \(.*\) `cfc1 \$2,\$0'
|
||||
|
@ -1,3 +1,3 @@
|
||||
.*: Assembler messages:
|
||||
.*: Error: opcode not supported on this processor: .* (.*) `sew'
|
||||
.*: Error: opcode not supported on this processor: .* (.*) `zew'
|
||||
.*: Error: Opcode not supported on this processor: .* (.*) `sew'
|
||||
.*: Error: Opcode not supported on this processor: .* (.*) `zew'
|
||||
|
@ -1,8 +1,8 @@
|
||||
.*: Assembler messages:
|
||||
.*:5: Error: opcode not supported on this processor: .* \(.*\) `li.s \$f1,1.0'
|
||||
.*:6: Error: opcode not supported on this processor: .* \(.*\) `li.s \$f3,1.9'
|
||||
.*:7: Error: opcode not supported on this processor: .* \(.*\) `add.s \$f5,\$f1,\$f3'
|
||||
.*:8: Error: opcode not supported on this processor: .* \(.*\) `cvt.d.s \$f8,\$f7'
|
||||
.*:9: Error: opcode not supported on this processor: .* \(.*\) `cvt.d.w \$f8,\$f7'
|
||||
.*:10: Error: opcode not supported on this processor: .* \(.*\) `cvt.s.d \$f7,\$f8'
|
||||
.*:11: Error: opcode not supported on this processor: .* \(.*\) `trunc.w.d \$f7,\$f8'
|
||||
.*:5: Error: Opcode not supported on this processor: .* \(.*\) `li.s \$f1,1.0'
|
||||
.*:6: Error: Opcode not supported on this processor: .* \(.*\) `li.s \$f3,1.9'
|
||||
.*:7: Error: Opcode not supported on this processor: .* \(.*\) `add.s \$f5,\$f1,\$f3'
|
||||
.*:8: Error: Opcode not supported on this processor: .* \(.*\) `cvt.d.s \$f8,\$f7'
|
||||
.*:9: Error: Opcode not supported on this processor: .* \(.*\) `cvt.d.w \$f8,\$f7'
|
||||
.*:10: Error: Opcode not supported on this processor: .* \(.*\) `cvt.s.d \$f7,\$f8'
|
||||
.*:11: Error: Opcode not supported on this processor: .* \(.*\) `trunc.w.d \$f7,\$f8'
|
||||
|
@ -1,3 +1,3 @@
|
||||
.*: Assembler messages:
|
||||
.*:12: Error: opcode not supported on this processor: .* \(.*\) `mfhc1 \$17,\$f0'
|
||||
.*:13: Error: opcode not supported on this processor: .* \(.*\) `mthc1 \$17,\$f0'
|
||||
.*:12: Error: Opcode not supported on this processor: .* \(.*\) `mfhc1 \$17,\$f0'
|
||||
.*:13: Error: Opcode not supported on this processor: .* \(.*\) `mthc1 \$17,\$f0'
|
||||
|
@ -1,3 +1,3 @@
|
||||
.*: Assembler messages:
|
||||
.*:5: Error: opcode not supported on this processor: .* \(.*\) `bc1fl \$fcc1,text_label'
|
||||
.*:6: Error: opcode not supported on this processor: .* \(.*\) `bc1tl \$fcc2,text_label'
|
||||
.*:5: Error: Opcode not supported on this processor: .* \(.*\) `bc1fl \$fcc1,text_label'
|
||||
.*:6: Error: Opcode not supported on this processor: .* \(.*\) `bc1tl \$fcc2,text_label'
|
||||
|
@ -1,33 +1,33 @@
|
||||
.*: Assembler messages:
|
||||
.*:4: Error: opcode not supported on this processor: .* \(.*\) `bc1f text_label'
|
||||
.*:5: Error: opcode not supported on this processor: .* \(.*\) `bc1f \$fcc1,text_label'
|
||||
.*:6: Error: opcode not supported on this processor: .* \(.*\) `bc1t \$fcc1,text_label'
|
||||
.*:7: Error: opcode not supported on this processor: .* \(.*\) `c.f.d \$f4,\$f6'
|
||||
.*:8: Error: opcode not supported on this processor: .* \(.*\) `c.f.d \$fcc1,\$f4,\$f6'
|
||||
.*:9: Error: opcode not supported on this processor: .* \(.*\) `ldxc1 \$f2,\$4\(\$5\)'
|
||||
.*:10: Error: opcode not supported on this processor: .* \(.*\) `lwxc1 \$f2,\$4\(\$5\)'
|
||||
.*:11: Error: opcode not supported on this processor: .* \(.*\) `madd.d \$f0,\$f2,\$f4,\$f6'
|
||||
.*:13: Error: opcode not supported on this processor: .* \(.*\) `madd.s \$f10,\$f8,\$f2,\$f0'
|
||||
.*:14: Error: opcode not supported on this processor: .* \(.*\) `movf \$4,\$5,\$fcc4'
|
||||
.*:15: Error: opcode not supported on this processor: .* \(.*\) `movf.d \$f4,\$f6,\$fcc0'
|
||||
.*:16: Error: opcode not supported on this processor: .* \(.*\) `movf.s \$f4,\$f6,\$fcc0'
|
||||
.*:17: Error: opcode not supported on this processor: .* \(.*\) `movn.d \$f4,\$f6,\$6'
|
||||
.*:18: Error: opcode not supported on this processor: .* \(.*\) `movn.s \$f4,\$f6,\$6'
|
||||
.*:19: Error: opcode not supported on this processor: .* \(.*\) `movt \$4,\$5,\$fcc4'
|
||||
.*:20: Error: opcode not supported on this processor: .* \(.*\) `movt.d \$f4,\$f6,\$fcc0'
|
||||
.*:21: Error: opcode not supported on this processor: .* \(.*\) `movt.s \$f4,\$f6,\$fcc0'
|
||||
.*:22: Error: opcode not supported on this processor: .* \(.*\) `movz.d \$f4,\$f6,\$6'
|
||||
.*:23: Error: opcode not supported on this processor: .* \(.*\) `movz.s \$f4,\$f6,\$6'
|
||||
.*:24: Error: opcode not supported on this processor: .* \(.*\) `msub.d \$f0,\$f2,\$f4,\$f6'
|
||||
.*:25: Error: opcode not supported on this processor: .* \(.*\) `msub.s \$f0,\$f2,\$f4,\$f6'
|
||||
.*:26: Error: opcode not supported on this processor: .* \(.*\) `nmadd.d \$f0,\$f2,\$f4,\$f6'
|
||||
.*:27: Error: opcode not supported on this processor: .* \(.*\) `nmadd.s \$f0,\$f2,\$f4,\$f6'
|
||||
.*:28: Error: opcode not supported on this processor: .* \(.*\) `nmsub.d \$f0,\$f2,\$f4,\$f6'
|
||||
.*:29: Error: opcode not supported on this processor: .* \(.*\) `nmsub.s \$f0,\$f2,\$f4,\$f6'
|
||||
.*:31: Error: opcode not supported on this processor: .* \(.*\) `prefx 4,\$4\(\$5\)'
|
||||
.*:32: Error: opcode not supported on this processor: .* \(.*\) `recip.d \$f4,\$f6'
|
||||
.*:33: Error: opcode not supported on this processor: .* \(.*\) `recip.s \$f4,\$f6'
|
||||
.*:34: Error: opcode not supported on this processor: .* \(.*\) `rsqrt.d \$f4,\$f6'
|
||||
.*:35: Error: opcode not supported on this processor: .* \(.*\) `rsqrt.s \$f4,\$f6'
|
||||
.*:36: Error: opcode not supported on this processor: .* \(.*\) `sdxc1 \$f4,\$4\(\$5\)'
|
||||
.*:37: Error: opcode not supported on this processor: .* \(.*\) `swxc1 \$f4,\$4\(\$5\)'
|
||||
.*:4: Error: Opcode not supported on this processor: .* \(.*\) `bc1f text_label'
|
||||
.*:5: Error: Opcode not supported on this processor: .* \(.*\) `bc1f \$fcc1,text_label'
|
||||
.*:6: Error: Opcode not supported on this processor: .* \(.*\) `bc1t \$fcc1,text_label'
|
||||
.*:7: Error: Opcode not supported on this processor: .* \(.*\) `c.f.d \$f4,\$f6'
|
||||
.*:8: Error: Opcode not supported on this processor: .* \(.*\) `c.f.d \$fcc1,\$f4,\$f6'
|
||||
.*:9: Error: Opcode not supported on this processor: .* \(.*\) `ldxc1 \$f2,\$4\(\$5\)'
|
||||
.*:10: Error: Opcode not supported on this processor: .* \(.*\) `lwxc1 \$f2,\$4\(\$5\)'
|
||||
.*:11: Error: Opcode not supported on this processor: .* \(.*\) `madd.d \$f0,\$f2,\$f4,\$f6'
|
||||
.*:13: Error: Opcode not supported on this processor: .* \(.*\) `madd.s \$f10,\$f8,\$f2,\$f0'
|
||||
.*:14: Error: Opcode not supported on this processor: .* \(.*\) `movf \$4,\$5,\$fcc4'
|
||||
.*:15: Error: Opcode not supported on this processor: .* \(.*\) `movf.d \$f4,\$f6,\$fcc0'
|
||||
.*:16: Error: Opcode not supported on this processor: .* \(.*\) `movf.s \$f4,\$f6,\$fcc0'
|
||||
.*:17: Error: Opcode not supported on this processor: .* \(.*\) `movn.d \$f4,\$f6,\$6'
|
||||
.*:18: Error: Opcode not supported on this processor: .* \(.*\) `movn.s \$f4,\$f6,\$6'
|
||||
.*:19: Error: Opcode not supported on this processor: .* \(.*\) `movt \$4,\$5,\$fcc4'
|
||||
.*:20: Error: Opcode not supported on this processor: .* \(.*\) `movt.d \$f4,\$f6,\$fcc0'
|
||||
.*:21: Error: Opcode not supported on this processor: .* \(.*\) `movt.s \$f4,\$f6,\$fcc0'
|
||||
.*:22: Error: Opcode not supported on this processor: .* \(.*\) `movz.d \$f4,\$f6,\$6'
|
||||
.*:23: Error: Opcode not supported on this processor: .* \(.*\) `movz.s \$f4,\$f6,\$6'
|
||||
.*:24: Error: Opcode not supported on this processor: .* \(.*\) `msub.d \$f0,\$f2,\$f4,\$f6'
|
||||
.*:25: Error: Opcode not supported on this processor: .* \(.*\) `msub.s \$f0,\$f2,\$f4,\$f6'
|
||||
.*:26: Error: Opcode not supported on this processor: .* \(.*\) `nmadd.d \$f0,\$f2,\$f4,\$f6'
|
||||
.*:27: Error: Opcode not supported on this processor: .* \(.*\) `nmadd.s \$f0,\$f2,\$f4,\$f6'
|
||||
.*:28: Error: Opcode not supported on this processor: .* \(.*\) `nmsub.d \$f0,\$f2,\$f4,\$f6'
|
||||
.*:29: Error: Opcode not supported on this processor: .* \(.*\) `nmsub.s \$f0,\$f2,\$f4,\$f6'
|
||||
.*:31: Error: Opcode not supported on this processor: .* \(.*\) `prefx 4,\$4\(\$5\)'
|
||||
.*:32: Error: Opcode not supported on this processor: .* \(.*\) `recip.d \$f4,\$f6'
|
||||
.*:33: Error: Opcode not supported on this processor: .* \(.*\) `recip.s \$f4,\$f6'
|
||||
.*:34: Error: Opcode not supported on this processor: .* \(.*\) `rsqrt.d \$f4,\$f6'
|
||||
.*:35: Error: Opcode not supported on this processor: .* \(.*\) `rsqrt.s \$f4,\$f6'
|
||||
.*:36: Error: Opcode not supported on this processor: .* \(.*\) `sdxc1 \$f4,\$4\(\$5\)'
|
||||
.*:37: Error: Opcode not supported on this processor: .* \(.*\) `swxc1 \$f4,\$4\(\$5\)'
|
||||
|
@ -8,22 +8,22 @@
|
||||
.*:18: Error: Improper size \(25\)
|
||||
.*:20: Error: Improper position \(64\)
|
||||
.*:21: Error: Improper size \(14\)
|
||||
.*:23: Error: opcode not supported on this processor.*
|
||||
.*:24: Error: opcode not supported on this processor.*
|
||||
.*:25: Error: opcode not supported on this processor.*
|
||||
.*:26: Error: opcode not supported on this processor.*
|
||||
.*:27: Error: opcode not supported on this processor.*
|
||||
.*:28: Error: opcode not supported on this processor.*
|
||||
.*:29: Error: opcode not supported on this processor.*
|
||||
.*:23: Error: Opcode not supported on this processor.*
|
||||
.*:24: Error: Opcode not supported on this processor.*
|
||||
.*:25: Error: Opcode not supported on this processor.*
|
||||
.*:26: Error: Opcode not supported on this processor.*
|
||||
.*:27: Error: Opcode not supported on this processor.*
|
||||
.*:28: Error: Opcode not supported on this processor.*
|
||||
.*:29: Error: Opcode not supported on this processor.*
|
||||
.*:30: Error: Opcode not supported on this processor.*
|
||||
.*:31: Error: Opcode not supported on this processor.*
|
||||
.*:32: Error: opcode not supported on this processor.*
|
||||
.*:33: Error: opcode not supported on this processor.*
|
||||
.*:34: Error: opcode not supported on this processor.*
|
||||
.*:35: Error: opcode not supported on this processor.*
|
||||
.*:32: Error: Opcode not supported on this processor.*
|
||||
.*:33: Error: Opcode not supported on this processor.*
|
||||
.*:34: Error: Opcode not supported on this processor.*
|
||||
.*:35: Error: Opcode not supported on this processor.*
|
||||
.*:36: Error: Opcode not supported on this processor.*
|
||||
.*:37: Error: Opcode not supported on this processor.*
|
||||
.*:39: Error: opcode not supported on this processor.*
|
||||
.*:39: Error: Opcode not supported on this processor.*
|
||||
.*:40: Error: Opcode not supported on this processor.*
|
||||
.*:41: Error: Opcode not supported on this processor.*
|
||||
.*:42: Error: Opcode not supported on this processor.*
|
||||
|
Loading…
Reference in New Issue
Block a user