mirror of
https://sourceware.org/git/binutils-gdb.git
synced 2024-11-25 02:53:48 +08:00
aarch64: Add the SME2 UZP and ZIP instructions
This patch adds UZP and ZIP, which combine UZP{1,2} and ZIP{1,2}
into single instructions.
This commit is contained in:
Richard Sandiford
parent
fa64dc802c
commit
7bd1d20e17
3
gas/testsuite/gas/aarch64/sme2-30-invalid.d
Normal file
3
gas/testsuite/gas/aarch64/sme2-30-invalid.d
Normal file
@ -0,0 +1,3 @@
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#as: -march=armv8-a
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#source: sme2-30-invalid.s
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#error_output: sme2-30-invalid.l
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29
gas/testsuite/gas/aarch64/sme2-30-invalid.l
Normal file
29
gas/testsuite/gas/aarch64/sme2-30-invalid.l
Normal file
@ -0,0 +1,29 @@
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[^ :]+: Assembler messages:
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[^ :]+:[0-9]+: Error: expected '{' at operand 1 -- `uzp 0,z0\.b,z0\.b'
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[^ :]+:[0-9]+: Error: expected a register or register list at operand 2 -- `uzp {z0\.b-z1\.b},0,z0\.b'
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[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 3 -- `uzp {z0\.b-z1\.b},z0\.b,0'
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[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `uzp {z1\.b-z2\.b},z0\.b,z0\.b'
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[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 1 -- `uzp {z0\.b-z2\.b},z0\.b,z0\.b'
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[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 1 -- `uzp {z0\.b-z3\.b},z0\.b,z0\.b'
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[^ :]+:[0-9]+: Error: unexpected characters following instruction at operand 2 -- `uzp {z0\.b-z1\.b},{z0\.b-z1\.b},{z0\.b,z1\.b}'
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[^ :]+:[0-9]+: Error: operand mismatch -- `uzp {z0\.h-z1\.h},z0\.b,z0\.b'
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[^ :]+:[0-9]+: Info: did you mean this\?
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[^ :]+:[0-9]+: Info: uzp {z0\.b-z1\.b}, z0\.b, z0\.b
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[^ :]+:[0-9]+: Info: other valid variant\(s\):
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[^ :]+:[0-9]+: Info: uzp {z0\.h-z1\.h}, z0\.h, z0\.h
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[^ :]+:[0-9]+: Info: uzp {z0\.s-z1\.s}, z0\.s, z0\.s
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[^ :]+:[0-9]+: Info: uzp {z0\.d-z1\.d}, z0\.d, z0\.d
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[^ :]+:[0-9]+: Error: operand mismatch -- `uzp {z0\.q-z3\.q},z0\.b,z0\.b'
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[^ :]+:[0-9]+: Info: did you mean this\?
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[^ :]+:[0-9]+: Info: uzp {z0\.b-z3\.b}, z0\.b, z0\.b
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[^ :]+:[0-9]+: Info: other valid variant\(s\):
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[^ :]+:[0-9]+: Info: uzp {z0\.h-z3\.h}, z0\.h, z0\.h
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[^ :]+:[0-9]+: Info: uzp {z0\.s-z3\.s}, z0\.s, z0\.s
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[^ :]+:[0-9]+: Info: uzp {z0\.d-z3\.d}, z0\.d, z0\.d
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[^ :]+:[0-9]+: Error: unexpected characters following instruction at operand 2 -- `uzp {z0\.b-z3\.b},{z0\.b-z1\.b},{z2\.b-z3\.b}'
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[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `uzp {z1\.b-z4\.b},{z0\.b-z3\.b}'
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[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `uzp {z2\.b-z5\.b},{z0\.b-z3\.b}'
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[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `uzp {z3\.b-z6\.b},{z0\.b-z3\.b}'
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[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `uzp {z0\.b-z3\.b},{z1\.b-z4\.b}'
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[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `uzp {z0\.b-z3\.b},{z2\.b-z5\.b}'
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[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `uzp {z0\.b-z3\.b},{z3\.b-z6\.b}'
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18
gas/testsuite/gas/aarch64/sme2-30-invalid.s
Normal file
18
gas/testsuite/gas/aarch64/sme2-30-invalid.s
Normal file
@ -0,0 +1,18 @@
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uzp 0, z0.b, z0.b
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uzp { z0.b - z1.b }, 0, z0.b
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uzp { z0.b - z1.b }, z0.b, 0
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uzp { z1.b - z2.b }, z0.b, z0.b
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uzp { z0.b - z2.b }, z0.b, z0.b
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uzp { z0.b - z3.b }, z0.b, z0.b
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uzp { z0.b - z1.b }, { z0.b - z1.b }, { z0.b, z1.b }
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uzp { z0.h - z1.h }, z0.b, z0.b
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uzp { z0.q - z3.q }, z0.b, z0.b
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uzp { z0.b - z3.b }, { z0.b - z1.b }, { z2.b - z3.b }
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uzp { z1.b - z4.b }, { z0.b - z3.b }
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uzp { z2.b - z5.b }, { z0.b - z3.b }
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uzp { z3.b - z6.b }, { z0.b - z3.b }
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uzp { z0.b - z3.b }, { z1.b - z4.b }
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uzp { z0.b - z3.b }, { z2.b - z5.b }
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uzp { z0.b - z3.b }, { z3.b - z6.b }
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3
gas/testsuite/gas/aarch64/sme2-30-noarch.d
Normal file
3
gas/testsuite/gas/aarch64/sme2-30-noarch.d
Normal file
@ -0,0 +1,3 @@
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#as: -march=armv8-a+sme
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#source: sme2-30.s
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#error_output: sme2-30-noarch.l
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91
gas/testsuite/gas/aarch64/sme2-30-noarch.l
Normal file
91
gas/testsuite/gas/aarch64/sme2-30-noarch.l
Normal file
@ -0,0 +1,91 @@
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[^ :]+: Assembler messages:
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[^ :]+:[0-9]+: Error: selected processor does not support `uzp {z0\.b-z1\.b},z0\.b,z0\.b'
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[^ :]+:[0-9]+: Error: selected processor does not support `uzp {z30\.b-z31\.b},z0\.b,z0\.b'
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[^ :]+:[0-9]+: Error: selected processor does not support `uzp {z0\.b-z1\.b},z31\.b,z0\.b'
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[^ :]+:[0-9]+: Error: selected processor does not support `uzp {z0\.b-z1\.b},z0\.b,z31\.b'
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[^ :]+:[0-9]+: Error: selected processor does not support `uzp {z18\.b-z19\.b},z11\.b,z25\.b'
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[^ :]+:[0-9]+: Error: selected processor does not support `uzp {z0\.h-z1\.h},z0\.h,z0\.h'
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[^ :]+:[0-9]+: Error: selected processor does not support `uzp {z30\.h-z31\.h},z0\.h,z0\.h'
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[^ :]+:[0-9]+: Error: selected processor does not support `uzp {z0\.h-z1\.h},z31\.h,z0\.h'
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[^ :]+:[0-9]+: Error: selected processor does not support `uzp {z0\.h-z1\.h},z0\.h,z31\.h'
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[^ :]+:[0-9]+: Error: selected processor does not support `uzp {z6\.h-z7\.h},z8\.h,z22\.h'
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[^ :]+:[0-9]+: Error: selected processor does not support `uzp {z0\.s-z1\.s},z0\.s,z0\.s'
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[^ :]+:[0-9]+: Error: selected processor does not support `uzp {z30\.s-z31\.s},z0\.s,z0\.s'
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[^ :]+:[0-9]+: Error: selected processor does not support `uzp {z0\.s-z1\.s},z31\.s,z0\.s'
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[^ :]+:[0-9]+: Error: selected processor does not support `uzp {z0\.s-z1\.s},z0\.s,z31\.s'
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[^ :]+:[0-9]+: Error: selected processor does not support `uzp {z24\.s-z25\.s},z19\.s,z2\.s'
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[^ :]+:[0-9]+: Error: selected processor does not support `uzp {z0\.d-z1\.d},z0\.d,z0\.d'
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[^ :]+:[0-9]+: Error: selected processor does not support `uzp {z30\.d-z31\.d},z0\.d,z0\.d'
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[^ :]+:[0-9]+: Error: selected processor does not support `uzp {z0\.d-z1\.d},z31\.d,z0\.d'
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[^ :]+:[0-9]+: Error: selected processor does not support `uzp {z0\.d-z1\.d},z0\.d,z31\.d'
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[^ :]+:[0-9]+: Error: selected processor does not support `uzp {z2\.d-z3\.d},z29\.d,z5\.d'
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[^ :]+:[0-9]+: Error: selected processor does not support `uzp {z0\.q-z1\.q},z0\.q,z0\.q'
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[^ :]+:[0-9]+: Error: selected processor does not support `uzp {z30\.q-z31\.q},z0\.q,z0\.q'
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[^ :]+:[0-9]+: Error: selected processor does not support `uzp {z0\.q-z1\.q},z31\.q,z0\.q'
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[^ :]+:[0-9]+: Error: selected processor does not support `uzp {z0\.q-z1\.q},z0\.q,z31\.q'
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[^ :]+:[0-9]+: Error: selected processor does not support `uzp {z14\.q-z15\.q},z24\.q,z9\.q'
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[^ :]+:[0-9]+: Error: selected processor does not support `uzp {z0\.b-z3\.b},{z0\.b-z3\.b}'
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[^ :]+:[0-9]+: Error: selected processor does not support `uzp {z28\.b-z31\.b},{z0\.b-z3\.b}'
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[^ :]+:[0-9]+: Error: selected processor does not support `uzp {z0\.b-z3\.b},{z28\.b-z31\.b}'
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[^ :]+:[0-9]+: Error: selected processor does not support `uzp {z4\.b-z7\.b},{z24\.b-z27\.b}'
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[^ :]+:[0-9]+: Error: selected processor does not support `uzp {z0\.h-z3\.h},{z0\.h-z3\.h}'
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[^ :]+:[0-9]+: Error: selected processor does not support `uzp {z28\.h-z31\.h},{z0\.h-z3\.h}'
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[^ :]+:[0-9]+: Error: selected processor does not support `uzp {z0\.h-z3\.h},{z28\.h-z31\.h}'
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[^ :]+:[0-9]+: Error: selected processor does not support `uzp {z16\.h-z19\.h},{z8\.h-z11\.h}'
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[^ :]+:[0-9]+: Error: selected processor does not support `uzp {z0\.s-z3\.s},{z0\.s-z3\.s}'
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[^ :]+:[0-9]+: Error: selected processor does not support `uzp {z28\.s-z31\.s},{z0\.s-z3\.s}'
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[^ :]+:[0-9]+: Error: selected processor does not support `uzp {z0\.s-z3\.s},{z28\.s-z31\.s}'
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[^ :]+:[0-9]+: Error: selected processor does not support `uzp {z20\.s-z23\.s},{z12\.s-z15\.s}'
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[^ :]+:[0-9]+: Error: selected processor does not support `uzp {z0\.d-z3\.d},{z0\.d-z3\.d}'
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[^ :]+:[0-9]+: Error: selected processor does not support `uzp {z28\.d-z31\.d},{z0\.d-z3\.d}'
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[^ :]+:[0-9]+: Error: selected processor does not support `uzp {z0\.d-z3\.d},{z28\.d-z31\.d}'
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[^ :]+:[0-9]+: Error: selected processor does not support `uzp {z8\.d-z11\.d},{z16\.d-z19\.d}'
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[^ :]+:[0-9]+: Error: selected processor does not support `uzp {z0\.q-z3\.q},{z0\.q-z3\.q}'
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[^ :]+:[0-9]+: Error: selected processor does not support `uzp {z28\.q-z31\.q},{z0\.q-z3\.q}'
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[^ :]+:[0-9]+: Error: selected processor does not support `uzp {z0\.q-z3\.q},{z28\.q-z31\.q}'
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[^ :]+:[0-9]+: Error: selected processor does not support `uzp {z12\.q-z15\.q},{z4\.q-z7\.q}'
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[^ :]+:[0-9]+: Error: selected processor does not support `zip {z0\.b-z1\.b},z0\.b,z0\.b'
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[^ :]+:[0-9]+: Error: selected processor does not support `zip {z30\.b-z31\.b},z0\.b,z0\.b'
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[^ :]+:[0-9]+: Error: selected processor does not support `zip {z0\.b-z1\.b},z31\.b,z0\.b'
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[^ :]+:[0-9]+: Error: selected processor does not support `zip {z0\.b-z1\.b},z0\.b,z31\.b'
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[^ :]+:[0-9]+: Error: selected processor does not support `zip {z18\.b-z19\.b},z11\.b,z25\.b'
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[^ :]+:[0-9]+: Error: selected processor does not support `zip {z0\.h-z1\.h},z0\.h,z0\.h'
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[^ :]+:[0-9]+: Error: selected processor does not support `zip {z30\.h-z31\.h},z0\.h,z0\.h'
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[^ :]+:[0-9]+: Error: selected processor does not support `zip {z0\.h-z1\.h},z31\.h,z0\.h'
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[^ :]+:[0-9]+: Error: selected processor does not support `zip {z0\.h-z1\.h},z0\.h,z31\.h'
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[^ :]+:[0-9]+: Error: selected processor does not support `zip {z6\.h-z7\.h},z8\.h,z22\.h'
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[^ :]+:[0-9]+: Error: selected processor does not support `zip {z0\.s-z1\.s},z0\.s,z0\.s'
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[^ :]+:[0-9]+: Error: selected processor does not support `zip {z30\.s-z31\.s},z0\.s,z0\.s'
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[^ :]+:[0-9]+: Error: selected processor does not support `zip {z0\.s-z1\.s},z31\.s,z0\.s'
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[^ :]+:[0-9]+: Error: selected processor does not support `zip {z0\.s-z1\.s},z0\.s,z31\.s'
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[^ :]+:[0-9]+: Error: selected processor does not support `zip {z24\.s-z25\.s},z19\.s,z2\.s'
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[^ :]+:[0-9]+: Error: selected processor does not support `zip {z0\.d-z1\.d},z0\.d,z0\.d'
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[^ :]+:[0-9]+: Error: selected processor does not support `zip {z30\.d-z31\.d},z0\.d,z0\.d'
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[^ :]+:[0-9]+: Error: selected processor does not support `zip {z0\.d-z1\.d},z31\.d,z0\.d'
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[^ :]+:[0-9]+: Error: selected processor does not support `zip {z0\.d-z1\.d},z0\.d,z31\.d'
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[^ :]+:[0-9]+: Error: selected processor does not support `zip {z2\.d-z3\.d},z29\.d,z5\.d'
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[^ :]+:[0-9]+: Error: selected processor does not support `zip {z0\.q-z1\.q},z0\.q,z0\.q'
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[^ :]+:[0-9]+: Error: selected processor does not support `zip {z30\.q-z31\.q},z0\.q,z0\.q'
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[^ :]+:[0-9]+: Error: selected processor does not support `zip {z0\.q-z1\.q},z31\.q,z0\.q'
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[^ :]+:[0-9]+: Error: selected processor does not support `zip {z0\.q-z1\.q},z0\.q,z31\.q'
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[^ :]+:[0-9]+: Error: selected processor does not support `zip {z14\.q-z15\.q},z24\.q,z9\.q'
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[^ :]+:[0-9]+: Error: selected processor does not support `zip {z0\.b-z3\.b},{z0\.b-z3\.b}'
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[^ :]+:[0-9]+: Error: selected processor does not support `zip {z28\.b-z31\.b},{z0\.b-z3\.b}'
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[^ :]+:[0-9]+: Error: selected processor does not support `zip {z0\.b-z3\.b},{z28\.b-z31\.b}'
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[^ :]+:[0-9]+: Error: selected processor does not support `zip {z4\.b-z7\.b},{z24\.b-z27\.b}'
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[^ :]+:[0-9]+: Error: selected processor does not support `zip {z0\.h-z3\.h},{z0\.h-z3\.h}'
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[^ :]+:[0-9]+: Error: selected processor does not support `zip {z28\.h-z31\.h},{z0\.h-z3\.h}'
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[^ :]+:[0-9]+: Error: selected processor does not support `zip {z0\.h-z3\.h},{z28\.h-z31\.h}'
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[^ :]+:[0-9]+: Error: selected processor does not support `zip {z16\.h-z19\.h},{z8\.h-z11\.h}'
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[^ :]+:[0-9]+: Error: selected processor does not support `zip {z0\.s-z3\.s},{z0\.s-z3\.s}'
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[^ :]+:[0-9]+: Error: selected processor does not support `zip {z28\.s-z31\.s},{z0\.s-z3\.s}'
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[^ :]+:[0-9]+: Error: selected processor does not support `zip {z0\.s-z3\.s},{z28\.s-z31\.s}'
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[^ :]+:[0-9]+: Error: selected processor does not support `zip {z20\.s-z23\.s},{z12\.s-z15\.s}'
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[^ :]+:[0-9]+: Error: selected processor does not support `zip {z0\.d-z3\.d},{z0\.d-z3\.d}'
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[^ :]+:[0-9]+: Error: selected processor does not support `zip {z28\.d-z31\.d},{z0\.d-z3\.d}'
|
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[^ :]+:[0-9]+: Error: selected processor does not support `zip {z0\.d-z3\.d},{z28\.d-z31\.d}'
|
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[^ :]+:[0-9]+: Error: selected processor does not support `zip {z8\.d-z11\.d},{z16\.d-z19\.d}'
|
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[^ :]+:[0-9]+: Error: selected processor does not support `zip {z0\.q-z3\.q},{z0\.q-z3\.q}'
|
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[^ :]+:[0-9]+: Error: selected processor does not support `zip {z28\.q-z31\.q},{z0\.q-z3\.q}'
|
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[^ :]+:[0-9]+: Error: selected processor does not support `zip {z0\.q-z3\.q},{z28\.q-z31\.q}'
|
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[^ :]+:[0-9]+: Error: selected processor does not support `zip {z12\.q-z15\.q},{z4\.q-z7\.q}'
|
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99
gas/testsuite/gas/aarch64/sme2-30.d
Normal file
99
gas/testsuite/gas/aarch64/sme2-30.d
Normal file
@ -0,0 +1,99 @@
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#as: -march=armv8-a+sme2
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#objdump: -dr
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[^:]+: file format .*
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[^:]+:
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[^:]+:
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[^:]+: c120d001 uzp {z0\.b-z1\.b}, z0\.b, z0\.b
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[^:]+: c120d01f uzp {z30\.b-z31\.b}, z0\.b, z0\.b
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[^:]+: c120d3e1 uzp {z0\.b-z1\.b}, z31\.b, z0\.b
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[^:]+: c13fd001 uzp {z0\.b-z1\.b}, z0\.b, z31\.b
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[^:]+: c139d173 uzp {z18\.b-z19\.b}, z11\.b, z25\.b
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[^:]+: c160d001 uzp {z0\.h-z1\.h}, z0\.h, z0\.h
|
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[^:]+: c160d01f uzp {z30\.h-z31\.h}, z0\.h, z0\.h
|
||||
[^:]+: c160d3e1 uzp {z0\.h-z1\.h}, z31\.h, z0\.h
|
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[^:]+: c17fd001 uzp {z0\.h-z1\.h}, z0\.h, z31\.h
|
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[^:]+: c176d107 uzp {z6\.h-z7\.h}, z8\.h, z22\.h
|
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[^:]+: c1a0d001 uzp {z0\.s-z1\.s}, z0\.s, z0\.s
|
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[^:]+: c1a0d01f uzp {z30\.s-z31\.s}, z0\.s, z0\.s
|
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[^:]+: c1a0d3e1 uzp {z0\.s-z1\.s}, z31\.s, z0\.s
|
||||
[^:]+: c1bfd001 uzp {z0\.s-z1\.s}, z0\.s, z31\.s
|
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[^:]+: c1a2d279 uzp {z24\.s-z25\.s}, z19\.s, z2\.s
|
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[^:]+: c1e0d001 uzp {z0\.d-z1\.d}, z0\.d, z0\.d
|
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[^:]+: c1e0d01f uzp {z30\.d-z31\.d}, z0\.d, z0\.d
|
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[^:]+: c1e0d3e1 uzp {z0\.d-z1\.d}, z31\.d, z0\.d
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[^:]+: c1ffd001 uzp {z0\.d-z1\.d}, z0\.d, z31\.d
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[^:]+: c1e5d3a3 uzp {z2\.d-z3\.d}, z29\.d, z5\.d
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[^:]+: c120d401 uzp {z0\.q-z1\.q}, z0\.q, z0\.q
|
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[^:]+: c120d41f uzp {z30\.q-z31\.q}, z0\.q, z0\.q
|
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[^:]+: c120d7e1 uzp {z0\.q-z1\.q}, z31\.q, z0\.q
|
||||
[^:]+: c13fd401 uzp {z0\.q-z1\.q}, z0\.q, z31\.q
|
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[^:]+: c129d70f uzp {z14\.q-z15\.q}, z24\.q, z9\.q
|
||||
[^:]+: c136e002 uzp {z0\.b-z3\.b}, {z0\.b-z3\.b}
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[^:]+: c136e01e uzp {z28\.b-z31\.b}, {z0\.b-z3\.b}
|
||||
[^:]+: c136e382 uzp {z0\.b-z3\.b}, {z28\.b-z31\.b}
|
||||
[^:]+: c136e306 uzp {z4\.b-z7\.b}, {z24\.b-z27\.b}
|
||||
[^:]+: c176e002 uzp {z0\.h-z3\.h}, {z0\.h-z3\.h}
|
||||
[^:]+: c176e01e uzp {z28\.h-z31\.h}, {z0\.h-z3\.h}
|
||||
[^:]+: c176e382 uzp {z0\.h-z3\.h}, {z28\.h-z31\.h}
|
||||
[^:]+: c176e112 uzp {z16\.h-z19\.h}, {z8\.h-z11\.h}
|
||||
[^:]+: c1b6e002 uzp {z0\.s-z3\.s}, {z0\.s-z3\.s}
|
||||
[^:]+: c1b6e01e uzp {z28\.s-z31\.s}, {z0\.s-z3\.s}
|
||||
[^:]+: c1b6e382 uzp {z0\.s-z3\.s}, {z28\.s-z31\.s}
|
||||
[^:]+: c1b6e196 uzp {z20\.s-z23\.s}, {z12\.s-z15\.s}
|
||||
[^:]+: c1f6e002 uzp {z0\.d-z3\.d}, {z0\.d-z3\.d}
|
||||
[^:]+: c1f6e01e uzp {z28\.d-z31\.d}, {z0\.d-z3\.d}
|
||||
[^:]+: c1f6e382 uzp {z0\.d-z3\.d}, {z28\.d-z31\.d}
|
||||
[^:]+: c1f6e20a uzp {z8\.d-z11\.d}, {z16\.d-z19\.d}
|
||||
[^:]+: c137e002 uzp {z0\.q-z3\.q}, {z0\.q-z3\.q}
|
||||
[^:]+: c137e01e uzp {z28\.q-z31\.q}, {z0\.q-z3\.q}
|
||||
[^:]+: c137e382 uzp {z0\.q-z3\.q}, {z28\.q-z31\.q}
|
||||
[^:]+: c137e08e uzp {z12\.q-z15\.q}, {z4\.q-z7\.q}
|
||||
[^:]+: c120d000 zip {z0\.b-z1\.b}, z0\.b, z0\.b
|
||||
[^:]+: c120d01e zip {z30\.b-z31\.b}, z0\.b, z0\.b
|
||||
[^:]+: c120d3e0 zip {z0\.b-z1\.b}, z31\.b, z0\.b
|
||||
[^:]+: c13fd000 zip {z0\.b-z1\.b}, z0\.b, z31\.b
|
||||
[^:]+: c139d172 zip {z18\.b-z19\.b}, z11\.b, z25\.b
|
||||
[^:]+: c160d000 zip {z0\.h-z1\.h}, z0\.h, z0\.h
|
||||
[^:]+: c160d01e zip {z30\.h-z31\.h}, z0\.h, z0\.h
|
||||
[^:]+: c160d3e0 zip {z0\.h-z1\.h}, z31\.h, z0\.h
|
||||
[^:]+: c17fd000 zip {z0\.h-z1\.h}, z0\.h, z31\.h
|
||||
[^:]+: c176d106 zip {z6\.h-z7\.h}, z8\.h, z22\.h
|
||||
[^:]+: c1a0d000 zip {z0\.s-z1\.s}, z0\.s, z0\.s
|
||||
[^:]+: c1a0d01e zip {z30\.s-z31\.s}, z0\.s, z0\.s
|
||||
[^:]+: c1a0d3e0 zip {z0\.s-z1\.s}, z31\.s, z0\.s
|
||||
[^:]+: c1bfd000 zip {z0\.s-z1\.s}, z0\.s, z31\.s
|
||||
[^:]+: c1a2d278 zip {z24\.s-z25\.s}, z19\.s, z2\.s
|
||||
[^:]+: c1e0d000 zip {z0\.d-z1\.d}, z0\.d, z0\.d
|
||||
[^:]+: c1e0d01e zip {z30\.d-z31\.d}, z0\.d, z0\.d
|
||||
[^:]+: c1e0d3e0 zip {z0\.d-z1\.d}, z31\.d, z0\.d
|
||||
[^:]+: c1ffd000 zip {z0\.d-z1\.d}, z0\.d, z31\.d
|
||||
[^:]+: c1e5d3a2 zip {z2\.d-z3\.d}, z29\.d, z5\.d
|
||||
[^:]+: c120d400 zip {z0\.q-z1\.q}, z0\.q, z0\.q
|
||||
[^:]+: c120d41e zip {z30\.q-z31\.q}, z0\.q, z0\.q
|
||||
[^:]+: c120d7e0 zip {z0\.q-z1\.q}, z31\.q, z0\.q
|
||||
[^:]+: c13fd400 zip {z0\.q-z1\.q}, z0\.q, z31\.q
|
||||
[^:]+: c129d70e zip {z14\.q-z15\.q}, z24\.q, z9\.q
|
||||
[^:]+: c136e000 zip {z0\.b-z3\.b}, {z0\.b-z3\.b}
|
||||
[^:]+: c136e01c zip {z28\.b-z31\.b}, {z0\.b-z3\.b}
|
||||
[^:]+: c136e380 zip {z0\.b-z3\.b}, {z28\.b-z31\.b}
|
||||
[^:]+: c136e304 zip {z4\.b-z7\.b}, {z24\.b-z27\.b}
|
||||
[^:]+: c176e000 zip {z0\.h-z3\.h}, {z0\.h-z3\.h}
|
||||
[^:]+: c176e01c zip {z28\.h-z31\.h}, {z0\.h-z3\.h}
|
||||
[^:]+: c176e380 zip {z0\.h-z3\.h}, {z28\.h-z31\.h}
|
||||
[^:]+: c176e110 zip {z16\.h-z19\.h}, {z8\.h-z11\.h}
|
||||
[^:]+: c1b6e000 zip {z0\.s-z3\.s}, {z0\.s-z3\.s}
|
||||
[^:]+: c1b6e01c zip {z28\.s-z31\.s}, {z0\.s-z3\.s}
|
||||
[^:]+: c1b6e380 zip {z0\.s-z3\.s}, {z28\.s-z31\.s}
|
||||
[^:]+: c1b6e194 zip {z20\.s-z23\.s}, {z12\.s-z15\.s}
|
||||
[^:]+: c1f6e000 zip {z0\.d-z3\.d}, {z0\.d-z3\.d}
|
||||
[^:]+: c1f6e01c zip {z28\.d-z31\.d}, {z0\.d-z3\.d}
|
||||
[^:]+: c1f6e380 zip {z0\.d-z3\.d}, {z28\.d-z31\.d}
|
||||
[^:]+: c1f6e208 zip {z8\.d-z11\.d}, {z16\.d-z19\.d}
|
||||
[^:]+: c137e000 zip {z0\.q-z3\.q}, {z0\.q-z3\.q}
|
||||
[^:]+: c137e01c zip {z28\.q-z31\.q}, {z0\.q-z3\.q}
|
||||
[^:]+: c137e380 zip {z0\.q-z3\.q}, {z28\.q-z31\.q}
|
||||
[^:]+: c137e08c zip {z12\.q-z15\.q}, {z4\.q-z7\.q}
|
||||
109
gas/testsuite/gas/aarch64/sme2-30.s
Normal file
109
gas/testsuite/gas/aarch64/sme2-30.s
Normal file
@ -0,0 +1,109 @@
|
||||
uzp { z0.b - z1.b }, z0.b, z0.b
|
||||
uzp { z30.b - z31.b }, z0.b, z0.b
|
||||
uzp { z0.b - z1.b }, z31.b, z0.b
|
||||
uzp { z0.b - z1.b }, z0.b, z31.b
|
||||
uzp { z18.b - z19.b }, z11.b, z25.b
|
||||
|
||||
uzp { z0.h - z1.h }, z0.h, z0.h
|
||||
uzp { z30.h - z31.h }, z0.h, z0.h
|
||||
uzp { z0.h - z1.h }, z31.h, z0.h
|
||||
uzp { z0.h - z1.h }, z0.h, z31.h
|
||||
uzp { z6.h - z7.h }, z8.h, z22.h
|
||||
|
||||
uzp { z0.s - z1.s }, z0.s, z0.s
|
||||
uzp { z30.s - z31.s }, z0.s, z0.s
|
||||
uzp { z0.s - z1.s }, z31.s, z0.s
|
||||
uzp { z0.s - z1.s }, z0.s, z31.s
|
||||
uzp { z24.s - z25.s }, z19.s, z2.s
|
||||
|
||||
uzp { z0.d - z1.d }, z0.d, z0.d
|
||||
uzp { z30.d - z31.d }, z0.d, z0.d
|
||||
uzp { z0.d - z1.d }, z31.d, z0.d
|
||||
uzp { z0.d - z1.d }, z0.d, z31.d
|
||||
uzp { z2.d - z3.d }, z29.d, z5.d
|
||||
|
||||
uzp { z0.q - z1.q }, z0.q, z0.q
|
||||
uzp { z30.q - z31.q }, z0.q, z0.q
|
||||
uzp { z0.q - z1.q }, z31.q, z0.q
|
||||
uzp { z0.q - z1.q }, z0.q, z31.q
|
||||
uzp { z14.q - z15.q }, z24.q, z9.q
|
||||
|
||||
uzp { z0.b - z3.b }, { z0.b - z3.b }
|
||||
uzp { z28.b - z31.b }, { z0.b - z3.b }
|
||||
uzp { z0.b - z3.b }, { z28.b - z31.b }
|
||||
uzp { z4.b - z7.b }, { z24.b - z27.b }
|
||||
|
||||
uzp { z0.h - z3.h }, { z0.h - z3.h }
|
||||
uzp { z28.h - z31.h }, { z0.h - z3.h }
|
||||
uzp { z0.h - z3.h }, { z28.h - z31.h }
|
||||
uzp { z16.h - z19.h }, { z8.h - z11.h }
|
||||
|
||||
uzp { z0.s - z3.s }, { z0.s - z3.s }
|
||||
uzp { z28.s - z31.s }, { z0.s - z3.s }
|
||||
uzp { z0.s - z3.s }, { z28.s - z31.s }
|
||||
uzp { z20.s - z23.s }, { z12.s - z15.s }
|
||||
|
||||
uzp { z0.d - z3.d }, { z0.d - z3.d }
|
||||
uzp { z28.d - z31.d }, { z0.d - z3.d }
|
||||
uzp { z0.d - z3.d }, { z28.d - z31.d }
|
||||
uzp { z8.d - z11.d }, { z16.d - z19.d }
|
||||
|
||||
uzp { z0.q - z3.q }, { z0.q - z3.q }
|
||||
uzp { z28.q - z31.q }, { z0.q - z3.q }
|
||||
uzp { z0.q - z3.q }, { z28.q - z31.q }
|
||||
uzp { z12.q - z15.q }, { z4.q - z7.q }
|
||||
|
||||
zip { z0.b - z1.b }, z0.b, z0.b
|
||||
zip { z30.b - z31.b }, z0.b, z0.b
|
||||
zip { z0.b - z1.b }, z31.b, z0.b
|
||||
zip { z0.b - z1.b }, z0.b, z31.b
|
||||
zip { z18.b - z19.b }, z11.b, z25.b
|
||||
|
||||
zip { z0.h - z1.h }, z0.h, z0.h
|
||||
zip { z30.h - z31.h }, z0.h, z0.h
|
||||
zip { z0.h - z1.h }, z31.h, z0.h
|
||||
zip { z0.h - z1.h }, z0.h, z31.h
|
||||
zip { z6.h - z7.h }, z8.h, z22.h
|
||||
|
||||
zip { z0.s - z1.s }, z0.s, z0.s
|
||||
zip { z30.s - z31.s }, z0.s, z0.s
|
||||
zip { z0.s - z1.s }, z31.s, z0.s
|
||||
zip { z0.s - z1.s }, z0.s, z31.s
|
||||
zip { z24.s - z25.s }, z19.s, z2.s
|
||||
|
||||
zip { z0.d - z1.d }, z0.d, z0.d
|
||||
zip { z30.d - z31.d }, z0.d, z0.d
|
||||
zip { z0.d - z1.d }, z31.d, z0.d
|
||||
zip { z0.d - z1.d }, z0.d, z31.d
|
||||
zip { z2.d - z3.d }, z29.d, z5.d
|
||||
|
||||
zip { z0.q - z1.q }, z0.q, z0.q
|
||||
zip { z30.q - z31.q }, z0.q, z0.q
|
||||
zip { z0.q - z1.q }, z31.q, z0.q
|
||||
zip { z0.q - z1.q }, z0.q, z31.q
|
||||
zip { z14.q - z15.q }, z24.q, z9.q
|
||||
|
||||
zip { z0.b - z3.b }, { z0.b - z3.b }
|
||||
zip { z28.b - z31.b }, { z0.b - z3.b }
|
||||
zip { z0.b - z3.b }, { z28.b - z31.b }
|
||||
zip { z4.b - z7.b }, { z24.b - z27.b }
|
||||
|
||||
zip { z0.h - z3.h }, { z0.h - z3.h }
|
||||
zip { z28.h - z31.h }, { z0.h - z3.h }
|
||||
zip { z0.h - z3.h }, { z28.h - z31.h }
|
||||
zip { z16.h - z19.h }, { z8.h - z11.h }
|
||||
|
||||
zip { z0.s - z3.s }, { z0.s - z3.s }
|
||||
zip { z28.s - z31.s }, { z0.s - z3.s }
|
||||
zip { z0.s - z3.s }, { z28.s - z31.s }
|
||||
zip { z20.s - z23.s }, { z12.s - z15.s }
|
||||
|
||||
zip { z0.d - z3.d }, { z0.d - z3.d }
|
||||
zip { z28.d - z31.d }, { z0.d - z3.d }
|
||||
zip { z0.d - z3.d }, { z28.d - z31.d }
|
||||
zip { z8.d - z11.d }, { z16.d - z19.d }
|
||||
|
||||
zip { z0.q - z3.q }, { z0.q - z3.q }
|
||||
zip { z28.q - z31.q }, { z0.q - z3.q }
|
||||
zip { z0.q - z3.q }, { z28.q - z31.q }
|
||||
zip { z12.q - z15.q }, { z4.q - z7.q }
|
||||
File diff suppressed because it is too large
Load Diff
@ -1648,6 +1648,10 @@
|
||||
{ \
|
||||
QLF3(S_Q,P_M,S_Q), \
|
||||
}
|
||||
#define OP_SVE_QQ \
|
||||
{ \
|
||||
QLF2(S_Q,S_Q), \
|
||||
}
|
||||
#define OP_SVE_QQQ \
|
||||
{ \
|
||||
QLF3(S_Q,S_Q,S_Q), \
|
||||
@ -5814,6 +5818,10 @@ const struct aarch64_opcode aarch64_opcode_table[] =
|
||||
SME2_INSN ("uunpk", 0xc135e001, 0xff3ffc23, sme_size_22_hsd, 0, OP2 (SME_Zdnx4, SME_Znx2), OP_SVE_VV_HSD_BHS, 0, 0),
|
||||
SME2_INSN ("uvdot", 0xc1500030, 0xfff09038, sme_misc, 0, OP3 (SME_ZA_array_off3_0, SME_Znx2, SME_Zm_INDEX2), OP_SVE_SHH, F_OD (2), 0),
|
||||
SME2_INSN ("uvdot", 0xc1508030, 0xfff09078, sme_misc, 0, OP3 (SME_ZA_array_off3_0, SME_Znx4, SME_Zm_INDEX2), OP_SVE_SBB, F_OD (4), 0),
|
||||
SME2_INSN ("uzp", 0xc120d001, 0xff20fc01, sme_size_22, 0, OP3 (SME_Zdnx2, SVE_Zn, SVE_Zm_16), OP_SVE_VVV_BHSD, 0, 0),
|
||||
SME2_INSN ("uzp", 0xc120d401, 0xffe0fc01, sme_misc, 0, OP3 (SME_Zdnx2, SVE_Zn, SVE_Zm_16), OP_SVE_QQQ, 0, 0),
|
||||
SME2_INSN ("uzp", 0xc136e002, 0xff3ffc63, sme_size_22, 0, OP2 (SME_Zdnx4, SME_Znx4), OP_SVE_VV_BHSD, 0, 0),
|
||||
SME2_INSN ("uzp", 0xc137e002, 0xfffffc63, sme_misc, 0, OP2 (SME_Zdnx4, SME_Znx4), OP_SVE_QQ, 0, 0),
|
||||
SME2_INSN ("whilege", 0x25204010, 0xff20dc18, sme_size_22, 0, OP4 (SME_PNd3, Rn, Rm, SME_VLxN_13), OP_SVE_VXXU_BHSD, 0, 0),
|
||||
SME2_INSN ("whilegt", 0x25204018, 0xff20dc18, sme_size_22, 0, OP4 (SME_PNd3, Rn, Rm, SME_VLxN_13), OP_SVE_VXXU_BHSD, 0, 0),
|
||||
SME2_INSN ("whilehi", 0x25204818, 0xff20dc18, sme_size_22, 0, OP4 (SME_PNd3, Rn, Rm, SME_VLxN_13), OP_SVE_VXXU_BHSD, 0, 0),
|
||||
@ -5823,6 +5831,10 @@ const struct aarch64_opcode aarch64_opcode_table[] =
|
||||
SME2_INSN ("whilels", 0x25204c18, 0xff20dc18, sme_size_22, 0, OP4 (SME_PNd3, Rn, Rm, SME_VLxN_13), OP_SVE_VXXU_BHSD, 0, 0),
|
||||
SME2_INSN ("whilelt", 0x25204410, 0xff20dc18, sme_size_22, 0, OP4 (SME_PNd3, Rn, Rm, SME_VLxN_13), OP_SVE_VXXU_BHSD, 0, 0),
|
||||
SME2_INSN ("zero", 0xc0480001, 0xffffffff, sme_misc, 0, OP1 (SME_ZT0_LIST), {}, 0, 0),
|
||||
SME2_INSN ("zip", 0xc120d000, 0xff20fc01, sme_size_22, 0, OP3 (SME_Zdnx2, SVE_Zn, SVE_Zm_16), OP_SVE_VVV_BHSD, 0, 0),
|
||||
SME2_INSN ("zip", 0xc120d400, 0xffe0fc01, sme_misc, 0, OP3 (SME_Zdnx2, SVE_Zn, SVE_Zm_16), OP_SVE_QQQ, 0, 0),
|
||||
SME2_INSN ("zip", 0xc136e000, 0xff3ffc63, sme_size_22, 0, OP2 (SME_Zdnx4, SME_Znx4), OP_SVE_VV_BHSD, 0, 0),
|
||||
SME2_INSN ("zip", 0xc137e000, 0xfffffc63, sme_misc, 0, OP2 (SME_Zdnx4, SME_Znx4), OP_SVE_QQ, 0, 0),
|
||||
|
||||
/* SME2 I16I64 instructions. */
|
||||
SME2_I16I64_INSN ("sdot", 0xc1d00008, 0xfff09838, sme_misc, 0, OP3 (SME_ZA_array_off3_0, SME_Znx2, SME_Zm_INDEX1), OP_SVE_DHH, F_OD (2), 0),
|
||||
|
||||
Loading…
Reference in New Issue
Block a user