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* tc-i386.c (md_assemble): Handle third byte of the opcode as prefix.
* i386.h (i386_optab): Make [sml]fence template to use immext field.
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@ -1,3 +1,7 @@
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Fri Jan 5 13:26:42 MET 2001 Jan Hubicka <jh@suse.cz>
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* tc-i386.c (md_assemble): Handle third byte of the opcode as prefix.
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Thu Jan 4 22:25:26 MET 2001 Jan Hubicka <jh@suse.cz>
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* tc-i386.c (cpu_arch): Add Pentium4 and modify sledgehammer entry.
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@ -2826,6 +2826,11 @@ md_assemble (line)
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/* Output normal instructions here. */
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unsigned char *q;
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/* All opcodes on i386 have eighter 1 or 2 bytes. We may use third
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byte for the SSE instructions to specify prefix they require. */
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if (i.tm.base_opcode & 0xff0000)
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add_prefix ((i.tm.base_opcode >> 16) & 0xff);
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/* The prefix bytes. */
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for (q = i.prefix;
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q < i.prefix + sizeof (i.prefix) / sizeof (i.prefix[0]);
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@ -2845,7 +2850,7 @@ md_assemble (line)
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insn_size += 1;
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FRAG_APPEND_1_CHAR (i.tm.base_opcode);
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}
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else if (fits_in_unsigned_word (i.tm.base_opcode))
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else
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{
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insn_size += 2;
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p = frag_more (2);
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@ -2853,23 +2858,6 @@ md_assemble (line)
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*p++ = (i.tm.base_opcode >> 8) & 0xff;
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*p = i.tm.base_opcode & 0xff;
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}
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else
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{ /* Opcode is either 3 or 4 bytes. */
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if (i.tm.base_opcode & 0xff000000)
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{
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insn_size += 4;
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p = frag_more (4);
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*p++ = (i.tm.base_opcode >> 24) & 0xff;
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}
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else
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{
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insn_size += 3;
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p = frag_more (3);
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}
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*p++ = (i.tm.base_opcode >> 16) & 0xff;
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*p++ = (i.tm.base_opcode >> 8) & 0xff;
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*p = (i.tm.base_opcode) & 0xff;
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}
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/* Now the modrm byte and sib byte (if present). */
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if (i.tm.opcode_modifier & Modrm)
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@ -1,9 +1,13 @@
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Wed Jan 3 16:27:15 MET 2001 Jan hubicka <jh@suse.cz>
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Fri Jan 5 13:22:23 MET 2001 Jan Hubicka <jh@suse.cz>
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* i386.h (i386_optab): Make [sml]fence template to use immext field.
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Wed Jan 3 16:27:15 MET 2001 Jan Hubicka <jh@suse.cz>
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* i386.h (i386_optab): Fix 64bit pushf template; Add instructions
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introduced by Pentium4
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Sat Dec 30 19:03:15 MET 2000 Jan hubicka <jh@suse.cz>
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Sat Dec 30 19:03:15 MET 2000 Jan Hubicka <jh@suse.cz>
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* i386.h (i386_optab): Add "rex*" instructions;
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add swapgs; disable jmp/call far direct instructions for
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@ -953,8 +953,8 @@ static const template i386_optab[] = {
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{"movnti", 2, 0x0fc3, X, CpuP4, lq_Suf|Modrm, { WordReg|WordMem, WordReg, 0 } },
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{"clflush", 1, 0x0fae, 7, CpuP4, FP|Modrm, { ByteMem, 0, 0 } },
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{"lfence", 0, 0x0faee8, X, CpuP4, FP, { 0, 0, 0 } },
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{"mfence", 0, 0x0faef0, X, CpuP4, FP, { 0, 0, 0 } },
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{"lfence", 0, 0x0fae, 0xe8, CpuP4, FP|ImmExt, { 0, 0, 0 } },
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{"mfence", 0, 0x0fae, 0xf0, CpuP4, FP|ImmExt, { 0, 0, 0 } },
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{"pause", 0, 0xf390, X, CpuP4, FP, { 0, 0, 0 } },
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/* MMX/SSE2 instructions. */
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@ -1172,7 +1172,7 @@ static const template i386_optab[] = {
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{"rcpss", 2, 0xf30f53, X, CpuSSE, FP|Modrm, { RegXMM|WordMem, RegXMM, 0 } },
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{"rsqrtps", 2, 0x0f52, X, CpuSSE, FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } },
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{"rsqrtss", 2, 0xf30f52, X, CpuSSE, FP|Modrm, { RegXMM|WordMem, RegXMM, 0 } },
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{"sfence", 0, 0x0faef8, X, CpuSSE, FP, { 0, 0, 0 } },
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{"sfence", 0, 0x0fae, 0xf8, CpuSSE, FP|ImmExt, { 0, 0, 0 } },
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{"shufps", 3, 0x0fc6, X, CpuSSE, FP|Modrm, { Imm8, RegXMM|LLongMem, RegXMM } },
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{"sqrtps", 2, 0x0f51, X, CpuSSE, FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } },
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{"sqrtss", 2, 0xf30f51, X, CpuSSE, FP|Modrm, { RegXMM|WordMem, RegXMM, 0 } },
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