gas/elf dwarf2 tests

Make them work for tile, by using ".quad 0" as the simulated
instruction and doubling size of aligns.  The larger aligns tripped
over riscv alignment handling, fixed by adding -mno-relax there.
Also disable link-relax for avr, pru and xtensa, allowing these
targets to pass these tests.  With link-time relaxation enabled,
these targets emit alignment relocations rather than aligning at
assembly time.  This means the assembler doesn't see a change in PC
when it is expected over an alignment frag and thus view numbers are
calculated incorrectly.

	* testsuite/gas/elf/dwarf2-1.s,
	* testsuite/gas/elf/dwarf2-2.s,
	* testsuite/gas/elf/dwarf2-5.s,
	* testsuite/gas/elf/dwarf2-7.s,
	* testsuite/gas/elf/dwarf2-8.s,
	* testsuite/gas/elf/dwarf2-9.s,
	* testsuite/gas/elf/dwarf2-10.s,
	* testsuite/gas/elf/dwarf2-11.s,
	* testsuite/gas/elf/dwarf2-12.s,
	* testsuite/gas/elf/dwarf2-13.s,
	* testsuite/gas/elf/dwarf2-14.s,
	* testsuite/gas/elf/dwarf2-15.s,
	* testsuite/gas/elf/dwarf2-16.s,
	* testsuite/gas/elf/dwarf2-17.s,
	* testsuite/gas/elf/dwarf2-18.s,
	* testsuite/gas/elf/dwarf2-19.s: Double size of align and simulated
	instructions.
	* testsuite/gas/elf/dwarf2-1.d,
	* testsuite/gas/elf/dwarf2-2.d,
	* testsuite/gas/elf/dwarf2-5.d,
	* testsuite/gas/elf/dwarf2-7.d,
	* testsuite/gas/elf/dwarf2-8.d,
	* testsuite/gas/elf/dwarf2-9.d,
	* testsuite/gas/elf/dwarf2-10.d,
	* testsuite/gas/elf/dwarf2-11.d,
	* testsuite/gas/elf/dwarf2-12.d,
	* testsuite/gas/elf/dwarf2-13.d,
	* testsuite/gas/elf/dwarf2-14.d,
	* testsuite/gas/elf/dwarf2-15.d,
	* testsuite/gas/elf/dwarf2-16.d,
	* testsuite/gas/elf/dwarf2-17.d,
	* testsuite/gas/elf/dwarf2-18.d,
	* testsuite/gas/elf/dwarf2-19.d: Use xfail rather than notarget.
	Remove avr, pru, tile, xtensa from xfails.  Update expected output.
	* testsuite/gas/elf/elf.exp: Sort targets.
	(dump_opts): Pass {as -mno-relax} for riscv, {as -mno-link-relax}
	for avr and pru, and {as --no-link-relax} for xtensa to dwarf tests.
	* testsuite/gas/elf/section2.e-miwmmxt: Delete unused file.
This commit is contained in:
Alan Modra 2019-05-08 09:26:56 +09:30
parent 9632a526ca
commit 762172a4dc
35 changed files with 244 additions and 221 deletions

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@ -1,3 +1,44 @@
2019-05-08 Alan Modra <amodra@gmail.com>
* testsuite/gas/elf/dwarf2-1.s,
* testsuite/gas/elf/dwarf2-2.s,
* testsuite/gas/elf/dwarf2-5.s,
* testsuite/gas/elf/dwarf2-7.s,
* testsuite/gas/elf/dwarf2-8.s,
* testsuite/gas/elf/dwarf2-9.s,
* testsuite/gas/elf/dwarf2-10.s,
* testsuite/gas/elf/dwarf2-11.s,
* testsuite/gas/elf/dwarf2-12.s,
* testsuite/gas/elf/dwarf2-13.s,
* testsuite/gas/elf/dwarf2-14.s,
* testsuite/gas/elf/dwarf2-15.s,
* testsuite/gas/elf/dwarf2-16.s,
* testsuite/gas/elf/dwarf2-17.s,
* testsuite/gas/elf/dwarf2-18.s,
* testsuite/gas/elf/dwarf2-19.s: Double size of align and simulated
instructions.
* testsuite/gas/elf/dwarf2-1.d,
* testsuite/gas/elf/dwarf2-2.d,
* testsuite/gas/elf/dwarf2-5.d,
* testsuite/gas/elf/dwarf2-7.d,
* testsuite/gas/elf/dwarf2-8.d,
* testsuite/gas/elf/dwarf2-9.d,
* testsuite/gas/elf/dwarf2-10.d,
* testsuite/gas/elf/dwarf2-11.d,
* testsuite/gas/elf/dwarf2-12.d,
* testsuite/gas/elf/dwarf2-13.d,
* testsuite/gas/elf/dwarf2-14.d,
* testsuite/gas/elf/dwarf2-15.d,
* testsuite/gas/elf/dwarf2-16.d,
* testsuite/gas/elf/dwarf2-17.d,
* testsuite/gas/elf/dwarf2-18.d,
* testsuite/gas/elf/dwarf2-19.d: Use xfail rather than notarget.
Remove avr, pru, tile, xtensa from xfails. Update expected output.
* testsuite/gas/elf/elf.exp: Sort targets.
(dump_opts): Pass {as -mno-relax} for riscv, {as -mno-link-relax}
for avr and pru, and {as --no-link-relax} for xtensa to dwarf tests.
* testsuite/gas/elf/section2.e-miwmmxt: Delete unused file.
2019-05-08 Alan Modra <amodra@gmail.com>
* config/tc-xtensa.c (opt_linkrelax): New variable.

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@ -11,8 +11,8 @@ Contents of the .[z]?debug_info section:
Pointer Size: 4
<0><b>: Abbrev Number: 1 \(DW_TAG_compile_unit\)
<c> DW_AT_stmt_list : 0x0
<10> DW_AT_high_pc : 0x.
<14> DW_AT_low_pc : 0x.
<10> DW_AT_high_pc : 0x10
<14> DW_AT_low_pc : 0x8
<18> DW_AT_name : file1.txt
<22> DW_AT_producer : GNU C 3.3.3
<2e> DW_AT_language : 1 \(ANSI C\)
@ -22,8 +22,8 @@ Contents of the .[z]?debug_info section:
<32> DW_AT_decl_line : 2
<33> DW_AT_name : func_cu1
<3c> DW_AT_type : <0x4a>
<40> DW_AT_low_pc : 0x.
<44> DW_AT_high_pc : 0x.
<40> DW_AT_low_pc : 0x8
<44> DW_AT_high_pc : 0x10
<48> DW_AT_frame_base : 1 byte block: 55 \(DW_OP_reg5 \([^()]*\)\)
<1><4a>: Abbrev Number: 3 \(DW_TAG_base_type\)
<4b> DW_AT_name : int

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@ -21,13 +21,13 @@
.text
.globl _start
_start:
.int 0
.quad 0
.Lbegin_text1:
.globl func_cu1
.type func_cu1, %function
func_cu1:
.Lbegin_func_cu1:
.int 0
.quad 0
.Lend_func_cu1:
.size func_cu1, .-func_cu1
.Lend_text1:

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@ -2,5 +2,4 @@
#name: DWARF2 10
#error_output: dwarf2-10.l
# The mep target tries to relay code sections which breaks symbolic view computations.
# The tile targets require 8-byte instructions, but the test only simulates 4-byte instructions.
#notarget: mep-* tile*-*
#xfail: mep-*

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@ -17,16 +17,16 @@
.file "dwarf2-10.c"
.text
.balign 4
.balign 8
.globl _start
_start:
.file 1 "dwarf2-10.c"
.loc 1 1 view 0
.balign 4 /* No skip needed here... */
.balign 8 /* No skip needed here... */
.loc 1 2 view 0 /* so this zero-view check fails. */
.int 0
.quad 0
.loc 1 3 view 0
.balign 8 /* Skip 4 more bytes after .int... */
.balign 16 /* Skip 8 more bytes after .quad... */
.loc 1 4 view 0 /* so this is a zero view indeed. */
.int 0
.quad 0
.size _start, .-_start

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@ -1,15 +1,14 @@
#as:
#readelf: -wL
#name: DWARF2 11
# The am33 avr cr16 crx ft32 mn10 msp430 nds32 pru rl78 and xtensa targets do not evaluate the subtraction of symbols at assembly time.
# The am33 cr16 crx ft32 mn10 msp430 nds32 and rl78 targets do not evaluate the subtraction of symbols at assembly time.
# The riscv targets do not support the subtraction of symbols.
# The tile targets require 8-byte instructions, but the test only simulates 4-byte instructions.
#notarget: am3*-* avr-* cr16-* crx-* ft32*-* mn10*-* msp430-* nds32*-* pru-* riscv*-* rl78-* tile*-* xtensa-*
#xfail: am3*-* cr16-* crx-* ft32*-* mn10*-* msp430-* nds32*-* riscv*-* rl78-*
Contents of the \.debug_line section:
CU: dwarf2-11\.c:
File name *Line number *Starting address *View +Stmt
dwarf2-11\.c *1 *0x4 +x
dwarf2-11\.c *2 *0x8 +x
dwarf2-11\.c *2 *0x8 *1 +x
File name +Line number +Starting address +View +Stmt
dwarf2-11\.c +1 +0x8 +x
dwarf2-11\.c +2 +0x10 +x
dwarf2-11\.c +2 +0x10 +1 +x

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@ -17,12 +17,12 @@
.file "dwarf2-11.c"
.text
.balign 8
.balign 16
.globl _start
_start:
.file 1 "dwarf2-11.c"
.dc.l 0
.quad 0
.loc 1 1 view 0
.balign 8
.balign 16
.loc 1 2 view 0
.size _start, .-_start

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@ -1,11 +1,9 @@
#as:
#readelf: -x.rodata -wL
#name: DWARF2 12
# The am33 avr cr16 crx ft32 mn10 msp430 nds32 pru rl78 and xtensa targets do not evaluate the subtraction of symbols at assembly time.
# The am33 cr16 crx ft32 mn10 msp430 nds32 and rl78 targets do not evaluate the subtraction of symbols at assembly time.
# The riscv targets do not support the subtraction of symbols.
# The tile targets require 8-byte instructions, but the test only simulates 4-byte instructions.
#notarget: am3*-* avr-* cr16-* crx-* ft32-* mn10*-* msp430-* nds32*-* pru-* riscv*-* rl78-* tile*-* xtensa-*
#xfail: am3*-* cr16-* crx-* ft32-* mn10*-* msp430-* nds32*-* riscv*-* rl78-*
Hex dump of section '\.rodata':
0x00000000 01 *.*
@ -13,8 +11,8 @@ Hex dump of section '\.rodata':
Contents of the \.debug_line section:
CU: dwarf2-12\.c:
File name *Line number *Starting address *View +Stmt
dwarf2-12\.c *1 *0 +x
dwarf2-12\.c *2 *0 +x
dwarf2-12\.c *3 *0 *1 +x
dwarf2-12\.c *3 *0x4 +x
File name +Line number +Starting address +View +Stmt
dwarf2-12\.c +1 +0 +x
dwarf2-12\.c +2 +0 +x
dwarf2-12\.c +3 +0 +1 +x
dwarf2-12\.c +3 +0x8 +x

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@ -17,14 +17,14 @@
.file "dwarf2-12.c"
.text
.balign 4
.balign 8
.globl _start
_start:
.file 1 "dwarf2-12.c"
.loc 1 1 view 0
.loc 1 2 view -0
.loc 1 3 view .L1
.dc.l 0
.quad 0
.size _start, .-_start
.section .rodata

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@ -1,10 +1,9 @@
#as:
#readelf: -x.rodata -wL
#name: DWARF2 13
# The am33 avr cr16 crx ft32 mn10 msp430 nds32 pru rl78 and xtensa targets do not evaluate the subtraction of symbols at assembly time.
# The am33 cr16 crx ft32 mn10 msp430 nds32 and rl78 targets do not evaluate the subtraction of symbols at assembly time.
# The riscv targets do not support the subtraction of symbols.
# The tile targets require 8-byte instructions, but the test only simulates 4-byte instructions.
#notarget: am3*-* avr-* cr16-* crx-* ft32*-* mn10*-* msp430-* nds32*-* pru-* riscv*-* rl78-* tile*-* xtensa-*
#xfail: am3*-* cr16-* crx-* ft32*-* mn10*-* msp430-* nds32*-* riscv*-* rl78-*
Hex dump of section '\.rodata':
0x00000000 01 *.*
@ -12,8 +11,8 @@ Hex dump of section '\.rodata':
Contents of the \.debug_line section:
CU: dwarf2-13\.c:
File name *Line number *Starting address *View +Stmt
dwarf2-13\.c *1 *0x4 +x
dwarf2-13\.c *2 *0x8 +x
dwarf2-13\.c *3 *0x8 *1 +x
dwarf2-13\.c *3 *0xc +x
File name +Line number +Starting address +View +Stmt
dwarf2-13\.c +1 +0x8 +x
dwarf2-13\.c +2 +0x10 +x
dwarf2-13\.c +3 +0x10 +1 +x
dwarf2-13\.c +3 +0x18 +x

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@ -17,16 +17,16 @@
.file "dwarf2-13.c"
.text
.balign 8
.balign 16
.globl _start
_start:
.file 1 "dwarf2-13.c"
.dc.l 0
.quad 0
.loc 1 1 view 0
.balign 8
.balign 16
.loc 1 2 view -0
.loc 1 3 view .L1
.dc.l 0
.quad 0
.size _start, .-_start
.section .rodata

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@ -1,10 +1,9 @@
#as:
#readelf: -x.rodata -wL
#name: DWARF2 14
# The am33 avr cr16 crx mn10 ft32 msp430 nds32 pru rl78 and xtensa targets do not evaluate the subtraction of symbols at assembly time
# The am33 cr16 crx mn10 ft32 msp430 nds32 and rl78 targets do not evaluate the subtraction of symbols at assembly time
# The riscv targets do not support the subtraction of symbols.
# The tile targets require 8-byte instructions, but the test only simulates 4-byte instructions.
#notarget: am3*-* avr-* cr16-* crx-* ft32*-* mn10*-* msp430-* nds32*-* pru-* riscv*-* rl78-* tile*-* xtensa-*
#xfail: am3*-* cr16-* crx-* ft32*-* mn10*-* msp430-* nds32*-* riscv*-* rl78-*
Hex dump of section '\.rodata':
0x00000000 01 *.*
@ -12,8 +11,8 @@ Hex dump of section '\.rodata':
Contents of the \.debug_line section:
CU: dwarf2-14\.c:
File name *Line number *Starting address *View +Stmt
dwarf2-14\.c *1 *0 +x
dwarf2-14\.c *2 *0 +x
dwarf2-14\.c *3 *0 *1 +x
dwarf2-14\.c *3 *0x4 +x
File name +Line number +Starting address +View +Stmt
dwarf2-14\.c +1 +0 +x
dwarf2-14\.c +2 +0 +x
dwarf2-14\.c +3 +0 +1 +x
dwarf2-14\.c +3 +0x8 +x

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@ -17,15 +17,15 @@
.file "dwarf2-14.c"
.text
.balign 4
.balign 8
.globl _start
_start:
.file 1 "dwarf2-14.c"
.loc 1 1 view 0
.balign 4
.balign 8
.loc 1 2 view -0
.loc 1 3 view .L1
.dc.l 0
.quad 0
.size _start, .-_start
.section .rodata

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@ -1,10 +1,9 @@
#as:
#readelf: -x.rodata -wL
#name: DWARF2 15
# The am33 avr cr16 crx ft32 mn10 msp430 nds32 pru rl78 and xtensa targets do not evaluate the subtraction of symbols at assembly time.
# The am33 cr16 crx ft32 mn10 msp430 nds32 and rl78 targets do not evaluate the subtraction of symbols at assembly time.
# The riscv targets do not support the subtraction of symbols.
# The tile targets require 8-byte instructions, but the test only simulates 4-byte instructions.
#notarget: am3*-* avr-* cr16-* crx-* ft32*-* mn10*-* msp430-* nds32*-* pru-* riscv*-* rl78-* tile*-* xtensa-*
#xfail: am3*-* cr16-* crx-* ft32*-* mn10*-* msp430-* nds32*-* riscv*-* rl78-*
Hex dump of section '\.rodata':
0x00000000 01 *.*
@ -12,8 +11,8 @@ Hex dump of section '\.rodata':
Contents of the \.debug_line section:
CU: dwarf2-15\.c:
File name *Line number *Starting address *View +Stmt
dwarf2-15\.c *1 *0 +x
dwarf2-15\.c *2 *0x4 +x
dwarf2-15\.c *3 *0x4 *1 +x
dwarf2-15\.c *3 *0x8 +x
File name +Line number +Starting address +View +Stmt
dwarf2-15\.c +1 +0 +x
dwarf2-15\.c +2 +0x8 +x
dwarf2-15\.c +3 +0x8 +1 +x
dwarf2-15\.c +3 +0x10 +x

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@ -17,15 +17,15 @@
.file "dwarf2-15.c"
.text
.balign 8
.balign 16
.globl _start
_start:
.file 1 "dwarf2-15.c"
.loc 1 1 view 0
.dc.l 0
.quad 0
.loc 1 2 view -0
.loc 1 3 view .L1
.dc.l 0
.quad 0
.size _start, .-_start
.section .rodata

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@ -1,11 +1,10 @@
#as:
#readelf: -x.rodata -wL
#name: DWARF2 16
# The am33 avr cr16 crx ft32 mn10 msp430 nds32 pru rl78 and xtensa targets do not evaluate the subtraction of symbols at assembly time.
# The am33 cr16 crx ft32 mn10 msp430 nds32 and rl78 targets do not evaluate the subtraction of symbols at assembly time.
# The mep target tries to relay code sections which breaks symbolic view computations.
# The riscv targets do not support the subtraction of symbols.
# The tile targets require 8-byte instructions, but the test only simulates 4-byte instructions.
#notarget: am3*-* avr-* cr16-* crx-* ft32*-* mep-* mn10*-* msp430-* nds32*-* pru-* riscv*-* rl78-* tile*-* xtensa-*
#xfail: am3*-* cr16-* crx-* ft32*-* mep-* mn10*-* msp430-* nds32*-* riscv*-* rl78-*
Hex dump of section '\.rodata':
0x00000000 01 *.*
@ -13,8 +12,8 @@ Hex dump of section '\.rodata':
Contents of the \.debug_line section:
CU: dwarf2-16\.c:
File name *Line number *Starting address *View +Stmt
dwarf2-16\.c *1 *0 +x
dwarf2-16\.c *2 *0x4 +x
dwarf2-16\.c *3 *0x4 *1 +x
dwarf2-16\.c *3 *0x8 +x
File name +Line number +Starting address +View +Stmt
dwarf2-16\.c +1 +0 +x
dwarf2-16\.c +2 +0x8 +x
dwarf2-16\.c +3 +0x8 +1 +x
dwarf2-16\.c +3 +0x10 +x

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@ -17,16 +17,16 @@
.file "dwarf2-16.c"
.text
.balign 8
.balign 16
.globl _start
_start:
.file 1 "dwarf2-16.c"
.loc 1 1 view 0
.dc.l 0
.quad 0
.loc 1 2 view 0
.balign 4
.balign 8
.loc 1 3 view .L1
.dc.l 0
.quad 0
.size _start, .-_start
.section .rodata

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@ -1,11 +1,10 @@
#as:
#readelf: -x.rodata -wL
#name: DWARF2 17
# The am33 avr cr16 crx ft32 mn10 msp430 nds32 pru rl78 and xtensa targets do not evaluate the subtraction of symbols at assembly time.
# The am33 cr16 crx ft32 mn10 msp430 nds32 and rl78 targets do not evaluate the subtraction of symbols at assembly time.
# The mep target tries to relay code sections which breaks symbolic view computations.
# The riscv targets do not support the subtraction of symbols.
# The tile targets require 8-byte instructions, but the test only simulates 4-byte instructions.
#notarget: am3*-* avr-* cr16-* crx-* ft32*-* mep-* mn10*-* msp430-* nds32*-* pru-* riscv*-* rl78-* tile*-* xtensa-*
#xfail: am3*-* cr16-* crx-* ft32*-* mep-* mn10*-* msp430-* nds32*-* riscv*-* rl78-*
Hex dump of section '\.rodata':
0x00000000 00 *.*
@ -13,8 +12,8 @@ Hex dump of section '\.rodata':
Contents of the \.debug_line section:
CU: dwarf2-17\.c:
File name *Line number *Starting address *View +Stmt
dwarf2-17\.c *1 *0 +x
dwarf2-17\.c *2 *0x4 +x
dwarf2-17\.c *3 *0x8 +x
dwarf2-17\.c *3 *0xc +x
File name +Line number +Starting address +View +Stmt
dwarf2-17\.c +1 +0 +x
dwarf2-17\.c +2 +0x8 +x
dwarf2-17\.c +3 +0x10 +x
dwarf2-17\.c +3 +0x18 +x

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@ -17,16 +17,16 @@
.file "dwarf2-17.c"
.text
.balign 8
.balign 16
.globl _start
_start:
.file 1 "dwarf2-17.c"
.loc 1 1 view 0
.dc.l 0
.quad 0
.loc 1 2 view 0
.balign 8
.balign 16
.loc 1 3 view .L1
.dc.l 0
.quad 0
.size _start, .-_start
.section .rodata

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@ -1,11 +1,10 @@
#as:
#readelf: -x.rodata -wL
#name: DWARF2 18
# The am33 avr cr16 crx ft32 mn10 msp430 nds32 pru rl78 and xtensa targets do not evaluate the subtraction of symbols at assembly time.
# The am33 cr16 crx ft32 mn10 msp430 nds32 and rl78 targets do not evaluate the subtraction of symbols at assembly time.
# The mep targets turns some view computations into complex relocations.
# The riscv targets do not support the subtraction of symbols.
# The tile targets require 8-byte instructions, but the test only simulates 4-byte instructions.
#notarget: am3*-* avr-* cr16-* crx-* ft32*-* mep-* mn10*-* msp430-* nds32*-* pru-* riscv*-* rl78-* tile*-* xtensa-*
#xfail: am3*-* cr16-* crx-* ft32*-* mep-* mn10*-* msp430-* nds32*-* riscv*-* rl78-*
Hex dump of section '\.rodata':
0x00000000 0100 *.*
@ -13,8 +12,8 @@ Hex dump of section '\.rodata':
Contents of the \.debug_line section:
CU: dwarf2-18\.c:
File name *Line number *Starting address *View +Stmt
dwarf2-18\.c *1 *0 +x
dwarf2-18\.c *2 *0 *1 +x
dwarf2-18\.c *3 *0x4 +x
dwarf2-18\.c *3 *0x8 +x
File name +Line number +Starting address +View +Stmt
dwarf2-18\.c +1 +0 +x
dwarf2-18\.c +2 +0 +1 +x
dwarf2-18\.c +3 +0x8 +x
dwarf2-18\.c +3 +0x10 +x

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@ -17,15 +17,15 @@
.file "dwarf2-18.c"
.text
.balign 8
.balign 16
.globl _start
_start:
.file 1 "dwarf2-18.c"
.loc 1 1
.loc 1 2 view .L1
.dc.l 0
.quad 0
.loc 1 3 view .L2
.dc.l 0
.quad 0
.size _start, .-_start
.section .rodata

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@ -1,11 +1,10 @@
#as:
#readelf: -x.rodata -wL
#name: DWARF2 19
# The am33 avr cr16 crx ft32 mn10 msp430 nds32 pru rl78 and xtensa targets do not evaluate the subtraction of symbols at assembly time.
# The am33 cr16 crx ft32 mn10 msp430 nds32 and rl78 targets do not evaluate the subtraction of symbols at assembly time.
# The mep targets turns some view computations into complex relocations.
# The riscv targets do not support the subtraction of symbols.
# The tile targets require 8-byte instructions, but the test only simulates 4-byte instructions.
#notarget: am3*-* avr-* cr16-* crx-* ft32*-* mep-* mn10*-* msp430-* nds32*-* pru-* riscv*-* rl78-* tile*-* xtensa-*
#xfail: am3*-* cr16-* crx-* ft32*-* mep-* mn10*-* msp430-* nds32*-* riscv*-* rl78-*
Hex dump of section '\.rodata':
0x00000000 01000102 *.*
@ -13,10 +12,10 @@ Hex dump of section '\.rodata':
Contents of the \.debug_line section:
CU: dwarf2-19\.c:
File name *Line number *Starting address *View +Stmt
dwarf2-19\.c *1 *0 +x
dwarf2-19\.c *2 *0 *1 +x
dwarf2-19\.c *4 *0x4 +x
dwarf2-19\.c *5 *0x4 *1 +x
dwarf2-19\.c *3 *0x4 *2 +x
dwarf2-19\.c *3 *0x4 *3 +x
File name +Line number +Starting address +View +Stmt
dwarf2-19\.c +1 +0 +x
dwarf2-19\.c +2 +0 +1 +x
dwarf2-19\.c +4 +0x8 +x
dwarf2-19\.c +5 +0x8 +1 +x
dwarf2-19\.c +3 +0x8 +2 +x
dwarf2-19\.c +3 +0x8 +3 +x

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@ -17,7 +17,7 @@
.file "dwarf2-19.c"
.text 0
.balign 4
.balign 8
.globl _start
_start:
.file 1 "dwarf2-19.c"
@ -36,6 +36,6 @@ _start:
.loc 1 3 view .L2 /* same address as .L4 below -> view 2 */
.text 1
.dc.l 0
.quad 0
.loc 1 4 view .L3 /* bumped address from .L1's, view 0 */
.loc 1 5 view .L4 /* same address, view 1 */

View File

@ -11,8 +11,8 @@ Contents of the .[z]?debug_info section:
Pointer Size: 4
<0><b>: Abbrev Number: 1 \(DW_TAG_compile_unit\)
<c> DW_AT_stmt_list : 0x0
<10> DW_AT_high_pc : 0x.
<14> DW_AT_low_pc : 0x.
<10> DW_AT_high_pc : 0x10
<14> DW_AT_low_pc : 0x8
<18> DW_AT_name : file1.txt
<22> DW_AT_producer : GNU C 3.3.3
<2e> DW_AT_language : 1 \(ANSI C\)
@ -22,8 +22,8 @@ Contents of the .[z]?debug_info section:
<32> DW_AT_decl_line : 2
<33> DW_AT_name : func_cu1
<3c> DW_AT_type : <0x4a>
<40> DW_AT_low_pc : 0x.
<44> DW_AT_high_pc : 0x.
<40> DW_AT_low_pc : 0x8
<44> DW_AT_high_pc : 0x10
<48> DW_AT_frame_base : 1 byte block: 55 \(DW_OP_reg5 \([^()]*\)\)
<1><4a>: Abbrev Number: 3 \(DW_TAG_base_type\)
<4b> DW_AT_name : int

View File

@ -21,13 +21,13 @@
.section .gnu.linkonce.t.foo,"axG",%progbits,foo,comdat
.globl _start
_start:
.int 0
.quad 0
.Lbegin_text1:
.globl func_cu1
.type func_cu1, %function
func_cu1:
.Lbegin_func_cu1:
.int 0
.quad 0
.Lend_func_cu1:
.size func_cu1, .-func_cu1
.Lend_text1:

View File

@ -1,11 +1,10 @@
#as:
#readelf: -x.rodata -wlL
#name: DWARF2 5
# The am33 avr cr16 crx ft32 mn10 msp430 nds32 pru rl78 rx and xtensa targets do not evaluate the subtraction of symbols at assembly time.
# The am33 cr16 crx ft32 mn10 msp430 nds32 rl78 and rx targets do not evaluate the subtraction of symbols at assembly time.
# The mep target tries to relay code sections which breaks symbolic view computations.
# The riscv targets do not support the subtraction of symbols.
# The tile targets require 8-byte instructions, but the test only simulates 4-byte instructions.
#notarget: am3*-* avr-* cr16-* crx-* ft32*-* mep-* mn10*-* msp430-* nds32*-* pru-* riscv*-* rl78-* rx-* tile*-* xtensa-*
#xfail: am3*-* cr16-* crx-* ft32*-* mep-* mn10*-* msp430-* nds32*-* riscv*-* rl78-* rx-*
Hex dump of section '\.rodata':
0x00000000 01010201 010203 *.*
@ -46,34 +45,34 @@ Raw dump of debug contents of section \.debug_line:
\[0x.*\] Extended opcode 2: set Address to 0x0
\[0x.*\] Copy
\[0x.*\] Special opcode [0-9]*: advance Address by 0 to 0x0 and Line by 1 to 2 \(view 1\)
\[0x.*\] Special opcode [0-9]*: advance Address by 4 to 0x4 and Line by 1 to 3
\[0x.*\] Special opcode [0-9]*: advance Address by 0 to 0x4 and Line by 1 to 4 \(view 1\)
\[0x.*\] Special opcode [0-9]*: advance Address by 0 to 0x4 and Line by 1 to 5 \(view 2\)
\[0x.*\] Special opcode [0-9]*: advance Address by 4 to 0x8 and Line by 1 to 6
\[0x.*\] Special opcode [0-9]*: advance Address by 4 to 0xc and Line by 1 to 7
\[0x.*\] Special opcode [0-9]*: advance Address by 0 to 0xc and Line by 1 to 8 \(view 1\)
\[0x.*\] Special opcode [0-9]*: advance Address by 4 to 0x10 and Line by 1 to 9
\[0x.*\] Special opcode [0-9]*: advance Address by 0 to 0x10 and Line by 1 to 10 \(view 1\)
\[0x.*\] Special opcode [0-9]*: advance Address by 0 to 0x10 and Line by 1 to 11 \(view 2\)
\[0x.*\] Special opcode [0-9]*: advance Address by 0 to 0x10 and Line by 1 to 12 \(view 3\)
\[0x.*\] Advance PC by 4 to 0x14
\[0x.*\] Special opcode [0-9]*: advance Address by 8 to 0x8 and Line by 1 to 3
\[0x.*\] Special opcode [0-9]*: advance Address by 0 to 0x8 and Line by 1 to 4 \(view 1\)
\[0x.*\] Special opcode [0-9]*: advance Address by 0 to 0x8 and Line by 1 to 5 \(view 2\)
\[0x.*\] Special opcode [0-9]*: advance Address by 8 to 0x10 and Line by 1 to 6
\[0x.*\] Special opcode [0-9]*: advance Address by 8 to 0x18 and Line by 1 to 7
\[0x.*\] Special opcode [0-9]*: advance Address by 0 to 0x18 and Line by 1 to 8 \(view 1\)
\[0x.*\] Special opcode [0-9]*: advance Address by 8 to 0x20 and Line by 1 to 9
\[0x.*\] Special opcode [0-9]*: advance Address by 0 to 0x20 and Line by 1 to 10 \(view 1\)
\[0x.*\] Special opcode [0-9]*: advance Address by 0 to 0x20 and Line by 1 to 11 \(view 2\)
\[0x.*\] Special opcode [0-9]*: advance Address by 0 to 0x20 and Line by 1 to 12 \(view 3\)
\[0x.*\] Advance PC by 8 to 0x28
\[0x.*\] Extended opcode 1: End of Sequence
Contents of the \.debug_line section:
CU: dwarf2-5\.c:
File name *Line number *Starting address *View +Stmt
dwarf2-5\.c *1 *0 +x
dwarf2-5\.c *2 *0 *1 +x
dwarf2-5\.c *3 *0x4 +x
dwarf2-5\.c *4 *0x4 *1 +x
dwarf2-5\.c *5 *0x4 *2 +x
dwarf2-5\.c *6 *0x8 +x
dwarf2-5\.c *7 *0xc +x
dwarf2-5\.c *8 *0xc *1 +x
dwarf2-5\.c *9 *0x10 +x
dwarf2-5\.c *10 *0x10 *1 +x
dwarf2-5\.c *11 *0x10 *2 +x
dwarf2-5\.c *12 *0x10 *3 +x
dwarf2-5\.c *12 *0x14 +x
File name +Line number +Starting address +View +Stmt
dwarf2-5\.c +1 +0 +x
dwarf2-5\.c +2 +0 +1 +x
dwarf2-5\.c +3 +0x8 +x
dwarf2-5\.c +4 +0x8 +1 +x
dwarf2-5\.c +5 +0x8 +2 +x
dwarf2-5\.c +6 +0x10 +x
dwarf2-5\.c +7 +0x18 +x
dwarf2-5\.c +8 +0x18 +1 +x
dwarf2-5\.c +9 +0x20 +x
dwarf2-5\.c +10 +0x20 +1 +x
dwarf2-5\.c +11 +0x20 +2 +x
dwarf2-5\.c +12 +0x20 +3 +x
dwarf2-5\.c +12 +0x28 +x

View File

@ -17,35 +17,35 @@
.file "dwarf2-5.c"
.text
.balign 4
.balign 8
.globl _start
_start:
.file 1 "dwarf2-5.c"
.loc 1 1 view 0
.loc 1 2 view .L2
.dc.l 0
.quad 0
.loc 1 3 view 0
.balign 4
.balign 8
.loc 1 4 view .L4
.loc 1 5 view .L5
.org .+1
.balign 4
.balign 8
.loc 1 6 view 0
.dc.l 0
.quad 0
.text
.globl func
.type func, %function
func:
.loc 1 7 view 0
.loc 1 8 view .L8
.dc.l 0
.quad 0
.loc 1 9 view 0
.loc 1 10 view .L10
.pushsection .text
.loc 1 11 view .L11
.popsection
.loc 1 12 view .L12
.dc.l 0
.quad 0
.size func, .-func
.section .rodata

View File

@ -1,10 +1,9 @@
#as:
#readelf: -x.rodata -wL
#name: DWARF2 7
# The am33 avr cr16 crx ft32 mn10 msp430 nds32 pru rl78 and xtensa targets do not evaluate the subtraction of symbols at assembly time.
# The am33 cr16 crx ft32 mn10 msp430 nds32 and rl78 targets do not evaluate the subtraction of symbols at assembly time.
# The riscv targets do not support the subtraction of symbols.
# The tile targets require 8-byte instructions, but the test only simulates 4-byte instructions.
#notarget: am3*-* avr-* cr16-* crx-* ft32*-* mn10*-* msp430-* nds32*-* pru-* riscv*-* rl78-* tile*-* xtensa-*
#xfail: am3*-* cr16-* crx-* ft32*-* mn10*-* msp430-* nds32*-* riscv*-* rl78-*
Hex dump of section '\.rodata':
0x00000000 01 *.*
@ -12,8 +11,8 @@ Hex dump of section '\.rodata':
Contents of the \.debug_line section:
CU: dwarf2-7\.c:
File name *Line number *Starting address *View +Stmt
dwarf2-7\.c *1 *0 +x
dwarf2-7\.c *2 *0 +x
dwarf2-7\.c *3 *0 *1 +x
dwarf2-7\.c *3 *0x. +x
File name +Line number +Starting address +View +Stmt
dwarf2-7\.c +1 +0 +x
dwarf2-7\.c +2 +0 +x
dwarf2-7\.c +3 +0 +1 +x
dwarf2-7\.c +3 +0x8 +x

View File

@ -17,7 +17,7 @@
.file "dwarf2-7.c"
.text
.balign 4
.balign 8
.globl _start
_start:
.file 1 "dwarf2-7.c"
@ -32,5 +32,5 @@ _start:
func:
.loc 1 2 view -0
.loc 1 3 view .L1
.dc.l 0
.quad 0
.size func, .-func

View File

@ -1,5 +1,3 @@
#as:
#name: DWARF2 8
#error_output: dwarf2-8.l
# The tile targets require 8-byte instructions, but the test only simulates 4-byte instructions.
#notarget: tile*-*

View File

@ -23,5 +23,5 @@ _start:
.file 1 "dwarf2-8.c"
.loc 1 1 view 0
.loc 1 2 view 0
.int 0
.quad 0
.size _start, .-_start

View File

@ -1,5 +1,3 @@
#as:
#name: DWARF2 9
#error_output: dwarf2-9.l
# The tile targets require 8-byte instructions, but the test only simulates 4-byte instructions.
#notarget: tile*-*

View File

@ -28,5 +28,5 @@ _start:
.text
.loc 1 2 view 0
.int 0
.quad 0
.size _start, .-_start

View File

@ -55,41 +55,50 @@ proc run_elf_list_test { name suffix opts readelf_opts readelf_pipe } {
# We're testing bits in obj-elf -- don't run on anything else.
if { [is_elf_format] } then {
set target_machine ""
set dump_opts ""
if {[istarget "arc*-*-*"]} {
set target_machine -arc
}
if {[istarget "arm*-*-*"]} {
set target_machine -arm
}
if {[istarget "avr*-*-*"]} {
set dump_opts {{as -mno-link-relax}}
}
if {[istarget "m32r*-*-*"]} then {
set target_machine -m32r
}
if {[istarget "mips*-*-*"]} then {
set target_machine -mips
}
if {[istarget m32r*-*-*]} then {
set target_machine -m32r
}
if {[istarget "msp430-*-*"]} then {
set target_machine -msp430
}
if {[istarget "pru-*-*"]} {
set dump_opts {{as -mno-link-relax}}
}
if {[istarget "riscv*-*-*"]} then {
set target_machine -riscv
set dump_opts {{as -mno-relax}}
}
if {[istarget "rl78-*-*"]} then {
set target_machine -rl78
}
if {[istarget "rx-*-*"]} then {
set target_machine -rx
}
if {[istarget "score-*-*"]} then {
set target_machine -score
}
if {[istarget "tic6x-*-*"]} then {
set target_machine -tic6x
}
if {[istarget "xtensa*-*-*"]} then {
set target_machine -xtensa
}
if {[istarget "rx-*-*"]} then {
set target_machine -rx
}
if {[istarget "riscv*-*-*"]} then {
set target_machine -riscv
}
if {[istarget "v850*-*-*"]} then {
set target_machine -v850
}
if {[istarget "rl78-*-*"]} then {
set target_machine -rl78
}
if {[istarget "arm*-*-*"]} {
set target_machine -arm
}
if {[istarget "arc*-*-*"]} {
set target_machine -arc
if {[istarget "xtensa*-*-*"]} then {
set target_machine -xtensa
set dump_opts {{as --no-link-relax}}
}
# The MN10300 and Xtensa ports disable the assembler's call frame
@ -233,25 +242,25 @@ if { [is_elf_format] } then {
run_dump_test "section12b"
run_dump_test "section13"
run_dump_test "section14"
run_dump_test "dwarf2-1"
run_dump_test "dwarf2-2"
run_dump_test "dwarf2-3"
run_dump_test "dwarf2-4"
run_dump_test "dwarf2-5"
run_dump_test "dwarf2-6"
run_dump_test "dwarf2-7"
run_dump_test "dwarf2-8"
run_dump_test "dwarf2-9"
run_dump_test "dwarf2-10"
run_dump_test "dwarf2-11"
run_dump_test "dwarf2-12"
run_dump_test "dwarf2-13"
run_dump_test "dwarf2-14"
run_dump_test "dwarf2-15"
run_dump_test "dwarf2-16"
run_dump_test "dwarf2-17"
run_dump_test "dwarf2-18"
run_dump_test "dwarf2-19"
run_dump_test "dwarf2-1" $dump_opts
run_dump_test "dwarf2-2" $dump_opts
run_dump_test "dwarf2-3" $dump_opts
run_dump_test "dwarf2-4" $dump_opts
run_dump_test "dwarf2-5" $dump_opts
run_dump_test "dwarf2-6" $dump_opts
run_dump_test "dwarf2-7" $dump_opts
run_dump_test "dwarf2-8" $dump_opts
run_dump_test "dwarf2-9" $dump_opts
run_dump_test "dwarf2-10" $dump_opts
run_dump_test "dwarf2-11" $dump_opts
run_dump_test "dwarf2-12" $dump_opts
run_dump_test "dwarf2-13" $dump_opts
run_dump_test "dwarf2-14" $dump_opts
run_dump_test "dwarf2-15" $dump_opts
run_dump_test "dwarf2-16" $dump_opts
run_dump_test "dwarf2-17" $dump_opts
run_dump_test "dwarf2-18" $dump_opts
run_dump_test "dwarf2-19" $dump_opts
run_dump_test "bss"
run_dump_test "bad-bss"
run_dump_test "bad-section-flag"

View File

@ -1,10 +0,0 @@
Symbol table '.symtab' contains 6 entries:
+Num: +Value +Size +Type +Bind +Vis +Ndx +Name
+0: 0+0 +0 +NOTYPE +LOCAL +DEFAULT +UND
+1: 0+0 +0 +SECTION +LOCAL +DEFAULT +1
+2: 0+0 +0 +SECTION +LOCAL +DEFAULT +2
+3: 0+0 +0 +SECTION +LOCAL +DEFAULT +3
+4: 0+0 +0 +SECTION +LOCAL +DEFAULT +5
+5: 0+0 +0 +SECTION +LOCAL +DEFAULT +4