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Add SIGRIE instruction for MIPS R6

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opcodes/

	* mips-opc.c (mips_builtin_opcodes): Add "sigrie".

gas/testsuite/

	* gas/mips/r6.s: Add tests for "sigrie".
	* gas/mips/r6.d: Check for "sigrie".
	* gas/mips/r6-n32.d: Likewise.
	* gas/mips/r6-n64.d: Likewise.
This commit is contained in:
Robert Suchanek 2015-08-10 08:57:31 +01:00
parent 2bc6d61bf3
commit 75fb7498c2
7 changed files with 21 additions and 0 deletions
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7
gas/testsuite/ChangeLog
View File

@ -1,3 +1,10 @@
2015-08-10 Robert Suchanek <robert.suchanek@imgtec.com>
* gas/mips/r6.s: Add tests for "sigrie".
* gas/mips/r6.d: Check for "sigrie".
* gas/mips/r6-n32.d: Likewise.
* gas/mips/r6-n64.d: Likewise.
2015-07-30 H.J. Lu <hongjiu.lu@intel.com>
PR binutils/13571

2
gas/testsuite/gas/mips/r6-n32.d
View File

@ -497,4 +497,6 @@ Disassembly of section .text:
0+0598 <[^>]*> 41600024 dvp
0+059c <[^>]*> 41620004 evp v0
0+05a0 <[^>]*> 41620024 dvp v0
0+05a4 <[^>]*> 41700000 sigrie 0x0
0+05a8 <[^>]*> 4170ffff sigrie 0xffff
\.\.\.

2
gas/testsuite/gas/mips/r6-n64.d
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@ -753,4 +753,6 @@ Disassembly of section .text:
0+0598 <[^>]*> 41600024 dvp
0+059c <[^>]*> 41620004 evp v0
0+05a0 <[^>]*> 41620024 dvp v0
0+05a4 <[^>]*> 41700000 sigrie 0x0
0+05a8 <[^>]*> 4170ffff sigrie 0xffff
\.\.\.

2
gas/testsuite/gas/mips/r6.d
View File

@ -496,4 +496,6 @@ Disassembly of section .text:
0+0598 <[^>]*> 41600024 dvp
0+059c <[^>]*> 41620004 evp v0
0+05a0 <[^>]*> 41620024 dvp v0
0+05a4 <[^>]*> 41700000 sigrie 0x0
0+05a8 <[^>]*> 4170ffff sigrie 0xffff
\.\.\.

3
gas/testsuite/gas/mips/r6.s
View File

@ -266,6 +266,9 @@ new: maddf.s $f0,$f1,$f2
evp $2
dvp $2
sigrie 0
sigrie 0xffff
# Force at least 8 (non-delay-slot) zero bytes, to make 'objdump' print ...
.align 2
.space 8

4
opcodes/ChangeLog
View File

@ -1,3 +1,7 @@
2015-08-10 Robert Suchanek <robert.suchanek@imgtec.com>
* mips-opc.c (mips_builtin_opcodes): Add "sigrie".
2015-08-07 Amit Pawar <Amit.Pawar@amd.com>
* i386-gen.c: Remove CpuFMA4 from CPU_ZNVER1_FLAGS.

1
opcodes/mips-opc.c
View File

@ -1858,6 +1858,7 @@ const struct mips_opcode mips_builtin_opcodes[] =
{"shfl.repa.qh", "X,Y,Z", 0x7b20001f, 0xffe0003f, WR_1|RD_2|RD_3|FP_D, 0, 0, MX, 0 },
{"shfl.repb.qh", "X,Y,Z", 0x7ba0001f, 0xffe0003f, WR_1|RD_2|RD_3|FP_D, 0, 0, MX, 0 },
{"shfl.upsl.ob", "X,Y,Z", 0x78c0001f, 0xffe0003f, WR_1|RD_2|RD_3|FP_D, 0, SB1, MX, 0 },
{"sigrie", "u", 0x41700000, 0xffff0000, TRAP, 0, I37, 0, 0 },
{"sle", "d,v,t", 0, (int) M_SLE, INSN_MACRO, 0, I1, 0, 0 },
{"sle", "d,v,I", 0, (int) M_SLE_I, INSN_MACRO, 0, I1, 0, 0 },
{"sle", "S,T", 0x46a0003e, 0xffe007ff, RD_1|RD_2|WR_CC|FP_D, 0, IL2E, 0, 0 },