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Use CORE_ADDR_MAX in various "breaks" arrays
Code like this: CORE_ADDR breaks[2] = {-1, -1}; ... gives a warning with -Wnarrowing. This patch changes all instances of this to use CORE_ADDR_MAX instead. gdb/ChangeLog 2018-08-27 Tom Tromey <tom@tromey.com> * rs6000-tdep.c (ppc_deal_with_atomic_sequence): Use CORE_ADDR_MAX. * mips-tdep.c (mips_deal_with_atomic_sequence) (micromips_deal_with_atomic_sequence): Use CORE_ADDR_MAX. * arch/arm-get-next-pcs.c (thumb_deal_with_atomic_sequence_raw) (arm_deal_with_atomic_sequence_raw): Use CORE_ADDR_MAX. * alpha-tdep.c (alpha_deal_with_atomic_sequence): Use CORE_ADDR_MAX. * aarch64-tdep.c (aarch64_software_single_step): Use CORE_ADDR_MAX.
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@ -1,3 +1,16 @@
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2018-08-27 Tom Tromey <tom@tromey.com>
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* rs6000-tdep.c (ppc_deal_with_atomic_sequence): Use
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CORE_ADDR_MAX.
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* mips-tdep.c (mips_deal_with_atomic_sequence)
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(micromips_deal_with_atomic_sequence): Use CORE_ADDR_MAX.
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* arch/arm-get-next-pcs.c (thumb_deal_with_atomic_sequence_raw)
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(arm_deal_with_atomic_sequence_raw): Use CORE_ADDR_MAX.
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* alpha-tdep.c (alpha_deal_with_atomic_sequence): Use
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CORE_ADDR_MAX.
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* aarch64-tdep.c (aarch64_software_single_step): Use
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CORE_ADDR_MAX.
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2018-08-27 Tom Tromey <tom@tromey.com>
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* linespec.c (complete_linespec_component): Add cast to "char".
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@ -2472,7 +2472,7 @@ aarch64_software_single_step (struct regcache *regcache)
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const int insn_size = 4;
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const int atomic_sequence_length = 16; /* Instruction sequence length. */
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CORE_ADDR pc = regcache_read_pc (regcache);
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CORE_ADDR breaks[2] = { -1, -1 };
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CORE_ADDR breaks[2] = { CORE_ADDR_MAX, CORE_ADDR_MAX };
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CORE_ADDR loc = pc;
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CORE_ADDR closing_insn = 0;
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uint32_t insn = read_memory_unsigned_integer (loc, insn_size,
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@ -767,7 +767,7 @@ static const int stq_c_opcode = 0x2f;
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static std::vector<CORE_ADDR>
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alpha_deal_with_atomic_sequence (struct gdbarch *gdbarch, CORE_ADDR pc)
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{
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CORE_ADDR breaks[2] = {-1, -1};
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CORE_ADDR breaks[2] = {CORE_ADDR_MAX, CORE_ADDR_MAX};
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CORE_ADDR loc = pc;
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CORE_ADDR closing_insn; /* Instruction that closes the atomic sequence. */
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unsigned int insn = alpha_read_insn (gdbarch, loc);
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@ -49,7 +49,7 @@ static std::vector<CORE_ADDR>
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thumb_deal_with_atomic_sequence_raw (struct arm_get_next_pcs *self)
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{
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int byte_order_for_code = self->byte_order_for_code;
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CORE_ADDR breaks[2] = {-1, -1};
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CORE_ADDR breaks[2] = {CORE_ADDR_MAX, CORE_ADDR_MAX};
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CORE_ADDR pc = regcache_read_pc (self->regcache);
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CORE_ADDR loc = pc;
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unsigned short insn1, insn2;
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@ -187,7 +187,7 @@ static std::vector<CORE_ADDR>
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arm_deal_with_atomic_sequence_raw (struct arm_get_next_pcs *self)
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{
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int byte_order_for_code = self->byte_order_for_code;
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CORE_ADDR breaks[2] = {-1, -1};
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CORE_ADDR breaks[2] = {CORE_ADDR_MAX, CORE_ADDR_MAX};
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CORE_ADDR pc = regcache_read_pc (self->regcache);
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CORE_ADDR loc = pc;
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unsigned int insn;
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@ -3910,7 +3910,7 @@ mips_addr_bits_remove (struct gdbarch *gdbarch, CORE_ADDR addr)
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static std::vector<CORE_ADDR>
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mips_deal_with_atomic_sequence (struct gdbarch *gdbarch, CORE_ADDR pc)
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{
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CORE_ADDR breaks[2] = {-1, -1};
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CORE_ADDR breaks[2] = {CORE_ADDR_MAX, CORE_ADDR_MAX};
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CORE_ADDR loc = pc;
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CORE_ADDR branch_bp; /* Breakpoint at branch instruction's destination. */
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ULONGEST insn;
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@ -4013,7 +4013,7 @@ micromips_deal_with_atomic_sequence (struct gdbarch *gdbarch,
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{
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const int atomic_sequence_length = 16; /* Instruction sequence length. */
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int last_breakpoint = 0; /* Defaults to 0 (no breakpoints placed). */
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CORE_ADDR breaks[2] = {-1, -1};
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CORE_ADDR breaks[2] = {CORE_ADDR_MAX, CORE_ADDR_MAX};
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CORE_ADDR branch_bp = 0; /* Breakpoint at branch instruction's
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destination. */
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CORE_ADDR loc = pc;
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@ -989,7 +989,7 @@ ppc_deal_with_atomic_sequence (struct regcache *regcache)
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struct gdbarch *gdbarch = regcache->arch ();
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enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
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CORE_ADDR pc = regcache_read_pc (regcache);
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CORE_ADDR breaks[2] = {-1, -1};
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CORE_ADDR breaks[2] = {CORE_ADDR_MAX, CORE_ADDR_MAX};
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CORE_ADDR loc = pc;
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CORE_ADDR closing_insn; /* Instruction that closes the atomic sequence. */
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int insn = read_memory_integer (loc, PPC_INSN_SIZE, byte_order);
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