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https://sourceware.org/git/binutils-gdb.git
synced 2024-12-26 10:43:31 +08:00
Update list of ELF machine numbers.
include * elf/common.h (DT_SYMTAB_SHNDX): Define. (EM_CLOUDSHIELD, EM_COREA_1ST, EM_COREA_2ND, EM_OPEN8): Define. (EM_VIDEOCORE5, EM_56800EX, EM_BA1, EM_BA2, EM_XCORE): Define. (EM_MCHP_PIC, EM_KM32, EM_KMX32, EM_KMX16, EM_KMX8): Define. (EM_KVARC, EM_CDP, EM_COGE, EM_COOL, EM_NORC): Define. (EM_CSR_KALIMBA, EM_Z80, EM_AMDGPU, EM_RISCV): Define. (ELFOSABI_OPENVOS): Define. (GRP_MASKOS, GRP_MASKPROC): Define. binutils * readelf.c (get_dynamic_type): Add DT_SYMTAB_SHNDX. (get_machine_type): Add EM_CLOUDSHIELD, EM_COREA_1ST, EM_COREA_2ND, EM_OPEN8, EM_VIDEOCORE5, EM_56800EX, EM_BA1, EM_BA2, EM_XCORE, EM_MCHP_PIC, EM_KM32, EM_KMX32, EM_KMX16, EM_KMX8, EM_KVARC, EM_CDP, EM_COGE, EM_COOL, EM_NORC, EM_CSR_KALIMBA, EM_Z80, EM_AMDGPU, EM_RISCV. (get_osabi_name): Add ELFOSABI_CLOUDABI and ELFOSABI_OPENVS. (get_group_flags): Update to handle flags in the GRP_MASKOS and GRP_MASKPROC ranges.
This commit is contained in:
Nick Clifton
parent
41f225defe
commit
6d91379408
@ -1,3 +1,15 @@
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2016-10-17 Nick Clifton <nickc@redhat.com>
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* readelf.c (get_dynamic_type): Add DT_SYMTAB_SHNDX.
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(get_machine_type): Add EM_CLOUDSHIELD, EM_COREA_1ST,
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EM_COREA_2ND, EM_OPEN8, EM_VIDEOCORE5, EM_56800EX, EM_BA1, EM_BA2,
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EM_XCORE, EM_MCHP_PIC, EM_KM32, EM_KMX32, EM_KMX16, EM_KMX8,
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EM_KVARC, EM_CDP, EM_COGE, EM_COOL, EM_NORC, EM_CSR_KALIMBA,
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EM_Z80, EM_AMDGPU, EM_RISCV.
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(get_osabi_name): Add ELFOSABI_CLOUDABI and ELFOSABI_OPENVS.
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(get_group_flags): Update to handle flags in the
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GRP_MASKOS and GRP_MASKPROC ranges.
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2016-10-14 Luis Machado <lgustavo@codesourcery.com>
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* testsuite/lib/utils-lib.exp (run_dump_test): Call remote_download
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@ -2011,6 +2011,7 @@ get_dynamic_type (unsigned long type)
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case DT_PREINIT_ARRAY: return "PREINIT_ARRAY";
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case DT_PREINIT_ARRAYSZ: return "PREINIT_ARRAYSZ";
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case DT_SYMTAB_SHNDX: return "SYMTAB_SHNDX";
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case DT_CHECKSUM: return "CHECKSUM";
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case DT_PLTPADSZ: return "PLTPADSZ";
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@ -2340,6 +2341,29 @@ get_machine_name (unsigned e_machine)
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case EM_TILEGX: return "Tilera TILE-Gx multicore architecture family";
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case EM_CUDA: return "NVIDIA CUDA architecture";
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case EM_XGATE: return "Motorola XGATE embedded processor";
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case EM_CLOUDSHIELD: return "CloudShield architecture family";
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case EM_COREA_1ST: return "KIPO-KAIST Core-A 1st generation processor family";
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case EM_COREA_2ND: return "KIPO-KAIST Core-A 2nd generation processor family";
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case EM_OPEN8: return "Open8 8-bit RISC soft processor core";
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case EM_VIDEOCORE5: return "Broadcom VideoCore V processor";
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case EM_56800EX: return "Freescale 56800EX Digital Signal Controller (DSC)";
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case EM_BA1: return "Beyond BA1 CPU architecture";
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case EM_BA2: return "Beyond BA2 CPU architecture";
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case EM_XCORE: return "XMOS xCORE processor family";
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case EM_MCHP_PIC: return "Microchip 8-bit PIC(r) family";
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case EM_KM32: return "KM211 KM32 32-bit processor";
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case EM_KMX32: return "KM211 KMX32 32-bit processor";
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case EM_KMX16: return "KM211 KMX16 16-bit processor";
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case EM_KMX8: return "KM211 KMX8 8-bit processor";
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case EM_KVARC: return "KM211 KVARC processor";
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case EM_CDP: return "Paneve CDP architecture family";
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case EM_COGE: return "Cognitive Smart Memory Processor";
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case EM_COOL: return "Bluechip Systems CoolEngine";
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case EM_NORC: return "Nanoradio Optimized RISC";
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case EM_CSR_KALIMBA: return "CSR Kalimba architecture family";
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case EM_Z80: return "Zilog Z80";
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case EM_AMDGPU: return "AMD GPU architecture";
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case EM_RISCV: return "RISC-V";
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default:
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snprintf (buff, sizeof (buff), _("<unknown>: 0x%x"), e_machine);
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return buff;
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@ -3534,6 +3558,8 @@ get_osabi_name (unsigned int osabi)
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case ELFOSABI_NSK: return "HP - Non-Stop Kernel";
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case ELFOSABI_AROS: return "AROS";
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case ELFOSABI_FENIXOS: return "FenixOS";
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case ELFOSABI_CLOUDABI: return "Nuxi CloudABI";
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case ELFOSABI_OPENVOS: return "Stratus Technologies OpenVOS";
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default:
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if (osabi >= 64)
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switch (elf_header.e_machine)
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@ -6254,18 +6280,31 @@ static const char *
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get_group_flags (unsigned int flags)
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{
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static char buff[32];
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switch (flags)
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if (flags == 0)
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return "";
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else if (flags == GRP_COMDAT)
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return "COMDAT ";
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snprintf (buff, 14, _("[0x%x: "), flags);
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flags &= ~ GRP_COMDAT;
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if (flags & GRP_MASKOS)
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{
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case 0:
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return "";
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case GRP_COMDAT:
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return "COMDAT ";
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default:
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snprintf (buff, sizeof (buff), _("[<unknown>: 0x%x] "), flags);
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break;
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strcat (buff, "<OS specific>");
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flags &= ~ GRP_MASKOS;
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}
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if (flags & GRP_MASKPROC)
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{
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strcat (buff, "<PROC specific>");
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flags &= ~ GRP_MASKPROC;
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}
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if (flags)
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strcat (buff, "<unknown>");
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strcat (buff, "]");
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return buff;
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}
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@ -1,3 +1,14 @@
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2016-10-17 Nick Clifton <nickc@redhat.com>
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* elf/common.h (DT_SYMTAB_SHNDX): Define.
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(EM_CLOUDSHIELD, EM_COREA_1ST, EM_COREA_2ND, EM_OPEN8): Define.
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(EM_VIDEOCORE5, EM_56800EX, EM_BA1, EM_BA2, EM_XCORE): Define.
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(EM_MCHP_PIC, EM_KM32, EM_KMX32, EM_KMX16, EM_KMX8): Define.
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(EM_KVARC, EM_CDP, EM_COGE, EM_COOL, EM_NORC): Define.
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(EM_CSR_KALIMBA, EM_Z80, EM_AMDGPU, EM_RISCV): Define.
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(ELFOSABI_OPENVOS): Define.
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(GRP_MASKOS, GRP_MASKPROC): Define.
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2016-10-14 Pedro Alves <palves@redhat.com>
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* ansidecl.h [__cplusplus >= 201103 && GCC_VERSION < 4007] (FINAL,
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@ -74,6 +74,8 @@
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#define ELFOSABI_AROS 15 /* AROS */
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#define ELFOSABI_FENIXOS 16 /* FenixOS */
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#define ELFOSABI_CLOUDABI 17 /* Nuxi CloudABI */
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#define ELFOSABI_OPENVOS 18 /* Stratus Technologies OpenVOS */
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#define ELFOSABI_C6000_ELFABI 64 /* Bare-metal TMS320C6000 */
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#define ELFOSABI_C6000_LINUX 65 /* Linux TMS320C6000 */
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#define ELFOSABI_ARM 97 /* ARM */
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@ -289,23 +291,46 @@
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#define EM_AARCH64 183 /* ARM 64-bit architecture */
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#define EM_ARM184 184 /* Reserved by ARM */
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#define EM_AVR32 185 /* Atmel Corporation 32-bit microprocessor family */
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#define EM_STM8 186 /* STMicroeletronics STM8 8-bit microcontroller */
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#define EM_STM8 186 /* STMicroeletronics STM8 8-bit microcontroller */
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#define EM_TILE64 187 /* Tilera TILE64 multicore architecture family */
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#define EM_TILEPRO 188 /* Tilera TILEPro multicore architecture family */
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#define EM_MICROBLAZE 189 /* Xilinx MicroBlaze 32-bit RISC soft processor core */
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#define EM_CUDA 190 /* NVIDIA CUDA architecture */
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#define EM_TILEGX 191 /* Tilera TILE-Gx multicore architecture family */
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#define EM_CLOUDSHIELD 192 /* CloudShield architecture family */
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#define EM_COREA_1ST 193 /* KIPO-KAIST Core-A 1st generation processor family */
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#define EM_COREA_2ND 194 /* KIPO-KAIST Core-A 2nd generation processor family */
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#define EM_ARC_COMPACT2 195 /* Synopsys ARCompact V2 */
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#define EM_OPEN8 196 /* Open8 8-bit RISC soft processor core */
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#define EM_RL78 197 /* Renesas RL78 family. */
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#define EM_VIDEOCORE5 198 /* Broadcom VideoCore V processor */
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#define EM_78K0R 199 /* Renesas 78K0R. */
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#define EM_56800EX 200 /* Freescale 56800EX Digital Signal Controller (DSC) */
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#define EM_BA1 201 /* Beyond BA1 CPU architecture */
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#define EM_BA2 202 /* Beyond BA2 CPU architecture */
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#define EM_XCORE 203 /* XMOS xCORE processor family */
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#define EM_MCHP_PIC 204 /* Microchip 8-bit PIC(r) family */
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#define EM_INTEL205 205 /* Reserved by Intel */
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#define EM_INTEL206 206 /* Reserved by Intel */
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#define EM_INTEL207 207 /* Reserved by Intel */
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#define EM_INTEL208 208 /* Reserved by Intel */
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#define EM_INTEL209 209 /* Reserved by Intel */
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#define EM_KM32 210 /* KM211 KM32 32-bit processor */
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#define EM_KMX32 211 /* KM211 KMX32 32-bit processor */
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#define EM_KMX16 212 /* KM211 KMX16 16-bit processor */
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#define EM_KMX8 213 /* KM211 KMX8 8-bit processor */
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#define EM_KVARC 214 /* KM211 KVARC processor */
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#define EM_CDP 215 /* Paneve CDP architecture family */
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#define EM_COGE 216 /* Cognitive Smart Memory Processor */
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#define EM_COOL 217 /* Bluechip Systems CoolEngine */
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#define EM_NORC 218 /* Nanoradio Optimized RISC */
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#define EM_CSR_KALIMBA 219 /* CSR Kalimba architecture family */
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#define EM_Z80 220 /* Zilog Z80 */
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#define EM_VISIUM 221 /* Controls and Data Services VISIUMcore processor */
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#define EM_FT32 222 /* FTDI Chip FT32 high performance 32-bit RISC architecture */
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#define EM_MOXIE 223 /* Moxie processor family */
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#define EM_AMDGPU 224 /* AMD GPU architecture */
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#define EM_RISCV 243 /* RISC-V */
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/* If it is necessary to assign new unofficial EM_* values, please pick large
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random numbers (0x8523, 0xa7f2, etc.) to minimize the chances of collision
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@ -523,7 +548,7 @@
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are not to be further
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relocated. */
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/* Compression types */
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/* Compression types. */
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#define ELFCOMPRESS_ZLIB 1 /* Compressed with zlib. */
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#define ELFCOMPRESS_LOOS 0x60000000 /* OS-specific semantics, lo */
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#define ELFCOMPRESS_HIOS 0x6FFFFFFF /* OS-specific semantics, hi */
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@ -774,6 +799,7 @@
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#define DT_ENCODING 32
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#define DT_PREINIT_ARRAY 32
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#define DT_PREINIT_ARRAYSZ 33
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#define DT_SYMTAB_SHNDX 34
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/* Note, the Oct 4, 1999 draft of the ELF ABI changed the values
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for DT_LOOS and DT_HIOS. Some implementations however, use
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@ -962,6 +988,8 @@
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/* Section Group Flags. */
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#define GRP_COMDAT 0x1 /* A COMDAT group */
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#define GRP_MASKOS 0x0ff00000 /* Bits in this range reserved for OS specific use. */
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#define GRP_MASKPROC 0xf0000000 /* Bits in this range reserved for processor use. */
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/* Auxv a_type values. */
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